| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* arch/arm/mach-imx/include/mach/debug-macro.S |
| 2 | * |
| 3 | * Debugging macro include header |
| 4 | * |
| 5 | * Copyright (C) 1994-1999 Russell King |
| 6 | * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | */ |
| Uwe Kleine-König | 4e41db8 | 2010-01-25 18:23:04 +0100 | [diff] [blame] | 13 | #define IMX_NEEDS_DEPRECATED_SYMBOLS |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 14 | |
| Sascha Hauer | ccc1a6f | 2009-06-04 13:45:37 +0200 | [diff] [blame] | 15 | #ifdef CONFIG_ARCH_MX1 |
| 16 | #include <mach/mx1.h> |
| 17 | #define UART_PADDR UART1_BASE_ADDR |
| 18 | #define UART_VADDR IO_ADDRESS(UART1_BASE_ADDR) |
| 19 | #endif |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 20 | |
| Sascha Hauer | 8c25c36 | 2009-06-04 11:32:12 +0200 | [diff] [blame] | 21 | #ifdef CONFIG_ARCH_MX25 |
| 22 | #ifdef UART_PADDR |
| 23 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
| 24 | #endif |
| 25 | #include <mach/mx25.h> |
| Eric Bénard | 7e688f0 | 2010-07-16 15:09:06 +0200 | [diff] [blame] | 26 | #define UART_PADDR MX25_UART1_BASE_ADDR |
| 27 | #define UART_VADDR MX25_AIPS1_IO_ADDRESS(MX25_UART1_BASE_ADDR) |
| Sascha Hauer | 8c25c36 | 2009-06-04 11:32:12 +0200 | [diff] [blame] | 28 | #endif |
| 29 | |
| Sascha Hauer | ccc1a6f | 2009-06-04 13:45:37 +0200 | [diff] [blame] | 30 | #ifdef CONFIG_ARCH_MX2 |
| 31 | #ifdef UART_PADDR |
| 32 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 33 | #endif |
| Sascha Hauer | ccc1a6f | 2009-06-04 13:45:37 +0200 | [diff] [blame] | 34 | #include <mach/mx2x.h> |
| 35 | #define UART_PADDR UART1_BASE_ADDR |
| 36 | #define UART_VADDR AIPI_IO_ADDRESS(UART1_BASE_ADDR) |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 37 | #endif |
| Sascha Hauer | ccc1a6f | 2009-06-04 13:45:37 +0200 | [diff] [blame] | 38 | |
| 39 | #ifdef CONFIG_ARCH_MX3 |
| 40 | #ifdef UART_PADDR |
| 41 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 42 | #endif |
| Sascha Hauer | ccc1a6f | 2009-06-04 13:45:37 +0200 | [diff] [blame] | 43 | #include <mach/mx3x.h> |
| 44 | #define UART_PADDR UART1_BASE_ADDR |
| 45 | #define UART_VADDR AIPS1_IO_ADDRESS(UART1_BASE_ADDR) |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 46 | #endif |
| Sascha Hauer | ccc1a6f | 2009-06-04 13:45:37 +0200 | [diff] [blame] | 47 | |
| Amit Kucheria | 438caa3 | 2010-02-04 12:09:40 -0800 | [diff] [blame] | 48 | #ifdef CONFIG_ARCH_MX5 |
| 49 | #ifdef UART_PADDR |
| 50 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
| 51 | #endif |
| 52 | #include <mach/mx51.h> |
| 53 | #define UART_PADDR MX51_UART1_BASE_ADDR |
| 54 | #define UART_VADDR MX51_AIPS1_IO_ADDRESS(MX51_UART1_BASE_ADDR) |
| 55 | #endif |
| 56 | |
| Dmitriy Taychenachev | fd6ac7b | 2009-07-31 20:29:22 +0900 | [diff] [blame] | 57 | #ifdef CONFIG_ARCH_MXC91231 |
| 58 | #ifdef UART_PADDR |
| 59 | #error "CONFIG_DEBUG_LL is incompatible with multiple archs" |
| 60 | #endif |
| 61 | #include <mach/mxc91231.h> |
| 62 | #define UART_PADDR MXC91231_UART2_BASE_ADDR |
| Uwe Kleine-König | 9ea07ec | 2010-01-13 18:07:11 +0100 | [diff] [blame] | 63 | #define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR) |
| Dmitriy Taychenachev | fd6ac7b | 2009-07-31 20:29:22 +0900 | [diff] [blame] | 64 | #endif |
| Jeremy Kerr | 0ea1293 | 2010-07-06 18:30:06 +0800 | [diff] [blame] | 65 | .macro addruart, rp, rv |
| 66 | ldr \rp, =UART_PADDR @ physical |
| 67 | ldr \rv, =UART_VADDR @ virtual |
| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 68 | .endm |
| 69 | |
| 70 | .macro senduart,rd,rx |
| 71 | str \rd, [\rx, #0x40] @ TXDATA |
| 72 | .endm |
| 73 | |
| 74 | .macro waituart,rd,rx |
| 75 | .endm |
| 76 | |
| 77 | .macro busyuart,rd,rx |
| 78 | 1002: ldr \rd, [\rx, #0x98] @ SR2 |
| 79 | tst \rd, #1 << 3 @ TXDC |
| 80 | beq 1002b @ wait until transmit done |
| 81 | .endm |