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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
2 */
Dave Airlie0d6aa602006-01-02 20:14:23 +11003/*
Dave Airliebc54fd12005-06-23 22:46:46 +10004 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07005 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * All Rights Reserved.
Dave Airliebc54fd12005-06-23 22:46:46 +10007 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
18 * of the Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 *
Dave Airlie0d6aa602006-01-02 20:14:23 +110028 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070029
Jesse Barnes5669fca2009-02-17 15:13:31 -080030#include <linux/device.h>
David Howells760285e2012-10-02 18:01:07 +010031#include <drm/drmP.h>
32#include <drm/i915_drm.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include "i915_drv.h"
Chris Wilson990bbda2012-07-02 11:51:02 -030034#include "i915_trace.h"
Kenneth Graunkef49f0582010-09-11 01:19:14 -070035#include "intel_drv.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
Jesse Barnes79e53942008-11-07 14:24:08 -080037#include <linux/console.h>
Paul Gortmakere0cd3602011-08-30 11:04:30 -040038#include <linux/module.h>
David Howells760285e2012-10-02 18:01:07 +010039#include <drm/drm_crtc_helper.h>
Jesse Barnes79e53942008-11-07 14:24:08 -080040
Ben Widawskya35d9d32011-07-13 14:38:17 -070041static int i915_modeset __read_mostly = -1;
Jesse Barnes79e53942008-11-07 14:24:08 -080042module_param_named(modeset, i915_modeset, int, 0400);
Ben Widawsky6e96e772011-07-13 14:38:18 -070043MODULE_PARM_DESC(modeset,
44 "Use kernel modesetting [KMS] (0=DRM_I915_KMS from .config, "
45 "1=on, -1=force vga console preference [default])");
Jesse Barnes79e53942008-11-07 14:24:08 -080046
Ben Widawskya35d9d32011-07-13 14:38:17 -070047unsigned int i915_fbpercrtc __always_unused = 0;
Jesse Barnes79e53942008-11-07 14:24:08 -080048module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
Linus Torvalds1da177e2005-04-16 15:20:36 -070049
Daniel Vettera7269152012-11-20 14:50:08 +010050int i915_panel_ignore_lid __read_mostly = 1;
Chris Wilsonfca87402011-02-17 13:44:48 +000051module_param_named(panel_ignore_lid, i915_panel_ignore_lid, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070052MODULE_PARM_DESC(panel_ignore_lid,
Daniel Vettera7269152012-11-20 14:50:08 +010053 "Override lid status (0=autodetect, 1=autodetect disabled [default], "
54 "-1=force lid closed, -2=force lid open)");
Chris Wilsonfca87402011-02-17 13:44:48 +000055
Ben Widawskya35d9d32011-07-13 14:38:17 -070056unsigned int i915_powersave __read_mostly = 1;
Chris Wilson0aa99272010-11-02 09:20:50 +000057module_param_named(powersave, i915_powersave, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070058MODULE_PARM_DESC(powersave,
59 "Enable powersavings, fbc, downclocking, etc. (default: true)");
Jesse Barnes652c3932009-08-17 13:31:43 -070060
Eugeni Dodonovf45b5552011-12-09 17:16:37 -080061int i915_semaphores __read_mostly = -1;
Chris Wilsona1656b92011-03-04 18:48:03 +000062module_param_named(semaphores, i915_semaphores, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070063MODULE_PARM_DESC(semaphores,
Eugeni Dodonovf45b5552011-12-09 17:16:37 -080064 "Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))");
Chris Wilsona1656b92011-03-04 18:48:03 +000065
Keith Packardc0f372b32011-11-16 22:24:52 -080066int i915_enable_rc6 __read_mostly = -1;
Jesse Barnesf57f9c12012-04-11 09:39:02 -070067module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400);
Ben Widawsky6e96e772011-07-13 14:38:18 -070068MODULE_PARM_DESC(i915_enable_rc6,
Eugeni Dodonov83b7f9a2012-03-23 11:57:18 -030069 "Enable power-saving render C-state 6. "
70 "Different stages can be selected via bitmask values "
71 "(0 = disable; 1 = enable rc6; 2 = enable deep rc6; 4 = enable deepest rc6). "
72 "For example, 3 would enable rc6 and deep rc6, and 7 would enable everything. "
73 "default: -1 (use per-chip default)");
Chris Wilsonac668082011-02-09 16:15:32 +000074
Keith Packard4415e632011-11-09 09:57:50 -080075int i915_enable_fbc __read_mostly = -1;
Jesse Barnesc1a9f042011-05-05 15:24:21 -070076module_param_named(i915_enable_fbc, i915_enable_fbc, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070077MODULE_PARM_DESC(i915_enable_fbc,
78 "Enable frame buffer compression for power savings "
Keith Packardcd0de032011-09-19 21:34:19 -070079 "(default: -1 (use per-chip default))");
Jesse Barnesc1a9f042011-05-05 15:24:21 -070080
Ben Widawskya35d9d32011-07-13 14:38:17 -070081unsigned int i915_lvds_downclock __read_mostly = 0;
Jesse Barnes33814342010-01-14 20:48:02 +000082module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
Ben Widawsky6e96e772011-07-13 14:38:18 -070083MODULE_PARM_DESC(lvds_downclock,
84 "Use panel (LVDS/eDP) downclocking for power savings "
85 "(default: false)");
Jesse Barnes33814342010-01-14 20:48:02 +000086
Takashi Iwai121d5272012-03-20 13:07:06 +010087int i915_lvds_channel_mode __read_mostly;
88module_param_named(lvds_channel_mode, i915_lvds_channel_mode, int, 0600);
89MODULE_PARM_DESC(lvds_channel_mode,
90 "Specify LVDS channel mode "
91 "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
92
Keith Packard4415e632011-11-09 09:57:50 -080093int i915_panel_use_ssc __read_mostly = -1;
Chris Wilsona7615032011-01-12 17:04:08 +000094module_param_named(lvds_use_ssc, i915_panel_use_ssc, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -070095MODULE_PARM_DESC(lvds_use_ssc,
96 "Use Spread Spectrum Clock with panels [LVDS/eDP] "
Keith Packard72bbe582011-09-26 16:09:45 -070097 "(default: auto from VBT)");
Chris Wilsona7615032011-01-12 17:04:08 +000098
Ben Widawskya35d9d32011-07-13 14:38:17 -070099int i915_vbt_sdvo_panel_type __read_mostly = -1;
Chris Wilson5a1e5b62011-01-29 16:50:25 +0000100module_param_named(vbt_sdvo_panel_type, i915_vbt_sdvo_panel_type, int, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -0700101MODULE_PARM_DESC(vbt_sdvo_panel_type,
Mathias Fröhlichc10e4082012-03-01 06:44:35 +0100102 "Override/Ignore selection of SDVO panel mode in the VBT "
103 "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
Chris Wilson5a1e5b62011-01-29 16:50:25 +0000104
Ben Widawskya35d9d32011-07-13 14:38:17 -0700105static bool i915_try_reset __read_mostly = true;
Chris Wilsond78cb502010-12-23 13:33:15 +0000106module_param_named(reset, i915_try_reset, bool, 0600);
Ben Widawsky6e96e772011-07-13 14:38:18 -0700107MODULE_PARM_DESC(reset, "Attempt GPU resets (default: true)");
Chris Wilsond78cb502010-12-23 13:33:15 +0000108
Ben Widawskya35d9d32011-07-13 14:38:17 -0700109bool i915_enable_hangcheck __read_mostly = true;
Ben Widawsky3e0dc6b2011-06-29 10:26:42 -0700110module_param_named(enable_hangcheck, i915_enable_hangcheck, bool, 0644);
Ben Widawsky6e96e772011-07-13 14:38:18 -0700111MODULE_PARM_DESC(enable_hangcheck,
112 "Periodically check GPU activity for detecting hangs. "
113 "WARNING: Disabling this can cause system wide hangs. "
114 "(default: true)");
Ben Widawsky3e0dc6b2011-06-29 10:26:42 -0700115
Daniel Vetter650dc072012-04-02 10:08:35 +0200116int i915_enable_ppgtt __read_mostly = -1;
117module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
Daniel Vettere21af882012-02-09 20:53:27 +0100118MODULE_PARM_DESC(i915_enable_ppgtt,
119 "Enable PPGTT (default: true)");
120
Rodrigo Vivi105b7c12013-07-11 18:45:02 -0300121int i915_enable_psr __read_mostly = 0;
122module_param_named(enable_psr, i915_enable_psr, int, 0600);
123MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
124
Josh Triplett99486b82013-08-13 16:23:17 -0700125unsigned int i915_preliminary_hw_support __read_mostly = IS_ENABLED(CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT);
Rodrigo Vivi0a3af262012-10-15 17:16:23 -0300126module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
127MODULE_PARM_DESC(preliminary_hw_support,
Josh Triplett99486b82013-08-13 16:23:17 -0700128 "Enable preliminary hardware support.");
Rodrigo Vivi0a3af262012-10-15 17:16:23 -0300129
Paulo Zanonibf51d5e2013-07-03 17:12:13 -0300130int i915_disable_power_well __read_mostly = 1;
Paulo Zanoni2124b722013-03-22 14:07:23 -0300131module_param_named(disable_power_well, i915_disable_power_well, int, 0600);
132MODULE_PARM_DESC(disable_power_well,
Paulo Zanonibf51d5e2013-07-03 17:12:13 -0300133 "Disable the power well when possible (default: true)");
Paulo Zanoni2124b722013-03-22 14:07:23 -0300134
Paulo Zanoni3c4ca582013-05-31 16:33:23 -0300135int i915_enable_ips __read_mostly = 1;
136module_param_named(enable_ips, i915_enable_ips, int, 0600);
137MODULE_PARM_DESC(enable_ips, "Enable IPS (default: true)");
138
Jesse Barnes2385bdf2013-06-26 01:38:15 +0300139bool i915_fastboot __read_mostly = 0;
140module_param_named(fastboot, i915_fastboot, bool, 0600);
141MODULE_PARM_DESC(fastboot, "Try to skip unnecessary mode sets at boot time "
142 "(default: false)");
143
Paulo Zanonie27e9702013-08-19 13:18:12 -0300144int i915_enable_pc8 __read_mostly = 1;
Paulo Zanonic67a4702013-08-19 13:18:09 -0300145module_param_named(enable_pc8, i915_enable_pc8, int, 0600);
Paulo Zanonie27e9702013-08-19 13:18:12 -0300146MODULE_PARM_DESC(enable_pc8, "Enable support for low power package C states (PC8+) (default: true)");
Paulo Zanonic67a4702013-08-19 13:18:09 -0300147
Paulo Zanoni90058742013-08-19 13:18:11 -0300148int i915_pc8_timeout __read_mostly = 5000;
149module_param_named(pc8_timeout, i915_pc8_timeout, int, 0600);
150MODULE_PARM_DESC(pc8_timeout, "Number of msecs of idleness required to enter PC8+ (default: 5000)");
151
Xiong Zhang0b74b502013-07-19 13:51:24 +0800152bool i915_prefault_disable __read_mostly;
153module_param_named(prefault_disable, i915_prefault_disable, bool, 0600);
154MODULE_PARM_DESC(prefault_disable,
155 "Disable page prefaulting for pread/pwrite/reloc (default:false). For developers only.");
156
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500157static struct drm_driver driver;
Zhenyu Wang1f7a6e32010-02-23 14:05:24 +0800158extern int intel_agp_enabled;
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500159
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200160static const struct intel_device_info intel_i830_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700161 .gen = 2, .is_mobile = 1, .cursor_needs_physical = 1, .num_pipes = 2,
Chris Wilson315781482010-08-12 09:42:51 +0100162 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500163};
164
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200165static const struct intel_device_info intel_845g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700166 .gen = 2, .num_pipes = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100167 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500168};
169
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200170static const struct intel_device_info intel_i85x_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700171 .gen = 2, .is_i85x = 1, .is_mobile = 1, .num_pipes = 2,
Adam Jackson5ce8ba72010-04-15 14:03:30 -0400172 .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100173 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500174};
175
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200176static const struct intel_device_info intel_i865g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700177 .gen = 2, .num_pipes = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100178 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500179};
180
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200181static const struct intel_device_info intel_i915g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700182 .gen = 3, .is_i915g = 1, .cursor_needs_physical = 1, .num_pipes = 2,
Chris Wilson315781482010-08-12 09:42:51 +0100183 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500184};
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200185static const struct intel_device_info intel_i915gm_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700186 .gen = 3, .is_mobile = 1, .num_pipes = 2,
Kristian Høgsbergb295d1b2009-12-16 15:16:17 -0500187 .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100188 .has_overlay = 1, .overlay_needs_physical = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100189 .supports_tv = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500190};
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200191static const struct intel_device_info intel_i945g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700192 .gen = 3, .has_hotplug = 1, .cursor_needs_physical = 1, .num_pipes = 2,
Chris Wilson315781482010-08-12 09:42:51 +0100193 .has_overlay = 1, .overlay_needs_physical = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500194};
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200195static const struct intel_device_info intel_i945gm_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700196 .gen = 3, .is_i945gm = 1, .is_mobile = 1, .num_pipes = 2,
Kristian Høgsbergb295d1b2009-12-16 15:16:17 -0500197 .has_hotplug = 1, .cursor_needs_physical = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100198 .has_overlay = 1, .overlay_needs_physical = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100199 .supports_tv = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500200};
201
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200202static const struct intel_device_info intel_i965g_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700203 .gen = 4, .is_broadwater = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100204 .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100205 .has_overlay = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500206};
207
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200208static const struct intel_device_info intel_i965gm_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700209 .gen = 4, .is_crestline = 1, .num_pipes = 2,
Chris Wilsone3c4e5d2010-12-05 16:49:51 +0000210 .is_mobile = 1, .has_fbc = 1, .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100211 .has_overlay = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100212 .supports_tv = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500213};
214
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200215static const struct intel_device_info intel_g33_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700216 .gen = 3, .is_g33 = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100217 .need_gfx_hws = 1, .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100218 .has_overlay = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500219};
220
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200221static const struct intel_device_info intel_g45_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700222 .gen = 4, .is_g4x = 1, .need_gfx_hws = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100223 .has_pipe_cxsr = 1, .has_hotplug = 1,
Xiang, Haihao92f49d92010-09-16 10:43:10 +0800224 .has_bsd_ring = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500225};
226
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200227static const struct intel_device_info intel_gm45_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700228 .gen = 4, .is_g4x = 1, .num_pipes = 2,
Chris Wilsone3c4e5d2010-12-05 16:49:51 +0000229 .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100230 .has_pipe_cxsr = 1, .has_hotplug = 1,
Chris Wilsona6c45cf2010-09-17 00:32:17 +0100231 .supports_tv = 1,
Xiang, Haihao92f49d92010-09-16 10:43:10 +0800232 .has_bsd_ring = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500233};
234
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200235static const struct intel_device_info intel_pineview_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700236 .gen = 3, .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100237 .need_gfx_hws = 1, .has_hotplug = 1,
Chris Wilson315781482010-08-12 09:42:51 +0100238 .has_overlay = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500239};
240
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200241static const struct intel_device_info intel_ironlake_d_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700242 .gen = 5, .num_pipes = 2,
Eugeni Dodonov5a117db2012-01-05 09:34:29 -0200243 .need_gfx_hws = 1, .has_hotplug = 1,
Xiang, Haihao92f49d92010-09-16 10:43:10 +0800244 .has_bsd_ring = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500245};
246
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200247static const struct intel_device_info intel_ironlake_m_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700248 .gen = 5, .is_mobile = 1, .num_pipes = 2,
Chris Wilsone3c4e5d2010-12-05 16:49:51 +0000249 .need_gfx_hws = 1, .has_hotplug = 1,
Jesse Barnesc1a9f042011-05-05 15:24:21 -0700250 .has_fbc = 1,
Xiang, Haihao92f49d92010-09-16 10:43:10 +0800251 .has_bsd_ring = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500252};
253
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200254static const struct intel_device_info intel_sandybridge_d_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700255 .gen = 6, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100256 .need_gfx_hws = 1, .has_hotplug = 1,
Xiang, Haihao881f47b2010-09-19 14:40:43 +0100257 .has_bsd_ring = 1,
Chris Wilson549f7362010-10-19 11:19:32 +0100258 .has_blt_ring = 1,
Eugeni Dodonov3d29b842012-01-17 14:43:53 -0200259 .has_llc = 1,
Eric Anholtf6e450a2009-11-02 12:08:22 -0800260};
261
Tobias Klauser9a7e8492010-05-20 10:33:46 +0200262static const struct intel_device_info intel_sandybridge_m_info = {
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700263 .gen = 6, .is_mobile = 1, .num_pipes = 2,
Chris Wilsonc96c3a8c2010-08-11 09:59:24 +0100264 .need_gfx_hws = 1, .has_hotplug = 1,
Yuanhan Liu9c04f012010-12-15 15:42:32 +0800265 .has_fbc = 1,
Xiang, Haihao881f47b2010-09-19 14:40:43 +0100266 .has_bsd_ring = 1,
Chris Wilson549f7362010-10-19 11:19:32 +0100267 .has_blt_ring = 1,
Eugeni Dodonov3d29b842012-01-17 14:43:53 -0200268 .has_llc = 1,
Eric Anholta13e4092010-01-07 15:08:18 -0800269};
270
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700271#define GEN7_FEATURES \
272 .gen = 7, .num_pipes = 3, \
273 .need_gfx_hws = 1, .has_hotplug = 1, \
274 .has_bsd_ring = 1, \
275 .has_blt_ring = 1, \
Ben Widawskyab484f82013-10-05 17:57:11 -0700276 .has_llc = 1
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700277
Jesse Barnesc76b6152011-04-28 14:32:07 -0700278static const struct intel_device_info intel_ivybridge_d_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700279 GEN7_FEATURES,
280 .is_ivybridge = 1,
Jesse Barnesc76b6152011-04-28 14:32:07 -0700281};
282
283static const struct intel_device_info intel_ivybridge_m_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700284 GEN7_FEATURES,
285 .is_ivybridge = 1,
286 .is_mobile = 1,
Rodrigo Viviabe959c2013-05-06 19:37:33 -0300287 .has_fbc = 1,
Jesse Barnesc76b6152011-04-28 14:32:07 -0700288};
289
Ben Widawsky999bcde2013-04-05 13:12:45 -0700290static const struct intel_device_info intel_ivybridge_q_info = {
291 GEN7_FEATURES,
292 .is_ivybridge = 1,
293 .num_pipes = 0, /* legal, last one wins */
294};
295
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700296static const struct intel_device_info intel_valleyview_m_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700297 GEN7_FEATURES,
298 .is_mobile = 1,
299 .num_pipes = 2,
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700300 .is_valleyview = 1,
Ville Syrjäläfba5d532013-01-24 15:29:56 +0200301 .display_mmio_offset = VLV_DISPLAY_BASE,
Ben Widawsky30ccd962013-04-15 21:48:03 -0700302 .has_llc = 0, /* legal, last one wins */
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700303};
304
305static const struct intel_device_info intel_valleyview_d_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700306 GEN7_FEATURES,
307 .num_pipes = 2,
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700308 .is_valleyview = 1,
Ville Syrjäläfba5d532013-01-24 15:29:56 +0200309 .display_mmio_offset = VLV_DISPLAY_BASE,
Ben Widawsky30ccd962013-04-15 21:48:03 -0700310 .has_llc = 0, /* legal, last one wins */
Jesse Barnes70a3eb72012-03-28 13:39:21 -0700311};
312
Eugeni Dodonov4cae9ae2012-03-29 12:32:18 -0300313static const struct intel_device_info intel_haswell_d_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700314 GEN7_FEATURES,
315 .is_haswell = 1,
Damien Lespiaudd93be52013-04-22 18:40:39 +0100316 .has_ddi = 1,
Damien Lespiau30568c42013-04-22 18:40:41 +0100317 .has_fpga_dbg = 1,
Xiang, Haihaof72a1182013-05-28 19:22:22 -0700318 .has_vebox_ring = 1,
Eugeni Dodonov4cae9ae2012-03-29 12:32:18 -0300319};
320
321static const struct intel_device_info intel_haswell_m_info = {
Ben Widawsky219f4fd2013-03-15 11:17:54 -0700322 GEN7_FEATURES,
323 .is_haswell = 1,
324 .is_mobile = 1,
Damien Lespiaudd93be52013-04-22 18:40:39 +0100325 .has_ddi = 1,
Damien Lespiau30568c42013-04-22 18:40:41 +0100326 .has_fpga_dbg = 1,
Rodrigo Vivi891348b2013-05-06 19:37:36 -0300327 .has_fbc = 1,
Xiang, Haihaof72a1182013-05-28 19:22:22 -0700328 .has_vebox_ring = 1,
Kristian Høgsbergcfdf1fa2009-12-16 15:16:16 -0500329};
330
Jesse Barnesa0a18072013-07-26 13:32:51 -0700331/*
332 * Make sure any device matches here are from most specific to most
333 * general. For example, since the Quanta match is based on the subsystem
334 * and subvendor IDs, we need it to come before the more general IVB
335 * PCI ID matches, otherwise we'll use the wrong info struct above.
336 */
337#define INTEL_PCI_IDS \
338 INTEL_I830_IDS(&intel_i830_info), \
339 INTEL_I845G_IDS(&intel_845g_info), \
340 INTEL_I85X_IDS(&intel_i85x_info), \
341 INTEL_I865G_IDS(&intel_i865g_info), \
342 INTEL_I915G_IDS(&intel_i915g_info), \
343 INTEL_I915GM_IDS(&intel_i915gm_info), \
344 INTEL_I945G_IDS(&intel_i945g_info), \
345 INTEL_I945GM_IDS(&intel_i945gm_info), \
346 INTEL_I965G_IDS(&intel_i965g_info), \
347 INTEL_G33_IDS(&intel_g33_info), \
348 INTEL_I965GM_IDS(&intel_i965gm_info), \
349 INTEL_GM45_IDS(&intel_gm45_info), \
350 INTEL_G45_IDS(&intel_g45_info), \
351 INTEL_PINEVIEW_IDS(&intel_pineview_info), \
352 INTEL_IRONLAKE_D_IDS(&intel_ironlake_d_info), \
353 INTEL_IRONLAKE_M_IDS(&intel_ironlake_m_info), \
354 INTEL_SNB_D_IDS(&intel_sandybridge_d_info), \
355 INTEL_SNB_M_IDS(&intel_sandybridge_m_info), \
356 INTEL_IVB_Q_IDS(&intel_ivybridge_q_info), /* must be first IVB */ \
357 INTEL_IVB_M_IDS(&intel_ivybridge_m_info), \
358 INTEL_IVB_D_IDS(&intel_ivybridge_d_info), \
359 INTEL_HSW_D_IDS(&intel_haswell_d_info), \
360 INTEL_HSW_M_IDS(&intel_haswell_m_info), \
361 INTEL_VLV_M_IDS(&intel_valleyview_m_info), \
362 INTEL_VLV_D_IDS(&intel_valleyview_d_info)
363
Chris Wilson6103da02010-07-05 18:01:47 +0100364static const struct pci_device_id pciidlist[] = { /* aka */
Jesse Barnesa0a18072013-07-26 13:32:51 -0700365 INTEL_PCI_IDS,
Kristian Høgsberg49ae35f2009-12-16 15:16:15 -0500366 {0, 0, 0}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367};
368
Jesse Barnes79e53942008-11-07 14:24:08 -0800369#if defined(CONFIG_DRM_I915_KMS)
370MODULE_DEVICE_TABLE(pci, pciidlist);
371#endif
372
Akshay Joshi0206e352011-08-16 15:34:10 -0400373void intel_detect_pch(struct drm_device *dev)
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800374{
375 struct drm_i915_private *dev_priv = dev->dev_private;
376 struct pci_dev *pch;
377
Ben Widawskyce1bb322013-04-05 13:12:44 -0700378 /* In all current cases, num_pipes is equivalent to the PCH_NOP setting
379 * (which really amounts to a PCH but no South Display).
380 */
381 if (INTEL_INFO(dev)->num_pipes == 0) {
382 dev_priv->pch_type = PCH_NOP;
Ben Widawskyce1bb322013-04-05 13:12:44 -0700383 return;
384 }
385
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800386 /*
387 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
388 * make graphics device passthrough work easy for VMM, that only
389 * need to expose ISA bridge to let driver know the real hardware
390 * underneath. This is a requirement from virtualization team.
Rui Guo6a9c4b32013-06-19 21:10:23 +0800391 *
392 * In some virtualized environments (e.g. XEN), there is irrelevant
393 * ISA bridge in the system. To work reliably, we should scan trhough
394 * all the ISA bridge devices and check for the first match, instead
395 * of only checking the first one.
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800396 */
397 pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
Rui Guo6a9c4b32013-06-19 21:10:23 +0800398 while (pch) {
399 struct pci_dev *curr = pch;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800400 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
Paulo Zanoni17a303e2012-11-20 15:12:07 -0200401 unsigned short id;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800402 id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
Paulo Zanoni17a303e2012-11-20 15:12:07 -0200403 dev_priv->pch_id = id;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800404
Jesse Barnes90711d52011-04-28 14:48:02 -0700405 if (id == INTEL_PCH_IBX_DEVICE_ID_TYPE) {
406 dev_priv->pch_type = PCH_IBX;
407 DRM_DEBUG_KMS("Found Ibex Peak PCH\n");
Daniel Vetter7fcb83c2012-10-31 22:52:27 +0100408 WARN_ON(!IS_GEN5(dev));
Jesse Barnes90711d52011-04-28 14:48:02 -0700409 } else if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800410 dev_priv->pch_type = PCH_CPT;
411 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
Daniel Vetter7fcb83c2012-10-31 22:52:27 +0100412 WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
Jesse Barnesc7925132011-04-07 12:33:56 -0700413 } else if (id == INTEL_PCH_PPT_DEVICE_ID_TYPE) {
414 /* PantherPoint is CPT compatible */
415 dev_priv->pch_type = PCH_CPT;
Jani Nikula492ab662013-10-01 12:12:33 +0300416 DRM_DEBUG_KMS("Found PantherPoint PCH\n");
Daniel Vetter7fcb83c2012-10-31 22:52:27 +0100417 WARN_ON(!(IS_GEN6(dev) || IS_IVYBRIDGE(dev)));
Eugeni Dodonoveb877eb2012-03-29 12:32:20 -0300418 } else if (id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
419 dev_priv->pch_type = PCH_LPT;
420 DRM_DEBUG_KMS("Found LynxPoint PCH\n");
Daniel Vetter7fcb83c2012-10-31 22:52:27 +0100421 WARN_ON(!IS_HASWELL(dev));
Paulo Zanoni08e14132013-04-12 18:16:54 -0300422 WARN_ON(IS_ULT(dev));
Wei Shun Changae6935d2012-11-12 18:54:13 -0200423 } else if (id == INTEL_PCH_LPT_LP_DEVICE_ID_TYPE) {
424 dev_priv->pch_type = PCH_LPT;
Wei Shun Changae6935d2012-11-12 18:54:13 -0200425 DRM_DEBUG_KMS("Found LynxPoint LP PCH\n");
426 WARN_ON(!IS_HASWELL(dev));
Paulo Zanoni08e14132013-04-12 18:16:54 -0300427 WARN_ON(!IS_ULT(dev));
Rui Guo6a9c4b32013-06-19 21:10:23 +0800428 } else {
429 goto check_next;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800430 }
Rui Guo6a9c4b32013-06-19 21:10:23 +0800431 pci_dev_put(pch);
432 break;
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800433 }
Rui Guo6a9c4b32013-06-19 21:10:23 +0800434check_next:
435 pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, curr);
436 pci_dev_put(curr);
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800437 }
Rui Guo6a9c4b32013-06-19 21:10:23 +0800438 if (!pch)
439 DRM_DEBUG_KMS("No PCH found?\n");
Zhenyu Wang3bad0782010-04-07 16:15:53 +0800440}
441
Ben Widawsky2911a352012-04-05 14:47:36 -0700442bool i915_semaphore_is_enabled(struct drm_device *dev)
443{
444 if (INTEL_INFO(dev)->gen < 6)
445 return 0;
446
447 if (i915_semaphores >= 0)
448 return i915_semaphores;
449
Daniel Vetter59de3292012-04-02 20:48:43 +0200450#ifdef CONFIG_INTEL_IOMMU
Ben Widawsky2911a352012-04-05 14:47:36 -0700451 /* Enable semaphores on SNB when IO remapping is off */
Daniel Vetter59de3292012-04-02 20:48:43 +0200452 if (INTEL_INFO(dev)->gen == 6 && intel_iommu_gfx_mapped)
453 return false;
454#endif
Ben Widawsky2911a352012-04-05 14:47:36 -0700455
456 return 1;
457}
458
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100459static int i915_drm_freeze(struct drm_device *dev)
460{
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100461 struct drm_i915_private *dev_priv = dev->dev_private;
Jesse Barnes24576d22013-03-26 09:25:45 -0700462 struct drm_crtc *crtc;
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100463
Zhang Ruib8efb172013-02-05 15:41:53 +0800464 /* ignore lid events during suspend */
465 mutex_lock(&dev_priv->modeset_restore_lock);
466 dev_priv->modeset_restore = MODESET_SUSPENDED;
467 mutex_unlock(&dev_priv->modeset_restore_lock);
468
Paulo Zanonic67a4702013-08-19 13:18:09 -0300469 /* We do a lot of poking in a lot of registers, make sure they work
470 * properly. */
471 hsw_disable_package_c8(dev_priv);
Paulo Zanonicb107992013-01-25 16:59:15 -0200472 intel_set_power_well(dev, true);
473
Dave Airlie5bcf7192010-12-07 09:20:40 +1000474 drm_kms_helper_poll_disable(dev);
475
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100476 pci_save_state(dev->pdev);
477
478 /* If KMS is active, we do the leavevt stuff here */
479 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
Daniel Vetterdb1b76c2013-07-09 16:51:37 +0200480 int error;
481
482 mutex_lock(&dev->struct_mutex);
483 error = i915_gem_idle(dev);
484 mutex_unlock(&dev->struct_mutex);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100485 if (error) {
486 dev_err(&dev->pdev->dev,
487 "GEM idle failed, resume might fail\n");
488 return error;
489 }
Daniel Vettera261b242012-07-26 19:21:47 +0200490
Jesse Barnes1a01ab32012-11-02 11:14:00 -0700491 cancel_delayed_work_sync(&dev_priv->rps.delayed_resume_work);
492
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100493 drm_irq_uninstall(dev);
Daniel Vetter15239092013-03-05 09:50:58 +0100494 dev_priv->enable_hotplug_processing = false;
Jesse Barnes24576d22013-03-26 09:25:45 -0700495 /*
496 * Disable CRTCs directly since we want to preserve sw state
497 * for _thaw.
498 */
499 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
500 dev_priv->display.crtc_disable(crtc);
Imre Deak7d708ee2013-04-17 14:04:50 +0300501
502 intel_modeset_suspend_hw(dev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100503 }
504
505 i915_save_state(dev);
506
Chris Wilson44834a62010-08-19 16:09:23 +0100507 intel_opregion_fini(dev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100508
Dave Airlie3fa016a2012-03-28 10:48:49 +0100509 console_lock();
Damien Lespiaub6f3eff2013-06-10 15:48:09 +0100510 intel_fbdev_set_suspend(dev, FBINFO_STATE_SUSPENDED);
Dave Airlie3fa016a2012-03-28 10:48:49 +0100511 console_unlock();
512
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100513 return 0;
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100514}
515
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000516int i915_suspend(struct drm_device *dev, pm_message_t state)
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100517{
518 int error;
519
520 if (!dev || !dev->dev_private) {
521 DRM_ERROR("dev: %p\n", dev);
Keith Packard1ae8c0a2009-06-28 15:42:17 -0700522 DRM_ERROR("DRM not initialized, aborting suspend.\n");
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000523 return -ENODEV;
524 }
525
Dave Airlieb932ccb2008-02-20 10:02:20 +1000526 if (state.event == PM_EVENT_PRETHAW)
527 return 0;
528
Dave Airlie5bcf7192010-12-07 09:20:40 +1000529
530 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
531 return 0;
Chris Wilson6eecba32010-09-08 09:45:11 +0100532
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100533 error = i915_drm_freeze(dev);
534 if (error)
535 return error;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000536
Dave Airlieb932ccb2008-02-20 10:02:20 +1000537 if (state.event == PM_EVENT_SUSPEND) {
538 /* Shut down the device */
539 pci_disable_device(dev->pdev);
540 pci_set_power_state(dev->pdev, PCI_D3hot);
541 }
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000542
543 return 0;
544}
545
Jesse Barnes073f34d2012-11-02 11:13:59 -0700546void intel_console_resume(struct work_struct *work)
547{
548 struct drm_i915_private *dev_priv =
549 container_of(work, struct drm_i915_private,
550 console_resume_work);
551 struct drm_device *dev = dev_priv->dev;
552
553 console_lock();
Damien Lespiaub6f3eff2013-06-10 15:48:09 +0100554 intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
Jesse Barnes073f34d2012-11-02 11:13:59 -0700555 console_unlock();
556}
557
Jesse Barnesbb60b962013-03-26 09:25:46 -0700558static void intel_resume_hotplug(struct drm_device *dev)
559{
560 struct drm_mode_config *mode_config = &dev->mode_config;
561 struct intel_encoder *encoder;
562
563 mutex_lock(&mode_config->mutex);
564 DRM_DEBUG_KMS("running encoder hotplug functions\n");
565
566 list_for_each_entry(encoder, &mode_config->encoder_list, base.head)
567 if (encoder->hot_plug)
568 encoder->hot_plug(encoder);
569
570 mutex_unlock(&mode_config->mutex);
571
572 /* Just fire off a uevent and let userspace tell us what to do */
573 drm_helper_hpd_irq_event(dev);
574}
575
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300576static int __i915_drm_thaw(struct drm_device *dev, bool restore_gtt_mappings)
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000577{
Jesse Barnes5669fca2009-02-17 15:13:31 -0800578 struct drm_i915_private *dev_priv = dev->dev_private;
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100579 int error = 0;
Matthew Garrett8ee1c3d2008-08-05 19:37:25 +0100580
Ville Syrjäläc9f7fbf2013-09-16 17:38:36 +0300581 intel_uncore_early_sanitize(dev);
582
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300583 intel_uncore_sanitize(dev);
584
585 if (drm_core_check_feature(dev, DRIVER_MODESET) &&
586 restore_gtt_mappings) {
587 mutex_lock(&dev->struct_mutex);
588 i915_gem_restore_gtt_mappings(dev);
589 mutex_unlock(&dev->struct_mutex);
590 }
591
Ville Syrjäläebdcefc2013-09-16 17:38:35 +0300592 intel_init_power_well(dev);
593
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100594 i915_restore_state(dev);
Chris Wilson44834a62010-08-19 16:09:23 +0100595 intel_opregion_setup(dev);
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100596
Jesse Barnes5669fca2009-02-17 15:13:31 -0800597 /* KMS EnterVT equivalent */
598 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
Paulo Zanonidde86e22012-12-01 12:04:25 -0200599 intel_init_pch_refclk(dev);
Chris Wilson1833b132012-05-09 11:56:28 +0100600
Jesse Barnes5669fca2009-02-17 15:13:31 -0800601 mutex_lock(&dev->struct_mutex);
Jesse Barnes5669fca2009-02-17 15:13:31 -0800602
Daniel Vetterf691e2f2012-02-02 09:58:12 +0100603 error = i915_gem_init_hw(dev);
Jesse Barnes5669fca2009-02-17 15:13:31 -0800604 mutex_unlock(&dev->struct_mutex);
Jesse Barnes226485e2009-02-23 15:41:09 -0800605
Daniel Vetter15239092013-03-05 09:50:58 +0100606 /* We need working interrupts for modeset enabling ... */
607 drm_irq_install(dev);
608
Chris Wilson1833b132012-05-09 11:56:28 +0100609 intel_modeset_init_hw(dev);
Jesse Barnes24576d22013-03-26 09:25:45 -0700610
611 drm_modeset_lock_all(dev);
612 intel_modeset_setup_hw_state(dev, true);
613 drm_modeset_unlock_all(dev);
Daniel Vetter15239092013-03-05 09:50:58 +0100614
615 /*
616 * ... but also need to make sure that hotplug processing
617 * doesn't cause havoc. Like in the driver load code we don't
618 * bother with the tiny race here where we might loose hotplug
619 * notifications.
620 * */
Daniel Vetter20afbda2012-12-11 14:05:07 +0100621 intel_hpd_init(dev);
Daniel Vetter15239092013-03-05 09:50:58 +0100622 dev_priv->enable_hotplug_processing = true;
Jesse Barnesbb60b962013-03-26 09:25:46 -0700623 /* Config may have changed between suspend and resume */
624 intel_resume_hotplug(dev);
Jesse Barnesd5bb0812011-01-05 12:01:26 -0800625 }
Jesse Barnes1daed3f2011-01-05 12:01:25 -0800626
Chris Wilson44834a62010-08-19 16:09:23 +0100627 intel_opregion_init(dev);
628
Jesse Barnes073f34d2012-11-02 11:13:59 -0700629 /*
630 * The console lock can be pretty contented on resume due
631 * to all the printk activity. Try to keep it out of the hot
632 * path of resume if possible.
633 */
634 if (console_trylock()) {
Damien Lespiaub6f3eff2013-06-10 15:48:09 +0100635 intel_fbdev_set_suspend(dev, FBINFO_STATE_RUNNING);
Jesse Barnes073f34d2012-11-02 11:13:59 -0700636 console_unlock();
637 } else {
638 schedule_work(&dev_priv->console_resume_work);
639 }
640
Paulo Zanonic67a4702013-08-19 13:18:09 -0300641 /* Undo what we did at i915_drm_freeze so the refcount goes back to the
642 * expected level. */
643 hsw_enable_package_c8(dev_priv);
644
Zhang Ruib8efb172013-02-05 15:41:53 +0800645 mutex_lock(&dev_priv->modeset_restore_lock);
646 dev_priv->modeset_restore = MODESET_DONE;
647 mutex_unlock(&dev_priv->modeset_restore_lock);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100648 return error;
649}
650
Jesse Barnes1abd02e2012-11-02 11:14:02 -0700651static int i915_drm_thaw(struct drm_device *dev)
652{
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300653 return __i915_drm_thaw(dev, true);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100654}
655
Dave Airlie6a9ee8a2010-02-01 15:38:10 +1000656int i915_resume(struct drm_device *dev)
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100657{
Jesse Barnes1abd02e2012-11-02 11:14:02 -0700658 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson6eecba32010-09-08 09:45:11 +0100659 int ret;
660
Dave Airlie5bcf7192010-12-07 09:20:40 +1000661 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
662 return 0;
663
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100664 if (pci_enable_device(dev->pdev))
665 return -EIO;
666
667 pci_set_master(dev->pdev);
668
Jesse Barnes1abd02e2012-11-02 11:14:02 -0700669 /*
670 * Platforms with opregion should have sane BIOS, older ones (gen3 and
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300671 * earlier) need to restore the GTT mappings since the BIOS might clear
672 * all our scratch PTEs.
Jesse Barnes1abd02e2012-11-02 11:14:02 -0700673 */
Paulo Zanoni9d49c0e2013-09-12 18:06:43 -0300674 ret = __i915_drm_thaw(dev, !dev_priv->opregion.header);
Chris Wilson6eecba32010-09-08 09:45:11 +0100675 if (ret)
676 return ret;
677
678 drm_kms_helper_poll_enable(dev);
679 return 0;
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000680}
681
Ben Gamari11ed50e2009-09-14 17:48:45 -0400682/**
Eugeni Dodonovf3953dc2011-11-28 16:15:17 -0200683 * i915_reset - reset chip after a hang
Ben Gamari11ed50e2009-09-14 17:48:45 -0400684 * @dev: drm device to reset
Ben Gamari11ed50e2009-09-14 17:48:45 -0400685 *
686 * Reset the chip. Useful if a hang is detected. Returns zero on successful
687 * reset or otherwise an error code.
688 *
689 * Procedure is fairly simple:
690 * - reset the chip using the reset reg
691 * - re-init context state
692 * - re-init hardware status page
693 * - re-init ring buffer
694 * - re-init interrupt state
695 * - re-init display
696 */
Daniel Vetterd4b8bb22012-04-27 15:17:44 +0200697int i915_reset(struct drm_device *dev)
Ben Gamari11ed50e2009-09-14 17:48:45 -0400698{
699 drm_i915_private_t *dev_priv = dev->dev_private;
Chris Wilson2e7c8ee2013-05-28 10:38:44 +0100700 bool simulated;
Kenneth Graunke0573ed42010-09-11 03:17:19 -0700701 int ret;
Ben Gamari11ed50e2009-09-14 17:48:45 -0400702
Chris Wilsond78cb502010-12-23 13:33:15 +0000703 if (!i915_try_reset)
704 return 0;
705
Daniel Vetterd54a02c2012-07-04 22:18:39 +0200706 mutex_lock(&dev->struct_mutex);
Ben Gamari11ed50e2009-09-14 17:48:45 -0400707
Chris Wilson069efc12010-09-30 16:53:18 +0100708 i915_gem_reset(dev);
Ben Gamari11ed50e2009-09-14 17:48:45 -0400709
Chris Wilson2e7c8ee2013-05-28 10:38:44 +0100710 simulated = dev_priv->gpu_error.stop_rings != 0;
711
Mika Kuoppalabe62acb2013-08-30 16:19:28 +0300712 ret = intel_gpu_reset(dev);
Daniel Vetter350d2702012-04-27 15:17:42 +0200713
Mika Kuoppalabe62acb2013-08-30 16:19:28 +0300714 /* Also reset the gpu hangman. */
715 if (simulated) {
716 DRM_INFO("Simulated gpu hang, resetting stop_rings\n");
717 dev_priv->gpu_error.stop_rings = 0;
718 if (ret == -ENODEV) {
719 DRM_ERROR("Reset not implemented, but ignoring "
720 "error for simulated gpu hangs\n");
721 ret = 0;
722 }
Chris Wilson2e7c8ee2013-05-28 10:38:44 +0100723 }
Mika Kuoppalabe62acb2013-08-30 16:19:28 +0300724
Kenneth Graunke0573ed42010-09-11 03:17:19 -0700725 if (ret) {
Chris Wilsonf803aa52010-09-19 12:38:26 +0100726 DRM_ERROR("Failed to reset chip.\n");
Daniel J Bluemanf953c932010-05-17 14:23:52 +0100727 mutex_unlock(&dev->struct_mutex);
Chris Wilsonf803aa52010-09-19 12:38:26 +0100728 return ret;
Ben Gamari11ed50e2009-09-14 17:48:45 -0400729 }
730
731 /* Ok, now get things going again... */
732
733 /*
734 * Everything depends on having the GTT running, so we need to start
735 * there. Fortunately we don't need to do this unless we reset the
736 * chip at a PCI level.
737 *
738 * Next we need to restore the context, but we don't use those
739 * yet either...
740 *
741 * Ring buffer needs to be re-initialized in the KMS case, or if X
742 * was running at the time of the reset (i.e. we weren't VT
743 * switched away).
744 */
745 if (drm_core_check_feature(dev, DRIVER_MODESET) ||
Daniel Vetterdb1b76c2013-07-09 16:51:37 +0200746 !dev_priv->ums.mm_suspended) {
Chris Wilsonb4519512012-05-11 14:29:30 +0100747 struct intel_ring_buffer *ring;
748 int i;
749
Daniel Vetterdb1b76c2013-07-09 16:51:37 +0200750 dev_priv->ums.mm_suspended = 0;
Eric Anholt75a68982010-11-18 09:31:13 +0800751
Daniel Vetterf691e2f2012-02-02 09:58:12 +0100752 i915_gem_init_swizzling(dev);
753
Chris Wilsonb4519512012-05-11 14:29:30 +0100754 for_each_ring(ring, dev_priv, i)
755 ring->init(ring);
Eric Anholt75a68982010-11-18 09:31:13 +0800756
Ben Widawsky254f9652012-06-04 14:42:42 -0700757 i915_gem_context_init(dev);
Ben Widawskyb7c36d22013-04-08 18:43:56 -0700758 if (dev_priv->mm.aliasing_ppgtt) {
759 ret = dev_priv->mm.aliasing_ppgtt->enable(dev);
760 if (ret)
761 i915_gem_cleanup_aliasing_ppgtt(dev);
762 }
Daniel Vettere21af882012-02-09 20:53:27 +0100763
Daniel Vetter8e88a2b2012-06-19 18:40:00 +0200764 /*
765 * It would make sense to re-init all the other hw state, at
766 * least the rps/rc6/emon init done within modeset_init_hw. For
767 * some unknown reason, this blows up my ilk, so don't.
768 */
Daniel Vetterf8175862012-04-10 15:50:11 +0200769
Daniel Vetter8e88a2b2012-06-19 18:40:00 +0200770 mutex_unlock(&dev->struct_mutex);
Daniel Vetterf8175862012-04-10 15:50:11 +0200771
Ben Gamari11ed50e2009-09-14 17:48:45 -0400772 drm_irq_uninstall(dev);
773 drm_irq_install(dev);
Daniel Vetter20afbda2012-12-11 14:05:07 +0100774 intel_hpd_init(dev);
Daniel Vetterbcbc3242012-04-27 15:17:41 +0200775 } else {
776 mutex_unlock(&dev->struct_mutex);
Ben Gamari11ed50e2009-09-14 17:48:45 -0400777 }
778
Ben Gamari11ed50e2009-09-14 17:48:45 -0400779 return 0;
780}
781
Greg Kroah-Hartman56550d92012-12-21 15:09:25 -0800782static int i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500783{
Daniel Vetter01a06852012-06-25 15:58:49 +0200784 struct intel_device_info *intel_info =
785 (struct intel_device_info *) ent->driver_data;
786
Ben Widawskyb833d682013-08-23 16:00:07 -0700787 if (IS_PRELIMINARY_HW(intel_info) && !i915_preliminary_hw_support) {
788 DRM_INFO("This hardware requires preliminary hardware support.\n"
789 "See CONFIG_DRM_I915_PRELIMINARY_HW_SUPPORT, and/or modparam preliminary_hw_support\n");
790 return -ENODEV;
791 }
792
Chris Wilson5fe49d82011-02-01 19:43:02 +0000793 /* Only bind to function 0 of the device. Early generations
794 * used function 1 as a placeholder for multi-head. This causes
795 * us confusion instead, especially on the systems where both
796 * functions have the same PCI-ID!
797 */
798 if (PCI_FUNC(pdev->devfn))
799 return -ENODEV;
800
Daniel Vetter01a06852012-06-25 15:58:49 +0200801 /* We've managed to ship a kms-enabled ddx that shipped with an XvMC
802 * implementation for gen3 (and only gen3) that used legacy drm maps
803 * (gasp!) to share buffers between X and the client. Hence we need to
804 * keep around the fake agp stuff for gen3, even when kms is enabled. */
805 if (intel_info->gen != 3) {
806 driver.driver_features &=
807 ~(DRIVER_USE_AGP | DRIVER_REQUIRE_AGP);
808 } else if (!intel_agp_enabled) {
809 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
810 return -ENODEV;
811 }
812
Jordan Crousedcdb1672010-05-27 13:40:25 -0600813 return drm_get_pci_dev(pdev, ent, &driver);
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500814}
815
816static void
817i915_pci_remove(struct pci_dev *pdev)
818{
819 struct drm_device *dev = pci_get_drvdata(pdev);
820
821 drm_put_dev(dev);
822}
823
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100824static int i915_pm_suspend(struct device *dev)
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500825{
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100826 struct pci_dev *pdev = to_pci_dev(dev);
827 struct drm_device *drm_dev = pci_get_drvdata(pdev);
828 int error;
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500829
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100830 if (!drm_dev || !drm_dev->dev_private) {
831 dev_err(dev, "DRM not initialized, aborting suspend.\n");
832 return -ENODEV;
833 }
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500834
Dave Airlie5bcf7192010-12-07 09:20:40 +1000835 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
836 return 0;
837
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100838 error = i915_drm_freeze(drm_dev);
839 if (error)
840 return error;
Kristian Høgsberg112b7152009-01-04 16:55:33 -0500841
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100842 pci_disable_device(pdev);
843 pci_set_power_state(pdev, PCI_D3hot);
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800844
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800845 return 0;
846}
847
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100848static int i915_pm_resume(struct device *dev)
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800849{
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100850 struct pci_dev *pdev = to_pci_dev(dev);
851 struct drm_device *drm_dev = pci_get_drvdata(pdev);
852
853 return i915_resume(drm_dev);
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800854}
855
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100856static int i915_pm_freeze(struct device *dev)
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800857{
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100858 struct pci_dev *pdev = to_pci_dev(dev);
859 struct drm_device *drm_dev = pci_get_drvdata(pdev);
860
861 if (!drm_dev || !drm_dev->dev_private) {
862 dev_err(dev, "DRM not initialized, aborting suspend.\n");
863 return -ENODEV;
864 }
865
866 return i915_drm_freeze(drm_dev);
867}
868
869static int i915_pm_thaw(struct device *dev)
870{
871 struct pci_dev *pdev = to_pci_dev(dev);
872 struct drm_device *drm_dev = pci_get_drvdata(pdev);
873
874 return i915_drm_thaw(drm_dev);
875}
876
877static int i915_pm_poweroff(struct device *dev)
878{
879 struct pci_dev *pdev = to_pci_dev(dev);
880 struct drm_device *drm_dev = pci_get_drvdata(pdev);
Rafael J. Wysocki84b79f82010-02-07 21:48:24 +0100881
Rafael J. Wysocki61caf872010-02-18 23:06:27 +0100882 return i915_drm_freeze(drm_dev);
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800883}
884
Chris Wilsonb4b78d12010-06-06 15:40:20 +0100885static const struct dev_pm_ops i915_pm_ops = {
Akshay Joshi0206e352011-08-16 15:34:10 -0400886 .suspend = i915_pm_suspend,
887 .resume = i915_pm_resume,
888 .freeze = i915_pm_freeze,
889 .thaw = i915_pm_thaw,
890 .poweroff = i915_pm_poweroff,
891 .restore = i915_pm_resume,
Zhenyu Wangcbda12d2009-12-16 13:36:10 +0800892};
893
Laurent Pinchart78b68552012-05-17 13:27:22 +0200894static const struct vm_operations_struct i915_gem_vm_ops = {
Jesse Barnesde151cf2008-11-12 10:03:55 -0800895 .fault = i915_gem_fault,
Jesse Barnesab00b3e2009-02-11 14:01:46 -0800896 .open = drm_gem_vm_open,
897 .close = drm_gem_vm_close,
Jesse Barnesde151cf2008-11-12 10:03:55 -0800898};
899
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700900static const struct file_operations i915_driver_fops = {
901 .owner = THIS_MODULE,
902 .open = drm_open,
903 .release = drm_release,
904 .unlocked_ioctl = drm_ioctl,
905 .mmap = drm_gem_mmap,
906 .poll = drm_poll,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700907 .read = drm_read,
908#ifdef CONFIG_COMPAT
909 .compat_ioctl = i915_compat_ioctl,
910#endif
911 .llseek = noop_llseek,
912};
913
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914static struct drm_driver driver = {
Michael Witten0c547812011-08-25 17:55:54 +0000915 /* Don't use MTRRs here; the Xserver or userspace app should
916 * deal with them for Intel hardware.
Dave Airlie792d2b92005-11-11 23:30:27 +1100917 */
Eric Anholt673a3942008-07-30 12:06:12 -0700918 .driver_features =
Daniel Vetter28185642013-08-08 15:41:27 +0200919 DRIVER_USE_AGP | DRIVER_REQUIRE_AGP |
Kristian Høgsberg10ba5012013-08-25 18:29:01 +0200920 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM | DRIVER_PRIME |
921 DRIVER_RENDER,
Dave Airlie22eae942005-11-10 22:16:34 +1100922 .load = i915_driver_load,
Jesse Barnesba8bbcf2007-11-22 14:14:14 +1000923 .unload = i915_driver_unload,
Eric Anholt673a3942008-07-30 12:06:12 -0700924 .open = i915_driver_open,
Dave Airlie22eae942005-11-10 22:16:34 +1100925 .lastclose = i915_driver_lastclose,
926 .preclose = i915_driver_preclose,
Eric Anholt673a3942008-07-30 12:06:12 -0700927 .postclose = i915_driver_postclose,
Rafael J. Wysockid8e29202010-01-09 00:45:33 +0100928
929 /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
930 .suspend = i915_suspend,
931 .resume = i915_resume,
932
Dave Airliecda17382005-07-10 17:31:26 +1000933 .device_is_agp = i915_driver_device_is_agp,
Dave Airlie7c1c2872008-11-28 14:22:24 +1000934 .master_create = i915_master_create,
935 .master_destroy = i915_master_destroy,
Ben Gamari955b12d2009-02-17 20:08:49 -0500936#if defined(CONFIG_DEBUG_FS)
Ben Gamari27c202a2009-07-01 22:26:52 -0400937 .debugfs_init = i915_debugfs_init,
938 .debugfs_cleanup = i915_debugfs_cleanup,
Ben Gamari955b12d2009-02-17 20:08:49 -0500939#endif
Eric Anholt673a3942008-07-30 12:06:12 -0700940 .gem_free_object = i915_gem_free_object,
Jesse Barnesde151cf2008-11-12 10:03:55 -0800941 .gem_vm_ops = &i915_gem_vm_ops,
Daniel Vetter1286ff72012-05-10 15:25:09 +0200942
943 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
944 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
945 .gem_prime_export = i915_gem_prime_export,
946 .gem_prime_import = i915_gem_prime_import,
947
Dave Airlieff72145b2011-02-07 12:16:14 +1000948 .dumb_create = i915_gem_dumb_create,
949 .dumb_map_offset = i915_gem_mmap_gtt,
Daniel Vetter43387b32013-07-16 09:12:04 +0200950 .dumb_destroy = drm_gem_dumb_destroy,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951 .ioctls = i915_ioctls,
Arjan van de Vene08e96d2011-10-31 07:28:57 -0700952 .fops = &i915_driver_fops,
Dave Airlie22eae942005-11-10 22:16:34 +1100953 .name = DRIVER_NAME,
954 .desc = DRIVER_DESC,
955 .date = DRIVER_DATE,
956 .major = DRIVER_MAJOR,
957 .minor = DRIVER_MINOR,
958 .patchlevel = DRIVER_PATCHLEVEL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700959};
960
Dave Airlie8410ea32010-12-15 03:16:38 +1000961static struct pci_driver i915_pci_driver = {
962 .name = DRIVER_NAME,
963 .id_table = pciidlist,
964 .probe = i915_pci_probe,
965 .remove = i915_pci_remove,
966 .driver.pm = &i915_pm_ops,
967};
968
Linus Torvalds1da177e2005-04-16 15:20:36 -0700969static int __init i915_init(void)
970{
971 driver.num_ioctls = i915_max_ioctl;
Jesse Barnes79e53942008-11-07 14:24:08 -0800972
973 /*
974 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
975 * explicitly disabled with the module pararmeter.
976 *
977 * Otherwise, just follow the parameter (defaulting to off).
978 *
979 * Allow optional vga_text_mode_force boot option to override
980 * the default behavior.
981 */
982#if defined(CONFIG_DRM_I915_KMS)
983 if (i915_modeset != 0)
984 driver.driver_features |= DRIVER_MODESET;
985#endif
986 if (i915_modeset == 1)
987 driver.driver_features |= DRIVER_MODESET;
988
989#ifdef CONFIG_VGA_CONSOLE
990 if (vgacon_text_force() && i915_modeset == -1)
991 driver.driver_features &= ~DRIVER_MODESET;
992#endif
993
Chris Wilson3885c6b2011-01-23 10:45:14 +0000994 if (!(driver.driver_features & DRIVER_MODESET))
995 driver.get_vblank_timestamp = NULL;
996
Dave Airlie8410ea32010-12-15 03:16:38 +1000997 return drm_pci_init(&driver, &i915_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700998}
999
1000static void __exit i915_exit(void)
1001{
Dave Airlie8410ea32010-12-15 03:16:38 +10001002 drm_pci_exit(&driver, &i915_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001003}
1004
1005module_init(i915_init);
1006module_exit(i915_exit);
1007
Dave Airlieb5e89ed2005-09-25 14:28:13 +10001008MODULE_AUTHOR(DRIVER_AUTHOR);
1009MODULE_DESCRIPTION(DRIVER_DESC);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001010MODULE_LICENSE("GPL and additional rights");