blob: 54c70b07d81539bb0bc34d1a4189981a021c1957 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 Driver for VES1893 and VES1993 QPSK Demodulators
3
4 Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
5 Copyright (C) 2001 Ronny Strutz <3des@elitedvb.de>
6 Copyright (C) 2002 Dennis Noermann <dennis.noermann@noernet.de>
7 Copyright (C) 2002-2003 Andreas Oberritter <obi@linuxtv.org>
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23
24*/
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/init.h>
29#include <linux/string.h>
30#include <linux/slab.h>
31#include <linux/delay.h>
32
33#include "dvb_frontend.h"
34#include "ves1x93.h"
35
36
37struct ves1x93_state {
38 struct i2c_adapter* i2c;
Linus Torvalds1da177e2005-04-16 15:20:36 -070039 /* configuration settings */
40 const struct ves1x93_config* config;
41 struct dvb_frontend frontend;
42
43 /* previous uncorrected block counter */
44 fe_spectral_inversion_t inversion;
45 u8 *init_1x93_tab;
46 u8 *init_1x93_wtab;
47 u8 tab_size;
48 u8 demod_type;
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -030049 u32 frequency;
Linus Torvalds1da177e2005-04-16 15:20:36 -070050};
51
Douglas Schilling Landgrafff699e62008-04-22 14:41:48 -030052static int debug;
Linus Torvalds1da177e2005-04-16 15:20:36 -070053#define dprintk if (debug) printk
54
55#define DEMOD_VES1893 0
56#define DEMOD_VES1993 1
57
58static u8 init_1893_tab [] = {
59 0x01, 0xa4, 0x35, 0x80, 0x2a, 0x0b, 0x55, 0xc4,
60 0x09, 0x69, 0x00, 0x86, 0x4c, 0x28, 0x7f, 0x00,
61 0x00, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
62 0x80, 0x00, 0x21, 0xb0, 0x14, 0x00, 0xdc, 0x00,
63 0x81, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
64 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
65 0x00, 0x55, 0x00, 0x00, 0x7f, 0x00
66};
67
68static u8 init_1993_tab [] = {
69 0x00, 0x9c, 0x35, 0x80, 0x6a, 0x09, 0x72, 0x8c,
70 0x09, 0x6b, 0x00, 0x00, 0x4c, 0x08, 0x00, 0x00,
71 0x00, 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
72 0x80, 0x40, 0x21, 0xb0, 0x00, 0x00, 0x00, 0x10,
73 0x81, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
74 0x00, 0x00, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00,
75 0x00, 0x55, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03,
76 0x00, 0x00, 0x0e, 0x80, 0x00
77};
78
79static u8 init_1893_wtab[] =
80{
81 1,1,1,1,1,1,1,1, 1,1,0,0,1,1,0,0,
82 0,1,0,0,0,0,0,0, 1,0,1,1,0,0,0,1,
83 1,1,1,0,0,0,0,0, 0,0,1,1,0,0,0,0,
84 1,1,1,0,1,1
85};
86
87static u8 init_1993_wtab[] =
88{
89 1,1,1,1,1,1,1,1, 1,1,0,0,1,1,0,0,
90 0,1,0,0,0,0,0,0, 1,1,1,1,0,0,0,1,
91 1,1,1,0,0,0,0,0, 0,0,1,1,0,0,0,0,
92 1,1,1,0,1,1,1,1, 1,1,1,1,1
93};
94
95static int ves1x93_writereg (struct ves1x93_state* state, u8 reg, u8 data)
96{
97 u8 buf [] = { 0x00, reg, data };
98 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 3 };
99 int err;
100
101 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
Harvey Harrison271ddbf2008-04-08 23:20:00 -0300102 dprintk ("%s: writereg error (err == %i, reg == 0x%02x, data == 0x%02x)\n", __func__, err, reg, data);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 return -EREMOTEIO;
104 }
105
106 return 0;
107}
108
109static u8 ves1x93_readreg (struct ves1x93_state* state, u8 reg)
110{
111 int ret;
112 u8 b0 [] = { 0x00, reg };
113 u8 b1 [] = { 0 };
114 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 2 },
115 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
116
117 ret = i2c_transfer (state->i2c, msg, 2);
118
119 if (ret != 2) return ret;
120
121 return b1[0];
122}
123
124static int ves1x93_clr_bit (struct ves1x93_state* state)
125{
126 msleep(10);
127 ves1x93_writereg (state, 0, state->init_1x93_tab[0] & 0xfe);
128 ves1x93_writereg (state, 0, state->init_1x93_tab[0]);
129 msleep(50);
130 return 0;
131}
132
133static int ves1x93_set_inversion (struct ves1x93_state* state, fe_spectral_inversion_t inversion)
134{
135 u8 val;
136
137 /*
138 * inversion on/off are interchanged because i and q seem to
139 * be swapped on the hardware
140 */
141
142 switch (inversion) {
143 case INVERSION_OFF:
144 val = 0xc0;
145 break;
146 case INVERSION_ON:
147 val = 0x80;
148 break;
149 case INVERSION_AUTO:
150 val = 0x00;
151 break;
152 default:
153 return -EINVAL;
154 }
155
156 return ves1x93_writereg (state, 0x0c, (state->init_1x93_tab[0x0c] & 0x3f) | val);
157}
158
159static int ves1x93_set_fec (struct ves1x93_state* state, fe_code_rate_t fec)
160{
161 if (fec == FEC_AUTO)
162 return ves1x93_writereg (state, 0x0d, 0x08);
163 else if (fec < FEC_1_2 || fec > FEC_8_9)
164 return -EINVAL;
165 else
166 return ves1x93_writereg (state, 0x0d, fec - FEC_1_2);
167}
168
169static fe_code_rate_t ves1x93_get_fec (struct ves1x93_state* state)
170{
171 return FEC_1_2 + ((ves1x93_readreg (state, 0x0d) >> 4) & 0x7);
172}
173
174static int ves1x93_set_symbolrate (struct ves1x93_state* state, u32 srate)
175{
176 u32 BDR;
177 u32 ratio;
178 u8 ADCONF, FCONF, FNR, AGCR;
179 u32 BDRI;
180 u32 tmp;
181 u32 FIN;
182
Harvey Harrison271ddbf2008-04-08 23:20:00 -0300183 dprintk("%s: srate == %d\n", __func__, (unsigned int) srate);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184
185 if (srate > state->config->xin/2)
186 srate = state->config->xin/2;
187
188 if (srate < 500000)
189 srate = 500000;
190
191#define MUL (1UL<<26)
192
193 FIN = (state->config->xin + 6000) >> 4;
194
195 tmp = srate << 6;
196 ratio = tmp / FIN;
197
198 tmp = (tmp % FIN) << 8;
199 ratio = (ratio << 8) + tmp / FIN;
200
201 tmp = (tmp % FIN) << 8;
202 ratio = (ratio << 8) + tmp / FIN;
203
204 FNR = 0xff;
205
206 if (ratio < MUL/3) FNR = 0;
207 if (ratio < (MUL*11)/50) FNR = 1;
208 if (ratio < MUL/6) FNR = 2;
209 if (ratio < MUL/9) FNR = 3;
210 if (ratio < MUL/12) FNR = 4;
211 if (ratio < (MUL*11)/200) FNR = 5;
212 if (ratio < MUL/24) FNR = 6;
213 if (ratio < (MUL*27)/1000) FNR = 7;
214 if (ratio < MUL/48) FNR = 8;
215 if (ratio < (MUL*137)/10000) FNR = 9;
216
217 if (FNR == 0xff) {
218 ADCONF = 0x89;
219 FCONF = 0x80;
220 FNR = 0;
221 } else {
222 ADCONF = 0x81;
223 FCONF = 0x88 | (FNR >> 1) | ((FNR & 0x01) << 5);
224 /*FCONF = 0x80 | ((FNR & 0x01) << 5) | (((FNR > 1) & 0x03) << 3) | ((FNR >> 1) & 0x07);*/
225 }
226
227 BDR = (( (ratio << (FNR >> 1)) >> 4) + 1) >> 1;
228 BDRI = ( ((FIN << 8) / ((srate << (FNR >> 1)) >> 2)) + 1) >> 1;
229
230 dprintk("FNR= %d\n", FNR);
231 dprintk("ratio= %08x\n", (unsigned int) ratio);
232 dprintk("BDR= %08x\n", (unsigned int) BDR);
233 dprintk("BDRI= %02x\n", (unsigned int) BDRI);
234
235 if (BDRI > 0xff)
236 BDRI = 0xff;
237
238 ves1x93_writereg (state, 0x06, 0xff & BDR);
239 ves1x93_writereg (state, 0x07, 0xff & (BDR >> 8));
240 ves1x93_writereg (state, 0x08, 0x0f & (BDR >> 16));
241
242 ves1x93_writereg (state, 0x09, BDRI);
243 ves1x93_writereg (state, 0x20, ADCONF);
244 ves1x93_writereg (state, 0x21, FCONF);
245
246 AGCR = state->init_1x93_tab[0x05];
247 if (state->config->invert_pwm)
248 AGCR |= 0x20;
249
250 if (srate < 6000000)
251 AGCR |= 0x80;
252 else
253 AGCR &= ~0x80;
254
255 ves1x93_writereg (state, 0x05, AGCR);
256
257 /* ves1993 hates this, will lose lock */
258 if (state->demod_type != DEMOD_VES1993)
259 ves1x93_clr_bit (state);
260
261 return 0;
262}
263
264static int ves1x93_init (struct dvb_frontend* fe)
265{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700266 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700267 int i;
268 int val;
269
Harvey Harrison271ddbf2008-04-08 23:20:00 -0300270 dprintk("%s: init chip\n", __func__);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700271
272 for (i = 0; i < state->tab_size; i++) {
273 if (state->init_1x93_wtab[i]) {
274 val = state->init_1x93_tab[i];
275
276 if (state->config->invert_pwm && (i == 0x05)) val |= 0x20; /* invert PWM */
277 ves1x93_writereg (state, i, val);
278 }
279 }
280
Linus Torvalds1da177e2005-04-16 15:20:36 -0700281 return 0;
282}
283
284static int ves1x93_set_voltage (struct dvb_frontend* fe, fe_sec_voltage_t voltage)
285{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700286 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287
288 switch (voltage) {
289 case SEC_VOLTAGE_13:
290 return ves1x93_writereg (state, 0x1f, 0x20);
291 case SEC_VOLTAGE_18:
292 return ves1x93_writereg (state, 0x1f, 0x30);
293 case SEC_VOLTAGE_OFF:
294 return ves1x93_writereg (state, 0x1f, 0x00);
295 default:
296 return -EINVAL;
297 }
298}
299
300static int ves1x93_read_status(struct dvb_frontend* fe, fe_status_t* status)
301{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700302 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700303
304 u8 sync = ves1x93_readreg (state, 0x0e);
305
306 /*
307 * The ves1893 sometimes returns sync values that make no sense,
308 * because, e.g., the SIGNAL bit is 0, while some of the higher
309 * bits are 1 (and how can there be a CARRIER w/o a SIGNAL?).
Michael Opdenacker59c51592007-05-09 08:57:56 +0200310 * Tests showed that the VITERBI and SYNC bits are returned
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311 * reliably, while the SIGNAL and CARRIER bits ar sometimes wrong.
312 * If such a case occurs, we read the value again, until we get a
313 * valid value.
314 */
315 int maxtry = 10; /* just for safety - let's not get stuck here */
316 while ((sync & 0x03) != 0x03 && (sync & 0x0c) && maxtry--) {
317 msleep(10);
318 sync = ves1x93_readreg (state, 0x0e);
319 }
320
321 *status = 0;
322
323 if (sync & 1)
324 *status |= FE_HAS_SIGNAL;
325
326 if (sync & 2)
327 *status |= FE_HAS_CARRIER;
328
329 if (sync & 4)
330 *status |= FE_HAS_VITERBI;
331
332 if (sync & 8)
333 *status |= FE_HAS_SYNC;
334
335 if ((sync & 0x1f) == 0x1f)
336 *status |= FE_HAS_LOCK;
337
338 return 0;
339}
340
341static int ves1x93_read_ber(struct dvb_frontend* fe, u32* ber)
342{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700343 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700344
345 *ber = ves1x93_readreg (state, 0x15);
346 *ber |= (ves1x93_readreg (state, 0x16) << 8);
347 *ber |= ((ves1x93_readreg (state, 0x17) & 0x0F) << 16);
348 *ber *= 10;
349
350 return 0;
351}
352
353static int ves1x93_read_signal_strength(struct dvb_frontend* fe, u16* strength)
354{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700355 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700356
357 u8 signal = ~ves1x93_readreg (state, 0x0b);
358 *strength = (signal << 8) | signal;
359
360 return 0;
361}
362
363static int ves1x93_read_snr(struct dvb_frontend* fe, u16* snr)
364{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700365 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700366
367 u8 _snr = ~ves1x93_readreg (state, 0x1c);
368 *snr = (_snr << 8) | _snr;
369
370 return 0;
371}
372
373static int ves1x93_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
374{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700375 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700376
377 *ucblocks = ves1x93_readreg (state, 0x18) & 0x7f;
378
379 if (*ucblocks == 0x7f)
380 *ucblocks = 0xffffffff; /* counter overflow... */
381
382 ves1x93_writereg (state, 0x18, 0x00); /* reset the counter */
383 ves1x93_writereg (state, 0x18, 0x80); /* dto. */
384
385 return 0;
386}
387
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300388static int ves1x93_set_frontend(struct dvb_frontend *fe)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389{
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300390 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700391 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700392
Patrick Boettcherdea74862006-05-14 05:01:31 -0300393 if (fe->ops.tuner_ops.set_params) {
Mauro Carvalho Chehab14d24d12011-12-24 12:24:33 -0300394 fe->ops.tuner_ops.set_params(fe);
Patrick Boettcherdea74862006-05-14 05:01:31 -0300395 if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
Andrew de Quincey66292eb2006-04-18 17:47:10 -0300396 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700397 ves1x93_set_inversion (state, p->inversion);
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300398 ves1x93_set_fec(state, p->fec_inner);
399 ves1x93_set_symbolrate(state, p->symbol_rate);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 state->inversion = p->inversion;
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300401 state->frequency = p->frequency;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700402
403 return 0;
404}
405
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300406static int ves1x93_get_frontend(struct dvb_frontend *fe,
407 struct dtv_frontend_properties *p)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700408{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700409 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700410 int afc;
411
412 afc = ((int)((char)(ves1x93_readreg (state, 0x0a) << 1)))/2;
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300413 afc = (afc * (int)(p->symbol_rate/1000/8))/16;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700414
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300415 p->frequency = state->frequency - afc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700416
417 /*
418 * inversion indicator is only valid
419 * if auto inversion was used
420 */
421 if (state->inversion == INVERSION_AUTO)
422 p->inversion = (ves1x93_readreg (state, 0x0f) & 2) ?
423 INVERSION_OFF : INVERSION_ON;
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300424 p->fec_inner = ves1x93_get_fec(state);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700425 /* XXX FIXME: timing offset !! */
426
427 return 0;
428}
429
430static int ves1x93_sleep(struct dvb_frontend* fe)
431{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700432 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433
434 return ves1x93_writereg (state, 0x00, 0x08);
435}
436
437static void ves1x93_release(struct dvb_frontend* fe)
438{
Johannes Stezenbachb8742702005-05-16 21:54:31 -0700439 struct ves1x93_state* state = fe->demodulator_priv;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440 kfree(state);
441}
442
Andrew de Quincey66292eb2006-04-18 17:47:10 -0300443static int ves1x93_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
444{
445 struct ves1x93_state* state = fe->demodulator_priv;
446
447 if (enable) {
448 return ves1x93_writereg(state, 0x00, 0x11);
449 } else {
450 return ves1x93_writereg(state, 0x00, 0x01);
451 }
452}
453
Linus Torvalds1da177e2005-04-16 15:20:36 -0700454static struct dvb_frontend_ops ves1x93_ops;
455
456struct dvb_frontend* ves1x93_attach(const struct ves1x93_config* config,
457 struct i2c_adapter* i2c)
458{
459 struct ves1x93_state* state = NULL;
460 u8 identity;
461
462 /* allocate memory for the internal state */
Matthias Schwarzott084e24a2009-08-10 22:51:01 -0300463 state = kzalloc(sizeof(struct ves1x93_state), GFP_KERNEL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464 if (state == NULL) goto error;
465
466 /* setup the state */
467 state->config = config;
468 state->i2c = i2c;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469 state->inversion = INVERSION_OFF;
470
471 /* check if the demod is there + identify it */
472 identity = ves1x93_readreg(state, 0x1e);
473 switch (identity) {
474 case 0xdc: /* VES1893A rev1 */
475 printk("ves1x93: Detected ves1893a rev1\n");
476 state->demod_type = DEMOD_VES1893;
477 state->init_1x93_tab = init_1893_tab;
478 state->init_1x93_wtab = init_1893_wtab;
479 state->tab_size = sizeof(init_1893_tab);
480 break;
481
482 case 0xdd: /* VES1893A rev2 */
483 printk("ves1x93: Detected ves1893a rev2\n");
484 state->demod_type = DEMOD_VES1893;
485 state->init_1x93_tab = init_1893_tab;
486 state->init_1x93_wtab = init_1893_wtab;
487 state->tab_size = sizeof(init_1893_tab);
488 break;
489
490 case 0xde: /* VES1993 */
491 printk("ves1x93: Detected ves1993\n");
492 state->demod_type = DEMOD_VES1993;
493 state->init_1x93_tab = init_1993_tab;
494 state->init_1x93_wtab = init_1993_wtab;
495 state->tab_size = sizeof(init_1993_tab);
496 break;
497
498 default:
499 goto error;
500 }
501
502 /* create dvb_frontend */
Patrick Boettcherdea74862006-05-14 05:01:31 -0300503 memcpy(&state->frontend.ops, &ves1x93_ops, sizeof(struct dvb_frontend_ops));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700504 state->frontend.demodulator_priv = state;
505 return &state->frontend;
506
507error:
508 kfree(state);
509 return NULL;
510}
511
512static struct dvb_frontend_ops ves1x93_ops = {
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300513 .delsys = { SYS_DVBS },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514 .info = {
515 .name = "VLSI VES1x93 DVB-S",
516 .type = FE_QPSK,
517 .frequency_min = 950000,
518 .frequency_max = 2150000,
519 .frequency_stepsize = 125, /* kHz for QPSK frontends */
520 .frequency_tolerance = 29500,
521 .symbol_rate_min = 1000000,
522 .symbol_rate_max = 45000000,
523 /* .symbol_rate_tolerance = ???,*/
524 .caps = FE_CAN_INVERSION_AUTO |
525 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
526 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
527 FE_CAN_QPSK
528 },
529
530 .release = ves1x93_release,
531
532 .init = ves1x93_init,
533 .sleep = ves1x93_sleep,
Andrew de Quincey66292eb2006-04-18 17:47:10 -0300534 .i2c_gate_ctrl = ves1x93_i2c_gate_ctrl,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700535
Mauro Carvalho Chehabdba2b0c2011-12-26 11:49:34 -0300536 .set_frontend = ves1x93_set_frontend,
537 .get_frontend = ves1x93_get_frontend,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538
539 .read_status = ves1x93_read_status,
540 .read_ber = ves1x93_read_ber,
541 .read_signal_strength = ves1x93_read_signal_strength,
542 .read_snr = ves1x93_read_snr,
543 .read_ucblocks = ves1x93_read_ucblocks,
544
545 .set_voltage = ves1x93_set_voltage,
546};
547
548module_param(debug, int, 0644);
549
550MODULE_DESCRIPTION("VLSI VES1x93 DVB-S Demodulator driver");
551MODULE_AUTHOR("Ralph Metzler");
552MODULE_LICENSE("GPL");
553
554EXPORT_SYMBOL(ves1x93_attach);