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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef _ASM_IA64_CACHEFLUSH_H
2#define _ASM_IA64_CACHEFLUSH_H
3
4/*
5 * Copyright (C) 2002 Hewlett-Packard Co
6 * David Mosberger-Tang <davidm@hpl.hp.com>
7 */
8
9#include <linux/page-flags.h>
Jiri Slaby1977f032007-10-18 23:40:25 -070010#include <linux/bitops.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011
Linus Torvalds1da177e2005-04-16 15:20:36 -070012#include <asm/page.h>
13
14/*
15 * Cache flushing routines. This is the kind of stuff that can be very expensive, so try
16 * to avoid them whenever possible.
17 */
18
19#define flush_cache_all() do { } while (0)
20#define flush_cache_mm(mm) do { } while (0)
Ralf Baechleec8c0442006-12-12 17:14:57 +000021#define flush_cache_dup_mm(mm) do { } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#define flush_cache_range(vma, start, end) do { } while (0)
23#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
24#define flush_icache_page(vma,page) do { } while (0)
25#define flush_cache_vmap(start, end) do { } while (0)
26#define flush_cache_vunmap(start, end) do { } while (0)
27
28#define flush_dcache_page(page) \
29do { \
30 clear_bit(PG_arch_1, &(page)->flags); \
31} while (0)
32
33#define flush_dcache_mmap_lock(mapping) do { } while (0)
34#define flush_dcache_mmap_unlock(mapping) do { } while (0)
35
36extern void flush_icache_range (unsigned long start, unsigned long end);
Fenghua Yu62fdd762008-10-17 12:14:13 -070037extern void clflush_cache_range(void *addr, int size);
38
Linus Torvalds1da177e2005-04-16 15:20:36 -070039
40#define flush_icache_user_range(vma, page, user_addr, len) \
41do { \
42 unsigned long _addr = (unsigned long) page_address(page) + ((user_addr) & ~PAGE_MASK); \
43 flush_icache_range(_addr, _addr + (len)); \
44} while (0)
45
46#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
47do { memcpy(dst, src, len); \
48 flush_icache_user_range(vma, page, vaddr, len); \
49} while (0)
50#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
51 memcpy(dst, src, len)
52
53#endif /* _ASM_IA64_CACHEFLUSH_H */