blob: a515acccc61f7f64a7b19ecda6773e5af26131c2 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
3 * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
4 *
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10005 * Right now, I am very wasteful with the buffers. I allocate memory
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * pages and then divide them into 2K frame buffers. This way I know I
7 * have buffers large enough to hold one frame within one buffer descriptor.
8 * Once I get this working, I will use 64 or 128 byte CPM buffers, which
9 * will be much more memory efficient and will easily handle lots of
10 * small packets.
11 *
12 * Much better multiple PHY support by Magnus Damm.
13 * Copyright (c) 2000 Ericsson Radio Systems AB.
14 *
Greg Ungerer562d2f82005-11-07 14:09:50 +100015 * Support for FEC controller of ColdFire processors.
16 * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +100017 *
18 * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
Philippe De Muyter677177c2006-06-27 13:05:33 +100019 * Copyright (c) 2004-2006 Macq Electronique SA.
Linus Torvalds1da177e2005-04-16 15:20:36 -070020 */
21
Linus Torvalds1da177e2005-04-16 15:20:36 -070022#include <linux/module.h>
23#include <linux/kernel.h>
24#include <linux/string.h>
25#include <linux/ptrace.h>
26#include <linux/errno.h>
27#include <linux/ioport.h>
28#include <linux/slab.h>
29#include <linux/interrupt.h>
30#include <linux/pci.h>
31#include <linux/init.h>
32#include <linux/delay.h>
33#include <linux/netdevice.h>
34#include <linux/etherdevice.h>
35#include <linux/skbuff.h>
36#include <linux/spinlock.h>
37#include <linux/workqueue.h>
38#include <linux/bitops.h>
Sascha Hauer6f501b12009-01-28 23:03:05 +000039#include <linux/io.h>
40#include <linux/irq.h>
Sascha Hauer196719e2009-01-28 23:03:10 +000041#include <linux/clk.h>
Sascha Haueread73182009-01-28 23:03:11 +000042#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043
Greg Ungerer080853a2007-07-30 16:28:46 +100044#include <asm/cacheflush.h>
Sascha Hauer196719e2009-01-28 23:03:10 +000045
46#ifndef CONFIG_ARCH_MXC
Linus Torvalds1da177e2005-04-16 15:20:36 -070047#include <asm/coldfire.h>
48#include <asm/mcfsim.h>
Sascha Hauer196719e2009-01-28 23:03:10 +000049#endif
Sascha Hauer6f501b12009-01-28 23:03:05 +000050
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include "fec.h"
Linus Torvalds1da177e2005-04-16 15:20:36 -070052
Sascha Hauer196719e2009-01-28 23:03:10 +000053#ifdef CONFIG_ARCH_MXC
54#include <mach/hardware.h>
55#define FEC_ALIGNMENT 0xf
56#else
57#define FEC_ALIGNMENT 0x3
58#endif
59
Sascha Haueread73182009-01-28 23:03:11 +000060/*
61 * Define the fixed address of the FEC hardware.
62 */
Greg Ungerer87f4abb2008-06-06 15:55:36 +100063#if defined(CONFIG_M5272)
Sebastian Siewiorc1d96152008-05-01 14:04:02 +100064#define HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -070065
66static unsigned char fec_mac_default[] = {
67 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
68};
69
70/*
71 * Some hardware gets it MAC address out of local flash memory.
72 * if this is non-zero then assume it is the address to get MAC from.
73 */
74#if defined(CONFIG_NETtel)
75#define FEC_FLASHMAC 0xf0006006
76#elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
77#define FEC_FLASHMAC 0xf0006000
Linus Torvalds1da177e2005-04-16 15:20:36 -070078#elif defined(CONFIG_CANCam)
79#define FEC_FLASHMAC 0xf0020000
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +100080#elif defined (CONFIG_M5272C3)
81#define FEC_FLASHMAC (0xffe04000 + 4)
82#elif defined(CONFIG_MOD5272)
83#define FEC_FLASHMAC 0xffc0406b
Linus Torvalds1da177e2005-04-16 15:20:36 -070084#else
85#define FEC_FLASHMAC 0
86#endif
Greg Ungerer43be6362009-02-26 22:42:51 -080087#endif /* CONFIG_M5272 */
Sascha Haueread73182009-01-28 23:03:11 +000088
Linus Torvalds1da177e2005-04-16 15:20:36 -070089/* Forward declarations of some structures to support different PHYs
90*/
91
92typedef struct {
93 uint mii_data;
94 void (*funct)(uint mii_reg, struct net_device *dev);
95} phy_cmd_t;
96
97typedef struct {
98 uint id;
99 char *name;
100
101 const phy_cmd_t *config;
102 const phy_cmd_t *startup;
103 const phy_cmd_t *ack_int;
104 const phy_cmd_t *shutdown;
105} phy_info_t;
106
107/* The number of Tx and Rx buffers. These are allocated from the page
108 * pool. The code may assume these are power of two, so it it best
109 * to keep them that size.
110 * We don't need to allocate pages for the transmitter. We just use
111 * the skbuffer directly.
112 */
113#define FEC_ENET_RX_PAGES 8
114#define FEC_ENET_RX_FRSIZE 2048
115#define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE)
116#define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES)
117#define FEC_ENET_TX_FRSIZE 2048
118#define FEC_ENET_TX_FRPPG (PAGE_SIZE / FEC_ENET_TX_FRSIZE)
119#define TX_RING_SIZE 16 /* Must be power of two */
120#define TX_RING_MOD_MASK 15 /* for this to work */
121
Greg Ungerer562d2f82005-11-07 14:09:50 +1000122#if (((RX_RING_SIZE + TX_RING_SIZE) * 8) > PAGE_SIZE)
Matt Waddel6b265292006-06-27 13:10:56 +1000123#error "FEC: descriptor ring size constants too large"
Greg Ungerer562d2f82005-11-07 14:09:50 +1000124#endif
125
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126/* Interrupt events/masks.
127*/
128#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
129#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
130#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
131#define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
132#define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
133#define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
134#define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
135#define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
136#define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
137#define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
138
139/* The FEC stores dest/src/type, data, and checksum for receive packets.
140 */
141#define PKT_MAXBUF_SIZE 1518
142#define PKT_MINBUF_SIZE 64
143#define PKT_MAXBLR_SIZE 1520
144
145
146/*
Matt Waddel6b265292006-06-27 13:10:56 +1000147 * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 * size bits. Other FEC hardware does not, so we need to take that into
149 * account when setting it.
150 */
Greg Ungerer562d2f82005-11-07 14:09:50 +1000151#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
Sascha Hauer196719e2009-01-28 23:03:10 +0000152 defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARCH_MXC)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153#define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16)
154#else
155#define OPT_FRAME_SIZE 0
156#endif
157
158/* The FEC buffer descriptors track the ring buffers. The rx_bd_base and
159 * tx_bd_base always point to the base of the buffer descriptors. The
160 * cur_rx and cur_tx point to the currently available buffer.
161 * The dirty_tx tracks the current buffer that is being sent by the
162 * controller. The cur_tx and dirty_tx are equal under both completely
163 * empty and completely full conditions. The empty/ready indicator in
164 * the buffer descriptor determines the actual condition.
165 */
166struct fec_enet_private {
167 /* Hardware registers of the FEC device */
168 volatile fec_t *hwp;
169
Greg Ungerercb84d6e2007-07-30 16:29:09 +1000170 struct net_device *netdev;
171
Sascha Haueread73182009-01-28 23:03:11 +0000172 struct clk *clk;
173
Linus Torvalds1da177e2005-04-16 15:20:36 -0700174 /* The saved address of a sent-in-place packet/buffer, for skfree(). */
175 unsigned char *tx_bounce[TX_RING_SIZE];
176 struct sk_buff* tx_skbuff[TX_RING_SIZE];
177 ushort skb_cur;
178 ushort skb_dirty;
179
180 /* CPM dual port RAM relative addresses.
181 */
Sascha Hauer4661e752009-01-28 23:03:07 +0000182 dma_addr_t bd_dma;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700183 cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */
184 cbd_t *tx_bd_base;
185 cbd_t *cur_rx, *cur_tx; /* The next free ring entry */
186 cbd_t *dirty_tx; /* The ring entries to be free()ed. */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187 uint tx_full;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000188 /* hold while accessing the HW like ringbuffer for tx/rx but not MAC */
189 spinlock_t hw_lock;
190 /* hold while accessing the mii_list_t() elements */
191 spinlock_t mii_lock;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700192
193 uint phy_id;
194 uint phy_id_done;
195 uint phy_status;
196 uint phy_speed;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000197 phy_info_t const *phy;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198 struct work_struct phy_task;
199
200 uint sequence_done;
201 uint mii_phy_task_queued;
202
203 uint phy_addr;
204
205 int index;
206 int opened;
207 int link;
208 int old_link;
209 int full_duplex;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210};
211
212static int fec_enet_open(struct net_device *dev);
213static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev);
214static void fec_enet_mii(struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100215static irqreturn_t fec_enet_interrupt(int irq, void * dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700216static void fec_enet_tx(struct net_device *dev);
217static void fec_enet_rx(struct net_device *dev);
218static int fec_enet_close(struct net_device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219static void set_multicast_list(struct net_device *dev);
220static void fec_restart(struct net_device *dev, int duplex);
221static void fec_stop(struct net_device *dev);
222static void fec_set_mac_address(struct net_device *dev);
223
224
225/* MII processing. We keep this as simple as possible. Requests are
226 * placed on the list (if there is room). When the request is finished
227 * by the MII, an optional function may be called.
228 */
229typedef struct mii_list {
230 uint mii_regval;
231 void (*mii_func)(uint val, struct net_device *dev);
232 struct mii_list *mii_next;
233} mii_list_t;
234
235#define NMII 20
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000236static mii_list_t mii_cmds[NMII];
237static mii_list_t *mii_free;
238static mii_list_t *mii_head;
239static mii_list_t *mii_tail;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400241static int mii_queue(struct net_device *dev, int request,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700242 void (*func)(uint, struct net_device *));
243
244/* Make MII read/write commands for the FEC.
245*/
246#define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18))
247#define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \
248 (VAL & 0xffff))
249#define mk_mii_end 0
250
251/* Transmitter timeout.
252*/
253#define TX_TIMEOUT (2*HZ)
254
255/* Register definitions for the PHY.
256*/
257
258#define MII_REG_CR 0 /* Control Register */
259#define MII_REG_SR 1 /* Status Register */
260#define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */
261#define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400262#define MII_REG_ANAR 4 /* A-N Advertisement Register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700263#define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */
264#define MII_REG_ANER 6 /* A-N Expansion Register */
265#define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */
266#define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */
267
268/* values for phy_status */
269
270#define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */
271#define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */
272#define PHY_CONF_SPMASK 0x00f0 /* mask for speed */
273#define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400274#define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275#define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400276#define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277
278#define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */
279#define PHY_STAT_FAULT 0x0200 /* 1 remote fault */
280#define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */
281#define PHY_STAT_SPMASK 0xf000 /* mask for speed */
282#define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400283#define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700284#define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400285#define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700286
287
288static int
289fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
290{
291 struct fec_enet_private *fep;
292 volatile fec_t *fecp;
293 volatile cbd_t *bdp;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000294 unsigned short status;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000295 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700296
297 fep = netdev_priv(dev);
298 fecp = (volatile fec_t*)dev->base_addr;
299
300 if (!fep->link) {
301 /* Link is down or autonegotiation is in progress. */
302 return 1;
303 }
304
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000305 spin_lock_irqsave(&fep->hw_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700306 /* Fill in a Tx ring entry */
307 bdp = fep->cur_tx;
308
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000309 status = bdp->cbd_sc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700310#ifndef final_version
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000311 if (status & BD_ENET_TX_READY) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700312 /* Ooops. All transmit buffers are full. Bail out.
313 * This should not happen, since dev->tbusy should be set.
314 */
315 printk("%s: tx queue full!.\n", dev->name);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000316 spin_unlock_irqrestore(&fep->hw_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700317 return 1;
318 }
319#endif
320
321 /* Clear all of the status flags.
322 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000323 status &= ~BD_ENET_TX_STATS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324
325 /* Set buffer length and buffer pointer.
326 */
327 bdp->cbd_bufaddr = __pa(skb->data);
328 bdp->cbd_datlen = skb->len;
329
330 /*
331 * On some FEC implementations data must be aligned on
332 * 4-byte boundaries. Use bounce buffers to copy data
333 * and get it aligned. Ugh.
334 */
Sascha Hauer196719e2009-01-28 23:03:10 +0000335 if (bdp->cbd_bufaddr & FEC_ALIGNMENT) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700336 unsigned int index;
337 index = bdp - fep->tx_bd_base;
Sascha Hauer6989f512009-01-28 23:03:06 +0000338 memcpy(fep->tx_bounce[index], (void *)skb->data, skb->len);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339 bdp->cbd_bufaddr = __pa(fep->tx_bounce[index]);
340 }
341
342 /* Save skb pointer.
343 */
344 fep->tx_skbuff[fep->skb_cur] = skb;
345
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700346 dev->stats.tx_bytes += skb->len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700347 fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400348
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349 /* Push the data cache so the CPM does not get stale memory
350 * data.
351 */
Sascha Hauerccdc4f12009-01-28 23:03:09 +0000352 dma_sync_single(NULL, bdp->cbd_bufaddr,
353 bdp->cbd_datlen, DMA_TO_DEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700354
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000355 /* Send it on its way. Tell FEC it's ready, interrupt when done,
356 * it's the last BD of the frame, and to put the CRC on the end.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357 */
358
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000359 status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR
Linus Torvalds1da177e2005-04-16 15:20:36 -0700360 | BD_ENET_TX_LAST | BD_ENET_TX_TC);
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000361 bdp->cbd_sc = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700362
363 dev->trans_start = jiffies;
364
365 /* Trigger transmission start */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000366 fecp->fec_x_des_active = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700367
368 /* If this was the last BD in the ring, start at the beginning again.
369 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000370 if (status & BD_ENET_TX_WRAP) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371 bdp = fep->tx_bd_base;
372 } else {
373 bdp++;
374 }
375
376 if (bdp == fep->dirty_tx) {
377 fep->tx_full = 1;
378 netif_stop_queue(dev);
379 }
380
381 fep->cur_tx = (cbd_t *)bdp;
382
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000383 spin_unlock_irqrestore(&fep->hw_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700384
385 return 0;
386}
387
388static void
389fec_timeout(struct net_device *dev)
390{
391 struct fec_enet_private *fep = netdev_priv(dev);
392
393 printk("%s: transmit timed out.\n", dev->name);
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700394 dev->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395#ifndef final_version
396 {
397 int i;
398 cbd_t *bdp;
399
400 printk("Ring data dump: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n",
401 (unsigned long)fep->cur_tx, fep->tx_full ? " (full)" : "",
402 (unsigned long)fep->dirty_tx,
403 (unsigned long)fep->cur_rx);
404
405 bdp = fep->tx_bd_base;
406 printk(" tx: %u buffers\n", TX_RING_SIZE);
407 for (i = 0 ; i < TX_RING_SIZE; i++) {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400408 printk(" %08x: %04x %04x %08x\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700409 (uint) bdp,
410 bdp->cbd_sc,
411 bdp->cbd_datlen,
412 (int) bdp->cbd_bufaddr);
413 bdp++;
414 }
415
416 bdp = fep->rx_bd_base;
417 printk(" rx: %lu buffers\n", (unsigned long) RX_RING_SIZE);
418 for (i = 0 ; i < RX_RING_SIZE; i++) {
419 printk(" %08x: %04x %04x %08x\n",
420 (uint) bdp,
421 bdp->cbd_sc,
422 bdp->cbd_datlen,
423 (int) bdp->cbd_bufaddr);
424 bdp++;
425 }
426 }
427#endif
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000428 fec_restart(dev, fep->full_duplex);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700429 netif_wake_queue(dev);
430}
431
432/* The interrupt handler.
433 * This is called from the MPC core interrupt.
434 */
435static irqreturn_t
David Howells7d12e782006-10-05 14:55:46 +0100436fec_enet_interrupt(int irq, void * dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437{
438 struct net_device *dev = dev_id;
439 volatile fec_t *fecp;
440 uint int_events;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000441 irqreturn_t ret = IRQ_NONE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700442
443 fecp = (volatile fec_t*)dev->base_addr;
444
445 /* Get the interrupt events that caused us to be here.
446 */
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000447 do {
448 int_events = fecp->fec_ievent;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700449 fecp->fec_ievent = int_events;
450
451 /* Handle receive event in its own function.
452 */
453 if (int_events & FEC_ENET_RXF) {
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000454 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455 fec_enet_rx(dev);
456 }
457
458 /* Transmit OK, or non-fatal error. Update the buffer
459 descriptors. FEC handles all errors, we just discover
460 them as part of the transmit process.
461 */
462 if (int_events & FEC_ENET_TXF) {
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000463 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464 fec_enet_tx(dev);
465 }
466
467 if (int_events & FEC_ENET_MII) {
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000468 ret = IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469 fec_enet_mii(dev);
470 }
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400471
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000472 } while (int_events);
473
474 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700475}
476
477
478static void
479fec_enet_tx(struct net_device *dev)
480{
481 struct fec_enet_private *fep;
482 volatile cbd_t *bdp;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000483 unsigned short status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484 struct sk_buff *skb;
485
486 fep = netdev_priv(dev);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000487 spin_lock_irq(&fep->hw_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488 bdp = fep->dirty_tx;
489
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000490 while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700491 if (bdp == fep->cur_tx && fep->tx_full == 0) break;
492
493 skb = fep->tx_skbuff[fep->skb_dirty];
494 /* Check for errors. */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000495 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700496 BD_ENET_TX_RL | BD_ENET_TX_UN |
497 BD_ENET_TX_CSL)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700498 dev->stats.tx_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000499 if (status & BD_ENET_TX_HB) /* No heartbeat */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700500 dev->stats.tx_heartbeat_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000501 if (status & BD_ENET_TX_LC) /* Late collision */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700502 dev->stats.tx_window_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000503 if (status & BD_ENET_TX_RL) /* Retrans limit */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700504 dev->stats.tx_aborted_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000505 if (status & BD_ENET_TX_UN) /* Underrun */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700506 dev->stats.tx_fifo_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000507 if (status & BD_ENET_TX_CSL) /* Carrier lost */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700508 dev->stats.tx_carrier_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509 } else {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700510 dev->stats.tx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511 }
512
513#ifndef final_version
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000514 if (status & BD_ENET_TX_READY)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700515 printk("HEY! Enet xmit interrupt and TX_READY.\n");
516#endif
517 /* Deferred means some collisions occurred during transmit,
518 * but we eventually sent the packet OK.
519 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000520 if (status & BD_ENET_TX_DEF)
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700521 dev->stats.collisions++;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400522
Linus Torvalds1da177e2005-04-16 15:20:36 -0700523 /* Free the sk buffer associated with this last transmit.
524 */
525 dev_kfree_skb_any(skb);
526 fep->tx_skbuff[fep->skb_dirty] = NULL;
527 fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400528
Linus Torvalds1da177e2005-04-16 15:20:36 -0700529 /* Update pointer to next buffer descriptor to be transmitted.
530 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000531 if (status & BD_ENET_TX_WRAP)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532 bdp = fep->tx_bd_base;
533 else
534 bdp++;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400535
Linus Torvalds1da177e2005-04-16 15:20:36 -0700536 /* Since we have freed up a buffer, the ring is no longer
537 * full.
538 */
539 if (fep->tx_full) {
540 fep->tx_full = 0;
541 if (netif_queue_stopped(dev))
542 netif_wake_queue(dev);
543 }
544 }
545 fep->dirty_tx = (cbd_t *)bdp;
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000546 spin_unlock_irq(&fep->hw_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547}
548
549
550/* During a receive, the cur_rx points to the current incoming buffer.
551 * When we update through the ring, if the next incoming buffer has
552 * not been given to the system, we just set the empty indicator,
553 * effectively tossing the packet.
554 */
555static void
556fec_enet_rx(struct net_device *dev)
557{
558 struct fec_enet_private *fep;
559 volatile fec_t *fecp;
560 volatile cbd_t *bdp;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000561 unsigned short status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562 struct sk_buff *skb;
563 ushort pkt_len;
564 __u8 *data;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400565
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000566#ifdef CONFIG_M532x
567 flush_cache_all();
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400568#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569
570 fep = netdev_priv(dev);
571 fecp = (volatile fec_t*)dev->base_addr;
572
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000573 spin_lock_irq(&fep->hw_lock);
574
Linus Torvalds1da177e2005-04-16 15:20:36 -0700575 /* First, grab all of the stats for the incoming packet.
576 * These get messed up if we get called due to a busy condition.
577 */
578 bdp = fep->cur_rx;
579
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000580while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700581
582#ifndef final_version
583 /* Since we have allocated space to hold a complete frame,
584 * the last indicator should be set.
585 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000586 if ((status & BD_ENET_RX_LAST) == 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700587 printk("FEC ENET: rcv is not +last\n");
588#endif
589
590 if (!fep->opened)
591 goto rx_processing_done;
592
593 /* Check for errors. */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000594 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700595 BD_ENET_RX_CR | BD_ENET_RX_OV)) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700596 dev->stats.rx_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000597 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700598 /* Frame too long or too short. */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700599 dev->stats.rx_length_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700600 }
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000601 if (status & BD_ENET_RX_NO) /* Frame alignment */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700602 dev->stats.rx_frame_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000603 if (status & BD_ENET_RX_CR) /* CRC Error */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700604 dev->stats.rx_crc_errors++;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000605 if (status & BD_ENET_RX_OV) /* FIFO overrun */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700606 dev->stats.rx_fifo_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607 }
608
609 /* Report late collisions as a frame error.
610 * On this error, the BD is closed, but we don't know what we
611 * have in the buffer. So, just drop this frame on the floor.
612 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000613 if (status & BD_ENET_RX_CL) {
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700614 dev->stats.rx_errors++;
615 dev->stats.rx_frame_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616 goto rx_processing_done;
617 }
618
619 /* Process the incoming frame.
620 */
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700621 dev->stats.rx_packets++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700622 pkt_len = bdp->cbd_datlen;
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700623 dev->stats.rx_bytes += pkt_len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700624 data = (__u8*)__va(bdp->cbd_bufaddr);
625
Sascha Hauerccdc4f12009-01-28 23:03:09 +0000626 dma_sync_single(NULL, (unsigned long)__pa(data),
627 pkt_len - 4, DMA_FROM_DEVICE);
628
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629 /* This does 16 byte alignment, exactly what we need.
630 * The packet length includes FCS, but we don't want to
631 * include that when passing upstream as it messes up
632 * bridging applications.
633 */
634 skb = dev_alloc_skb(pkt_len-4);
635
636 if (skb == NULL) {
637 printk("%s: Memory squeeze, dropping packet.\n", dev->name);
Jeff Garzik09f75cd2007-10-03 17:41:50 -0700638 dev->stats.rx_dropped++;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700639 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640 skb_put(skb,pkt_len-4); /* Make room */
David S. Miller8c7b7fa2007-07-10 22:08:12 -0700641 skb_copy_to_linear_data(skb, data, pkt_len-4);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700642 skb->protocol=eth_type_trans(skb,dev);
643 netif_rx(skb);
644 }
645 rx_processing_done:
646
647 /* Clear the status flags for this buffer.
648 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000649 status &= ~BD_ENET_RX_STATS;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650
651 /* Mark the buffer empty.
652 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000653 status |= BD_ENET_RX_EMPTY;
654 bdp->cbd_sc = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700655
656 /* Update BD pointer to next entry.
657 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000658 if (status & BD_ENET_RX_WRAP)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700659 bdp = fep->rx_bd_base;
660 else
661 bdp++;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400662
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663#if 1
664 /* Doing this here will keep the FEC running while we process
665 * incoming frames. On a heavily loaded network, we should be
666 * able to keep up at the expense of system resources.
667 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000668 fecp->fec_r_des_active = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700669#endif
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000670 } /* while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700671 fep->cur_rx = (cbd_t *)bdp;
672
673#if 0
674 /* Doing this here will allow us to process all frames in the
675 * ring before the FEC is allowed to put more there. On a heavily
676 * loaded network, some frames may be lost. Unfortunately, this
677 * increases the interrupt overhead since we can potentially work
678 * our way back to the interrupt return only to come right back
679 * here.
680 */
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000681 fecp->fec_r_des_active = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700682#endif
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000683
684 spin_unlock_irq(&fep->hw_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700685}
686
687
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000688/* called from interrupt context */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700689static void
690fec_enet_mii(struct net_device *dev)
691{
692 struct fec_enet_private *fep;
693 volatile fec_t *ep;
694 mii_list_t *mip;
695 uint mii_reg;
696
697 fep = netdev_priv(dev);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000698 spin_lock_irq(&fep->mii_lock);
699
Linus Torvalds1da177e2005-04-16 15:20:36 -0700700 ep = fep->hwp;
701 mii_reg = ep->fec_mii_data;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000702
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703 if ((mip = mii_head) == NULL) {
704 printk("MII and no head!\n");
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000705 goto unlock;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700706 }
707
708 if (mip->mii_func != NULL)
709 (*(mip->mii_func))(mii_reg, dev);
710
711 mii_head = mip->mii_next;
712 mip->mii_next = mii_free;
713 mii_free = mip;
714
715 if ((mip = mii_head) != NULL)
716 ep->fec_mii_data = mip->mii_regval;
Greg Ungerer0e702ab2006-06-27 13:19:33 +1000717
718unlock:
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000719 spin_unlock_irq(&fep->mii_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700720}
721
722static int
723mii_queue(struct net_device *dev, int regval, void (*func)(uint, struct net_device *))
724{
725 struct fec_enet_private *fep;
726 unsigned long flags;
727 mii_list_t *mip;
728 int retval;
729
730 /* Add PHY address to register command.
731 */
732 fep = netdev_priv(dev);
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000733 spin_lock_irqsave(&fep->mii_lock, flags);
734
Linus Torvalds1da177e2005-04-16 15:20:36 -0700735 regval |= fep->phy_addr << 23;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700736 retval = 0;
737
Linus Torvalds1da177e2005-04-16 15:20:36 -0700738 if ((mip = mii_free) != NULL) {
739 mii_free = mip->mii_next;
740 mip->mii_regval = regval;
741 mip->mii_func = func;
742 mip->mii_next = NULL;
743 if (mii_head) {
744 mii_tail->mii_next = mip;
745 mii_tail = mip;
Philippe De Muyterf909b1e2007-10-23 14:37:54 +1000746 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700747 mii_head = mii_tail = mip;
748 fep->hwp->fec_mii_data = regval;
749 }
Philippe De Muyterf909b1e2007-10-23 14:37:54 +1000750 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700751 retval = 1;
752 }
753
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +1000754 spin_unlock_irqrestore(&fep->mii_lock, flags);
755 return retval;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700756}
757
758static void mii_do_cmd(struct net_device *dev, const phy_cmd_t *c)
759{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700760 if(!c)
761 return;
762
Philippe De Muyterbe6cb662007-10-23 14:37:54 +1000763 for (; c->mii_data != mk_mii_end; c++)
764 mii_queue(dev, c->mii_data, c->funct);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765}
766
767static void mii_parse_sr(uint mii_reg, struct net_device *dev)
768{
769 struct fec_enet_private *fep = netdev_priv(dev);
770 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000771 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700772
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000773 status = *s & ~(PHY_STAT_LINK | PHY_STAT_FAULT | PHY_STAT_ANC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700774
775 if (mii_reg & 0x0004)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000776 status |= PHY_STAT_LINK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700777 if (mii_reg & 0x0010)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000778 status |= PHY_STAT_FAULT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779 if (mii_reg & 0x0020)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000780 status |= PHY_STAT_ANC;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000781 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700782}
783
784static void mii_parse_cr(uint mii_reg, struct net_device *dev)
785{
786 struct fec_enet_private *fep = netdev_priv(dev);
787 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000788 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700789
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000790 status = *s & ~(PHY_CONF_ANE | PHY_CONF_LOOP);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700791
792 if (mii_reg & 0x1000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000793 status |= PHY_CONF_ANE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700794 if (mii_reg & 0x4000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000795 status |= PHY_CONF_LOOP;
796 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700797}
798
799static void mii_parse_anar(uint mii_reg, struct net_device *dev)
800{
801 struct fec_enet_private *fep = netdev_priv(dev);
802 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000803 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700804
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000805 status = *s & ~(PHY_CONF_SPMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700806
807 if (mii_reg & 0x0020)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000808 status |= PHY_CONF_10HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700809 if (mii_reg & 0x0040)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000810 status |= PHY_CONF_10FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700811 if (mii_reg & 0x0080)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000812 status |= PHY_CONF_100HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700813 if (mii_reg & 0x00100)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000814 status |= PHY_CONF_100FDX;
815 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700816}
817
818/* ------------------------------------------------------------------------- */
819/* The Level one LXT970 is used by many boards */
820
821#define MII_LXT970_MIRROR 16 /* Mirror register */
822#define MII_LXT970_IER 17 /* Interrupt Enable Register */
823#define MII_LXT970_ISR 18 /* Interrupt Status Register */
824#define MII_LXT970_CONFIG 19 /* Configuration Register */
825#define MII_LXT970_CSR 20 /* Chip Status Register */
826
827static void mii_parse_lxt970_csr(uint mii_reg, struct net_device *dev)
828{
829 struct fec_enet_private *fep = netdev_priv(dev);
830 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000831 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700832
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000833 status = *s & ~(PHY_STAT_SPMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834 if (mii_reg & 0x0800) {
835 if (mii_reg & 0x1000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000836 status |= PHY_STAT_100FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000838 status |= PHY_STAT_100HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700839 } else {
840 if (mii_reg & 0x1000)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000841 status |= PHY_STAT_10FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700842 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000843 status |= PHY_STAT_10HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700844 }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000845 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700846}
847
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000848static phy_cmd_t const phy_cmd_lxt970_config[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700849 { mk_mii_read(MII_REG_CR), mii_parse_cr },
850 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
851 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000852 };
853static phy_cmd_t const phy_cmd_lxt970_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700854 { mk_mii_write(MII_LXT970_IER, 0x0002), NULL },
855 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
856 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000857 };
858static phy_cmd_t const phy_cmd_lxt970_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700859 /* read SR and ISR to acknowledge */
860 { mk_mii_read(MII_REG_SR), mii_parse_sr },
861 { mk_mii_read(MII_LXT970_ISR), NULL },
862
863 /* find out the current status */
864 { mk_mii_read(MII_LXT970_CSR), mii_parse_lxt970_csr },
865 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000866 };
867static phy_cmd_t const phy_cmd_lxt970_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700868 { mk_mii_write(MII_LXT970_IER, 0x0000), NULL },
869 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000870 };
871static phy_info_t const phy_info_lxt970 = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400872 .id = 0x07810000,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000873 .name = "LXT970",
874 .config = phy_cmd_lxt970_config,
875 .startup = phy_cmd_lxt970_startup,
876 .ack_int = phy_cmd_lxt970_ack_int,
877 .shutdown = phy_cmd_lxt970_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878};
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400879
Linus Torvalds1da177e2005-04-16 15:20:36 -0700880/* ------------------------------------------------------------------------- */
881/* The Level one LXT971 is used on some of my custom boards */
882
883/* register definitions for the 971 */
884
885#define MII_LXT971_PCR 16 /* Port Control Register */
886#define MII_LXT971_SR2 17 /* Status Register 2 */
887#define MII_LXT971_IER 18 /* Interrupt Enable Register */
888#define MII_LXT971_ISR 19 /* Interrupt Status Register */
889#define MII_LXT971_LCR 20 /* LED Control Register */
890#define MII_LXT971_TCR 30 /* Transmit Control Register */
891
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400892/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893 * I had some nice ideas of running the MDIO faster...
894 * The 971 should support 8MHz and I tried it, but things acted really
895 * weird, so 2.5 MHz ought to be enough for anyone...
896 */
897
898static void mii_parse_lxt971_sr2(uint mii_reg, struct net_device *dev)
899{
900 struct fec_enet_private *fep = netdev_priv(dev);
901 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000902 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700903
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000904 status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700905
906 if (mii_reg & 0x0400) {
907 fep->link = 1;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000908 status |= PHY_STAT_LINK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700909 } else {
910 fep->link = 0;
911 }
912 if (mii_reg & 0x0080)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000913 status |= PHY_STAT_ANC;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700914 if (mii_reg & 0x4000) {
915 if (mii_reg & 0x0200)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000916 status |= PHY_STAT_100FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700917 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000918 status |= PHY_STAT_100HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700919 } else {
920 if (mii_reg & 0x0200)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000921 status |= PHY_STAT_10FDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700922 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000923 status |= PHY_STAT_10HDX;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700924 }
925 if (mii_reg & 0x0008)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000926 status |= PHY_STAT_FAULT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700927
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000928 *s = status;
929}
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400930
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000931static phy_cmd_t const phy_cmd_lxt971_config[] = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400932 /* limit to 10MBit because my prototype board
Linus Torvalds1da177e2005-04-16 15:20:36 -0700933 * doesn't work with 100. */
934 { mk_mii_read(MII_REG_CR), mii_parse_cr },
935 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
936 { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
937 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000938 };
939static phy_cmd_t const phy_cmd_lxt971_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700940 { mk_mii_write(MII_LXT971_IER, 0x00f2), NULL },
941 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
942 { mk_mii_write(MII_LXT971_LCR, 0xd422), NULL }, /* LED config */
943 /* Somehow does the 971 tell me that the link is down
944 * the first read after power-up.
945 * read here to get a valid value in ack_int */
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400946 { mk_mii_read(MII_REG_SR), mii_parse_sr },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000948 };
949static phy_cmd_t const phy_cmd_lxt971_ack_int[] = {
950 /* acknowledge the int before reading status ! */
951 { mk_mii_read(MII_LXT971_ISR), NULL },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700952 /* find out the current status */
953 { mk_mii_read(MII_REG_SR), mii_parse_sr },
954 { mk_mii_read(MII_LXT971_SR2), mii_parse_lxt971_sr2 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700955 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000956 };
957static phy_cmd_t const phy_cmd_lxt971_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700958 { mk_mii_write(MII_LXT971_IER, 0x0000), NULL },
959 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000960 };
961static phy_info_t const phy_info_lxt971 = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400962 .id = 0x0001378e,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000963 .name = "LXT971",
964 .config = phy_cmd_lxt971_config,
965 .startup = phy_cmd_lxt971_startup,
966 .ack_int = phy_cmd_lxt971_ack_int,
967 .shutdown = phy_cmd_lxt971_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968};
969
970/* ------------------------------------------------------------------------- */
971/* The Quality Semiconductor QS6612 is used on the RPX CLLF */
972
973/* register definitions */
974
975#define MII_QS6612_MCR 17 /* Mode Control Register */
976#define MII_QS6612_FTR 27 /* Factory Test Register */
977#define MII_QS6612_MCO 28 /* Misc. Control Register */
978#define MII_QS6612_ISR 29 /* Interrupt Source Register */
979#define MII_QS6612_IMR 30 /* Interrupt Mask Register */
980#define MII_QS6612_PCR 31 /* 100BaseTx PHY Control Reg. */
981
982static void mii_parse_qs6612_pcr(uint mii_reg, struct net_device *dev)
983{
984 struct fec_enet_private *fep = netdev_priv(dev);
985 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000986 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700987
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000988 status = *s & ~(PHY_STAT_SPMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700989
990 switch((mii_reg >> 2) & 7) {
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000991 case 1: status |= PHY_STAT_10HDX; break;
992 case 2: status |= PHY_STAT_100HDX; break;
993 case 5: status |= PHY_STAT_10FDX; break;
994 case 6: status |= PHY_STAT_100FDX; break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700995}
996
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +1000997 *s = status;
998}
999
1000static phy_cmd_t const phy_cmd_qs6612_config[] = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001001 /* The PHY powers up isolated on the RPX,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001002 * so send a command to allow operation.
1003 */
1004 { mk_mii_write(MII_QS6612_PCR, 0x0dc0), NULL },
1005
1006 /* parse cr and anar to get some info */
1007 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1008 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1009 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001010 };
1011static phy_cmd_t const phy_cmd_qs6612_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001012 { mk_mii_write(MII_QS6612_IMR, 0x003a), NULL },
1013 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
1014 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001015 };
1016static phy_cmd_t const phy_cmd_qs6612_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001017 /* we need to read ISR, SR and ANER to acknowledge */
1018 { mk_mii_read(MII_QS6612_ISR), NULL },
1019 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1020 { mk_mii_read(MII_REG_ANER), NULL },
1021
1022 /* read pcr to get info */
1023 { mk_mii_read(MII_QS6612_PCR), mii_parse_qs6612_pcr },
1024 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001025 };
1026static phy_cmd_t const phy_cmd_qs6612_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001027 { mk_mii_write(MII_QS6612_IMR, 0x0000), NULL },
1028 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001029 };
1030static phy_info_t const phy_info_qs6612 = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001031 .id = 0x00181440,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001032 .name = "QS6612",
1033 .config = phy_cmd_qs6612_config,
1034 .startup = phy_cmd_qs6612_startup,
1035 .ack_int = phy_cmd_qs6612_ack_int,
1036 .shutdown = phy_cmd_qs6612_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -07001037};
1038
1039/* ------------------------------------------------------------------------- */
1040/* AMD AM79C874 phy */
1041
1042/* register definitions for the 874 */
1043
1044#define MII_AM79C874_MFR 16 /* Miscellaneous Feature Register */
1045#define MII_AM79C874_ICSR 17 /* Interrupt/Status Register */
1046#define MII_AM79C874_DR 18 /* Diagnostic Register */
1047#define MII_AM79C874_PMLR 19 /* Power and Loopback Register */
1048#define MII_AM79C874_MCR 21 /* ModeControl Register */
1049#define MII_AM79C874_DC 23 /* Disconnect Counter */
1050#define MII_AM79C874_REC 24 /* Recieve Error Counter */
1051
1052static void mii_parse_am79c874_dr(uint mii_reg, struct net_device *dev)
1053{
1054 struct fec_enet_private *fep = netdev_priv(dev);
1055 volatile uint *s = &(fep->phy_status);
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001056 uint status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001057
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001058 status = *s & ~(PHY_STAT_SPMASK | PHY_STAT_ANC);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001059
1060 if (mii_reg & 0x0080)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001061 status |= PHY_STAT_ANC;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001062 if (mii_reg & 0x0400)
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001063 status |= ((mii_reg & 0x0800) ? PHY_STAT_100FDX : PHY_STAT_100HDX);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001064 else
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001065 status |= ((mii_reg & 0x0800) ? PHY_STAT_10FDX : PHY_STAT_10HDX);
1066
1067 *s = status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001068}
1069
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001070static phy_cmd_t const phy_cmd_am79c874_config[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001071 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1072 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1073 { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr },
1074 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001075 };
1076static phy_cmd_t const phy_cmd_am79c874_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001077 { mk_mii_write(MII_AM79C874_ICSR, 0xff00), NULL },
1078 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001079 { mk_mii_read(MII_REG_SR), mii_parse_sr },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001080 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001081 };
1082static phy_cmd_t const phy_cmd_am79c874_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001083 /* find out the current status */
1084 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1085 { mk_mii_read(MII_AM79C874_DR), mii_parse_am79c874_dr },
1086 /* we only need to read ISR to acknowledge */
1087 { mk_mii_read(MII_AM79C874_ICSR), NULL },
1088 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001089 };
1090static phy_cmd_t const phy_cmd_am79c874_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001091 { mk_mii_write(MII_AM79C874_ICSR, 0x0000), NULL },
1092 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001093 };
1094static phy_info_t const phy_info_am79c874 = {
1095 .id = 0x00022561,
1096 .name = "AM79C874",
1097 .config = phy_cmd_am79c874_config,
1098 .startup = phy_cmd_am79c874_startup,
1099 .ack_int = phy_cmd_am79c874_ack_int,
1100 .shutdown = phy_cmd_am79c874_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -07001101};
1102
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001103
Linus Torvalds1da177e2005-04-16 15:20:36 -07001104/* ------------------------------------------------------------------------- */
1105/* Kendin KS8721BL phy */
1106
1107/* register definitions for the 8721 */
1108
1109#define MII_KS8721BL_RXERCR 21
Sascha Hauer43268dc2009-01-28 23:03:08 +00001110#define MII_KS8721BL_ICSR 27
Linus Torvalds1da177e2005-04-16 15:20:36 -07001111#define MII_KS8721BL_PHYCR 31
1112
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001113static phy_cmd_t const phy_cmd_ks8721bl_config[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001114 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1115 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1116 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001117 };
1118static phy_cmd_t const phy_cmd_ks8721bl_startup[] = { /* enable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001119 { mk_mii_write(MII_KS8721BL_ICSR, 0xff00), NULL },
1120 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001121 { mk_mii_read(MII_REG_SR), mii_parse_sr },
Linus Torvalds1da177e2005-04-16 15:20:36 -07001122 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001123 };
1124static phy_cmd_t const phy_cmd_ks8721bl_ack_int[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001125 /* find out the current status */
1126 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1127 /* we only need to read ISR to acknowledge */
1128 { mk_mii_read(MII_KS8721BL_ICSR), NULL },
1129 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001130 };
1131static phy_cmd_t const phy_cmd_ks8721bl_shutdown[] = { /* disable interrupts */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001132 { mk_mii_write(MII_KS8721BL_ICSR, 0x0000), NULL },
1133 { mk_mii_end, }
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001134 };
1135static phy_info_t const phy_info_ks8721bl = {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001136 .id = 0x00022161,
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001137 .name = "KS8721BL",
1138 .config = phy_cmd_ks8721bl_config,
1139 .startup = phy_cmd_ks8721bl_startup,
1140 .ack_int = phy_cmd_ks8721bl_ack_int,
1141 .shutdown = phy_cmd_ks8721bl_shutdown
Linus Torvalds1da177e2005-04-16 15:20:36 -07001142};
1143
1144/* ------------------------------------------------------------------------- */
Greg Ungerer562d2f82005-11-07 14:09:50 +10001145/* register definitions for the DP83848 */
1146
1147#define MII_DP8384X_PHYSTST 16 /* PHY Status Register */
1148
1149static void mii_parse_dp8384x_sr2(uint mii_reg, struct net_device *dev)
1150{
Wang Chen4cf16532008-11-12 23:38:14 -08001151 struct fec_enet_private *fep = netdev_priv(dev);
Greg Ungerer562d2f82005-11-07 14:09:50 +10001152 volatile uint *s = &(fep->phy_status);
1153
1154 *s &= ~(PHY_STAT_SPMASK | PHY_STAT_LINK | PHY_STAT_ANC);
1155
1156 /* Link up */
1157 if (mii_reg & 0x0001) {
1158 fep->link = 1;
1159 *s |= PHY_STAT_LINK;
1160 } else
1161 fep->link = 0;
1162 /* Status of link */
1163 if (mii_reg & 0x0010) /* Autonegotioation complete */
1164 *s |= PHY_STAT_ANC;
1165 if (mii_reg & 0x0002) { /* 10MBps? */
1166 if (mii_reg & 0x0004) /* Full Duplex? */
1167 *s |= PHY_STAT_10FDX;
1168 else
1169 *s |= PHY_STAT_10HDX;
1170 } else { /* 100 Mbps? */
1171 if (mii_reg & 0x0004) /* Full Duplex? */
1172 *s |= PHY_STAT_100FDX;
1173 else
1174 *s |= PHY_STAT_100HDX;
1175 }
1176 if (mii_reg & 0x0008)
1177 *s |= PHY_STAT_FAULT;
1178}
1179
1180static phy_info_t phy_info_dp83848= {
1181 0x020005c9,
1182 "DP83848",
1183
1184 (const phy_cmd_t []) { /* config */
1185 { mk_mii_read(MII_REG_CR), mii_parse_cr },
1186 { mk_mii_read(MII_REG_ANAR), mii_parse_anar },
1187 { mk_mii_read(MII_DP8384X_PHYSTST), mii_parse_dp8384x_sr2 },
1188 { mk_mii_end, }
1189 },
1190 (const phy_cmd_t []) { /* startup - enable interrupts */
1191 { mk_mii_write(MII_REG_CR, 0x1200), NULL }, /* autonegotiate */
1192 { mk_mii_read(MII_REG_SR), mii_parse_sr },
1193 { mk_mii_end, }
1194 },
1195 (const phy_cmd_t []) { /* ack_int - never happens, no interrupt */
1196 { mk_mii_end, }
1197 },
1198 (const phy_cmd_t []) { /* shutdown */
1199 { mk_mii_end, }
1200 },
1201};
1202
1203/* ------------------------------------------------------------------------- */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001204
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001205static phy_info_t const * const phy_info[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001206 &phy_info_lxt970,
1207 &phy_info_lxt971,
1208 &phy_info_qs6612,
1209 &phy_info_am79c874,
1210 &phy_info_ks8721bl,
Greg Ungerer562d2f82005-11-07 14:09:50 +10001211 &phy_info_dp83848,
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212 NULL
1213};
1214
1215/* ------------------------------------------------------------------------- */
Sebastian Siewiorc1d96152008-05-01 14:04:02 +10001216#ifdef HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001217static irqreturn_t
David Howells7d12e782006-10-05 14:55:46 +01001218mii_link_interrupt(int irq, void * dev_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001219
Linus Torvalds1da177e2005-04-16 15:20:36 -07001220/*
Greg Ungerer43be6362009-02-26 22:42:51 -08001221 * This is specific to the MII interrupt setup of the M5272EVB.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001222 */
Greg Ungerer43be6362009-02-26 22:42:51 -08001223static void __inline__ fec_request_mii_intr(struct net_device *dev)
1224{
1225 if (request_irq(66, mii_link_interrupt, IRQF_DISABLED, "fec(MII)", dev) != 0)
1226 printk("FEC: Could not allocate fec(MII) IRQ(66)!\n");
1227}
1228
1229static void __inline__ fec_disable_phy_intr(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001230{
1231 volatile unsigned long *icrp;
Greg Ungerer43be6362009-02-26 22:42:51 -08001232 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
1233 *icrp = 0x08000000;
1234}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001235
Greg Ungerer43be6362009-02-26 22:42:51 -08001236static void __inline__ fec_phy_ack_intr(void)
1237{
1238 volatile unsigned long *icrp;
1239 /* Acknowledge the interrupt */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001240 icrp = (volatile unsigned long *) (MCF_MBAR + MCFSIM_ICR1);
Greg Ungererf861d622007-07-30 16:29:16 +10001241 *icrp = 0x0d000000;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001242}
1243
Greg Ungerer43be6362009-02-26 22:42:51 -08001244#ifdef CONFIG_M5272
Linus Torvalds1da177e2005-04-16 15:20:36 -07001245static void __inline__ fec_get_mac(struct net_device *dev)
1246{
1247 struct fec_enet_private *fep = netdev_priv(dev);
1248 volatile fec_t *fecp;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001249 unsigned char *iap, tmpaddr[ETH_ALEN];
Linus Torvalds1da177e2005-04-16 15:20:36 -07001250
1251 fecp = fep->hwp;
1252
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001253 if (FEC_FLASHMAC) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001254 /*
1255 * Get MAC address from FLASH.
1256 * If it is all 1's or 0's, use the default.
1257 */
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001258 iap = (unsigned char *)FEC_FLASHMAC;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001259 if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) &&
1260 (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0))
1261 iap = fec_mac_default;
1262 if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) &&
1263 (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff))
1264 iap = fec_mac_default;
1265 } else {
1266 *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low;
1267 *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16);
1268 iap = &tmpaddr[0];
1269 }
1270
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001271 memcpy(dev->dev_addr, iap, ETH_ALEN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001272
1273 /* Adjust MAC if using default MAC address */
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001274 if (iap == fec_mac_default)
1275 dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001276}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001277#endif
1278
1279/* ------------------------------------------------------------------------- */
1280
1281static void mii_display_status(struct net_device *dev)
1282{
1283 struct fec_enet_private *fep = netdev_priv(dev);
1284 volatile uint *s = &(fep->phy_status);
1285
1286 if (!fep->link && !fep->old_link) {
1287 /* Link is still down - don't print anything */
1288 return;
1289 }
1290
1291 printk("%s: status: ", dev->name);
1292
1293 if (!fep->link) {
1294 printk("link down");
1295 } else {
1296 printk("link up");
1297
1298 switch(*s & PHY_STAT_SPMASK) {
1299 case PHY_STAT_100FDX: printk(", 100MBit Full Duplex"); break;
1300 case PHY_STAT_100HDX: printk(", 100MBit Half Duplex"); break;
1301 case PHY_STAT_10FDX: printk(", 10MBit Full Duplex"); break;
1302 case PHY_STAT_10HDX: printk(", 10MBit Half Duplex"); break;
1303 default:
1304 printk(", Unknown speed/duplex");
1305 }
1306
1307 if (*s & PHY_STAT_ANC)
1308 printk(", auto-negotiation complete");
1309 }
1310
1311 if (*s & PHY_STAT_FAULT)
1312 printk(", remote fault");
1313
1314 printk(".\n");
1315}
1316
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001317static void mii_display_config(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001318{
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001319 struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task);
1320 struct net_device *dev = fep->netdev;
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001321 uint status = fep->phy_status;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001322
1323 /*
1324 ** When we get here, phy_task is already removed from
1325 ** the workqueue. It is thus safe to allow to reuse it.
1326 */
1327 fep->mii_phy_task_queued = 0;
1328 printk("%s: config: auto-negotiation ", dev->name);
1329
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001330 if (status & PHY_CONF_ANE)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001331 printk("on");
1332 else
1333 printk("off");
1334
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001335 if (status & PHY_CONF_100FDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001336 printk(", 100FDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001337 if (status & PHY_CONF_100HDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001338 printk(", 100HDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001339 if (status & PHY_CONF_10FDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001340 printk(", 10FDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001341 if (status & PHY_CONF_10HDX)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001342 printk(", 10HDX");
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001343 if (!(status & PHY_CONF_SPMASK))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001344 printk(", No speed/duplex selected?");
1345
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001346 if (status & PHY_CONF_LOOP)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001347 printk(", loopback enabled");
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001348
Linus Torvalds1da177e2005-04-16 15:20:36 -07001349 printk(".\n");
1350
1351 fep->sequence_done = 1;
1352}
1353
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001354static void mii_relink(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001355{
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001356 struct fec_enet_private *fep = container_of(work, struct fec_enet_private, phy_task);
1357 struct net_device *dev = fep->netdev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001358 int duplex;
1359
1360 /*
1361 ** When we get here, phy_task is already removed from
1362 ** the workqueue. It is thus safe to allow to reuse it.
1363 */
1364 fep->mii_phy_task_queued = 0;
1365 fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0;
1366 mii_display_status(dev);
1367 fep->old_link = fep->link;
1368
1369 if (fep->link) {
1370 duplex = 0;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001371 if (fep->phy_status
Linus Torvalds1da177e2005-04-16 15:20:36 -07001372 & (PHY_STAT_100FDX | PHY_STAT_10FDX))
1373 duplex = 1;
1374 fec_restart(dev, duplex);
Philippe De Muyterf909b1e2007-10-23 14:37:54 +10001375 } else
Linus Torvalds1da177e2005-04-16 15:20:36 -07001376 fec_stop(dev);
1377
1378#if 0
1379 enable_irq(fep->mii_irq);
1380#endif
1381
1382}
1383
1384/* mii_queue_relink is called in interrupt context from mii_link_interrupt */
1385static void mii_queue_relink(uint mii_reg, struct net_device *dev)
1386{
1387 struct fec_enet_private *fep = netdev_priv(dev);
1388
1389 /*
1390 ** We cannot queue phy_task twice in the workqueue. It
1391 ** would cause an endless loop in the workqueue.
1392 ** Fortunately, if the last mii_relink entry has not yet been
1393 ** executed now, it will do the job for the current interrupt,
1394 ** which is just what we want.
1395 */
1396 if (fep->mii_phy_task_queued)
1397 return;
1398
1399 fep->mii_phy_task_queued = 1;
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001400 INIT_WORK(&fep->phy_task, mii_relink);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001401 schedule_work(&fep->phy_task);
1402}
1403
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001404/* mii_queue_config is called in interrupt context from fec_enet_mii */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001405static void mii_queue_config(uint mii_reg, struct net_device *dev)
1406{
1407 struct fec_enet_private *fep = netdev_priv(dev);
1408
1409 if (fep->mii_phy_task_queued)
1410 return;
1411
1412 fep->mii_phy_task_queued = 1;
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001413 INIT_WORK(&fep->phy_task, mii_display_config);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001414 schedule_work(&fep->phy_task);
1415}
1416
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001417phy_cmd_t const phy_cmd_relink[] = {
1418 { mk_mii_read(MII_REG_CR), mii_queue_relink },
1419 { mk_mii_end, }
1420 };
1421phy_cmd_t const phy_cmd_config[] = {
1422 { mk_mii_read(MII_REG_CR), mii_queue_config },
1423 { mk_mii_end, }
1424 };
Linus Torvalds1da177e2005-04-16 15:20:36 -07001425
1426/* Read remainder of PHY ID.
1427*/
1428static void
1429mii_discover_phy3(uint mii_reg, struct net_device *dev)
1430{
1431 struct fec_enet_private *fep;
1432 int i;
1433
1434 fep = netdev_priv(dev);
1435 fep->phy_id |= (mii_reg & 0xffff);
1436 printk("fec: PHY @ 0x%x, ID 0x%08x", fep->phy_addr, fep->phy_id);
1437
1438 for(i = 0; phy_info[i]; i++) {
1439 if(phy_info[i]->id == (fep->phy_id >> 4))
1440 break;
1441 }
1442
1443 if (phy_info[i])
1444 printk(" -- %s\n", phy_info[i]->name);
1445 else
1446 printk(" -- unknown PHY!\n");
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001447
Linus Torvalds1da177e2005-04-16 15:20:36 -07001448 fep->phy = phy_info[i];
1449 fep->phy_id_done = 1;
1450}
1451
1452/* Scan all of the MII PHY addresses looking for someone to respond
1453 * with a valid ID. This usually happens quickly.
1454 */
1455static void
1456mii_discover_phy(uint mii_reg, struct net_device *dev)
1457{
1458 struct fec_enet_private *fep;
1459 volatile fec_t *fecp;
1460 uint phytype;
1461
1462 fep = netdev_priv(dev);
1463 fecp = fep->hwp;
1464
1465 if (fep->phy_addr < 32) {
1466 if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001467
Linus Torvalds1da177e2005-04-16 15:20:36 -07001468 /* Got first part of ID, now get remainder.
1469 */
1470 fep->phy_id = phytype << 16;
1471 mii_queue(dev, mk_mii_read(MII_REG_PHYIR2),
1472 mii_discover_phy3);
Philippe De Muyterf909b1e2007-10-23 14:37:54 +10001473 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001474 fep->phy_addr++;
1475 mii_queue(dev, mk_mii_read(MII_REG_PHYIR1),
1476 mii_discover_phy);
1477 }
1478 } else {
1479 printk("FEC: No PHY device found.\n");
1480 /* Disable external MII interface */
1481 fecp->fec_mii_speed = fep->phy_speed = 0;
Greg Ungerer43be6362009-02-26 22:42:51 -08001482#ifdef HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001483 fec_disable_phy_intr();
Sascha Haueread73182009-01-28 23:03:11 +00001484#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001485 }
1486}
1487
1488/* This interrupt occurs when the PHY detects a link change.
1489*/
Sebastian Siewiorc1d96152008-05-01 14:04:02 +10001490#ifdef HAVE_mii_link_interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001491static irqreturn_t
David Howells7d12e782006-10-05 14:55:46 +01001492mii_link_interrupt(int irq, void * dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001493{
1494 struct net_device *dev = dev_id;
1495 struct fec_enet_private *fep = netdev_priv(dev);
1496
1497 fec_phy_ack_intr();
1498
1499#if 0
1500 disable_irq(fep->mii_irq); /* disable now, enable later */
1501#endif
1502
1503 mii_do_cmd(dev, fep->phy->ack_int);
1504 mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */
1505
1506 return IRQ_HANDLED;
1507}
Sebastian Siewiorc1d96152008-05-01 14:04:02 +10001508#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001509
1510static int
1511fec_enet_open(struct net_device *dev)
1512{
1513 struct fec_enet_private *fep = netdev_priv(dev);
1514
1515 /* I should reset the ring buffers here, but I don't yet know
1516 * a simple way to do that.
1517 */
1518 fec_set_mac_address(dev);
1519
1520 fep->sequence_done = 0;
1521 fep->link = 0;
1522
1523 if (fep->phy) {
1524 mii_do_cmd(dev, fep->phy->ack_int);
1525 mii_do_cmd(dev, fep->phy->config);
1526 mii_do_cmd(dev, phy_cmd_config); /* display configuration */
1527
Matt Waddel6b265292006-06-27 13:10:56 +10001528 /* Poll until the PHY tells us its configuration
1529 * (not link state).
1530 * Request is initiated by mii_do_cmd above, but answer
1531 * comes by interrupt.
1532 * This should take about 25 usec per register at 2.5 MHz,
1533 * and we read approximately 5 registers.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001534 */
1535 while(!fep->sequence_done)
1536 schedule();
1537
1538 mii_do_cmd(dev, fep->phy->startup);
1539
1540 /* Set the initial link state to true. A lot of hardware
1541 * based on this device does not implement a PHY interrupt,
1542 * so we are never notified of link change.
1543 */
1544 fep->link = 1;
1545 } else {
1546 fep->link = 1; /* lets just try it and see */
1547 /* no phy, go full duplex, it's most likely a hub chip */
1548 fec_restart(dev, 1);
1549 }
1550
1551 netif_start_queue(dev);
1552 fep->opened = 1;
1553 return 0; /* Success */
1554}
1555
1556static int
1557fec_enet_close(struct net_device *dev)
1558{
1559 struct fec_enet_private *fep = netdev_priv(dev);
1560
1561 /* Don't know what to do yet.
1562 */
1563 fep->opened = 0;
1564 netif_stop_queue(dev);
1565 fec_stop(dev);
1566
1567 return 0;
1568}
1569
Linus Torvalds1da177e2005-04-16 15:20:36 -07001570/* Set or clear the multicast filter for this adaptor.
1571 * Skeleton taken from sunlance driver.
1572 * The CPM Ethernet implementation allows Multicast as well as individual
1573 * MAC address filtering. Some of the drivers check to make sure it is
1574 * a group multicast address, and discard those that are not. I guess I
1575 * will do the same for now, but just remove the test if you want
1576 * individual filtering as well (do the upper net layers want or support
1577 * this kind of feature?).
1578 */
1579
1580#define HASH_BITS 6 /* #bits in hash */
1581#define CRC32_POLY 0xEDB88320
1582
1583static void set_multicast_list(struct net_device *dev)
1584{
1585 struct fec_enet_private *fep;
1586 volatile fec_t *ep;
1587 struct dev_mc_list *dmi;
1588 unsigned int i, j, bit, data, crc;
1589 unsigned char hash;
1590
1591 fep = netdev_priv(dev);
1592 ep = fep->hwp;
1593
1594 if (dev->flags&IFF_PROMISC) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001595 ep->fec_r_cntrl |= 0x0008;
1596 } else {
1597
1598 ep->fec_r_cntrl &= ~0x0008;
1599
1600 if (dev->flags & IFF_ALLMULTI) {
1601 /* Catch all multicast addresses, so set the
1602 * filter to all 1's.
1603 */
Greg Ungerercc462f72008-05-01 13:35:34 +10001604 ep->fec_grp_hash_table_high = 0xffffffff;
1605 ep->fec_grp_hash_table_low = 0xffffffff;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001606 } else {
1607 /* Clear filter and add the addresses in hash register.
1608 */
Greg Ungerercc462f72008-05-01 13:35:34 +10001609 ep->fec_grp_hash_table_high = 0;
1610 ep->fec_grp_hash_table_low = 0;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001611
Linus Torvalds1da177e2005-04-16 15:20:36 -07001612 dmi = dev->mc_list;
1613
1614 for (j = 0; j < dev->mc_count; j++, dmi = dmi->next)
1615 {
1616 /* Only support group multicast for now.
1617 */
1618 if (!(dmi->dmi_addr[0] & 1))
1619 continue;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001620
Linus Torvalds1da177e2005-04-16 15:20:36 -07001621 /* calculate crc32 value of mac address
1622 */
1623 crc = 0xffffffff;
1624
1625 for (i = 0; i < dmi->dmi_addrlen; i++)
1626 {
1627 data = dmi->dmi_addr[i];
1628 for (bit = 0; bit < 8; bit++, data >>= 1)
1629 {
1630 crc = (crc >> 1) ^
1631 (((crc ^ data) & 1) ? CRC32_POLY : 0);
1632 }
1633 }
1634
1635 /* only upper 6 bits (HASH_BITS) are used
1636 which point to specific bit in he hash registers
1637 */
1638 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001639
Linus Torvalds1da177e2005-04-16 15:20:36 -07001640 if (hash > 31)
Greg Ungerercc462f72008-05-01 13:35:34 +10001641 ep->fec_grp_hash_table_high |= 1 << (hash - 32);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001642 else
Greg Ungerercc462f72008-05-01 13:35:34 +10001643 ep->fec_grp_hash_table_low |= 1 << hash;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001644 }
1645 }
1646 }
1647}
1648
1649/* Set a MAC change in hardware.
1650 */
1651static void
1652fec_set_mac_address(struct net_device *dev)
1653{
Linus Torvalds1da177e2005-04-16 15:20:36 -07001654 volatile fec_t *fecp;
1655
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001656 fecp = ((struct fec_enet_private *)netdev_priv(dev))->hwp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001657
1658 /* Set station address. */
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001659 fecp->fec_addr_low = dev->dev_addr[3] | (dev->dev_addr[2] << 8) |
1660 (dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24);
1661 fecp->fec_addr_high = (dev->dev_addr[5] << 16) |
1662 (dev->dev_addr[4] << 24);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001663
1664}
1665
Linus Torvalds1da177e2005-04-16 15:20:36 -07001666 /*
1667 * XXX: We need to clean up on failure exits here.
Sascha Haueread73182009-01-28 23:03:11 +00001668 *
1669 * index is only used in legacy code
Linus Torvalds1da177e2005-04-16 15:20:36 -07001670 */
Sascha Haueread73182009-01-28 23:03:11 +00001671int __init fec_enet_init(struct net_device *dev, int index)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001672{
1673 struct fec_enet_private *fep = netdev_priv(dev);
1674 unsigned long mem_addr;
1675 volatile cbd_t *bdp;
1676 cbd_t *cbd_base;
1677 volatile fec_t *fecp;
1678 int i, j;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001679
Greg Ungerer562d2f82005-11-07 14:09:50 +10001680 /* Allocate memory for buffer descriptors.
1681 */
Sascha Hauer4661e752009-01-28 23:03:07 +00001682 mem_addr = (unsigned long)dma_alloc_coherent(NULL, PAGE_SIZE,
1683 &fep->bd_dma, GFP_KERNEL);
Greg Ungerer562d2f82005-11-07 14:09:50 +10001684 if (mem_addr == 0) {
1685 printk("FEC: allocate descriptor memory failed?\n");
1686 return -ENOMEM;
1687 }
1688
Sebastian Siewior3b2b74c2008-05-01 14:08:12 +10001689 spin_lock_init(&fep->hw_lock);
1690 spin_lock_init(&fep->mii_lock);
1691
Linus Torvalds1da177e2005-04-16 15:20:36 -07001692 /* Create an Ethernet device instance.
1693 */
Sascha Haueread73182009-01-28 23:03:11 +00001694 fecp = (volatile fec_t *)dev->base_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001695
1696 fep->index = index;
1697 fep->hwp = fecp;
Greg Ungerercb84d6e2007-07-30 16:29:09 +10001698 fep->netdev = dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001699
1700 /* Whack a reset. We should wait for this.
1701 */
1702 fecp->fec_ecntrl = 1;
1703 udelay(10);
1704
Sascha Haueread73182009-01-28 23:03:11 +00001705 /* Set the Ethernet address */
Greg Ungerer43be6362009-02-26 22:42:51 -08001706#ifdef CONFIG_M5272
Linus Torvalds1da177e2005-04-16 15:20:36 -07001707 fec_get_mac(dev);
Sascha Haueread73182009-01-28 23:03:11 +00001708#else
1709 {
1710 unsigned long l;
1711 l = fecp->fec_addr_low;
1712 dev->dev_addr[0] = (unsigned char)((l & 0xFF000000) >> 24);
1713 dev->dev_addr[1] = (unsigned char)((l & 0x00FF0000) >> 16);
1714 dev->dev_addr[2] = (unsigned char)((l & 0x0000FF00) >> 8);
1715 dev->dev_addr[3] = (unsigned char)((l & 0x000000FF) >> 0);
1716 l = fecp->fec_addr_high;
1717 dev->dev_addr[4] = (unsigned char)((l & 0xFF000000) >> 24);
1718 dev->dev_addr[5] = (unsigned char)((l & 0x00FF0000) >> 16);
1719 }
1720#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001721
Linus Torvalds1da177e2005-04-16 15:20:36 -07001722 cbd_base = (cbd_t *)mem_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001723
Linus Torvalds1da177e2005-04-16 15:20:36 -07001724 /* Set receive and transmit descriptor base.
1725 */
1726 fep->rx_bd_base = cbd_base;
1727 fep->tx_bd_base = cbd_base + RX_RING_SIZE;
1728
1729 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
1730 fep->cur_rx = fep->rx_bd_base;
1731
1732 fep->skb_cur = fep->skb_dirty = 0;
1733
1734 /* Initialize the receive buffer descriptors.
1735 */
1736 bdp = fep->rx_bd_base;
1737 for (i=0; i<FEC_ENET_RX_PAGES; i++) {
1738
1739 /* Allocate a page.
1740 */
1741 mem_addr = __get_free_page(GFP_KERNEL);
1742 /* XXX: missing check for allocation failure */
1743
Linus Torvalds1da177e2005-04-16 15:20:36 -07001744 /* Initialize the BD for every fragment in the page.
1745 */
1746 for (j=0; j<FEC_ENET_RX_FRPPG; j++) {
1747 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1748 bdp->cbd_bufaddr = __pa(mem_addr);
1749 mem_addr += FEC_ENET_RX_FRSIZE;
1750 bdp++;
1751 }
1752 }
1753
1754 /* Set the last buffer to wrap.
1755 */
1756 bdp--;
1757 bdp->cbd_sc |= BD_SC_WRAP;
1758
1759 /* ...and the same for transmmit.
1760 */
1761 bdp = fep->tx_bd_base;
1762 for (i=0, j=FEC_ENET_TX_FRPPG; i<TX_RING_SIZE; i++) {
1763 if (j >= FEC_ENET_TX_FRPPG) {
1764 mem_addr = __get_free_page(GFP_KERNEL);
1765 j = 1;
1766 } else {
1767 mem_addr += FEC_ENET_TX_FRSIZE;
1768 j++;
1769 }
1770 fep->tx_bounce[i] = (unsigned char *) mem_addr;
1771
1772 /* Initialize the BD for every fragment in the page.
1773 */
1774 bdp->cbd_sc = 0;
1775 bdp->cbd_bufaddr = 0;
1776 bdp++;
1777 }
1778
1779 /* Set the last buffer to wrap.
1780 */
1781 bdp--;
1782 bdp->cbd_sc |= BD_SC_WRAP;
1783
1784 /* Set receive and transmit descriptor base.
1785 */
Sascha Hauer4661e752009-01-28 23:03:07 +00001786 fecp->fec_r_des_start = fep->bd_dma;
1787 fecp->fec_x_des_start = (unsigned long)fep->bd_dma + sizeof(cbd_t)
1788 * RX_RING_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001789
Greg Ungerer43be6362009-02-26 22:42:51 -08001790#ifdef HAVE_mii_link_interrupt
1791 fec_request_mii_intr(dev);
Sascha Haueread73182009-01-28 23:03:11 +00001792#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -07001793
Greg Ungerercc462f72008-05-01 13:35:34 +10001794 fecp->fec_grp_hash_table_high = 0;
1795 fecp->fec_grp_hash_table_low = 0;
Greg Ungerer562d2f82005-11-07 14:09:50 +10001796 fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
1797 fecp->fec_ecntrl = 2;
Matt Waddel6b265292006-06-27 13:10:56 +10001798 fecp->fec_r_des_active = 0;
Greg Ungerercc462f72008-05-01 13:35:34 +10001799#ifndef CONFIG_M5272
1800 fecp->fec_hash_table_high = 0;
1801 fecp->fec_hash_table_low = 0;
1802#endif
Greg Ungerer562d2f82005-11-07 14:09:50 +10001803
Linus Torvalds1da177e2005-04-16 15:20:36 -07001804 /* The FEC Ethernet specific entries in the device structure. */
1805 dev->open = fec_enet_open;
1806 dev->hard_start_xmit = fec_enet_start_xmit;
1807 dev->tx_timeout = fec_timeout;
1808 dev->watchdog_timeo = TX_TIMEOUT;
1809 dev->stop = fec_enet_close;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001810 dev->set_multicast_list = set_multicast_list;
1811
1812 for (i=0; i<NMII-1; i++)
1813 mii_cmds[i].mii_next = &mii_cmds[i+1];
1814 mii_free = mii_cmds;
1815
1816 /* setup MII interface */
Sascha Haueread73182009-01-28 23:03:11 +00001817 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;
1818 fecp->fec_x_cntrl = 0x00;
1819
1820 /*
1821 * Set MII speed to 2.5 MHz
1822 */
1823 fep->phy_speed = ((((clk_get_rate(fep->clk) / 2 + 4999999)
1824 / 2500000) / 2) & 0x3F) << 1;
1825 fecp->fec_mii_speed = fep->phy_speed;
1826 fec_restart(dev, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001827
Matt Waddel6b265292006-06-27 13:10:56 +10001828 /* Clear and enable interrupts */
1829 fecp->fec_ievent = 0xffc00000;
Greg Ungerer398ec922008-05-01 13:47:09 +10001830 fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII);
Matt Waddel6b265292006-06-27 13:10:56 +10001831
Linus Torvalds1da177e2005-04-16 15:20:36 -07001832 /* Queue up command to detect the PHY and initialize the
1833 * remainder of the interface.
1834 */
1835 fep->phy_id_done = 0;
1836 fep->phy_addr = 0;
1837 mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy);
1838
Linus Torvalds1da177e2005-04-16 15:20:36 -07001839 return 0;
1840}
1841
1842/* This function is called to start or restart the FEC during a link
1843 * change. This only happens when switching between half and full
1844 * duplex.
1845 */
1846static void
1847fec_restart(struct net_device *dev, int duplex)
1848{
1849 struct fec_enet_private *fep;
1850 volatile cbd_t *bdp;
1851 volatile fec_t *fecp;
1852 int i;
1853
1854 fep = netdev_priv(dev);
1855 fecp = fep->hwp;
1856
1857 /* Whack a reset. We should wait for this.
1858 */
1859 fecp->fec_ecntrl = 1;
1860 udelay(10);
1861
Linus Torvalds1da177e2005-04-16 15:20:36 -07001862 /* Clear any outstanding interrupt.
1863 */
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001864 fecp->fec_ievent = 0xffc00000;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001865
1866 /* Set station address.
1867 */
Greg Ungerer7dd6a2a2005-09-12 11:18:10 +10001868 fec_set_mac_address(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001869
1870 /* Reset all multicast.
1871 */
Greg Ungerercc462f72008-05-01 13:35:34 +10001872 fecp->fec_grp_hash_table_high = 0;
1873 fecp->fec_grp_hash_table_low = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001874
1875 /* Set maximum receive buffer size.
1876 */
1877 fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
1878
Linus Torvalds1da177e2005-04-16 15:20:36 -07001879 /* Set receive and transmit descriptor base.
1880 */
Sascha Hauer4661e752009-01-28 23:03:07 +00001881 fecp->fec_r_des_start = fep->bd_dma;
1882 fecp->fec_x_des_start = (unsigned long)fep->bd_dma + sizeof(cbd_t)
1883 * RX_RING_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001884
1885 fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
1886 fep->cur_rx = fep->rx_bd_base;
1887
1888 /* Reset SKB transmit buffers.
1889 */
1890 fep->skb_cur = fep->skb_dirty = 0;
1891 for (i=0; i<=TX_RING_MOD_MASK; i++) {
1892 if (fep->tx_skbuff[i] != NULL) {
1893 dev_kfree_skb_any(fep->tx_skbuff[i]);
1894 fep->tx_skbuff[i] = NULL;
1895 }
1896 }
1897
1898 /* Initialize the receive buffer descriptors.
1899 */
1900 bdp = fep->rx_bd_base;
1901 for (i=0; i<RX_RING_SIZE; i++) {
1902
1903 /* Initialize the BD for every fragment in the page.
1904 */
1905 bdp->cbd_sc = BD_ENET_RX_EMPTY;
1906 bdp++;
1907 }
1908
1909 /* Set the last buffer to wrap.
1910 */
1911 bdp--;
1912 bdp->cbd_sc |= BD_SC_WRAP;
1913
1914 /* ...and the same for transmmit.
1915 */
1916 bdp = fep->tx_bd_base;
1917 for (i=0; i<TX_RING_SIZE; i++) {
1918
1919 /* Initialize the BD for every fragment in the page.
1920 */
1921 bdp->cbd_sc = 0;
1922 bdp->cbd_bufaddr = 0;
1923 bdp++;
1924 }
1925
1926 /* Set the last buffer to wrap.
1927 */
1928 bdp--;
1929 bdp->cbd_sc |= BD_SC_WRAP;
1930
1931 /* Enable MII mode.
1932 */
1933 if (duplex) {
1934 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;/* MII enable */
1935 fecp->fec_x_cntrl = 0x04; /* FD enable */
Philippe De Muyterf909b1e2007-10-23 14:37:54 +10001936 } else {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001937 /* MII enable|No Rcv on Xmit */
1938 fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x06;
1939 fecp->fec_x_cntrl = 0x00;
1940 }
1941 fep->full_duplex = duplex;
1942
1943 /* Set MII speed.
1944 */
1945 fecp->fec_mii_speed = fep->phy_speed;
1946
1947 /* And last, enable the transmit and receive processing.
1948 */
1949 fecp->fec_ecntrl = 2;
Matt Waddel6b265292006-06-27 13:10:56 +10001950 fecp->fec_r_des_active = 0;
1951
1952 /* Enable interrupts we wish to service.
1953 */
Greg Ungerer398ec922008-05-01 13:47:09 +10001954 fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_RXF | FEC_ENET_MII);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001955}
1956
1957static void
1958fec_stop(struct net_device *dev)
1959{
1960 volatile fec_t *fecp;
1961 struct fec_enet_private *fep;
1962
1963 fep = netdev_priv(dev);
1964 fecp = fep->hwp;
1965
Philippe De Muyter677177c2006-06-27 13:05:33 +10001966 /*
1967 ** We cannot expect a graceful transmit stop without link !!!
1968 */
1969 if (fep->link)
1970 {
1971 fecp->fec_x_cntrl = 0x01; /* Graceful transmit stop */
1972 udelay(10);
1973 if (!(fecp->fec_ievent & FEC_ENET_GRA))
1974 printk("fec_stop : Graceful transmit stop did not complete !\n");
1975 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001976
1977 /* Whack a reset. We should wait for this.
1978 */
1979 fecp->fec_ecntrl = 1;
1980 udelay(10);
1981
1982 /* Clear outstanding MII command interrupts.
1983 */
1984 fecp->fec_ievent = FEC_ENET_MII;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001985
1986 fecp->fec_imask = FEC_ENET_MII;
1987 fecp->fec_mii_speed = fep->phy_speed;
1988}
1989
Sascha Haueread73182009-01-28 23:03:11 +00001990static int __devinit
1991fec_probe(struct platform_device *pdev)
1992{
1993 struct fec_enet_private *fep;
1994 struct net_device *ndev;
1995 int i, irq, ret = 0;
1996 struct resource *r;
1997
1998 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1999 if (!r)
2000 return -ENXIO;
2001
2002 r = request_mem_region(r->start, resource_size(r), pdev->name);
2003 if (!r)
2004 return -EBUSY;
2005
2006 /* Init network device */
2007 ndev = alloc_etherdev(sizeof(struct fec_enet_private));
2008 if (!ndev)
2009 return -ENOMEM;
2010
2011 SET_NETDEV_DEV(ndev, &pdev->dev);
2012
2013 /* setup board info structure */
2014 fep = netdev_priv(ndev);
2015 memset(fep, 0, sizeof(*fep));
2016
2017 ndev->base_addr = (unsigned long)ioremap(r->start, resource_size(r));
2018
2019 if (!ndev->base_addr) {
2020 ret = -ENOMEM;
2021 goto failed_ioremap;
2022 }
2023
2024 platform_set_drvdata(pdev, ndev);
2025
2026 /* This device has up to three irqs on some platforms */
2027 for (i = 0; i < 3; i++) {
2028 irq = platform_get_irq(pdev, i);
2029 if (i && irq < 0)
2030 break;
2031 ret = request_irq(irq, fec_enet_interrupt, IRQF_DISABLED, pdev->name, ndev);
2032 if (ret) {
2033 while (i >= 0) {
2034 irq = platform_get_irq(pdev, i);
2035 free_irq(irq, ndev);
2036 i--;
2037 }
2038 goto failed_irq;
2039 }
2040 }
2041
2042 fep->clk = clk_get(&pdev->dev, "fec_clk");
2043 if (IS_ERR(fep->clk)) {
2044 ret = PTR_ERR(fep->clk);
2045 goto failed_clk;
2046 }
2047 clk_enable(fep->clk);
2048
2049 ret = fec_enet_init(ndev, 0);
2050 if (ret)
2051 goto failed_init;
2052
2053 ret = register_netdev(ndev);
2054 if (ret)
2055 goto failed_register;
2056
2057 return 0;
2058
2059failed_register:
2060failed_init:
2061 clk_disable(fep->clk);
2062 clk_put(fep->clk);
2063failed_clk:
2064 for (i = 0; i < 3; i++) {
2065 irq = platform_get_irq(pdev, i);
2066 if (irq > 0)
2067 free_irq(irq, ndev);
2068 }
2069failed_irq:
2070 iounmap((void __iomem *)ndev->base_addr);
2071failed_ioremap:
2072 free_netdev(ndev);
2073
2074 return ret;
2075}
2076
2077static int __devexit
2078fec_drv_remove(struct platform_device *pdev)
2079{
2080 struct net_device *ndev = platform_get_drvdata(pdev);
2081 struct fec_enet_private *fep = netdev_priv(ndev);
2082
2083 platform_set_drvdata(pdev, NULL);
2084
2085 fec_stop(ndev);
2086 clk_disable(fep->clk);
2087 clk_put(fep->clk);
2088 iounmap((void __iomem *)ndev->base_addr);
2089 unregister_netdev(ndev);
2090 free_netdev(ndev);
2091 return 0;
2092}
2093
2094static int
2095fec_suspend(struct platform_device *dev, pm_message_t state)
2096{
2097 struct net_device *ndev = platform_get_drvdata(dev);
2098 struct fec_enet_private *fep;
2099
2100 if (ndev) {
2101 fep = netdev_priv(ndev);
2102 if (netif_running(ndev)) {
2103 netif_device_detach(ndev);
2104 fec_stop(ndev);
2105 }
2106 }
2107 return 0;
2108}
2109
2110static int
2111fec_resume(struct platform_device *dev)
2112{
2113 struct net_device *ndev = platform_get_drvdata(dev);
2114
2115 if (ndev) {
2116 if (netif_running(ndev)) {
2117 fec_enet_init(ndev, 0);
2118 netif_device_attach(ndev);
2119 }
2120 }
2121 return 0;
2122}
2123
2124static struct platform_driver fec_driver = {
2125 .driver = {
2126 .name = "fec",
2127 .owner = THIS_MODULE,
2128 },
2129 .probe = fec_probe,
2130 .remove = __devexit_p(fec_drv_remove),
2131 .suspend = fec_suspend,
2132 .resume = fec_resume,
2133};
2134
2135static int __init
2136fec_enet_module_init(void)
2137{
2138 printk(KERN_INFO "FEC Ethernet Driver\n");
2139
2140 return platform_driver_register(&fec_driver);
2141}
2142
2143static void __exit
2144fec_enet_cleanup(void)
2145{
2146 platform_driver_unregister(&fec_driver);
2147}
2148
2149module_exit(fec_enet_cleanup);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002150module_init(fec_enet_module_init);
2151
2152MODULE_LICENSE("GPL");