| Greg Ungerer | d894b89 | 2012-02-19 16:16:58 +1000 | [diff] [blame] | 1 | /* |
| 2 | * reset.c -- common ColdFire SoC reset support |
| 3 | * |
| 4 | * (C) Copyright 2012, Greg Ungerer <gerg@uclinux.org> |
| 5 | * |
| 6 | * This file is subject to the terms and conditions of the GNU General Public |
| 7 | * License. See the file COPYING in the main directory of this archive |
| 8 | * for more details. |
| 9 | */ |
| 10 | |
| 11 | #include <linux/kernel.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/io.h> |
| 14 | #include <asm/machdep.h> |
| 15 | #include <asm/coldfire.h> |
| 16 | #include <asm/mcfsim.h> |
| 17 | |
| Greg Ungerer | ae909ea | 2012-02-19 16:47:24 +1000 | [diff] [blame^] | 18 | /* |
| 19 | * There are 2 common methods amongst the ColdFure parts for reseting |
| 20 | * the CPU. But there are couple of exceptions, the 5272 and the 547x |
| 21 | * have something completely special to them, and we let their specific |
| 22 | * subarch code handle them. |
| 23 | */ |
| 24 | |
| 25 | #ifdef MCFSIM_SYPCR |
| 26 | static void mcf_cpu_reset(void) |
| Greg Ungerer | d894b89 | 2012-02-19 16:16:58 +1000 | [diff] [blame] | 27 | { |
| 28 | local_irq_disable(); |
| 29 | /* Set watchdog to soft reset, and enabled */ |
| 30 | __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR); |
| 31 | for (;;) |
| 32 | /* wait for watchdog to timeout */; |
| 33 | } |
| Greg Ungerer | ae909ea | 2012-02-19 16:47:24 +1000 | [diff] [blame^] | 34 | #endif |
| 35 | |
| 36 | #ifdef MCF_RCR |
| 37 | static void mcf_cpu_reset(void) |
| 38 | { |
| 39 | local_irq_disable(); |
| 40 | __raw_writeb(MCF_RCR_SWRESET, MCF_RCR); |
| 41 | } |
| 42 | #endif |
| Greg Ungerer | d894b89 | 2012-02-19 16:16:58 +1000 | [diff] [blame] | 43 | |
| 44 | static int __init mcf_setup_reset(void) |
| 45 | { |
| 46 | mach_reset = mcf_cpu_reset; |
| 47 | return 0; |
| 48 | } |
| 49 | |
| 50 | arch_initcall(mcf_setup_reset); |