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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/************************************************************************
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07002 * s2io.c: A Linux PCI-X Ethernet driver for Neterion 10GbE Server NIC
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -08003 * Copyright(c) 2002-2007 Neterion Inc.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004
5 * This software may be used and distributed according to the terms of
6 * the GNU General Public License (GPL), incorporated herein by reference.
7 * Drivers based on or derived from this code fall under the GPL and must
8 * retain the authorship, copyright and license notice. This file is not
9 * a complete program and may only be used when the entire operating
10 * system is licensed under the GPL.
11 * See the file COPYING in this distribution for more information.
12 *
13 * Credits:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070014 * Jeff Garzik : For pointing out the improper error condition
15 * check in the s2io_xmit routine and also some
16 * issues in the Tx watch dog function. Also for
17 * patiently answering all those innumerable
Linus Torvalds1da177e2005-04-16 15:20:36 -070018 * questions regaring the 2.6 porting issues.
19 * Stephen Hemminger : Providing proper 2.6 porting mechanism for some
20 * macros available only in 2.6 Kernel.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070021 * Francois Romieu : For pointing out all code part that were
Linus Torvalds1da177e2005-04-16 15:20:36 -070022 * deprecated and also styling related comments.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070023 * Grant Grundler : For helping me get rid of some Architecture
Linus Torvalds1da177e2005-04-16 15:20:36 -070024 * dependent code.
25 * Christopher Hellwig : Some more 2.6 specific issues in the driver.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070026 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 * The module loadable parameters that are supported by the driver and a brief
28 * explaination of all the variables.
Ananda Raju9dc737a2006-04-21 19:05:41 -040029 *
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070030 * rx_ring_num : This can be used to program the number of receive rings used
31 * in the driver.
Ananda Raju9dc737a2006-04-21 19:05:41 -040032 * rx_ring_sz: This defines the number of receive blocks each ring can have.
33 * This is also an array of size 8.
Ananda Rajuda6971d2005-10-31 16:55:31 -050034 * rx_ring_mode: This defines the operation mode of all 8 rings. The valid
Veena Parat6d517a22007-07-23 02:20:51 -040035 * values are 1, 2.
Linus Torvalds1da177e2005-04-16 15:20:36 -070036 * tx_fifo_num: This defines the number of Tx FIFOs thats used int the driver.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070037 * tx_fifo_len: This too is an array of 8. Each element defines the number of
Linus Torvalds1da177e2005-04-16 15:20:36 -070038 * Tx descriptors that can be associated with each corresponding FIFO.
Ananda Raju9dc737a2006-04-21 19:05:41 -040039 * intr_type: This defines the type of interrupt. The values can be 0(INTA),
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -070040 * 2(MSI_X). Default value is '2(MSI_X)'
Stephen Hemminger43b7c452007-10-05 12:39:21 -070041 * lro_enable: Specifies whether to enable Large Receive Offload (LRO) or not.
Ananda Raju9dc737a2006-04-21 19:05:41 -040042 * Possible values '1' for enable '0' for disable. Default is '0'
43 * lro_max_pkts: This parameter defines maximum number of packets can be
44 * aggregated as a single large packet
Sivakumar Subramani926930b2007-02-24 01:59:39 -050045 * napi: This parameter used to enable/disable NAPI (polling Rx)
46 * Possible values '1' for enable and '0' for disable. Default is '1'
47 * ufo: This parameter used to enable/disable UDP Fragmentation Offload(UFO)
48 * Possible values '1' for enable and '0' for disable. Default is '0'
49 * vlan_tag_strip: This can be used to enable or disable vlan stripping.
50 * Possible values '1' for enable , '0' for disable.
51 * Default is '2' - which means disable in promisc mode
52 * and enable in non-promiscuous mode.
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -050053 * multiq: This parameter used to enable/disable MULTIQUEUE support.
54 * Possible values '1' for enable and '0' for disable. Default is '0'
Linus Torvalds1da177e2005-04-16 15:20:36 -070055 ************************************************************************/
56
Linus Torvalds1da177e2005-04-16 15:20:36 -070057#include <linux/module.h>
58#include <linux/types.h>
59#include <linux/errno.h>
60#include <linux/ioport.h>
61#include <linux/pci.h>
Domen Puncer1e7f0bd2005-06-26 18:22:14 -040062#include <linux/dma-mapping.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070063#include <linux/kernel.h>
64#include <linux/netdevice.h>
65#include <linux/etherdevice.h>
66#include <linux/skbuff.h>
67#include <linux/init.h>
68#include <linux/delay.h>
69#include <linux/stddef.h>
70#include <linux/ioctl.h>
71#include <linux/timex.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070072#include <linux/ethtool.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070073#include <linux/workqueue.h>
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -070074#include <linux/if_vlan.h>
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -050075#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <net/tcp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070078
Linus Torvalds1da177e2005-04-16 15:20:36 -070079#include <asm/system.h>
80#include <asm/uaccess.h>
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070081#include <asm/io.h>
Andrew Mortonfe931392006-02-03 01:45:12 -080082#include <asm/div64.h>
Andrew Morton330ce0d2006-08-14 23:00:14 -070083#include <asm/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070084
85/* local include */
86#include "s2io.h"
87#include "s2io-regs.h"
88
Sreenivasa Honnur29d0a2b2008-07-09 23:50:13 -040089#define DRV_VERSION "2.0.26.25"
John Linville6c1792f2005-10-04 07:51:45 -040090
Linus Torvalds1da177e2005-04-16 15:20:36 -070091/* S2io Driver name & version. */
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -070092static char s2io_driver_name[] = "Neterion";
John Linville6c1792f2005-10-04 07:51:45 -040093static char s2io_driver_version[] = DRV_VERSION;
Linus Torvalds1da177e2005-04-16 15:20:36 -070094
Veena Parat6d517a22007-07-23 02:20:51 -040095static int rxd_size[2] = {32,48};
96static int rxd_count[2] = {127,85};
Ananda Rajuda6971d2005-10-31 16:55:31 -050097
Ralf Baechle1ee6dd72007-01-31 14:09:29 -050098static inline int RXD_IS_UP2DT(struct RxD_t *rxdp)
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -070099{
100 int ret;
101
102 ret = ((!(rxdp->Control_1 & RXD_OWN_XENA)) &&
103 (GET_RXD_MARKER(rxdp->Control_2) != THE_RXD_MARK));
104
105 return ret;
106}
107
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700108/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700109 * Cards with following subsystem_id have a link state indication
110 * problem, 600B, 600C, 600D, 640B, 640C and 640D.
111 * macro below identifies these cards given the subsystem_id.
112 */
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700113#define CARDS_WITH_FAULTY_LINK_INDICATORS(dev_type, subid) \
114 (dev_type == XFRAME_I_DEVICE) ? \
115 ((((subid >= 0x600B) && (subid <= 0x600D)) || \
116 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0) : 0
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117
118#define LINK_IS_UP(val64) (!(val64 & (ADAPTER_STATUS_RMAC_REMOTE_FAULT | \
119 ADAPTER_STATUS_RMAC_LOCAL_FAULT)))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120
Sivakumar Subramani92b84432007-09-06 06:51:14 -0400121static inline int is_s2io_card_up(const struct s2io_nic * sp)
122{
123 return test_bit(__S2IO_STATE_CARD_UP, &sp->state);
124}
125
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126/* Ethtool related variables and Macros. */
127static char s2io_gstrings[][ETH_GSTRING_LEN] = {
128 "Register test\t(offline)",
129 "Eeprom test\t(offline)",
130 "Link test\t(online)",
131 "RLDRAM test\t(offline)",
132 "BIST Test\t(offline)"
133};
134
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500135static char ethtool_xena_stats_keys[][ETH_GSTRING_LEN] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136 {"tmac_frms"},
137 {"tmac_data_octets"},
138 {"tmac_drop_frms"},
139 {"tmac_mcst_frms"},
140 {"tmac_bcst_frms"},
141 {"tmac_pause_ctrl_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400142 {"tmac_ttl_octets"},
143 {"tmac_ucst_frms"},
144 {"tmac_nucst_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700145 {"tmac_any_err_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400146 {"tmac_ttl_less_fb_octets"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147 {"tmac_vld_ip_octets"},
148 {"tmac_vld_ip"},
149 {"tmac_drop_ip"},
150 {"tmac_icmp"},
151 {"tmac_rst_tcp"},
152 {"tmac_tcp"},
153 {"tmac_udp"},
154 {"rmac_vld_frms"},
155 {"rmac_data_octets"},
156 {"rmac_fcs_err_frms"},
157 {"rmac_drop_frms"},
158 {"rmac_vld_mcst_frms"},
159 {"rmac_vld_bcst_frms"},
160 {"rmac_in_rng_len_err_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400161 {"rmac_out_rng_len_err_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 {"rmac_long_frms"},
163 {"rmac_pause_ctrl_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400164 {"rmac_unsup_ctrl_frms"},
165 {"rmac_ttl_octets"},
166 {"rmac_accepted_ucst_frms"},
167 {"rmac_accepted_nucst_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 {"rmac_discarded_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400169 {"rmac_drop_events"},
170 {"rmac_ttl_less_fb_octets"},
171 {"rmac_ttl_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172 {"rmac_usized_frms"},
173 {"rmac_osized_frms"},
174 {"rmac_frag_frms"},
175 {"rmac_jabber_frms"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400176 {"rmac_ttl_64_frms"},
177 {"rmac_ttl_65_127_frms"},
178 {"rmac_ttl_128_255_frms"},
179 {"rmac_ttl_256_511_frms"},
180 {"rmac_ttl_512_1023_frms"},
181 {"rmac_ttl_1024_1518_frms"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182 {"rmac_ip"},
183 {"rmac_ip_octets"},
184 {"rmac_hdr_err_ip"},
185 {"rmac_drop_ip"},
186 {"rmac_icmp"},
187 {"rmac_tcp"},
188 {"rmac_udp"},
189 {"rmac_err_drp_udp"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400190 {"rmac_xgmii_err_sym"},
191 {"rmac_frms_q0"},
192 {"rmac_frms_q1"},
193 {"rmac_frms_q2"},
194 {"rmac_frms_q3"},
195 {"rmac_frms_q4"},
196 {"rmac_frms_q5"},
197 {"rmac_frms_q6"},
198 {"rmac_frms_q7"},
199 {"rmac_full_q0"},
200 {"rmac_full_q1"},
201 {"rmac_full_q2"},
202 {"rmac_full_q3"},
203 {"rmac_full_q4"},
204 {"rmac_full_q5"},
205 {"rmac_full_q6"},
206 {"rmac_full_q7"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 {"rmac_pause_cnt"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400208 {"rmac_xgmii_data_err_cnt"},
209 {"rmac_xgmii_ctrl_err_cnt"},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 {"rmac_accepted_ip"},
211 {"rmac_err_tcp"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400212 {"rd_req_cnt"},
213 {"new_rd_req_cnt"},
214 {"new_rd_req_rtry_cnt"},
215 {"rd_rtry_cnt"},
216 {"wr_rtry_rd_ack_cnt"},
217 {"wr_req_cnt"},
218 {"new_wr_req_cnt"},
219 {"new_wr_req_rtry_cnt"},
220 {"wr_rtry_cnt"},
221 {"wr_disc_cnt"},
222 {"rd_rtry_wr_ack_cnt"},
223 {"txp_wr_cnt"},
224 {"txd_rd_cnt"},
225 {"txd_wr_cnt"},
226 {"rxd_rd_cnt"},
227 {"rxd_wr_cnt"},
228 {"txf_rd_cnt"},
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500229 {"rxf_wr_cnt"}
230};
231
232static char ethtool_enhanced_stats_keys[][ETH_GSTRING_LEN] = {
Ananda Rajubd1034f2006-04-21 19:20:22 -0400233 {"rmac_ttl_1519_4095_frms"},
234 {"rmac_ttl_4096_8191_frms"},
235 {"rmac_ttl_8192_max_frms"},
236 {"rmac_ttl_gt_max_frms"},
237 {"rmac_osized_alt_frms"},
238 {"rmac_jabber_alt_frms"},
239 {"rmac_gt_max_alt_frms"},
240 {"rmac_vlan_frms"},
241 {"rmac_len_discard"},
242 {"rmac_fcs_discard"},
243 {"rmac_pf_discard"},
244 {"rmac_da_discard"},
245 {"rmac_red_discard"},
246 {"rmac_rts_discard"},
247 {"rmac_ingm_full_discard"},
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500248 {"link_fault_cnt"}
249};
250
251static char ethtool_driver_stats_keys[][ETH_GSTRING_LEN] = {
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -0700252 {"\n DRIVER STATISTICS"},
253 {"single_bit_ecc_errs"},
254 {"double_bit_ecc_errs"},
Ananda Rajubd1034f2006-04-21 19:20:22 -0400255 {"parity_err_cnt"},
256 {"serious_err_cnt"},
257 {"soft_reset_cnt"},
258 {"fifo_full_cnt"},
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -0700259 {"ring_0_full_cnt"},
260 {"ring_1_full_cnt"},
261 {"ring_2_full_cnt"},
262 {"ring_3_full_cnt"},
263 {"ring_4_full_cnt"},
264 {"ring_5_full_cnt"},
265 {"ring_6_full_cnt"},
266 {"ring_7_full_cnt"},
Stephen Hemminger43b7c452007-10-05 12:39:21 -0700267 {"alarm_transceiver_temp_high"},
268 {"alarm_transceiver_temp_low"},
269 {"alarm_laser_bias_current_high"},
270 {"alarm_laser_bias_current_low"},
271 {"alarm_laser_output_power_high"},
272 {"alarm_laser_output_power_low"},
273 {"warn_transceiver_temp_high"},
274 {"warn_transceiver_temp_low"},
275 {"warn_laser_bias_current_high"},
276 {"warn_laser_bias_current_low"},
277 {"warn_laser_output_power_high"},
278 {"warn_laser_output_power_low"},
279 {"lro_aggregated_pkts"},
280 {"lro_flush_both_count"},
281 {"lro_out_of_sequence_pkts"},
282 {"lro_flush_due_to_max_pkts"},
283 {"lro_avg_aggr_pkts"},
284 {"mem_alloc_fail_cnt"},
285 {"pci_map_fail_cnt"},
286 {"watchdog_timer_cnt"},
287 {"mem_allocated"},
288 {"mem_freed"},
289 {"link_up_cnt"},
290 {"link_down_cnt"},
291 {"link_up_time"},
292 {"link_down_time"},
293 {"tx_tcode_buf_abort_cnt"},
294 {"tx_tcode_desc_abort_cnt"},
295 {"tx_tcode_parity_err_cnt"},
296 {"tx_tcode_link_loss_cnt"},
297 {"tx_tcode_list_proc_err_cnt"},
298 {"rx_tcode_parity_err_cnt"},
299 {"rx_tcode_abort_cnt"},
300 {"rx_tcode_parity_abort_cnt"},
301 {"rx_tcode_rda_fail_cnt"},
302 {"rx_tcode_unkn_prot_cnt"},
303 {"rx_tcode_fcs_err_cnt"},
304 {"rx_tcode_buf_size_err_cnt"},
305 {"rx_tcode_rxd_corrupt_cnt"},
306 {"rx_tcode_unkn_err_cnt"},
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -0700307 {"tda_err_cnt"},
308 {"pfc_err_cnt"},
309 {"pcc_err_cnt"},
310 {"tti_err_cnt"},
311 {"tpa_err_cnt"},
312 {"sm_err_cnt"},
313 {"lso_err_cnt"},
314 {"mac_tmac_err_cnt"},
315 {"mac_rmac_err_cnt"},
316 {"xgxs_txgxs_err_cnt"},
317 {"xgxs_rxgxs_err_cnt"},
318 {"rc_err_cnt"},
319 {"prc_pcix_err_cnt"},
320 {"rpa_err_cnt"},
321 {"rda_err_cnt"},
322 {"rti_err_cnt"},
323 {"mc_err_cnt"}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324};
325
Alejandro Martinez Ruiz4c3616c2007-10-18 10:00:15 +0200326#define S2IO_XENA_STAT_LEN ARRAY_SIZE(ethtool_xena_stats_keys)
327#define S2IO_ENHANCED_STAT_LEN ARRAY_SIZE(ethtool_enhanced_stats_keys)
328#define S2IO_DRIVER_STAT_LEN ARRAY_SIZE(ethtool_driver_stats_keys)
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -0500329
330#define XFRAME_I_STAT_LEN (S2IO_XENA_STAT_LEN + S2IO_DRIVER_STAT_LEN )
331#define XFRAME_II_STAT_LEN (XFRAME_I_STAT_LEN + S2IO_ENHANCED_STAT_LEN )
332
333#define XFRAME_I_STAT_STRINGS_LEN ( XFRAME_I_STAT_LEN * ETH_GSTRING_LEN )
334#define XFRAME_II_STAT_STRINGS_LEN ( XFRAME_II_STAT_LEN * ETH_GSTRING_LEN )
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335
Alejandro Martinez Ruiz4c3616c2007-10-18 10:00:15 +0200336#define S2IO_TEST_LEN ARRAY_SIZE(s2io_gstrings)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337#define S2IO_STRINGS_LEN S2IO_TEST_LEN * ETH_GSTRING_LEN
338
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -0700339#define S2IO_TIMER_CONF(timer, handle, arg, exp) \
340 init_timer(&timer); \
341 timer.function = handle; \
342 timer.data = (unsigned long) arg; \
343 mod_timer(&timer, (jiffies + exp)) \
344
Sivakumar Subramani2fd37682007-09-14 07:39:19 -0400345/* copy mac addr to def_mac_addr array */
346static void do_s2io_copy_mac_addr(struct s2io_nic *sp, int offset, u64 mac_addr)
347{
348 sp->def_mac_addr[offset].mac_addr[5] = (u8) (mac_addr);
349 sp->def_mac_addr[offset].mac_addr[4] = (u8) (mac_addr >> 8);
350 sp->def_mac_addr[offset].mac_addr[3] = (u8) (mac_addr >> 16);
351 sp->def_mac_addr[offset].mac_addr[2] = (u8) (mac_addr >> 24);
352 sp->def_mac_addr[offset].mac_addr[1] = (u8) (mac_addr >> 32);
353 sp->def_mac_addr[offset].mac_addr[0] = (u8) (mac_addr >> 40);
354}
Stephen Hemminger04025092008-11-21 17:28:55 -0800355
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700356/* Add the vlan */
357static void s2io_vlan_rx_register(struct net_device *dev,
Stephen Hemminger04025092008-11-21 17:28:55 -0800358 struct vlan_group *grp)
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700359{
Surjit Reang2fda0962008-01-24 02:08:59 -0800360 int i;
Wang Chen4cf16532008-11-12 23:38:14 -0800361 struct s2io_nic *nic = netdev_priv(dev);
Surjit Reang2fda0962008-01-24 02:08:59 -0800362 unsigned long flags[MAX_TX_FIFOS];
363 struct mac_info *mac_control = &nic->mac_control;
364 struct config_param *config = &nic->config;
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700365
Surjit Reang2fda0962008-01-24 02:08:59 -0800366 for (i = 0; i < config->tx_fifo_num; i++)
367 spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags[i]);
368
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700369 nic->vlgrp = grp;
Surjit Reang2fda0962008-01-24 02:08:59 -0800370 for (i = config->tx_fifo_num - 1; i >= 0; i--)
371 spin_unlock_irqrestore(&mac_control->fifos[i].tx_lock,
372 flags[i]);
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -0700373}
374
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500375/* Unregister the vlan */
Stephen Hemminger04025092008-11-21 17:28:55 -0800376static void s2io_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500377{
378 int i;
Wang Chen4cf16532008-11-12 23:38:14 -0800379 struct s2io_nic *nic = netdev_priv(dev);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -0500380 unsigned long flags[MAX_TX_FIFOS];
381 struct mac_info *mac_control = &nic->mac_control;
382 struct config_param *config = &nic->config;
383
384 for (i = 0; i < config->tx_fifo_num; i++)
385 spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags[i]);
386
387 if (nic->vlgrp)
388 vlan_group_set_device(nic->vlgrp, vid, NULL);
389
390 for (i = config->tx_fifo_num - 1; i >= 0; i--)
391 spin_unlock_irqrestore(&mac_control->fifos[i].tx_lock,
392 flags[i]);
393}
394
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700395/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700396 * Constants to be programmed into the Xena's registers, to configure
397 * the XAUI.
398 */
399
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400#define END_SIGN 0x0
Arjan van de Venf71e1302006-03-03 21:33:57 -0500401static const u64 herc_act_dtx_cfg[] = {
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700402 /* Set address */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -0700403 0x8000051536750000ULL, 0x80000515367500E0ULL,
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700404 /* Write data */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -0700405 0x8000051536750004ULL, 0x80000515367500E4ULL,
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700406 /* Set address */
407 0x80010515003F0000ULL, 0x80010515003F00E0ULL,
408 /* Write data */
409 0x80010515003F0004ULL, 0x80010515003F00E4ULL,
410 /* Set address */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -0700411 0x801205150D440000ULL, 0x801205150D4400E0ULL,
412 /* Write data */
413 0x801205150D440004ULL, 0x801205150D4400E4ULL,
414 /* Set address */
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -0700415 0x80020515F2100000ULL, 0x80020515F21000E0ULL,
416 /* Write data */
417 0x80020515F2100004ULL, 0x80020515F21000E4ULL,
418 /* Done */
419 END_SIGN
420};
421
Arjan van de Venf71e1302006-03-03 21:33:57 -0500422static const u64 xena_dtx_cfg[] = {
Ananda Rajuc92ca042006-04-21 19:18:03 -0400423 /* Set address */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424 0x8000051500000000ULL, 0x80000515000000E0ULL,
Ananda Rajuc92ca042006-04-21 19:18:03 -0400425 /* Write data */
426 0x80000515D9350004ULL, 0x80000515D93500E4ULL,
427 /* Set address */
428 0x8001051500000000ULL, 0x80010515000000E0ULL,
429 /* Write data */
430 0x80010515001E0004ULL, 0x80010515001E00E4ULL,
431 /* Set address */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700432 0x8002051500000000ULL, 0x80020515000000E0ULL,
Ananda Rajuc92ca042006-04-21 19:18:03 -0400433 /* Write data */
434 0x80020515F2100004ULL, 0x80020515F21000E4ULL,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435 END_SIGN
436};
437
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700438/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700439 * Constants for Fixing the MacAddress problem seen mostly on
440 * Alpha machines.
441 */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500442static const u64 fix_mac[] = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443 0x0060000000000000ULL, 0x0060600000000000ULL,
444 0x0040600000000000ULL, 0x0000600000000000ULL,
445 0x0020600000000000ULL, 0x0060600000000000ULL,
446 0x0020600000000000ULL, 0x0060600000000000ULL,
447 0x0020600000000000ULL, 0x0060600000000000ULL,
448 0x0020600000000000ULL, 0x0060600000000000ULL,
449 0x0020600000000000ULL, 0x0060600000000000ULL,
450 0x0020600000000000ULL, 0x0060600000000000ULL,
451 0x0020600000000000ULL, 0x0060600000000000ULL,
452 0x0020600000000000ULL, 0x0060600000000000ULL,
453 0x0020600000000000ULL, 0x0060600000000000ULL,
454 0x0020600000000000ULL, 0x0060600000000000ULL,
455 0x0020600000000000ULL, 0x0000600000000000ULL,
456 0x0040600000000000ULL, 0x0060600000000000ULL,
457 END_SIGN
458};
459
Ananda Rajub41477f2006-07-24 19:52:49 -0400460MODULE_LICENSE("GPL");
461MODULE_VERSION(DRV_VERSION);
462
463
Linus Torvalds1da177e2005-04-16 15:20:36 -0700464/* Module Loadable parameters. */
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -0500465S2IO_PARM_INT(tx_fifo_num, FIFO_DEFAULT_NUM);
Ananda Rajub41477f2006-07-24 19:52:49 -0400466S2IO_PARM_INT(rx_ring_num, 1);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500467S2IO_PARM_INT(multiq, 0);
Ananda Rajub41477f2006-07-24 19:52:49 -0400468S2IO_PARM_INT(rx_ring_mode, 1);
469S2IO_PARM_INT(use_continuous_tx_intrs, 1);
470S2IO_PARM_INT(rmac_pause_time, 0x100);
471S2IO_PARM_INT(mc_pause_threshold_q0q3, 187);
472S2IO_PARM_INT(mc_pause_threshold_q4q7, 187);
473S2IO_PARM_INT(shared_splits, 0);
474S2IO_PARM_INT(tmac_util_period, 5);
475S2IO_PARM_INT(rmac_util_period, 5);
Ananda Rajub41477f2006-07-24 19:52:49 -0400476S2IO_PARM_INT(l3l4hdr_size, 128);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -0500477/* 0 is no steering, 1 is Priority steering, 2 is Default steering */
478S2IO_PARM_INT(tx_steering_type, TX_DEFAULT_STEERING);
Ananda Rajub41477f2006-07-24 19:52:49 -0400479/* Frequency of Rx desc syncs expressed as power of 2 */
480S2IO_PARM_INT(rxsync_frequency, 3);
Veena Parateccb8622007-07-23 02:23:54 -0400481/* Interrupt type. Values can be 0(INTA), 2(MSI_X) */
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -0700482S2IO_PARM_INT(intr_type, 2);
Ananda Rajub41477f2006-07-24 19:52:49 -0400483/* Large receive offload feature */
Stephen Hemminger43b7c452007-10-05 12:39:21 -0700484static unsigned int lro_enable;
485module_param_named(lro, lro_enable, uint, 0);
486
Ananda Rajub41477f2006-07-24 19:52:49 -0400487/* Max pkts to be aggregated by LRO at one time. If not specified,
488 * aggregation happens until we hit max IP pkt size(64K)
489 */
490S2IO_PARM_INT(lro_max_pkts, 0xFFFF);
Ananda Rajub41477f2006-07-24 19:52:49 -0400491S2IO_PARM_INT(indicate_max_pkts, 0);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -0500492
493S2IO_PARM_INT(napi, 1);
494S2IO_PARM_INT(ufo, 0);
Sivakumar Subramani926930b2007-02-24 01:59:39 -0500495S2IO_PARM_INT(vlan_tag_strip, NO_STRIP_IN_PROMISC);
Ananda Rajub41477f2006-07-24 19:52:49 -0400496
Linus Torvalds1da177e2005-04-16 15:20:36 -0700497static unsigned int tx_fifo_len[MAX_TX_FIFOS] =
Ananda Raju9dc737a2006-04-21 19:05:41 -0400498 {DEFAULT_FIFO_0_LEN, [1 ...(MAX_TX_FIFOS - 1)] = DEFAULT_FIFO_1_7_LEN};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499static unsigned int rx_ring_sz[MAX_RX_RINGS] =
Ananda Raju9dc737a2006-04-21 19:05:41 -0400500 {[0 ...(MAX_RX_RINGS - 1)] = SMALL_BLK_CNT};
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700501static unsigned int rts_frm_len[MAX_RX_RINGS] =
502 {[0 ...(MAX_RX_RINGS - 1)] = 0 };
Ananda Rajub41477f2006-07-24 19:52:49 -0400503
504module_param_array(tx_fifo_len, uint, NULL, 0);
505module_param_array(rx_ring_sz, uint, NULL, 0);
506module_param_array(rts_frm_len, uint, NULL, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700507
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700508/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700509 * S2IO device table.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700510 * This table lists all the devices that this driver supports.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700511 */
512static struct pci_device_id s2io_tbl[] __devinitdata = {
513 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_WIN,
514 PCI_ANY_ID, PCI_ANY_ID},
515 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_S2IO_UNI,
516 PCI_ANY_ID, PCI_ANY_ID},
517 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_WIN,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700518 PCI_ANY_ID, PCI_ANY_ID},
519 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_HERC_UNI,
520 PCI_ANY_ID, PCI_ANY_ID},
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521 {0,}
522};
523
524MODULE_DEVICE_TABLE(pci, s2io_tbl);
525
Linas Vepstasd796fdb2007-05-14 18:37:30 -0500526static struct pci_error_handlers s2io_err_handler = {
527 .error_detected = s2io_io_error_detected,
528 .slot_reset = s2io_io_slot_reset,
529 .resume = s2io_io_resume,
530};
531
Linus Torvalds1da177e2005-04-16 15:20:36 -0700532static struct pci_driver s2io_driver = {
533 .name = "S2IO",
534 .id_table = s2io_tbl,
535 .probe = s2io_init_nic,
536 .remove = __devexit_p(s2io_rem_nic),
Linas Vepstasd796fdb2007-05-14 18:37:30 -0500537 .err_handler = &s2io_err_handler,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700538};
539
540/* A simplifier macro used both by init and free shared_mem Fns(). */
541#define TXD_MEM_PAGE_CNT(len, per_each) ((len+per_each - 1) / per_each)
542
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500543/* netqueue manipulation helper functions */
544static inline void s2io_stop_all_tx_queue(struct s2io_nic *sp)
545{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700546 if (!sp->config.multiq) {
547 int i;
548
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500549 for (i = 0; i < sp->config.tx_fifo_num; i++)
550 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_STOP;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500551 }
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700552 netif_tx_stop_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500553}
554
555static inline void s2io_stop_tx_queue(struct s2io_nic *sp, int fifo_no)
556{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700557 if (!sp->config.multiq)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500558 sp->mac_control.fifos[fifo_no].queue_state =
559 FIFO_QUEUE_STOP;
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700560
561 netif_tx_stop_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500562}
563
564static inline void s2io_start_all_tx_queue(struct s2io_nic *sp)
565{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700566 if (!sp->config.multiq) {
567 int i;
568
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500569 for (i = 0; i < sp->config.tx_fifo_num; i++)
570 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500571 }
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700572 netif_tx_start_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500573}
574
575static inline void s2io_start_tx_queue(struct s2io_nic *sp, int fifo_no)
576{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700577 if (!sp->config.multiq)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500578 sp->mac_control.fifos[fifo_no].queue_state =
579 FIFO_QUEUE_START;
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700580
581 netif_tx_start_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500582}
583
584static inline void s2io_wake_all_tx_queue(struct s2io_nic *sp)
585{
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700586 if (!sp->config.multiq) {
587 int i;
588
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500589 for (i = 0; i < sp->config.tx_fifo_num; i++)
590 sp->mac_control.fifos[i].queue_state = FIFO_QUEUE_START;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500591 }
David S. Millerfd2ea0a2008-07-17 01:56:23 -0700592 netif_tx_wake_all_queues(sp->dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500593}
594
595static inline void s2io_wake_tx_queue(
596 struct fifo_info *fifo, int cnt, u8 multiq)
597{
598
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500599 if (multiq) {
600 if (cnt && __netif_subqueue_stopped(fifo->dev, fifo->fifo_no))
601 netif_wake_subqueue(fifo->dev, fifo->fifo_no);
David S. Millerb19fa1f2008-07-08 23:14:24 -0700602 } else if (cnt && (fifo->queue_state == FIFO_QUEUE_STOP)) {
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500603 if (netif_queue_stopped(fifo->dev)) {
604 fifo->queue_state = FIFO_QUEUE_START;
605 netif_wake_queue(fifo->dev);
606 }
607 }
608}
609
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610/**
611 * init_shared_mem - Allocation and Initialization of Memory
612 * @nic: Device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700613 * Description: The function allocates all the memory areas shared
614 * between the NIC and the driver. This includes Tx descriptors,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700615 * Rx descriptors and the statistics block.
616 */
617
618static int init_shared_mem(struct s2io_nic *nic)
619{
620 u32 size;
621 void *tmp_v_addr, *tmp_v_addr_next;
622 dma_addr_t tmp_p_addr, tmp_p_addr_next;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500623 struct RxD_block *pre_rxd_blk = NULL;
Sivakumar Subramani372cc592007-01-31 13:32:57 -0500624 int i, j, blk_cnt;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700625 int lst_size, lst_per_page;
626 struct net_device *dev = nic->dev;
viro@zenIV.linux.org.uk8ae418c2005-09-02 20:15:29 +0100627 unsigned long tmp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500628 struct buffAdd *ba;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700629
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500630 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700631 struct config_param *config;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400632 unsigned long long mem_allocated = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633
634 mac_control = &nic->mac_control;
635 config = &nic->config;
636
637
638 /* Allocation and initialization of TXDLs in FIOFs */
639 size = 0;
640 for (i = 0; i < config->tx_fifo_num; i++) {
641 size += config->tx_cfg[i].fifo_len;
642 }
643 if (size > MAX_AVAILABLE_TXDS) {
Ananda Rajub41477f2006-07-24 19:52:49 -0400644 DBG_PRINT(ERR_DBG, "s2io: Requested TxDs too high, ");
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -0700645 DBG_PRINT(ERR_DBG, "Requested: %d, max supported: 8192\n", size);
Ananda Rajub41477f2006-07-24 19:52:49 -0400646 return -EINVAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700647 }
648
Surjit Reang2fda0962008-01-24 02:08:59 -0800649 size = 0;
650 for (i = 0; i < config->tx_fifo_num; i++) {
651 size = config->tx_cfg[i].fifo_len;
652 /*
653 * Legal values are from 2 to 8192
654 */
655 if (size < 2) {
656 DBG_PRINT(ERR_DBG, "s2io: Invalid fifo len (%d)", size);
657 DBG_PRINT(ERR_DBG, "for fifo %d\n", i);
658 DBG_PRINT(ERR_DBG, "s2io: Legal values for fifo len"
659 "are 2 to 8192\n");
660 return -EINVAL;
661 }
662 }
663
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500664 lst_size = (sizeof(struct TxD) * config->max_txds);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665 lst_per_page = PAGE_SIZE / lst_size;
666
667 for (i = 0; i < config->tx_fifo_num; i++) {
668 int fifo_len = config->tx_cfg[i].fifo_len;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500669 int list_holder_size = fifo_len * sizeof(struct list_info_hold);
Sivakumar Subramanibd684e42007-09-14 07:28:50 -0400670 mac_control->fifos[i].list_info = kzalloc(list_holder_size,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700671 GFP_KERNEL);
672 if (!mac_control->fifos[i].list_info) {
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -0800673 DBG_PRINT(INFO_DBG,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700674 "Malloc failed for list_info\n");
675 return -ENOMEM;
676 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400677 mem_allocated += list_holder_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700678 }
679 for (i = 0; i < config->tx_fifo_num; i++) {
680 int page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
681 lst_per_page);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700682 mac_control->fifos[i].tx_curr_put_info.offset = 0;
683 mac_control->fifos[i].tx_curr_put_info.fifo_len =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700684 config->tx_cfg[i].fifo_len - 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700685 mac_control->fifos[i].tx_curr_get_info.offset = 0;
686 mac_control->fifos[i].tx_curr_get_info.fifo_len =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700687 config->tx_cfg[i].fifo_len - 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700688 mac_control->fifos[i].fifo_no = i;
689 mac_control->fifos[i].nic = nic;
Ananda Rajufed5ecc2005-11-14 15:25:08 -0500690 mac_control->fifos[i].max_txds = MAX_SKB_FRAGS + 2;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -0500691 mac_control->fifos[i].dev = dev;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700692
Linus Torvalds1da177e2005-04-16 15:20:36 -0700693 for (j = 0; j < page_num; j++) {
694 int k = 0;
695 dma_addr_t tmp_p;
696 void *tmp_v;
697 tmp_v = pci_alloc_consistent(nic->pdev,
698 PAGE_SIZE, &tmp_p);
699 if (!tmp_v) {
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -0800700 DBG_PRINT(INFO_DBG,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700701 "pci_alloc_consistent ");
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -0800702 DBG_PRINT(INFO_DBG, "failed for TxDL\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700703 return -ENOMEM;
704 }
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700705 /* If we got a zero DMA address(can happen on
706 * certain platforms like PPC), reallocate.
707 * Store virtual address of page we don't want,
708 * to be freed later.
709 */
710 if (!tmp_p) {
711 mac_control->zerodma_virt_addr = tmp_v;
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400712 DBG_PRINT(INIT_DBG,
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700713 "%s: Zero DMA address for TxDL. ", dev->name);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400714 DBG_PRINT(INIT_DBG,
Andrew Morton6b4d6172005-09-12 23:21:55 -0700715 "Virtual address %p\n", tmp_v);
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700716 tmp_v = pci_alloc_consistent(nic->pdev,
717 PAGE_SIZE, &tmp_p);
718 if (!tmp_v) {
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -0800719 DBG_PRINT(INFO_DBG,
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700720 "pci_alloc_consistent ");
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -0800721 DBG_PRINT(INFO_DBG, "failed for TxDL\n");
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700722 return -ENOMEM;
723 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400724 mem_allocated += PAGE_SIZE;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700725 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700726 while (k < lst_per_page) {
727 int l = (j * lst_per_page) + k;
728 if (l == config->tx_cfg[i].fifo_len)
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700729 break;
730 mac_control->fifos[i].list_info[l].list_virt_addr =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700731 tmp_v + (k * lst_size);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700732 mac_control->fifos[i].list_info[l].list_phy_addr =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700733 tmp_p + (k * lst_size);
734 k++;
735 }
736 }
737 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700738
Surjit Reang2fda0962008-01-24 02:08:59 -0800739 for (i = 0; i < config->tx_fifo_num; i++) {
740 size = config->tx_cfg[i].fifo_len;
741 mac_control->fifos[i].ufo_in_band_v
742 = kcalloc(size, sizeof(u64), GFP_KERNEL);
743 if (!mac_control->fifos[i].ufo_in_band_v)
744 return -ENOMEM;
745 mem_allocated += (size * sizeof(u64));
746 }
Ananda Rajufed5ecc2005-11-14 15:25:08 -0500747
Linus Torvalds1da177e2005-04-16 15:20:36 -0700748 /* Allocation and initialization of RXDs in Rings */
749 size = 0;
750 for (i = 0; i < config->rx_ring_num; i++) {
Ananda Rajuda6971d2005-10-31 16:55:31 -0500751 if (config->rx_cfg[i].num_rxd %
752 (rxd_count[nic->rxd_mode] + 1)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700753 DBG_PRINT(ERR_DBG, "%s: RxD count of ", dev->name);
754 DBG_PRINT(ERR_DBG, "Ring%d is not a multiple of ",
755 i);
756 DBG_PRINT(ERR_DBG, "RxDs per Block");
757 return FAILURE;
758 }
759 size += config->rx_cfg[i].num_rxd;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700760 mac_control->rings[i].block_count =
Ananda Rajuda6971d2005-10-31 16:55:31 -0500761 config->rx_cfg[i].num_rxd /
762 (rxd_count[nic->rxd_mode] + 1 );
763 mac_control->rings[i].pkt_cnt = config->rx_cfg[i].num_rxd -
764 mac_control->rings[i].block_count;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700765 }
Ananda Rajuda6971d2005-10-31 16:55:31 -0500766 if (nic->rxd_mode == RXD_MODE_1)
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500767 size = (size * (sizeof(struct RxD1)));
Ananda Rajuda6971d2005-10-31 16:55:31 -0500768 else
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500769 size = (size * (sizeof(struct RxD3)));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700770
771 for (i = 0; i < config->rx_ring_num; i++) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700772 mac_control->rings[i].rx_curr_get_info.block_index = 0;
773 mac_control->rings[i].rx_curr_get_info.offset = 0;
774 mac_control->rings[i].rx_curr_get_info.ring_len =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700775 config->rx_cfg[i].num_rxd - 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700776 mac_control->rings[i].rx_curr_put_info.block_index = 0;
777 mac_control->rings[i].rx_curr_put_info.offset = 0;
778 mac_control->rings[i].rx_curr_put_info.ring_len =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700779 config->rx_cfg[i].num_rxd - 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700780 mac_control->rings[i].nic = nic;
781 mac_control->rings[i].ring_no = i;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -0400782 mac_control->rings[i].lro = lro_enable;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700783
Ananda Rajuda6971d2005-10-31 16:55:31 -0500784 blk_cnt = config->rx_cfg[i].num_rxd /
785 (rxd_count[nic->rxd_mode] + 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700786 /* Allocating all the Rx blocks */
787 for (j = 0; j < blk_cnt; j++) {
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500788 struct rx_block_info *rx_blocks;
Ananda Rajuda6971d2005-10-31 16:55:31 -0500789 int l;
790
791 rx_blocks = &mac_control->rings[i].rx_blocks[j];
792 size = SIZE_OF_BLOCK; //size is always page size
Linus Torvalds1da177e2005-04-16 15:20:36 -0700793 tmp_v_addr = pci_alloc_consistent(nic->pdev, size,
794 &tmp_p_addr);
795 if (tmp_v_addr == NULL) {
796 /*
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700797 * In case of failure, free_shared_mem()
798 * is called, which should free any
799 * memory that was alloced till the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700800 * failure happened.
801 */
Ananda Rajuda6971d2005-10-31 16:55:31 -0500802 rx_blocks->block_virt_addr = tmp_v_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700803 return -ENOMEM;
804 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400805 mem_allocated += size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700806 memset(tmp_v_addr, 0, size);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500807 rx_blocks->block_virt_addr = tmp_v_addr;
808 rx_blocks->block_dma_addr = tmp_p_addr;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500809 rx_blocks->rxds = kmalloc(sizeof(struct rxd_info)*
Ananda Rajuda6971d2005-10-31 16:55:31 -0500810 rxd_count[nic->rxd_mode],
811 GFP_KERNEL);
Sivakumar Subramani372cc592007-01-31 13:32:57 -0500812 if (!rx_blocks->rxds)
813 return -ENOMEM;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -0400814 mem_allocated +=
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400815 (sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500816 for (l=0; l<rxd_count[nic->rxd_mode];l++) {
817 rx_blocks->rxds[l].virt_addr =
818 rx_blocks->block_virt_addr +
819 (rxd_size[nic->rxd_mode] * l);
820 rx_blocks->rxds[l].dma_addr =
821 rx_blocks->block_dma_addr +
822 (rxd_size[nic->rxd_mode] * l);
823 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700824 }
825 /* Interlinking all Rx Blocks */
826 for (j = 0; j < blk_cnt; j++) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700827 tmp_v_addr =
828 mac_control->rings[i].rx_blocks[j].block_virt_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700829 tmp_v_addr_next =
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700830 mac_control->rings[i].rx_blocks[(j + 1) %
Linus Torvalds1da177e2005-04-16 15:20:36 -0700831 blk_cnt].block_virt_addr;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700832 tmp_p_addr =
833 mac_control->rings[i].rx_blocks[j].block_dma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700834 tmp_p_addr_next =
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700835 mac_control->rings[i].rx_blocks[(j + 1) %
Linus Torvalds1da177e2005-04-16 15:20:36 -0700836 blk_cnt].block_dma_addr;
837
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500838 pre_rxd_blk = (struct RxD_block *) tmp_v_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700839 pre_rxd_blk->reserved_2_pNext_RxD_block =
840 (unsigned long) tmp_v_addr_next;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700841 pre_rxd_blk->pNext_RxD_Blk_physical =
842 (u64) tmp_p_addr_next;
843 }
844 }
Veena Parat6d517a22007-07-23 02:20:51 -0400845 if (nic->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -0500846 /*
847 * Allocation of Storages for buffer addresses in 2BUFF mode
848 * and the buffers as well.
849 */
850 for (i = 0; i < config->rx_ring_num; i++) {
851 blk_cnt = config->rx_cfg[i].num_rxd /
852 (rxd_count[nic->rxd_mode]+ 1);
853 mac_control->rings[i].ba =
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500854 kmalloc((sizeof(struct buffAdd *) * blk_cnt),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700855 GFP_KERNEL);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500856 if (!mac_control->rings[i].ba)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700857 return -ENOMEM;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400858 mem_allocated +=(sizeof(struct buffAdd *) * blk_cnt);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500859 for (j = 0; j < blk_cnt; j++) {
860 int k = 0;
861 mac_control->rings[i].ba[j] =
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500862 kmalloc((sizeof(struct buffAdd) *
Ananda Rajuda6971d2005-10-31 16:55:31 -0500863 (rxd_count[nic->rxd_mode] + 1)),
864 GFP_KERNEL);
865 if (!mac_control->rings[i].ba[j])
Linus Torvalds1da177e2005-04-16 15:20:36 -0700866 return -ENOMEM;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400867 mem_allocated += (sizeof(struct buffAdd) * \
868 (rxd_count[nic->rxd_mode] + 1));
Ananda Rajuda6971d2005-10-31 16:55:31 -0500869 while (k != rxd_count[nic->rxd_mode]) {
870 ba = &mac_control->rings[i].ba[j][k];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700871
Ananda Rajuda6971d2005-10-31 16:55:31 -0500872 ba->ba_0_org = (void *) kmalloc
873 (BUF0_LEN + ALIGN_SIZE, GFP_KERNEL);
874 if (!ba->ba_0_org)
875 return -ENOMEM;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -0400876 mem_allocated +=
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400877 (BUF0_LEN + ALIGN_SIZE);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500878 tmp = (unsigned long)ba->ba_0_org;
879 tmp += ALIGN_SIZE;
880 tmp &= ~((unsigned long) ALIGN_SIZE);
881 ba->ba_0 = (void *) tmp;
882
883 ba->ba_1_org = (void *) kmalloc
884 (BUF1_LEN + ALIGN_SIZE, GFP_KERNEL);
885 if (!ba->ba_1_org)
886 return -ENOMEM;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -0400887 mem_allocated
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400888 += (BUF1_LEN + ALIGN_SIZE);
Ananda Rajuda6971d2005-10-31 16:55:31 -0500889 tmp = (unsigned long) ba->ba_1_org;
890 tmp += ALIGN_SIZE;
891 tmp &= ~((unsigned long) ALIGN_SIZE);
892 ba->ba_1 = (void *) tmp;
893 k++;
894 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700895 }
896 }
897 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700898
899 /* Allocation and initialization of Statistics block */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500900 size = sizeof(struct stat_block);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700901 mac_control->stats_mem = pci_alloc_consistent
902 (nic->pdev, size, &mac_control->stats_mem_phy);
903
904 if (!mac_control->stats_mem) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700905 /*
906 * In case of failure, free_shared_mem() is called, which
907 * should free any memory that was alloced till the
Linus Torvalds1da177e2005-04-16 15:20:36 -0700908 * failure happened.
909 */
910 return -ENOMEM;
911 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400912 mem_allocated += size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700913 mac_control->stats_mem_sz = size;
914
915 tmp_v_addr = mac_control->stats_mem;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500916 mac_control->stats_info = (struct stat_block *) tmp_v_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700917 memset(tmp_v_addr, 0, size);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700918 DBG_PRINT(INIT_DBG, "%s:Ring Mem PHY: 0x%llx\n", dev->name,
919 (unsigned long long) tmp_p_addr);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400920 mac_control->stats_info->sw_stat.mem_allocated += mem_allocated;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700921 return SUCCESS;
922}
923
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700924/**
925 * free_shared_mem - Free the allocated Memory
Linus Torvalds1da177e2005-04-16 15:20:36 -0700926 * @nic: Device private variable.
927 * Description: This function is to free all memory locations allocated by
928 * the init_shared_mem() function and return it to the kernel.
929 */
930
931static void free_shared_mem(struct s2io_nic *nic)
932{
933 int i, j, blk_cnt, size;
934 void *tmp_v_addr;
935 dma_addr_t tmp_p_addr;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500936 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700937 struct config_param *config;
938 int lst_size, lst_per_page;
Micah Gruber8910b492007-07-09 11:29:04 +0800939 struct net_device *dev;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400940 int page_num = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700941
942 if (!nic)
943 return;
944
Micah Gruber8910b492007-07-09 11:29:04 +0800945 dev = nic->dev;
946
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947 mac_control = &nic->mac_control;
948 config = &nic->config;
949
Ralf Baechle1ee6dd72007-01-31 14:09:29 -0500950 lst_size = (sizeof(struct TxD) * config->max_txds);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700951 lst_per_page = PAGE_SIZE / lst_size;
952
953 for (i = 0; i < config->tx_fifo_num; i++) {
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400954 page_num = TXD_MEM_PAGE_CNT(config->tx_cfg[i].fifo_len,
955 lst_per_page);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700956 for (j = 0; j < page_num; j++) {
957 int mem_blks = (j * lst_per_page);
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700958 if (!mac_control->fifos[i].list_info)
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400959 return;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700960 if (!mac_control->fifos[i].list_info[mem_blks].
961 list_virt_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700962 break;
963 pci_free_consistent(nic->pdev, PAGE_SIZE,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700964 mac_control->fifos[i].
965 list_info[mem_blks].
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 list_virt_addr,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700967 mac_control->fifos[i].
968 list_info[mem_blks].
Linus Torvalds1da177e2005-04-16 15:20:36 -0700969 list_phy_addr);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -0400970 nic->mac_control.stats_info->sw_stat.mem_freed
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400971 += PAGE_SIZE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972 }
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700973 /* If we got a zero DMA address during allocation,
974 * free the page now
975 */
976 if (mac_control->zerodma_virt_addr) {
977 pci_free_consistent(nic->pdev, PAGE_SIZE,
978 mac_control->zerodma_virt_addr,
979 (dma_addr_t)0);
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400980 DBG_PRINT(INIT_DBG,
Andrew Morton6b4d6172005-09-12 23:21:55 -0700981 "%s: Freeing TxDL with zero DMA addr. ",
982 dev->name);
983 DBG_PRINT(INIT_DBG, "Virtual address %p\n",
984 mac_control->zerodma_virt_addr);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -0400985 nic->mac_control.stats_info->sw_stat.mem_freed
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400986 += PAGE_SIZE;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -0700987 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700988 kfree(mac_control->fifos[i].list_info);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -0400989 nic->mac_control.stats_info->sw_stat.mem_freed +=
Sreenivasa Honnur491976b2007-05-10 04:22:25 -0400990 (nic->config.tx_cfg[i].fifo_len *sizeof(struct list_info_hold));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700991 }
992
Linus Torvalds1da177e2005-04-16 15:20:36 -0700993 size = SIZE_OF_BLOCK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700994 for (i = 0; i < config->rx_ring_num; i++) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700995 blk_cnt = mac_control->rings[i].block_count;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700996 for (j = 0; j < blk_cnt; j++) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -0700997 tmp_v_addr = mac_control->rings[i].rx_blocks[j].
998 block_virt_addr;
999 tmp_p_addr = mac_control->rings[i].rx_blocks[j].
1000 block_dma_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001001 if (tmp_v_addr == NULL)
1002 break;
1003 pci_free_consistent(nic->pdev, size,
1004 tmp_v_addr, tmp_p_addr);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04001005 nic->mac_control.stats_info->sw_stat.mem_freed += size;
Ananda Rajuda6971d2005-10-31 16:55:31 -05001006 kfree(mac_control->rings[i].rx_blocks[j].rxds);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001007 nic->mac_control.stats_info->sw_stat.mem_freed +=
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04001008 ( sizeof(struct rxd_info)* rxd_count[nic->rxd_mode]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001009 }
1010 }
1011
Veena Parat6d517a22007-07-23 02:20:51 -04001012 if (nic->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05001013 /* Freeing buffer storage addresses in 2BUFF mode. */
1014 for (i = 0; i < config->rx_ring_num; i++) {
1015 blk_cnt = config->rx_cfg[i].num_rxd /
1016 (rxd_count[nic->rxd_mode] + 1);
1017 for (j = 0; j < blk_cnt; j++) {
1018 int k = 0;
1019 if (!mac_control->rings[i].ba[j])
1020 continue;
1021 while (k != rxd_count[nic->rxd_mode]) {
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001022 struct buffAdd *ba =
Ananda Rajuda6971d2005-10-31 16:55:31 -05001023 &mac_control->rings[i].ba[j][k];
1024 kfree(ba->ba_0_org);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04001025 nic->mac_control.stats_info->sw_stat.\
1026 mem_freed += (BUF0_LEN + ALIGN_SIZE);
Ananda Rajuda6971d2005-10-31 16:55:31 -05001027 kfree(ba->ba_1_org);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04001028 nic->mac_control.stats_info->sw_stat.\
1029 mem_freed += (BUF1_LEN + ALIGN_SIZE);
Ananda Rajuda6971d2005-10-31 16:55:31 -05001030 k++;
1031 }
1032 kfree(mac_control->rings[i].ba[j]);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001033 nic->mac_control.stats_info->sw_stat.mem_freed +=
1034 (sizeof(struct buffAdd) *
1035 (rxd_count[nic->rxd_mode] + 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07001036 }
Ananda Rajuda6971d2005-10-31 16:55:31 -05001037 kfree(mac_control->rings[i].ba);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001038 nic->mac_control.stats_info->sw_stat.mem_freed +=
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04001039 (sizeof(struct buffAdd *) * blk_cnt);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001041 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001042
Surjit Reang2fda0962008-01-24 02:08:59 -08001043 for (i = 0; i < nic->config.tx_fifo_num; i++) {
1044 if (mac_control->fifos[i].ufo_in_band_v) {
1045 nic->mac_control.stats_info->sw_stat.mem_freed
1046 += (config->tx_cfg[i].fifo_len * sizeof(u64));
1047 kfree(mac_control->fifos[i].ufo_in_band_v);
1048 }
1049 }
1050
Linus Torvalds1da177e2005-04-16 15:20:36 -07001051 if (mac_control->stats_mem) {
Surjit Reang2fda0962008-01-24 02:08:59 -08001052 nic->mac_control.stats_info->sw_stat.mem_freed +=
1053 mac_control->stats_mem_sz;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001054 pci_free_consistent(nic->pdev,
1055 mac_control->stats_mem_sz,
1056 mac_control->stats_mem,
1057 mac_control->stats_mem_phy);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04001058 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001059}
1060
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001061/**
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001062 * s2io_verify_pci_mode -
1063 */
1064
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001065static int s2io_verify_pci_mode(struct s2io_nic *nic)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001066{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001067 struct XENA_dev_config __iomem *bar0 = nic->bar0;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001068 register u64 val64 = 0;
1069 int mode;
1070
1071 val64 = readq(&bar0->pci_mode);
1072 mode = (u8)GET_PCI_MODE(val64);
1073
1074 if ( val64 & PCI_MODE_UNKNOWN_MODE)
1075 return -1; /* Unknown PCI mode */
1076 return mode;
1077}
1078
Ananda Rajuc92ca042006-04-21 19:18:03 -04001079#define NEC_VENID 0x1033
1080#define NEC_DEVID 0x0125
1081static int s2io_on_nec_bridge(struct pci_dev *s2io_pdev)
1082{
1083 struct pci_dev *tdev = NULL;
Alan Cox26d36b62006-09-15 15:22:51 +01001084 while ((tdev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, tdev)) != NULL) {
1085 if (tdev->vendor == NEC_VENID && tdev->device == NEC_DEVID) {
Ilpo Järvinen7ad62dbc2008-05-13 14:16:54 +03001086 if (tdev->bus == s2io_pdev->bus->parent) {
Alan Cox26d36b62006-09-15 15:22:51 +01001087 pci_dev_put(tdev);
Ananda Rajuc92ca042006-04-21 19:18:03 -04001088 return 1;
Ilpo Järvinen7ad62dbc2008-05-13 14:16:54 +03001089 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04001090 }
1091 }
1092 return 0;
1093}
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001094
Adrian Bunk7b32a312006-05-16 17:30:50 +02001095static int bus_speed[8] = {33, 133, 133, 200, 266, 133, 200, 266};
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001096/**
1097 * s2io_print_pci_mode -
1098 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001099static int s2io_print_pci_mode(struct s2io_nic *nic)
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001100{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001101 struct XENA_dev_config __iomem *bar0 = nic->bar0;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001102 register u64 val64 = 0;
1103 int mode;
1104 struct config_param *config = &nic->config;
1105
1106 val64 = readq(&bar0->pci_mode);
1107 mode = (u8)GET_PCI_MODE(val64);
1108
1109 if ( val64 & PCI_MODE_UNKNOWN_MODE)
1110 return -1; /* Unknown PCI mode */
1111
Ananda Rajuc92ca042006-04-21 19:18:03 -04001112 config->bus_speed = bus_speed[mode];
1113
1114 if (s2io_on_nec_bridge(nic->pdev)) {
1115 DBG_PRINT(ERR_DBG, "%s: Device is on PCI-E bus\n",
1116 nic->dev->name);
1117 return mode;
1118 }
1119
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001120 if (val64 & PCI_MODE_32_BITS) {
1121 DBG_PRINT(ERR_DBG, "%s: Device is on 32 bit ", nic->dev->name);
1122 } else {
1123 DBG_PRINT(ERR_DBG, "%s: Device is on 64 bit ", nic->dev->name);
1124 }
1125
1126 switch(mode) {
1127 case PCI_MODE_PCI_33:
1128 DBG_PRINT(ERR_DBG, "33MHz PCI bus\n");
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001129 break;
1130 case PCI_MODE_PCI_66:
1131 DBG_PRINT(ERR_DBG, "66MHz PCI bus\n");
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001132 break;
1133 case PCI_MODE_PCIX_M1_66:
1134 DBG_PRINT(ERR_DBG, "66MHz PCIX(M1) bus\n");
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001135 break;
1136 case PCI_MODE_PCIX_M1_100:
1137 DBG_PRINT(ERR_DBG, "100MHz PCIX(M1) bus\n");
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001138 break;
1139 case PCI_MODE_PCIX_M1_133:
1140 DBG_PRINT(ERR_DBG, "133MHz PCIX(M1) bus\n");
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001141 break;
1142 case PCI_MODE_PCIX_M2_66:
1143 DBG_PRINT(ERR_DBG, "133MHz PCIX(M2) bus\n");
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001144 break;
1145 case PCI_MODE_PCIX_M2_100:
1146 DBG_PRINT(ERR_DBG, "200MHz PCIX(M2) bus\n");
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001147 break;
1148 case PCI_MODE_PCIX_M2_133:
1149 DBG_PRINT(ERR_DBG, "266MHz PCIX(M2) bus\n");
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001150 break;
1151 default:
1152 return -1; /* Unsupported bus speed */
1153 }
1154
1155 return mode;
1156}
1157
1158/**
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001159 * init_tti - Initialization transmit traffic interrupt scheme
1160 * @nic: device private variable
1161 * @link: link status (UP/DOWN) used to enable/disable continuous
1162 * transmit interrupts
1163 * Description: The function configures transmit traffic interrupts
1164 * Return Value: SUCCESS on success and
1165 * '-1' on failure
1166 */
1167
Adrian Bunk0d66afe2008-03-04 15:19:22 -08001168static int init_tti(struct s2io_nic *nic, int link)
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001169{
1170 struct XENA_dev_config __iomem *bar0 = nic->bar0;
1171 register u64 val64 = 0;
1172 int i;
1173 struct config_param *config;
1174
1175 config = &nic->config;
1176
1177 for (i = 0; i < config->tx_fifo_num; i++) {
1178 /*
1179 * TTI Initialization. Default Tx timer gets us about
1180 * 250 interrupts per sec. Continuous interrupts are enabled
1181 * by default.
1182 */
1183 if (nic->device_type == XFRAME_II_DEVICE) {
1184 int count = (nic->config.bus_speed * 125)/2;
1185 val64 = TTI_DATA1_MEM_TX_TIMER_VAL(count);
1186 } else
1187 val64 = TTI_DATA1_MEM_TX_TIMER_VAL(0x2078);
1188
1189 val64 |= TTI_DATA1_MEM_TX_URNG_A(0xA) |
1190 TTI_DATA1_MEM_TX_URNG_B(0x10) |
1191 TTI_DATA1_MEM_TX_URNG_C(0x30) |
1192 TTI_DATA1_MEM_TX_TIMER_AC_EN;
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04001193 if (i == 0)
1194 if (use_continuous_tx_intrs && (link == LINK_UP))
1195 val64 |= TTI_DATA1_MEM_TX_TIMER_CI_EN;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001196 writeq(val64, &bar0->tti_data1_mem);
1197
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04001198 if (nic->config.intr_type == MSI_X) {
1199 val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
1200 TTI_DATA2_MEM_TX_UFC_B(0x100) |
1201 TTI_DATA2_MEM_TX_UFC_C(0x200) |
1202 TTI_DATA2_MEM_TX_UFC_D(0x300);
1203 } else {
1204 if ((nic->config.tx_steering_type ==
1205 TX_DEFAULT_STEERING) &&
1206 (config->tx_fifo_num > 1) &&
1207 (i >= nic->udp_fifo_idx) &&
1208 (i < (nic->udp_fifo_idx +
1209 nic->total_udp_fifos)))
1210 val64 = TTI_DATA2_MEM_TX_UFC_A(0x50) |
1211 TTI_DATA2_MEM_TX_UFC_B(0x80) |
1212 TTI_DATA2_MEM_TX_UFC_C(0x100) |
1213 TTI_DATA2_MEM_TX_UFC_D(0x120);
1214 else
1215 val64 = TTI_DATA2_MEM_TX_UFC_A(0x10) |
1216 TTI_DATA2_MEM_TX_UFC_B(0x20) |
1217 TTI_DATA2_MEM_TX_UFC_C(0x40) |
1218 TTI_DATA2_MEM_TX_UFC_D(0x80);
1219 }
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001220
1221 writeq(val64, &bar0->tti_data2_mem);
1222
1223 val64 = TTI_CMD_MEM_WE | TTI_CMD_MEM_STROBE_NEW_CMD |
1224 TTI_CMD_MEM_OFFSET(i);
1225 writeq(val64, &bar0->tti_command_mem);
1226
1227 if (wait_for_cmd_complete(&bar0->tti_command_mem,
1228 TTI_CMD_MEM_STROBE_NEW_CMD, S2IO_BIT_RESET) != SUCCESS)
1229 return FAILURE;
1230 }
1231
1232 return SUCCESS;
1233}
1234
1235/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001236 * init_nic - Initialization of hardware
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001237 * @nic: device private variable
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001238 * Description: The function sequentially configures every block
1239 * of the H/W from their reset values.
1240 * Return Value: SUCCESS on success and
Linus Torvalds1da177e2005-04-16 15:20:36 -07001241 * '-1' on failure (endian settings incorrect).
1242 */
1243
1244static int init_nic(struct s2io_nic *nic)
1245{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001246 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001247 struct net_device *dev = nic->dev;
1248 register u64 val64 = 0;
1249 void __iomem *add;
1250 u32 time;
1251 int i, j;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001252 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001253 struct config_param *config;
Ananda Rajuc92ca042006-04-21 19:18:03 -04001254 int dtx_cnt = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001255 unsigned long long mem_share;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001256 int mem_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001257
1258 mac_control = &nic->mac_control;
1259 config = &nic->config;
1260
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001261 /* to set the swapper controle on the card */
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001262 if(s2io_set_swapper(nic)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001263 DBG_PRINT(ERR_DBG,"ERROR: Setting Swapper failed\n");
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05001264 return -EIO;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001265 }
1266
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001267 /*
1268 * Herc requires EOI to be removed from reset before XGXS, so..
1269 */
1270 if (nic->device_type & XFRAME_II_DEVICE) {
1271 val64 = 0xA500000000ULL;
1272 writeq(val64, &bar0->sw_reset);
1273 msleep(500);
1274 val64 = readq(&bar0->sw_reset);
1275 }
1276
Linus Torvalds1da177e2005-04-16 15:20:36 -07001277 /* Remove XGXS from reset state */
1278 val64 = 0;
1279 writeq(val64, &bar0->sw_reset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001280 msleep(500);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001281 val64 = readq(&bar0->sw_reset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001282
Sreenivasa Honnur79620242007-12-05 23:59:28 -05001283 /* Ensure that it's safe to access registers by checking
1284 * RIC_RUNNING bit is reset. Check is valid only for XframeII.
1285 */
1286 if (nic->device_type == XFRAME_II_DEVICE) {
1287 for (i = 0; i < 50; i++) {
1288 val64 = readq(&bar0->adapter_status);
1289 if (!(val64 & ADAPTER_STATUS_RIC_RUNNING))
1290 break;
1291 msleep(10);
1292 }
1293 if (i == 50)
1294 return -ENODEV;
1295 }
1296
Linus Torvalds1da177e2005-04-16 15:20:36 -07001297 /* Enable Receiving broadcasts */
1298 add = &bar0->mac_cfg;
1299 val64 = readq(&bar0->mac_cfg);
1300 val64 |= MAC_RMAC_BCAST_ENABLE;
1301 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1302 writel((u32) val64, add);
1303 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1304 writel((u32) (val64 >> 32), (add + 4));
1305
1306 /* Read registers in all blocks */
1307 val64 = readq(&bar0->mac_int_mask);
1308 val64 = readq(&bar0->mc_int_mask);
1309 val64 = readq(&bar0->xgxs_int_mask);
1310
1311 /* Set MTU */
1312 val64 = dev->mtu;
1313 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
1314
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001315 if (nic->device_type & XFRAME_II_DEVICE) {
1316 while (herc_act_dtx_cfg[dtx_cnt] != END_SIGN) {
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07001317 SPECIAL_REG_WRITE(herc_act_dtx_cfg[dtx_cnt],
Linus Torvalds1da177e2005-04-16 15:20:36 -07001318 &bar0->dtx_control, UF);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001319 if (dtx_cnt & 0x1)
1320 msleep(1); /* Necessary!! */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001321 dtx_cnt++;
1322 }
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001323 } else {
Ananda Rajuc92ca042006-04-21 19:18:03 -04001324 while (xena_dtx_cfg[dtx_cnt] != END_SIGN) {
1325 SPECIAL_REG_WRITE(xena_dtx_cfg[dtx_cnt],
1326 &bar0->dtx_control, UF);
1327 val64 = readq(&bar0->dtx_control);
1328 dtx_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001329 }
1330 }
1331
1332 /* Tx DMA Initialization */
1333 val64 = 0;
1334 writeq(val64, &bar0->tx_fifo_partition_0);
1335 writeq(val64, &bar0->tx_fifo_partition_1);
1336 writeq(val64, &bar0->tx_fifo_partition_2);
1337 writeq(val64, &bar0->tx_fifo_partition_3);
1338
1339
1340 for (i = 0, j = 0; i < config->tx_fifo_num; i++) {
1341 val64 |=
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001342 vBIT(config->tx_cfg[i].fifo_len - 1, ((j * 32) + 19),
Linus Torvalds1da177e2005-04-16 15:20:36 -07001343 13) | vBIT(config->tx_cfg[i].fifo_priority,
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001344 ((j * 32) + 5), 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001345
1346 if (i == (config->tx_fifo_num - 1)) {
1347 if (i % 2 == 0)
1348 i++;
1349 }
1350
1351 switch (i) {
1352 case 1:
1353 writeq(val64, &bar0->tx_fifo_partition_0);
1354 val64 = 0;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001355 j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001356 break;
1357 case 3:
1358 writeq(val64, &bar0->tx_fifo_partition_1);
1359 val64 = 0;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001360 j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001361 break;
1362 case 5:
1363 writeq(val64, &bar0->tx_fifo_partition_2);
1364 val64 = 0;
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001365 j = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001366 break;
1367 case 7:
1368 writeq(val64, &bar0->tx_fifo_partition_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001369 val64 = 0;
1370 j = 0;
1371 break;
1372 default:
1373 j++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001374 break;
1375 }
1376 }
1377
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001378 /*
1379 * Disable 4 PCCs for Xena1, 2 and 3 as per H/W bug
1380 * SXE-008 TRANSMIT DMA ARBITRATION ISSUE.
1381 */
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001382 if ((nic->device_type == XFRAME_I_DEVICE) &&
Auke Kok44c10132007-06-08 15:46:36 -07001383 (nic->pdev->revision < 4))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001384 writeq(PCC_ENABLE_FOUR, &bar0->pcc_enable);
1385
Linus Torvalds1da177e2005-04-16 15:20:36 -07001386 val64 = readq(&bar0->tx_fifo_partition_0);
1387 DBG_PRINT(INIT_DBG, "Fifo partition at: 0x%p is: 0x%llx\n",
1388 &bar0->tx_fifo_partition_0, (unsigned long long) val64);
1389
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001390 /*
1391 * Initialization of Tx_PA_CONFIG register to ignore packet
Linus Torvalds1da177e2005-04-16 15:20:36 -07001392 * integrity checking.
1393 */
1394 val64 = readq(&bar0->tx_pa_cfg);
1395 val64 |= TX_PA_CFG_IGNORE_FRM_ERR | TX_PA_CFG_IGNORE_SNAP_OUI |
1396 TX_PA_CFG_IGNORE_LLC_CTRL | TX_PA_CFG_IGNORE_L2_ERR;
1397 writeq(val64, &bar0->tx_pa_cfg);
1398
1399 /* Rx DMA intialization. */
1400 val64 = 0;
1401 for (i = 0; i < config->rx_ring_num; i++) {
1402 val64 |=
1403 vBIT(config->rx_cfg[i].ring_priority, (5 + (i * 8)),
1404 3);
1405 }
1406 writeq(val64, &bar0->rx_queue_priority);
1407
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001408 /*
1409 * Allocating equal share of memory to all the
Linus Torvalds1da177e2005-04-16 15:20:36 -07001410 * configured Rings.
1411 */
1412 val64 = 0;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001413 if (nic->device_type & XFRAME_II_DEVICE)
1414 mem_size = 32;
1415 else
1416 mem_size = 64;
1417
Linus Torvalds1da177e2005-04-16 15:20:36 -07001418 for (i = 0; i < config->rx_ring_num; i++) {
1419 switch (i) {
1420 case 0:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001421 mem_share = (mem_size / config->rx_ring_num +
1422 mem_size % config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001423 val64 |= RX_QUEUE_CFG_Q0_SZ(mem_share);
1424 continue;
1425 case 1:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001426 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001427 val64 |= RX_QUEUE_CFG_Q1_SZ(mem_share);
1428 continue;
1429 case 2:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001430 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001431 val64 |= RX_QUEUE_CFG_Q2_SZ(mem_share);
1432 continue;
1433 case 3:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001434 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001435 val64 |= RX_QUEUE_CFG_Q3_SZ(mem_share);
1436 continue;
1437 case 4:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001438 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001439 val64 |= RX_QUEUE_CFG_Q4_SZ(mem_share);
1440 continue;
1441 case 5:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001442 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001443 val64 |= RX_QUEUE_CFG_Q5_SZ(mem_share);
1444 continue;
1445 case 6:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001446 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001447 val64 |= RX_QUEUE_CFG_Q6_SZ(mem_share);
1448 continue;
1449 case 7:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001450 mem_share = (mem_size / config->rx_ring_num);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001451 val64 |= RX_QUEUE_CFG_Q7_SZ(mem_share);
1452 continue;
1453 }
1454 }
1455 writeq(val64, &bar0->rx_queue_cfg);
1456
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001457 /*
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001458 * Filling Tx round robin registers
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001459 * as per the number of FIFOs for equal scheduling priority
Linus Torvalds1da177e2005-04-16 15:20:36 -07001460 */
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001461 switch (config->tx_fifo_num) {
1462 case 1:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001463 val64 = 0x0;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001464 writeq(val64, &bar0->tx_w_round_robin_0);
1465 writeq(val64, &bar0->tx_w_round_robin_1);
1466 writeq(val64, &bar0->tx_w_round_robin_2);
1467 writeq(val64, &bar0->tx_w_round_robin_3);
1468 writeq(val64, &bar0->tx_w_round_robin_4);
1469 break;
1470 case 2:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001471 val64 = 0x0001000100010001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001472 writeq(val64, &bar0->tx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001473 writeq(val64, &bar0->tx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001474 writeq(val64, &bar0->tx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001475 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001476 val64 = 0x0001000100000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001477 writeq(val64, &bar0->tx_w_round_robin_4);
1478 break;
1479 case 3:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001480 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001481 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001482 val64 = 0x0200010200010200ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001483 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001484 val64 = 0x0102000102000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001485 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001486 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001487 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001488 val64 = 0x0200010200000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001489 writeq(val64, &bar0->tx_w_round_robin_4);
1490 break;
1491 case 4:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001492 val64 = 0x0001020300010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001493 writeq(val64, &bar0->tx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001494 writeq(val64, &bar0->tx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001495 writeq(val64, &bar0->tx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001496 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001497 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001498 writeq(val64, &bar0->tx_w_round_robin_4);
1499 break;
1500 case 5:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001501 val64 = 0x0001020304000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001502 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001503 val64 = 0x0304000102030400ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001504 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001505 val64 = 0x0102030400010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001506 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001507 val64 = 0x0400010203040001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001508 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001509 val64 = 0x0203040000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001510 writeq(val64, &bar0->tx_w_round_robin_4);
1511 break;
1512 case 6:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001513 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001514 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001515 val64 = 0x0203040500010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001516 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001517 val64 = 0x0405000102030405ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001518 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001519 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001520 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001521 val64 = 0x0203040500000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001522 writeq(val64, &bar0->tx_w_round_robin_4);
1523 break;
1524 case 7:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001525 val64 = 0x0001020304050600ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001526 writeq(val64, &bar0->tx_w_round_robin_0);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001527 val64 = 0x0102030405060001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001528 writeq(val64, &bar0->tx_w_round_robin_1);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001529 val64 = 0x0203040506000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001530 writeq(val64, &bar0->tx_w_round_robin_2);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001531 val64 = 0x0304050600010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001532 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001533 val64 = 0x0405060000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001534 writeq(val64, &bar0->tx_w_round_robin_4);
1535 break;
1536 case 8:
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001537 val64 = 0x0001020304050607ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001538 writeq(val64, &bar0->tx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001539 writeq(val64, &bar0->tx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001540 writeq(val64, &bar0->tx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001541 writeq(val64, &bar0->tx_w_round_robin_3);
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001542 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001543 writeq(val64, &bar0->tx_w_round_robin_4);
1544 break;
1545 }
1546
Ananda Rajub41477f2006-07-24 19:52:49 -04001547 /* Enable all configured Tx FIFO partitions */
Ananda Raju5d3213c2006-04-21 19:23:26 -04001548 val64 = readq(&bar0->tx_fifo_partition_0);
1549 val64 |= (TX_FIFO_PARTITION_EN);
1550 writeq(val64, &bar0->tx_fifo_partition_0);
1551
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001552 /* Filling the Rx round robin registers as per the
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001553 * number of Rings and steering based on QoS with
1554 * equal priority.
1555 */
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001556 switch (config->rx_ring_num) {
1557 case 1:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001558 val64 = 0x0;
1559 writeq(val64, &bar0->rx_w_round_robin_0);
1560 writeq(val64, &bar0->rx_w_round_robin_1);
1561 writeq(val64, &bar0->rx_w_round_robin_2);
1562 writeq(val64, &bar0->rx_w_round_robin_3);
1563 writeq(val64, &bar0->rx_w_round_robin_4);
1564
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001565 val64 = 0x8080808080808080ULL;
1566 writeq(val64, &bar0->rts_qos_steering);
1567 break;
1568 case 2:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001569 val64 = 0x0001000100010001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001570 writeq(val64, &bar0->rx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001571 writeq(val64, &bar0->rx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001572 writeq(val64, &bar0->rx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001573 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001574 val64 = 0x0001000100000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001575 writeq(val64, &bar0->rx_w_round_robin_4);
1576
1577 val64 = 0x8080808040404040ULL;
1578 writeq(val64, &bar0->rts_qos_steering);
1579 break;
1580 case 3:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001581 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001582 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001583 val64 = 0x0200010200010200ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001584 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001585 val64 = 0x0102000102000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001586 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001587 val64 = 0x0001020001020001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001588 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001589 val64 = 0x0200010200000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001590 writeq(val64, &bar0->rx_w_round_robin_4);
1591
1592 val64 = 0x8080804040402020ULL;
1593 writeq(val64, &bar0->rts_qos_steering);
1594 break;
1595 case 4:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001596 val64 = 0x0001020300010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001597 writeq(val64, &bar0->rx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001598 writeq(val64, &bar0->rx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001599 writeq(val64, &bar0->rx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001600 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001601 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001602 writeq(val64, &bar0->rx_w_round_robin_4);
1603
1604 val64 = 0x8080404020201010ULL;
1605 writeq(val64, &bar0->rts_qos_steering);
1606 break;
1607 case 5:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001608 val64 = 0x0001020304000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001609 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001610 val64 = 0x0304000102030400ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001611 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001612 val64 = 0x0102030400010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001613 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001614 val64 = 0x0400010203040001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001615 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001616 val64 = 0x0203040000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001617 writeq(val64, &bar0->rx_w_round_robin_4);
1618
1619 val64 = 0x8080404020201008ULL;
1620 writeq(val64, &bar0->rts_qos_steering);
1621 break;
1622 case 6:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001623 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001624 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001625 val64 = 0x0203040500010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001626 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001627 val64 = 0x0405000102030405ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001628 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001629 val64 = 0x0001020304050001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001630 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001631 val64 = 0x0203040500000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001632 writeq(val64, &bar0->rx_w_round_robin_4);
1633
1634 val64 = 0x8080404020100804ULL;
1635 writeq(val64, &bar0->rts_qos_steering);
1636 break;
1637 case 7:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001638 val64 = 0x0001020304050600ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001639 writeq(val64, &bar0->rx_w_round_robin_0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001640 val64 = 0x0102030405060001ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001641 writeq(val64, &bar0->rx_w_round_robin_1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001642 val64 = 0x0203040506000102ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001643 writeq(val64, &bar0->rx_w_round_robin_2);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001644 val64 = 0x0304050600010203ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001645 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001646 val64 = 0x0405060000000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001647 writeq(val64, &bar0->rx_w_round_robin_4);
1648
1649 val64 = 0x8080402010080402ULL;
1650 writeq(val64, &bar0->rts_qos_steering);
1651 break;
1652 case 8:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001653 val64 = 0x0001020304050607ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001654 writeq(val64, &bar0->rx_w_round_robin_0);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001655 writeq(val64, &bar0->rx_w_round_robin_1);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001656 writeq(val64, &bar0->rx_w_round_robin_2);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001657 writeq(val64, &bar0->rx_w_round_robin_3);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04001658 val64 = 0x0001020300000000ULL;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001659 writeq(val64, &bar0->rx_w_round_robin_4);
1660
1661 val64 = 0x8040201008040201ULL;
1662 writeq(val64, &bar0->rts_qos_steering);
1663 break;
1664 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001665
1666 /* UDP Fix */
1667 val64 = 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001668 for (i = 0; i < 8; i++)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001669 writeq(val64, &bar0->rts_frm_len_n[i]);
1670
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07001671 /* Set the default rts frame length for the rings configured */
1672 val64 = MAC_RTS_FRM_LEN_SET(dev->mtu+22);
1673 for (i = 0 ; i < config->rx_ring_num ; i++)
1674 writeq(val64, &bar0->rts_frm_len_n[i]);
1675
1676 /* Set the frame length for the configured rings
1677 * desired by the user
1678 */
1679 for (i = 0; i < config->rx_ring_num; i++) {
1680 /* If rts_frm_len[i] == 0 then it is assumed that user not
1681 * specified frame length steering.
1682 * If the user provides the frame length then program
1683 * the rts_frm_len register for those values or else
1684 * leave it as it is.
1685 */
1686 if (rts_frm_len[i] != 0) {
1687 writeq(MAC_RTS_FRM_LEN_SET(rts_frm_len[i]),
1688 &bar0->rts_frm_len_n[i]);
1689 }
1690 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001691
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05001692 /* Disable differentiated services steering logic */
1693 for (i = 0; i < 64; i++) {
1694 if (rts_ds_steer(nic, i, 0) == FAILURE) {
1695 DBG_PRINT(ERR_DBG, "%s: failed rts ds steering",
1696 dev->name);
1697 DBG_PRINT(ERR_DBG, "set on codepoint %d\n", i);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05001698 return -ENODEV;
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05001699 }
1700 }
1701
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001702 /* Program statistics memory */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001703 writeq(mac_control->stats_mem_phy, &bar0->stat_addr);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001704
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001705 if (nic->device_type == XFRAME_II_DEVICE) {
1706 val64 = STAT_BC(0x320);
1707 writeq(val64, &bar0->stat_byte_cnt);
1708 }
1709
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001710 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001711 * Initializing the sampling rate for the device to calculate the
1712 * bandwidth utilization.
1713 */
1714 val64 = MAC_TX_LINK_UTIL_VAL(tmac_util_period) |
1715 MAC_RX_LINK_UTIL_VAL(rmac_util_period);
1716 writeq(val64, &bar0->mac_link_util);
1717
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001718 /*
1719 * Initializing the Transmit and Receive Traffic Interrupt
Linus Torvalds1da177e2005-04-16 15:20:36 -07001720 * Scheme.
1721 */
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001722
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08001723 /* Initialize TTI */
1724 if (SUCCESS != init_tti(nic, nic->last_link_state))
1725 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001726
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001727 /* RTI Initialization */
1728 if (nic->device_type == XFRAME_II_DEVICE) {
1729 /*
1730 * Programmed to generate Apprx 500 Intrs per
1731 * second
1732 */
1733 int count = (nic->config.bus_speed * 125)/4;
1734 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(count);
1735 } else
1736 val64 = RTI_DATA1_MEM_RX_TIMER_VAL(0xFFF);
1737 val64 |= RTI_DATA1_MEM_RX_URNG_A(0xA) |
1738 RTI_DATA1_MEM_RX_URNG_B(0x10) |
1739 RTI_DATA1_MEM_RX_URNG_C(0x30) | RTI_DATA1_MEM_RX_TIMER_AC_EN;
1740
1741 writeq(val64, &bar0->rti_data1_mem);
1742
1743 val64 = RTI_DATA2_MEM_RX_UFC_A(0x1) |
1744 RTI_DATA2_MEM_RX_UFC_B(0x2) ;
1745 if (nic->config.intr_type == MSI_X)
1746 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x20) | \
1747 RTI_DATA2_MEM_RX_UFC_D(0x40));
1748 else
1749 val64 |= (RTI_DATA2_MEM_RX_UFC_C(0x40) | \
1750 RTI_DATA2_MEM_RX_UFC_D(0x80));
1751 writeq(val64, &bar0->rti_data2_mem);
1752
1753 for (i = 0; i < config->rx_ring_num; i++) {
1754 val64 = RTI_CMD_MEM_WE | RTI_CMD_MEM_STROBE_NEW_CMD
1755 | RTI_CMD_MEM_OFFSET(i);
1756 writeq(val64, &bar0->rti_command_mem);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001757
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001758 /*
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001759 * Once the operation completes, the Strobe bit of the
1760 * command register will be reset. We poll for this
1761 * particular condition. We wait for a maximum of 500ms
1762 * for the operation to complete, if it's not complete
1763 * by then we return error.
1764 */
1765 time = 0;
1766 while (TRUE) {
1767 val64 = readq(&bar0->rti_command_mem);
1768 if (!(val64 & RTI_CMD_MEM_STROBE_NEW_CMD))
1769 break;
1770
1771 if (time > 10) {
1772 DBG_PRINT(ERR_DBG, "%s: RTI init Failed\n",
1773 dev->name);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05001774 return -ENODEV;
raghavendra.koushik@neterion.comb6e3f982005-08-03 12:38:01 -07001775 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04001776 time++;
1777 msleep(50);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001778 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001779 }
1780
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001781 /*
1782 * Initializing proper values as Pause threshold into all
Linus Torvalds1da177e2005-04-16 15:20:36 -07001783 * the 8 Queues on Rx side.
1784 */
1785 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q0q3);
1786 writeq(0xffbbffbbffbbffbbULL, &bar0->mc_pause_thresh_q4q7);
1787
1788 /* Disable RMAC PAD STRIPPING */
viro@ftp.linux.org.uk509a2672005-09-05 03:25:58 +01001789 add = &bar0->mac_cfg;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001790 val64 = readq(&bar0->mac_cfg);
1791 val64 &= ~(MAC_CFG_RMAC_STRIP_PAD);
1792 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1793 writel((u32) (val64), add);
1794 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1795 writel((u32) (val64 >> 32), (add + 4));
1796 val64 = readq(&bar0->mac_cfg);
1797
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05001798 /* Enable FCS stripping by adapter */
1799 add = &bar0->mac_cfg;
1800 val64 = readq(&bar0->mac_cfg);
1801 val64 |= MAC_CFG_RMAC_STRIP_FCS;
1802 if (nic->device_type == XFRAME_II_DEVICE)
1803 writeq(val64, &bar0->mac_cfg);
1804 else {
1805 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1806 writel((u32) (val64), add);
1807 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
1808 writel((u32) (val64 >> 32), (add + 4));
1809 }
1810
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001811 /*
1812 * Set the time value to be inserted in the pause frame
Linus Torvalds1da177e2005-04-16 15:20:36 -07001813 * generated by xena.
1814 */
1815 val64 = readq(&bar0->rmac_pause_cfg);
1816 val64 &= ~(RMAC_PAUSE_HG_PTIME(0xffff));
1817 val64 |= RMAC_PAUSE_HG_PTIME(nic->mac_control.rmac_pause_time);
1818 writeq(val64, &bar0->rmac_pause_cfg);
1819
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001820 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001821 * Set the Threshold Limit for Generating the pause frame
1822 * If the amount of data in any Queue exceeds ratio of
1823 * (mac_control.mc_pause_threshold_q0q3 or q4q7)/256
1824 * pause frame is generated
1825 */
1826 val64 = 0;
1827 for (i = 0; i < 4; i++) {
1828 val64 |=
1829 (((u64) 0xFF00 | nic->mac_control.
1830 mc_pause_threshold_q0q3)
1831 << (i * 2 * 8));
1832 }
1833 writeq(val64, &bar0->mc_pause_thresh_q0q3);
1834
1835 val64 = 0;
1836 for (i = 0; i < 4; i++) {
1837 val64 |=
1838 (((u64) 0xFF00 | nic->mac_control.
1839 mc_pause_threshold_q4q7)
1840 << (i * 2 * 8));
1841 }
1842 writeq(val64, &bar0->mc_pause_thresh_q4q7);
1843
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07001844 /*
1845 * TxDMA will stop Read request if the number of read split has
Linus Torvalds1da177e2005-04-16 15:20:36 -07001846 * exceeded the limit pointed by shared_splits
1847 */
1848 val64 = readq(&bar0->pic_control);
1849 val64 |= PIC_CNTL_SHARED_SPLITS(shared_splits);
1850 writeq(val64, &bar0->pic_control);
1851
Ananda Raju863c11a2006-04-21 19:03:13 -04001852 if (nic->config.bus_speed == 266) {
1853 writeq(TXREQTO_VAL(0x7f) | TXREQTO_EN, &bar0->txreqtimeout);
1854 writeq(0x0, &bar0->read_retry_delay);
1855 writeq(0x0, &bar0->write_retry_delay);
1856 }
1857
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001858 /*
1859 * Programming the Herc to split every write transaction
1860 * that does not start on an ADB to reduce disconnects.
1861 */
1862 if (nic->device_type == XFRAME_II_DEVICE) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05001863 val64 = FAULT_BEHAVIOUR | EXT_REQ_EN |
1864 MISC_LINK_STABILITY_PRD(3);
Ananda Raju863c11a2006-04-21 19:03:13 -04001865 writeq(val64, &bar0->misc_control);
1866 val64 = readq(&bar0->pic_control2);
Jiri Slabyb7b5a122007-10-18 23:40:29 -07001867 val64 &= ~(s2BIT(13)|s2BIT(14)|s2BIT(15));
Ananda Raju863c11a2006-04-21 19:03:13 -04001868 writeq(val64, &bar0->pic_control2);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07001869 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04001870 if (strstr(nic->product_name, "CX4")) {
1871 val64 = TMAC_AVG_IPG(0x17);
1872 writeq(val64, &bar0->tmac_avg_ipg);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07001873 }
1874
Linus Torvalds1da177e2005-04-16 15:20:36 -07001875 return SUCCESS;
1876}
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07001877#define LINK_UP_DOWN_INTERRUPT 1
1878#define MAC_RMAC_ERR_TIMER 2
1879
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05001880static int s2io_link_fault_indication(struct s2io_nic *nic)
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07001881{
1882 if (nic->device_type == XFRAME_II_DEVICE)
1883 return LINK_UP_DOWN_INTERRUPT;
1884 else
1885 return MAC_RMAC_ERR_TIMER;
1886}
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07001887
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001888/**
1889 * do_s2io_write_bits - update alarm bits in alarm register
1890 * @value: alarm bits
1891 * @flag: interrupt status
1892 * @addr: address value
1893 * Description: update alarm bits in alarm register
1894 * Return Value:
1895 * NONE.
1896 */
1897static void do_s2io_write_bits(u64 value, int flag, void __iomem *addr)
1898{
1899 u64 temp64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001900
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001901 temp64 = readq(addr);
1902
1903 if(flag == ENABLE_INTRS)
1904 temp64 &= ~((u64) value);
1905 else
1906 temp64 |= ((u64) value);
1907 writeq(temp64, addr);
1908}
1909
Stephen Hemminger43b7c452007-10-05 12:39:21 -07001910static void en_dis_err_alarms(struct s2io_nic *nic, u16 mask, int flag)
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001911{
1912 struct XENA_dev_config __iomem *bar0 = nic->bar0;
1913 register u64 gen_int_mask = 0;
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04001914 u64 interruptible;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001915
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04001916 writeq(DISABLE_ALL_INTRS, &bar0->general_int_mask);
Sivakumar Subramani9caab452007-09-06 06:21:54 -04001917 if (mask & TX_DMA_INTR) {
1918
1919 gen_int_mask |= TXDMA_INT_M;
1920
1921 do_s2io_write_bits(TXDMA_TDA_INT | TXDMA_PFC_INT |
1922 TXDMA_PCC_INT | TXDMA_TTI_INT |
1923 TXDMA_LSO_INT | TXDMA_TPA_INT |
1924 TXDMA_SM_INT, flag, &bar0->txdma_int_mask);
1925
1926 do_s2io_write_bits(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM |
1927 PFC_MISC_0_ERR | PFC_MISC_1_ERR |
1928 PFC_PCIX_ERR | PFC_ECC_SG_ERR, flag,
1929 &bar0->pfc_err_mask);
1930
1931 do_s2io_write_bits(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
1932 TDA_SM1_ERR_ALARM | TDA_Fn_ECC_SG_ERR |
1933 TDA_PCIX_ERR, flag, &bar0->tda_err_mask);
1934
1935 do_s2io_write_bits(PCC_FB_ECC_DB_ERR | PCC_TXB_ECC_DB_ERR |
1936 PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM |
1937 PCC_N_SERR | PCC_6_COF_OV_ERR |
1938 PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR |
1939 PCC_7_LSO_OV_ERR | PCC_FB_ECC_SG_ERR |
1940 PCC_TXB_ECC_SG_ERR, flag, &bar0->pcc_err_mask);
1941
1942 do_s2io_write_bits(TTI_SM_ERR_ALARM | TTI_ECC_SG_ERR |
1943 TTI_ECC_DB_ERR, flag, &bar0->tti_err_mask);
1944
1945 do_s2io_write_bits(LSO6_ABORT | LSO7_ABORT |
1946 LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM |
1947 LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
1948 flag, &bar0->lso_err_mask);
1949
1950 do_s2io_write_bits(TPA_SM_ERR_ALARM | TPA_TX_FRM_DROP,
1951 flag, &bar0->tpa_err_mask);
1952
1953 do_s2io_write_bits(SM_SM_ERR_ALARM, flag, &bar0->sm_err_mask);
1954
1955 }
1956
1957 if (mask & TX_MAC_INTR) {
1958 gen_int_mask |= TXMAC_INT_M;
1959 do_s2io_write_bits(MAC_INT_STATUS_TMAC_INT, flag,
1960 &bar0->mac_int_mask);
1961 do_s2io_write_bits(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR |
1962 TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR |
1963 TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
1964 flag, &bar0->mac_tmac_err_mask);
1965 }
1966
1967 if (mask & TX_XGXS_INTR) {
1968 gen_int_mask |= TXXGXS_INT_M;
1969 do_s2io_write_bits(XGXS_INT_STATUS_TXGXS, flag,
1970 &bar0->xgxs_int_mask);
1971 do_s2io_write_bits(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR |
1972 TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
1973 flag, &bar0->xgxs_txgxs_err_mask);
1974 }
1975
1976 if (mask & RX_DMA_INTR) {
1977 gen_int_mask |= RXDMA_INT_M;
1978 do_s2io_write_bits(RXDMA_INT_RC_INT_M | RXDMA_INT_RPA_INT_M |
1979 RXDMA_INT_RDA_INT_M | RXDMA_INT_RTI_INT_M,
1980 flag, &bar0->rxdma_int_mask);
1981 do_s2io_write_bits(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR |
1982 RC_PRCn_SM_ERR_ALARM | RC_FTC_SM_ERR_ALARM |
1983 RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR |
1984 RC_RDA_FAIL_WR_Rn, flag, &bar0->rc_err_mask);
1985 do_s2io_write_bits(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn |
1986 PRC_PCI_AB_F_WR_Rn | PRC_PCI_DP_RD_Rn |
1987 PRC_PCI_DP_WR_Rn | PRC_PCI_DP_F_WR_Rn, flag,
1988 &bar0->prc_pcix_err_mask);
1989 do_s2io_write_bits(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR |
1990 RPA_ECC_SG_ERR | RPA_ECC_DB_ERR, flag,
1991 &bar0->rpa_err_mask);
1992 do_s2io_write_bits(RDA_RXDn_ECC_DB_ERR | RDA_FRM_ECC_DB_N_AERR |
1993 RDA_SM1_ERR_ALARM | RDA_SM0_ERR_ALARM |
1994 RDA_RXD_ECC_DB_SERR | RDA_RXDn_ECC_SG_ERR |
1995 RDA_FRM_ECC_SG_ERR | RDA_MISC_ERR|RDA_PCIX_ERR,
1996 flag, &bar0->rda_err_mask);
1997 do_s2io_write_bits(RTI_SM_ERR_ALARM |
1998 RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
1999 flag, &bar0->rti_err_mask);
2000 }
2001
2002 if (mask & RX_MAC_INTR) {
2003 gen_int_mask |= RXMAC_INT_M;
2004 do_s2io_write_bits(MAC_INT_STATUS_RMAC_INT, flag,
2005 &bar0->mac_int_mask);
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04002006 interruptible = RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR |
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002007 RMAC_UNUSED_INT | RMAC_SINGLE_ECC_ERR |
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04002008 RMAC_DOUBLE_ECC_ERR;
2009 if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER)
2010 interruptible |= RMAC_LINK_STATE_CHANGE_INT;
2011 do_s2io_write_bits(interruptible,
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002012 flag, &bar0->mac_rmac_err_mask);
2013 }
2014
2015 if (mask & RX_XGXS_INTR)
2016 {
2017 gen_int_mask |= RXXGXS_INT_M;
2018 do_s2io_write_bits(XGXS_INT_STATUS_RXGXS, flag,
2019 &bar0->xgxs_int_mask);
2020 do_s2io_write_bits(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR, flag,
2021 &bar0->xgxs_rxgxs_err_mask);
2022 }
2023
2024 if (mask & MC_INTR) {
2025 gen_int_mask |= MC_INT_M;
2026 do_s2io_write_bits(MC_INT_MASK_MC_INT, flag, &bar0->mc_int_mask);
2027 do_s2io_write_bits(MC_ERR_REG_SM_ERR | MC_ERR_REG_ECC_ALL_SNG |
2028 MC_ERR_REG_ECC_ALL_DBL | PLL_LOCK_N, flag,
2029 &bar0->mc_err_mask);
2030 }
2031 nic->general_int_mask = gen_int_mask;
2032
2033 /* Remove this line when alarm interrupts are enabled */
2034 nic->general_int_mask = 0;
2035}
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002036/**
2037 * en_dis_able_nic_intrs - Enable or Disable the interrupts
Linus Torvalds1da177e2005-04-16 15:20:36 -07002038 * @nic: device private variable,
2039 * @mask: A mask indicating which Intr block must be modified and,
2040 * @flag: A flag indicating whether to enable or disable the Intrs.
2041 * Description: This function will either disable or enable the interrupts
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002042 * depending on the flag argument. The mask argument can be used to
2043 * enable/disable any Intr block.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002044 * Return Value: NONE.
2045 */
2046
2047static void en_dis_able_nic_intrs(struct s2io_nic *nic, u16 mask, int flag)
2048{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002049 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002050 register u64 temp64 = 0, intr_mask = 0;
2051
2052 intr_mask = nic->general_int_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002053
2054 /* Top level interrupt classification */
2055 /* PIC Interrupts */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002056 if (mask & TX_PIC_INTR) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002057 /* Enable PIC Intrs in the general intr mask register */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002058 intr_mask |= TXPIC_INT_M;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002059 if (flag == ENABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002060 /*
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07002061 * If Hercules adapter enable GPIO otherwise
Ananda Rajub41477f2006-07-24 19:52:49 -04002062 * disable all PCIX, Flash, MDIO, IIC and GPIO
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002063 * interrupts for now.
2064 * TODO
Linus Torvalds1da177e2005-04-16 15:20:36 -07002065 */
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07002066 if (s2io_link_fault_indication(nic) ==
2067 LINK_UP_DOWN_INTERRUPT ) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002068 do_s2io_write_bits(PIC_INT_GPIO, flag,
2069 &bar0->pic_int_mask);
2070 do_s2io_write_bits(GPIO_INT_MASK_LINK_UP, flag,
2071 &bar0->gpio_int_mask);
2072 } else
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07002073 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002074 } else if (flag == DISABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002075 /*
2076 * Disable PIC Intrs in the general
2077 * intr mask register
Linus Torvalds1da177e2005-04-16 15:20:36 -07002078 */
2079 writeq(DISABLE_ALL_INTRS, &bar0->pic_int_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002080 }
2081 }
2082
Linus Torvalds1da177e2005-04-16 15:20:36 -07002083 /* Tx traffic interrupts */
2084 if (mask & TX_TRAFFIC_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002085 intr_mask |= TXTRAFFIC_INT_M;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002086 if (flag == ENABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002087 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002088 * Enable all the Tx side interrupts
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002089 * writing 0 Enables all 64 TX interrupt levels
Linus Torvalds1da177e2005-04-16 15:20:36 -07002090 */
2091 writeq(0x0, &bar0->tx_traffic_mask);
2092 } else if (flag == DISABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002093 /*
2094 * Disable Tx Traffic Intrs in the general intr mask
Linus Torvalds1da177e2005-04-16 15:20:36 -07002095 * register.
2096 */
2097 writeq(DISABLE_ALL_INTRS, &bar0->tx_traffic_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002098 }
2099 }
2100
2101 /* Rx traffic interrupts */
2102 if (mask & RX_TRAFFIC_INTR) {
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002103 intr_mask |= RXTRAFFIC_INT_M;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002104 if (flag == ENABLE_INTRS) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002105 /* writing 0 Enables all 8 RX interrupt levels */
2106 writeq(0x0, &bar0->rx_traffic_mask);
2107 } else if (flag == DISABLE_INTRS) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002108 /*
2109 * Disable Rx Traffic Intrs in the general intr mask
Linus Torvalds1da177e2005-04-16 15:20:36 -07002110 * register.
2111 */
2112 writeq(DISABLE_ALL_INTRS, &bar0->rx_traffic_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002113 }
2114 }
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002115
2116 temp64 = readq(&bar0->general_int_mask);
2117 if (flag == ENABLE_INTRS)
2118 temp64 &= ~((u64) intr_mask);
2119 else
2120 temp64 = DISABLE_ALL_INTRS;
2121 writeq(temp64, &bar0->general_int_mask);
2122
2123 nic->general_int_mask = readq(&bar0->general_int_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002124}
2125
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002126/**
2127 * verify_pcc_quiescent- Checks for PCC quiescent state
2128 * Return: 1 If PCC is quiescence
2129 * 0 If PCC is not quiescence
2130 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002131static int verify_pcc_quiescent(struct s2io_nic *sp, int flag)
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002132{
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002133 int ret = 0, herc;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002134 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002135 u64 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04002136
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002137 herc = (sp->device_type == XFRAME_II_DEVICE);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002138
2139 if (flag == FALSE) {
Auke Kok44c10132007-06-08 15:46:36 -07002140 if ((!herc && (sp->pdev->revision >= 4)) || herc) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002141 if (!(val64 & ADAPTER_STATUS_RMAC_PCC_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002142 ret = 1;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002143 } else {
2144 if (!(val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002145 ret = 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002146 }
2147 } else {
Auke Kok44c10132007-06-08 15:46:36 -07002148 if ((!herc && (sp->pdev->revision >= 4)) || herc) {
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002149 if (((val64 & ADAPTER_STATUS_RMAC_PCC_IDLE) ==
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002150 ADAPTER_STATUS_RMAC_PCC_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002151 ret = 1;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002152 } else {
2153 if (((val64 & ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE) ==
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002154 ADAPTER_STATUS_RMAC_PCC_FOUR_IDLE))
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002155 ret = 1;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002156 }
2157 }
2158
2159 return ret;
2160}
2161/**
2162 * verify_xena_quiescence - Checks whether the H/W is ready
Linus Torvalds1da177e2005-04-16 15:20:36 -07002163 * Description: Returns whether the H/W is ready to go or not. Depending
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002164 * on whether adapter enable bit was written or not the comparison
Linus Torvalds1da177e2005-04-16 15:20:36 -07002165 * differs and the calling function passes the input argument flag to
2166 * indicate this.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002167 * Return: 1 If xena is quiescence
Linus Torvalds1da177e2005-04-16 15:20:36 -07002168 * 0 If Xena is not quiescence
2169 */
2170
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002171static int verify_xena_quiescence(struct s2io_nic *sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002172{
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002173 int mode;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002174 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002175 u64 val64 = readq(&bar0->adapter_status);
2176 mode = s2io_verify_pci_mode(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002177
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002178 if (!(val64 & ADAPTER_STATUS_TDMA_READY)) {
2179 DBG_PRINT(ERR_DBG, "%s", "TDMA is not ready!");
2180 return 0;
2181 }
2182 if (!(val64 & ADAPTER_STATUS_RDMA_READY)) {
2183 DBG_PRINT(ERR_DBG, "%s", "RDMA is not ready!");
2184 return 0;
2185 }
2186 if (!(val64 & ADAPTER_STATUS_PFC_READY)) {
2187 DBG_PRINT(ERR_DBG, "%s", "PFC is not ready!");
2188 return 0;
2189 }
2190 if (!(val64 & ADAPTER_STATUS_TMAC_BUF_EMPTY)) {
2191 DBG_PRINT(ERR_DBG, "%s", "TMAC BUF is not empty!");
2192 return 0;
2193 }
2194 if (!(val64 & ADAPTER_STATUS_PIC_QUIESCENT)) {
2195 DBG_PRINT(ERR_DBG, "%s", "PIC is not QUIESCENT!");
2196 return 0;
2197 }
2198 if (!(val64 & ADAPTER_STATUS_MC_DRAM_READY)) {
2199 DBG_PRINT(ERR_DBG, "%s", "MC_DRAM is not ready!");
2200 return 0;
2201 }
2202 if (!(val64 & ADAPTER_STATUS_MC_QUEUES_READY)) {
2203 DBG_PRINT(ERR_DBG, "%s", "MC_QUEUES is not ready!");
2204 return 0;
2205 }
2206 if (!(val64 & ADAPTER_STATUS_M_PLL_LOCK)) {
2207 DBG_PRINT(ERR_DBG, "%s", "M_PLL is not locked!");
2208 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002209 }
2210
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002211 /*
2212 * In PCI 33 mode, the P_PLL is not used, and therefore,
2213 * the the P_PLL_LOCK bit in the adapter_status register will
2214 * not be asserted.
2215 */
2216 if (!(val64 & ADAPTER_STATUS_P_PLL_LOCK) &&
2217 sp->device_type == XFRAME_II_DEVICE && mode !=
2218 PCI_MODE_PCI_33) {
2219 DBG_PRINT(ERR_DBG, "%s", "P_PLL is not locked!");
2220 return 0;
2221 }
2222 if (!((val64 & ADAPTER_STATUS_RC_PRC_QUIESCENT) ==
2223 ADAPTER_STATUS_RC_PRC_QUIESCENT)) {
2224 DBG_PRINT(ERR_DBG, "%s", "RC_PRC is not QUIESCENT!");
2225 return 0;
2226 }
2227 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002228}
2229
2230/**
2231 * fix_mac_address - Fix for Mac addr problem on Alpha platforms
2232 * @sp: Pointer to device specifc structure
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002233 * Description :
Linus Torvalds1da177e2005-04-16 15:20:36 -07002234 * New procedure to clear mac address reading problems on Alpha platforms
2235 *
2236 */
2237
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002238static void fix_mac_address(struct s2io_nic * sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002239{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002240 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002241 u64 val64;
2242 int i = 0;
2243
2244 while (fix_mac[i] != END_SIGN) {
2245 writeq(fix_mac[i++], &bar0->gpio_control);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002246 udelay(10);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002247 val64 = readq(&bar0->gpio_control);
2248 }
2249}
2250
2251/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002252 * start_nic - Turns the device on
Linus Torvalds1da177e2005-04-16 15:20:36 -07002253 * @nic : device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002254 * Description:
2255 * This function actually turns the device on. Before this function is
2256 * called,all Registers are configured from their reset states
2257 * and shared memory is allocated but the NIC is still quiescent. On
Linus Torvalds1da177e2005-04-16 15:20:36 -07002258 * calling this function, the device interrupts are cleared and the NIC is
2259 * literally switched on by writing into the adapter control register.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002260 * Return Value:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002261 * SUCCESS on success and -1 on failure.
2262 */
2263
2264static int start_nic(struct s2io_nic *nic)
2265{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002266 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002267 struct net_device *dev = nic->dev;
2268 register u64 val64 = 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002269 u16 subid, i;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002270 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002271 struct config_param *config;
2272
2273 mac_control = &nic->mac_control;
2274 config = &nic->config;
2275
2276 /* PRC Initialization and configuration */
2277 for (i = 0; i < config->rx_ring_num; i++) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002278 writeq((u64) mac_control->rings[i].rx_blocks[0].block_dma_addr,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002279 &bar0->prc_rxd0_n[i]);
2280
2281 val64 = readq(&bar0->prc_ctrl_n[i]);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002282 if (nic->rxd_mode == RXD_MODE_1)
2283 val64 |= PRC_CTRL_RC_ENABLED;
2284 else
2285 val64 |= PRC_CTRL_RC_ENABLED | PRC_CTRL_RING_MODE_3;
Ananda Raju863c11a2006-04-21 19:03:13 -04002286 if (nic->device_type == XFRAME_II_DEVICE)
2287 val64 |= PRC_CTRL_GROUP_READS;
2288 val64 &= ~PRC_CTRL_RXD_BACKOFF_INTERVAL(0xFFFFFF);
2289 val64 |= PRC_CTRL_RXD_BACKOFF_INTERVAL(0x1000);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002290 writeq(val64, &bar0->prc_ctrl_n[i]);
2291 }
2292
Ananda Rajuda6971d2005-10-31 16:55:31 -05002293 if (nic->rxd_mode == RXD_MODE_3B) {
2294 /* Enabling 2 buffer mode by writing into Rx_pa_cfg reg. */
2295 val64 = readq(&bar0->rx_pa_cfg);
2296 val64 |= RX_PA_CFG_IGNORE_L2_ERR;
2297 writeq(val64, &bar0->rx_pa_cfg);
2298 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002299
Sivakumar Subramani926930b2007-02-24 01:59:39 -05002300 if (vlan_tag_strip == 0) {
2301 val64 = readq(&bar0->rx_pa_cfg);
2302 val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
2303 writeq(val64, &bar0->rx_pa_cfg);
Breno Leitaocd0fce02008-09-04 17:52:54 -03002304 nic->vlan_strip_flag = 0;
Sivakumar Subramani926930b2007-02-24 01:59:39 -05002305 }
2306
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002307 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002308 * Enabling MC-RLDRAM. After enabling the device, we timeout
2309 * for around 100ms, which is approximately the time required
2310 * for the device to be ready for operation.
2311 */
2312 val64 = readq(&bar0->mc_rldram_mrs);
2313 val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE | MC_RLDRAM_MRS_ENABLE;
2314 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
2315 val64 = readq(&bar0->mc_rldram_mrs);
2316
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002317 msleep(100); /* Delay by around 100 ms. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002318
2319 /* Enabling ECC Protection. */
2320 val64 = readq(&bar0->adapter_control);
2321 val64 &= ~ADAPTER_ECC_EN;
2322 writeq(val64, &bar0->adapter_control);
2323
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002324 /*
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002325 * Verify if the device is ready to be enabled, if so enable
Linus Torvalds1da177e2005-04-16 15:20:36 -07002326 * it.
2327 */
2328 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05002329 if (!verify_xena_quiescence(nic)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002330 DBG_PRINT(ERR_DBG, "%s: device is not ready, ", dev->name);
2331 DBG_PRINT(ERR_DBG, "Adapter status reads: 0x%llx\n",
2332 (unsigned long long) val64);
2333 return FAILURE;
2334 }
2335
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002336 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002337 * With some switches, link might be already up at this point.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002338 * Because of this weird behavior, when we enable laser,
2339 * we may not get link. We need to handle this. We cannot
2340 * figure out which switch is misbehaving. So we are forced to
2341 * make a global change.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002342 */
2343
2344 /* Enabling Laser. */
2345 val64 = readq(&bar0->adapter_control);
2346 val64 |= ADAPTER_EOI_TX_ON;
2347 writeq(val64, &bar0->adapter_control);
2348
Ananda Rajuc92ca042006-04-21 19:18:03 -04002349 if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
2350 /*
2351 * Dont see link state interrupts initally on some switches,
2352 * so directly scheduling the link state task here.
2353 */
2354 schedule_work(&nic->set_link_task);
2355 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002356 /* SXE-002: Initialize link and activity LED */
2357 subid = nic->pdev->subsystem_device;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07002358 if (((subid & 0xFF) >= 0x07) &&
2359 (nic->device_type == XFRAME_I_DEVICE)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002360 val64 = readq(&bar0->gpio_control);
2361 val64 |= 0x0000800000000000ULL;
2362 writeq(val64, &bar0->gpio_control);
2363 val64 = 0x0411040400000000ULL;
viro@ftp.linux.org.uk509a2672005-09-05 03:25:58 +01002364 writeq(val64, (void __iomem *)bar0 + 0x2700);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002365 }
2366
Linus Torvalds1da177e2005-04-16 15:20:36 -07002367 return SUCCESS;
2368}
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002369/**
2370 * s2io_txdl_getskb - Get the skb from txdl, unmap and return skb
2371 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002372static struct sk_buff *s2io_txdl_getskb(struct fifo_info *fifo_data, struct \
2373 TxD *txdlp, int get_off)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002374{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002375 struct s2io_nic *nic = fifo_data->nic;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002376 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002377 struct TxD *txds;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002378 u16 j, frg_cnt;
2379
2380 txds = txdlp;
Surjit Reang2fda0962008-01-24 02:08:59 -08002381 if (txds->Host_Control == (u64)(long)fifo_data->ufo_in_band_v) {
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002382 pci_unmap_single(nic->pdev, (dma_addr_t)
2383 txds->Buffer_Pointer, sizeof(u64),
2384 PCI_DMA_TODEVICE);
2385 txds++;
2386 }
2387
2388 skb = (struct sk_buff *) ((unsigned long)
2389 txds->Host_Control);
2390 if (!skb) {
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002391 memset(txdlp, 0, (sizeof(struct TxD) * fifo_data->max_txds));
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002392 return NULL;
2393 }
2394 pci_unmap_single(nic->pdev, (dma_addr_t)
2395 txds->Buffer_Pointer,
2396 skb->len - skb->data_len,
2397 PCI_DMA_TODEVICE);
2398 frg_cnt = skb_shinfo(skb)->nr_frags;
2399 if (frg_cnt) {
2400 txds++;
2401 for (j = 0; j < frg_cnt; j++, txds++) {
2402 skb_frag_t *frag = &skb_shinfo(skb)->frags[j];
2403 if (!txds->Buffer_Pointer)
2404 break;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002405 pci_unmap_page(nic->pdev, (dma_addr_t)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002406 txds->Buffer_Pointer,
2407 frag->size, PCI_DMA_TODEVICE);
2408 }
2409 }
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002410 memset(txdlp,0, (sizeof(struct TxD) * fifo_data->max_txds));
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002411 return(skb);
2412}
Linus Torvalds1da177e2005-04-16 15:20:36 -07002413
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002414/**
2415 * free_tx_buffers - Free all queued Tx buffers
Linus Torvalds1da177e2005-04-16 15:20:36 -07002416 * @nic : device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002417 * Description:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002418 * Free all queued Tx buffers.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002419 * Return Value: void
Linus Torvalds1da177e2005-04-16 15:20:36 -07002420*/
2421
2422static void free_tx_buffers(struct s2io_nic *nic)
2423{
2424 struct net_device *dev = nic->dev;
2425 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002426 struct TxD *txdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002427 int i, j;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002428 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002429 struct config_param *config;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002430 int cnt = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002431
2432 mac_control = &nic->mac_control;
2433 config = &nic->config;
2434
2435 for (i = 0; i < config->tx_fifo_num; i++) {
Surjit Reang2fda0962008-01-24 02:08:59 -08002436 unsigned long flags;
2437 spin_lock_irqsave(&mac_control->fifos[i].tx_lock, flags);
Sreenivasa Honnurb35b3b42008-04-23 13:28:08 -04002438 for (j = 0; j < config->tx_cfg[i].fifo_len; j++) {
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04002439 txdp = (struct TxD *) \
2440 mac_control->fifos[i].list_info[j].list_virt_addr;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002441 skb = s2io_txdl_getskb(&mac_control->fifos[i], txdp, j);
2442 if (skb) {
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04002443 nic->mac_control.stats_info->sw_stat.mem_freed
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04002444 += skb->truesize;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05002445 dev_kfree_skb(skb);
2446 cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002447 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07002448 }
2449 DBG_PRINT(INTR_DBG,
2450 "%s:forcibly freeing %d skbs on FIFO%d\n",
2451 dev->name, cnt, i);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002452 mac_control->fifos[i].tx_curr_get_info.offset = 0;
2453 mac_control->fifos[i].tx_curr_put_info.offset = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08002454 spin_unlock_irqrestore(&mac_control->fifos[i].tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002455 }
2456}
2457
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002458/**
2459 * stop_nic - To stop the nic
Linus Torvalds1da177e2005-04-16 15:20:36 -07002460 * @nic ; device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002461 * Description:
2462 * This function does exactly the opposite of what the start_nic()
Linus Torvalds1da177e2005-04-16 15:20:36 -07002463 * function does. This function is called to stop the device.
2464 * Return Value:
2465 * void.
2466 */
2467
2468static void stop_nic(struct s2io_nic *nic)
2469{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002470 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002471 register u64 val64 = 0;
Ananda Raju5d3213c2006-04-21 19:23:26 -04002472 u16 interruptible;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002473 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002474 struct config_param *config;
2475
2476 mac_control = &nic->mac_control;
2477 config = &nic->config;
2478
2479 /* Disable all interrupts */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002480 en_dis_err_alarms(nic, ENA_ALL_INTRS, DISABLE_INTRS);
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -07002481 interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04002482 interruptible |= TX_PIC_INTR;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002483 en_dis_able_nic_intrs(nic, interruptible, DISABLE_INTRS);
2484
Ananda Raju5d3213c2006-04-21 19:23:26 -04002485 /* Clearing Adapter_En bit of ADAPTER_CONTROL Register */
2486 val64 = readq(&bar0->adapter_control);
2487 val64 &= ~(ADAPTER_CNTL_EN);
2488 writeq(val64, &bar0->adapter_control);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002489}
2490
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002491/**
2492 * fill_rx_buffers - Allocates the Rx side skbs
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002493 * @ring_info: per ring structure
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002494 * @from_card_up: If this is true, we will map the buffer to get
2495 * the dma address for buf0 and buf1 to give it to the card.
2496 * Else we will sync the already mapped buffer to give it to the card.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002497 * Description:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002498 * The function allocates Rx side skbs and puts the physical
2499 * address of these buffers into the RxD buffer pointers, so that the NIC
2500 * can DMA the received frame into these locations.
2501 * The NIC supports 3 receive modes, viz
2502 * 1. single buffer,
2503 * 2. three buffer and
2504 * 3. Five buffer modes.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002505 * Each mode defines how many fragments the received frame will be split
2506 * up into by the NIC. The frame is split into L3 header, L4 Header,
Linus Torvalds1da177e2005-04-16 15:20:36 -07002507 * L4 payload in three buffer mode and in 5 buffer mode, L4 payload itself
2508 * is split into 3 fragments. As of now only single buffer mode is
2509 * supported.
2510 * Return Value:
2511 * SUCCESS on success or an appropriate -ve value on failure.
2512 */
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002513static int fill_rx_buffers(struct s2io_nic *nic, struct ring_info *ring,
2514 int from_card_up)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002515{
Linus Torvalds1da177e2005-04-16 15:20:36 -07002516 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002517 struct RxD_t *rxdp;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002518 int off, size, block_no, block_no1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002519 u32 alloc_tab = 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002520 u32 alloc_cnt;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002521 u64 tmp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002522 struct buffAdd *ba;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002523 struct RxD_t *first_rxdp = NULL;
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08002524 u64 Buffer0_ptr = 0, Buffer1_ptr = 0;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002525 int rxd_index = 0;
Veena Parat6d517a22007-07-23 02:20:51 -04002526 struct RxD1 *rxdp1;
2527 struct RxD3 *rxdp3;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002528 struct swStat *stats = &ring->nic->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002529
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002530 alloc_cnt = ring->pkt_cnt - ring->rx_bufs_left;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002531
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002532 block_no1 = ring->rx_curr_get_info.block_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002533 while (alloc_tab < alloc_cnt) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002534 block_no = ring->rx_curr_put_info.block_index;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002535
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002536 off = ring->rx_curr_put_info.offset;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002537
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002538 rxdp = ring->rx_blocks[block_no].rxds[off].virt_addr;
2539
2540 rxd_index = off + 1;
2541 if (block_no)
2542 rxd_index += (block_no * ring->rxd_count);
2543
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04002544 if ((block_no == block_no1) &&
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002545 (off == ring->rx_curr_get_info.offset) &&
2546 (rxdp->Host_Control)) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002547 DBG_PRINT(INTR_DBG, "%s: Get and Put",
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002548 ring->dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002549 DBG_PRINT(INTR_DBG, " info equated\n");
2550 goto end;
2551 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002552 if (off && (off == ring->rxd_count)) {
2553 ring->rx_curr_put_info.block_index++;
2554 if (ring->rx_curr_put_info.block_index ==
2555 ring->block_count)
2556 ring->rx_curr_put_info.block_index = 0;
2557 block_no = ring->rx_curr_put_info.block_index;
2558 off = 0;
2559 ring->rx_curr_put_info.offset = off;
2560 rxdp = ring->rx_blocks[block_no].block_virt_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002561 DBG_PRINT(INTR_DBG, "%s: Next block at: %p\n",
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002562 ring->dev->name, rxdp);
2563
Linus Torvalds1da177e2005-04-16 15:20:36 -07002564 }
Sreenivasa Honnurc9fcbf42008-04-23 13:31:33 -04002565
Ananda Rajuda6971d2005-10-31 16:55:31 -05002566 if ((rxdp->Control_1 & RXD_OWN_XENA) &&
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002567 ((ring->rxd_mode == RXD_MODE_3B) &&
Jiri Slabyb7b5a122007-10-18 23:40:29 -07002568 (rxdp->Control_2 & s2BIT(0)))) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002569 ring->rx_curr_put_info.offset = off;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002570 goto end;
2571 }
Ananda Rajuda6971d2005-10-31 16:55:31 -05002572 /* calculate size of skb based on ring mode */
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002573 size = ring->mtu + HEADER_ETHERNET_II_802_3_SIZE +
Ananda Rajuda6971d2005-10-31 16:55:31 -05002574 HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002575 if (ring->rxd_mode == RXD_MODE_1)
Ananda Rajuda6971d2005-10-31 16:55:31 -05002576 size += NET_IP_ALIGN;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002577 else
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002578 size = ring->mtu + ALIGN_SIZE + BUF0_LEN + 4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002579
Ananda Rajuda6971d2005-10-31 16:55:31 -05002580 /* allocate skb */
2581 skb = dev_alloc_skb(size);
2582 if(!skb) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002583 DBG_PRINT(INFO_DBG, "%s: Out of ", ring->dev->name);
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -08002584 DBG_PRINT(INFO_DBG, "memory to allocate SKBs\n");
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002585 if (first_rxdp) {
2586 wmb();
2587 first_rxdp->Control_1 |= RXD_OWN_XENA;
2588 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002589 stats->mem_alloc_fail_cnt++;
Jeff Garzik7d2e3cb2008-05-13 01:41:58 -04002590
Ananda Rajuda6971d2005-10-31 16:55:31 -05002591 return -ENOMEM ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002592 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002593 stats->mem_allocated += skb->truesize;
2594
2595 if (ring->rxd_mode == RXD_MODE_1) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002596 /* 1 buffer mode - normal operation mode */
Veena Parat6d517a22007-07-23 02:20:51 -04002597 rxdp1 = (struct RxD1*)rxdp;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002598 memset(rxdp, 0, sizeof(struct RxD1));
Ananda Rajuda6971d2005-10-31 16:55:31 -05002599 skb_reserve(skb, NET_IP_ALIGN);
Veena Parat6d517a22007-07-23 02:20:51 -04002600 rxdp1->Buffer0_ptr = pci_map_single
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002601 (ring->pdev, skb->data, size - NET_IP_ALIGN,
Ananda Raju863c11a2006-04-21 19:03:13 -04002602 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002603 if (pci_dma_mapping_error(nic->pdev,
2604 rxdp1->Buffer0_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04002605 goto pci_map_failed;
2606
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04002607 rxdp->Control_2 =
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04002608 SET_BUFFER0_SIZE_1(size - NET_IP_ALIGN);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002609 rxdp->Host_Control = (unsigned long) (skb);
2610 } else if (ring->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002611 /*
Veena Parat6d517a22007-07-23 02:20:51 -04002612 * 2 buffer mode -
2613 * 2 buffer mode provides 128
Ananda Rajuda6971d2005-10-31 16:55:31 -05002614 * byte aligned receive buffers.
Ananda Rajuda6971d2005-10-31 16:55:31 -05002615 */
2616
Veena Parat6d517a22007-07-23 02:20:51 -04002617 rxdp3 = (struct RxD3*)rxdp;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04002618 /* save buffer pointers to avoid frequent dma mapping */
Veena Parat6d517a22007-07-23 02:20:51 -04002619 Buffer0_ptr = rxdp3->Buffer0_ptr;
2620 Buffer1_ptr = rxdp3->Buffer1_ptr;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002621 memset(rxdp, 0, sizeof(struct RxD3));
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08002622 /* restore the buffer pointers for dma sync*/
Veena Parat6d517a22007-07-23 02:20:51 -04002623 rxdp3->Buffer0_ptr = Buffer0_ptr;
2624 rxdp3->Buffer1_ptr = Buffer1_ptr;
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08002625
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002626 ba = &ring->ba[block_no][off];
Ananda Rajuda6971d2005-10-31 16:55:31 -05002627 skb_reserve(skb, BUF0_LEN);
2628 tmp = (u64)(unsigned long) skb->data;
2629 tmp += ALIGN_SIZE;
2630 tmp &= ~ALIGN_SIZE;
2631 skb->data = (void *) (unsigned long)tmp;
Arnaldo Carvalho de Melo27a884d2007-04-19 20:29:13 -07002632 skb_reset_tail_pointer(skb);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002633
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002634 if (from_card_up) {
Veena Parat6d517a22007-07-23 02:20:51 -04002635 rxdp3->Buffer0_ptr =
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002636 pci_map_single(ring->pdev, ba->ba_0,
2637 BUF0_LEN, PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002638 if (pci_dma_mapping_error(nic->pdev,
2639 rxdp3->Buffer0_ptr))
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002640 goto pci_map_failed;
2641 } else
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002642 pci_dma_sync_single_for_device(ring->pdev,
Veena Parat6d517a22007-07-23 02:20:51 -04002643 (dma_addr_t) rxdp3->Buffer0_ptr,
Ananda Raju75c30b12006-07-24 19:55:09 -04002644 BUF0_LEN, PCI_DMA_FROMDEVICE);
Veena Parat491abf22007-07-23 02:37:14 -04002645
Ananda Rajuda6971d2005-10-31 16:55:31 -05002646 rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002647 if (ring->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002648 /* Two buffer mode */
2649
2650 /*
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002651 * Buffer2 will have L3/L4 header plus
Ananda Rajuda6971d2005-10-31 16:55:31 -05002652 * L4 payload
2653 */
Veena Parat6d517a22007-07-23 02:20:51 -04002654 rxdp3->Buffer2_ptr = pci_map_single
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002655 (ring->pdev, skb->data, ring->mtu + 4,
Ananda Rajuda6971d2005-10-31 16:55:31 -05002656 PCI_DMA_FROMDEVICE);
2657
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002658 if (pci_dma_mapping_error(nic->pdev,
2659 rxdp3->Buffer2_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04002660 goto pci_map_failed;
2661
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002662 if (from_card_up) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002663 rxdp3->Buffer1_ptr =
2664 pci_map_single(ring->pdev,
Ananda Raju75c30b12006-07-24 19:55:09 -04002665 ba->ba_1, BUF1_LEN,
2666 PCI_DMA_FROMDEVICE);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002667
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002668 if (pci_dma_mapping_error(nic->pdev,
2669 rxdp3->Buffer1_ptr)) {
Sreenivasa Honnur3f78d882008-07-09 23:47:46 -04002670 pci_unmap_single
2671 (ring->pdev,
2672 (dma_addr_t)(unsigned long)
2673 skb->data,
2674 ring->mtu + 4,
2675 PCI_DMA_FROMDEVICE);
2676 goto pci_map_failed;
2677 }
Ananda Raju75c30b12006-07-24 19:55:09 -04002678 }
Ananda Rajuda6971d2005-10-31 16:55:31 -05002679 rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
2680 rxdp->Control_2 |= SET_BUFFER2_SIZE_3
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002681 (ring->mtu + 4);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002682 }
Jiri Slabyb7b5a122007-10-18 23:40:29 -07002683 rxdp->Control_2 |= s2BIT(0);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002684 rxdp->Host_Control = (unsigned long) (skb);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002685 }
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002686 if (alloc_tab & ((1 << rxsync_frequency) - 1))
2687 rxdp->Control_1 |= RXD_OWN_XENA;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002688 off++;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002689 if (off == (ring->rxd_count + 1))
Ananda Rajuda6971d2005-10-31 16:55:31 -05002690 off = 0;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002691 ring->rx_curr_put_info.offset = off;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002692
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07002693 rxdp->Control_2 |= SET_RXD_MARKER;
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002694 if (!(alloc_tab & ((1 << rxsync_frequency) - 1))) {
2695 if (first_rxdp) {
2696 wmb();
2697 first_rxdp->Control_1 |= RXD_OWN_XENA;
2698 }
2699 first_rxdp = rxdp;
2700 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002701 ring->rx_bufs_left += 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002702 alloc_tab++;
2703 }
2704
2705 end:
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07002706 /* Transfer ownership of first descriptor to adapter just before
2707 * exiting. Before that, use memory barrier so that ownership
2708 * and other fields are seen by adapter correctly.
2709 */
2710 if (first_rxdp) {
2711 wmb();
2712 first_rxdp->Control_1 |= RXD_OWN_XENA;
2713 }
2714
Linus Torvalds1da177e2005-04-16 15:20:36 -07002715 return SUCCESS;
Veena Parat491abf22007-07-23 02:37:14 -04002716pci_map_failed:
2717 stats->pci_map_fail_cnt++;
2718 stats->mem_freed += skb->truesize;
2719 dev_kfree_skb_irq(skb);
2720 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002721}
2722
Ananda Rajuda6971d2005-10-31 16:55:31 -05002723static void free_rxd_blk(struct s2io_nic *sp, int ring_no, int blk)
2724{
2725 struct net_device *dev = sp->dev;
2726 int j;
2727 struct sk_buff *skb;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002728 struct RxD_t *rxdp;
2729 struct mac_info *mac_control;
2730 struct buffAdd *ba;
Veena Parat6d517a22007-07-23 02:20:51 -04002731 struct RxD1 *rxdp1;
2732 struct RxD3 *rxdp3;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002733
2734 mac_control = &sp->mac_control;
2735 for (j = 0 ; j < rxd_count[sp->rxd_mode]; j++) {
2736 rxdp = mac_control->rings[ring_no].
2737 rx_blocks[blk].rxds[j].virt_addr;
2738 skb = (struct sk_buff *)
2739 ((unsigned long) rxdp->Host_Control);
2740 if (!skb) {
2741 continue;
2742 }
2743 if (sp->rxd_mode == RXD_MODE_1) {
Veena Parat6d517a22007-07-23 02:20:51 -04002744 rxdp1 = (struct RxD1*)rxdp;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002745 pci_unmap_single(sp->pdev, (dma_addr_t)
Veena Parat6d517a22007-07-23 02:20:51 -04002746 rxdp1->Buffer0_ptr,
2747 dev->mtu +
2748 HEADER_ETHERNET_II_802_3_SIZE
2749 + HEADER_802_2_SIZE +
2750 HEADER_SNAP_SIZE,
2751 PCI_DMA_FROMDEVICE);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002752 memset(rxdp, 0, sizeof(struct RxD1));
Ananda Rajuda6971d2005-10-31 16:55:31 -05002753 } else if(sp->rxd_mode == RXD_MODE_3B) {
Veena Parat6d517a22007-07-23 02:20:51 -04002754 rxdp3 = (struct RxD3*)rxdp;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002755 ba = &mac_control->rings[ring_no].
2756 ba[blk][j];
2757 pci_unmap_single(sp->pdev, (dma_addr_t)
Veena Parat6d517a22007-07-23 02:20:51 -04002758 rxdp3->Buffer0_ptr,
2759 BUF0_LEN,
Ananda Rajuda6971d2005-10-31 16:55:31 -05002760 PCI_DMA_FROMDEVICE);
2761 pci_unmap_single(sp->pdev, (dma_addr_t)
Veena Parat6d517a22007-07-23 02:20:51 -04002762 rxdp3->Buffer1_ptr,
2763 BUF1_LEN,
Ananda Rajuda6971d2005-10-31 16:55:31 -05002764 PCI_DMA_FROMDEVICE);
2765 pci_unmap_single(sp->pdev, (dma_addr_t)
Veena Parat6d517a22007-07-23 02:20:51 -04002766 rxdp3->Buffer2_ptr,
2767 dev->mtu + 4,
Ananda Rajuda6971d2005-10-31 16:55:31 -05002768 PCI_DMA_FROMDEVICE);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002769 memset(rxdp, 0, sizeof(struct RxD3));
Ananda Rajuda6971d2005-10-31 16:55:31 -05002770 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04002771 sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002772 dev_kfree_skb(skb);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002773 mac_control->rings[ring_no].rx_bufs_left -= 1;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002774 }
2775}
2776
Linus Torvalds1da177e2005-04-16 15:20:36 -07002777/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002778 * free_rx_buffers - Frees all Rx buffers
Linus Torvalds1da177e2005-04-16 15:20:36 -07002779 * @sp: device private variable.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002780 * Description:
Linus Torvalds1da177e2005-04-16 15:20:36 -07002781 * This function will free all Rx buffers allocated by host.
2782 * Return Value:
2783 * NONE.
2784 */
2785
2786static void free_rx_buffers(struct s2io_nic *sp)
2787{
2788 struct net_device *dev = sp->dev;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002789 int i, blk = 0, buf_cnt = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002790 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002791 struct config_param *config;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002792
2793 mac_control = &sp->mac_control;
2794 config = &sp->config;
2795
2796 for (i = 0; i < config->rx_ring_num; i++) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05002797 for (blk = 0; blk < rx_ring_sz[i]; blk++)
2798 free_rxd_blk(sp,i,blk);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002799
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002800 mac_control->rings[i].rx_curr_put_info.block_index = 0;
2801 mac_control->rings[i].rx_curr_get_info.block_index = 0;
2802 mac_control->rings[i].rx_curr_put_info.offset = 0;
2803 mac_control->rings[i].rx_curr_get_info.offset = 0;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002804 mac_control->rings[i].rx_bufs_left = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002805 DBG_PRINT(INIT_DBG, "%s:Freed 0x%x Rx Buffers on ring%d\n",
2806 dev->name, buf_cnt, i);
2807 }
2808}
2809
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002810static int s2io_chk_rx_buffers(struct s2io_nic *nic, struct ring_info *ring)
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002811{
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002812 if (fill_rx_buffers(nic, ring, 0) == -ENOMEM) {
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002813 DBG_PRINT(INFO_DBG, "%s:Out of memory", ring->dev->name);
2814 DBG_PRINT(INFO_DBG, " in Rx Intr!!\n");
2815 }
2816 return 0;
2817}
2818
Linus Torvalds1da177e2005-04-16 15:20:36 -07002819/**
2820 * s2io_poll - Rx interrupt handler for NAPI support
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002821 * @napi : pointer to the napi structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002822 * @budget : The number of packets that were budgeted to be processed
Linus Torvalds1da177e2005-04-16 15:20:36 -07002823 * during one pass through the 'Poll" function.
2824 * Description:
2825 * Comes into picture only if NAPI support has been incorporated. It does
2826 * the same thing that rx_intr_handler does, but not in a interrupt context
2827 * also It will process only a given number of packets.
2828 * Return value:
2829 * 0 on success and 1 if there are No Rx packets to be processed.
2830 */
2831
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002832static int s2io_poll_msix(struct napi_struct *napi, int budget)
2833{
2834 struct ring_info *ring = container_of(napi, struct ring_info, napi);
2835 struct net_device *dev = ring->dev;
2836 struct config_param *config;
2837 struct mac_info *mac_control;
2838 int pkts_processed = 0;
Al Viro1a79d1c2008-06-02 10:59:02 +01002839 u8 __iomem *addr = NULL;
2840 u8 val8 = 0;
Wang Chen4cf16532008-11-12 23:38:14 -08002841 struct s2io_nic *nic = netdev_priv(dev);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002842 struct XENA_dev_config __iomem *bar0 = nic->bar0;
2843 int budget_org = budget;
2844
2845 config = &nic->config;
2846 mac_control = &nic->mac_control;
2847
2848 if (unlikely(!is_s2io_card_up(nic)))
2849 return 0;
2850
2851 pkts_processed = rx_intr_handler(ring, budget);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002852 s2io_chk_rx_buffers(nic, ring);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002853
2854 if (pkts_processed < budget_org) {
Neil Horman908a7a12008-12-22 20:43:12 -08002855 netif_rx_complete(napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002856 /*Re Enable MSI-Rx Vector*/
Al Viro1a79d1c2008-06-02 10:59:02 +01002857 addr = (u8 __iomem *)&bar0->xmsi_mask_reg;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002858 addr += 7 - ring->ring_no;
2859 val8 = (ring->ring_no == 0) ? 0x3f : 0xbf;
2860 writeb(val8, addr);
2861 val8 = readb(addr);
2862 }
2863 return pkts_processed;
2864}
2865static int s2io_poll_inta(struct napi_struct *napi, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002866{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002867 struct s2io_nic *nic = container_of(napi, struct s2io_nic, napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002868 struct ring_info *ring;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002869 struct config_param *config;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002870 struct mac_info *mac_control;
2871 int pkts_processed = 0;
2872 int ring_pkts_processed, i;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002873 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002874 int budget_org = budget;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002875
Linus Torvalds1da177e2005-04-16 15:20:36 -07002876 config = &nic->config;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002877 mac_control = &nic->mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002878
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002879 if (unlikely(!is_s2io_card_up(nic)))
2880 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002881
2882 for (i = 0; i < config->rx_ring_num; i++) {
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002883 ring = &mac_control->rings[i];
2884 ring_pkts_processed = rx_intr_handler(ring, budget);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002885 s2io_chk_rx_buffers(nic, ring);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002886 pkts_processed += ring_pkts_processed;
2887 budget -= ring_pkts_processed;
2888 if (budget <= 0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002889 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002890 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002891 if (pkts_processed < budget_org) {
Neil Horman908a7a12008-12-22 20:43:12 -08002892 netif_rx_complete(napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002893 /* Re enable the Rx interrupts for the ring */
2894 writeq(0, &bar0->rx_traffic_mask);
2895 readl(&bar0->rx_traffic_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002896 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002897 return pkts_processed;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002898}
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002899
Ananda Rajub41477f2006-07-24 19:52:49 -04002900#ifdef CONFIG_NET_POLL_CONTROLLER
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002901/**
Ananda Rajub41477f2006-07-24 19:52:49 -04002902 * s2io_netpoll - netpoll event handler entry point
Brian Haley612eff02006-06-15 14:36:36 -04002903 * @dev : pointer to the device structure.
2904 * Description:
Ananda Rajub41477f2006-07-24 19:52:49 -04002905 * This function will be called by upper layer to check for events on the
2906 * interface in situations where interrupts are disabled. It is used for
2907 * specific in-kernel networking tasks, such as remote consoles and kernel
2908 * debugging over the network (example netdump in RedHat).
Brian Haley612eff02006-06-15 14:36:36 -04002909 */
Brian Haley612eff02006-06-15 14:36:36 -04002910static void s2io_netpoll(struct net_device *dev)
2911{
Wang Chen4cf16532008-11-12 23:38:14 -08002912 struct s2io_nic *nic = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002913 struct mac_info *mac_control;
Brian Haley612eff02006-06-15 14:36:36 -04002914 struct config_param *config;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002915 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ananda Rajub41477f2006-07-24 19:52:49 -04002916 u64 val64 = 0xFFFFFFFFFFFFFFFFULL;
Brian Haley612eff02006-06-15 14:36:36 -04002917 int i;
2918
Linas Vepstasd796fdb2007-05-14 18:37:30 -05002919 if (pci_channel_offline(nic->pdev))
2920 return;
2921
Brian Haley612eff02006-06-15 14:36:36 -04002922 disable_irq(dev->irq);
2923
Brian Haley612eff02006-06-15 14:36:36 -04002924 mac_control = &nic->mac_control;
2925 config = &nic->config;
2926
Brian Haley612eff02006-06-15 14:36:36 -04002927 writeq(val64, &bar0->rx_traffic_int);
Ananda Rajub41477f2006-07-24 19:52:49 -04002928 writeq(val64, &bar0->tx_traffic_int);
Brian Haley612eff02006-06-15 14:36:36 -04002929
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002930 /* we need to free up the transmitted skbufs or else netpoll will
Ananda Rajub41477f2006-07-24 19:52:49 -04002931 * run out of skbs and will fail and eventually netpoll application such
2932 * as netdump will fail.
2933 */
2934 for (i = 0; i < config->tx_fifo_num; i++)
2935 tx_intr_handler(&mac_control->fifos[i]);
2936
2937 /* check for received packet and indicate up to network */
Brian Haley612eff02006-06-15 14:36:36 -04002938 for (i = 0; i < config->rx_ring_num; i++)
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002939 rx_intr_handler(&mac_control->rings[i], 0);
Brian Haley612eff02006-06-15 14:36:36 -04002940
2941 for (i = 0; i < config->rx_ring_num; i++) {
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07002942 if (fill_rx_buffers(nic, &mac_control->rings[i], 0) ==
2943 -ENOMEM) {
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -08002944 DBG_PRINT(INFO_DBG, "%s:Out of memory", dev->name);
2945 DBG_PRINT(INFO_DBG, " in Rx Netpoll!!\n");
Brian Haley612eff02006-06-15 14:36:36 -04002946 break;
2947 }
2948 }
Brian Haley612eff02006-06-15 14:36:36 -04002949 enable_irq(dev->irq);
2950 return;
2951}
2952#endif
2953
2954/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07002955 * rx_intr_handler - Rx interrupt handler
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002956 * @ring_info: per ring structure.
2957 * @budget: budget for napi processing.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002958 * Description:
2959 * If the interrupt is because of a received frame or if the
Linus Torvalds1da177e2005-04-16 15:20:36 -07002960 * receive ring contains fresh as yet un-processed frames,this function is
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002961 * called. It picks out the RxD at which place the last Rx processing had
2962 * stopped and sends the skb to the OSM's Rx handler and then increments
Linus Torvalds1da177e2005-04-16 15:20:36 -07002963 * the offset.
2964 * Return Value:
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002965 * No. of napi packets processed.
Linus Torvalds1da177e2005-04-16 15:20:36 -07002966 */
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002967static int rx_intr_handler(struct ring_info *ring_data, int budget)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002968{
Sreenivasa Honnurc9fcbf42008-04-23 13:31:33 -04002969 int get_block, put_block;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002970 struct rx_curr_get_info get_info, put_info;
2971 struct RxD_t *rxdp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002972 struct sk_buff *skb;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04002973 int pkt_cnt = 0, napi_pkts = 0;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05002974 int i;
Veena Parat6d517a22007-07-23 02:20:51 -04002975 struct RxD1* rxdp1;
2976 struct RxD3* rxdp3;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05002977
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002978 get_info = ring_data->rx_curr_get_info;
2979 get_block = get_info.block_index;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05002980 memcpy(&put_info, &ring_data->rx_curr_put_info, sizeof(put_info));
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002981 put_block = put_info.block_index;
Ananda Rajuda6971d2005-10-31 16:55:31 -05002982 rxdp = ring_data->rx_blocks[get_block].rxds[get_info.offset].virt_addr;
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05002983
Ananda Rajuda6971d2005-10-31 16:55:31 -05002984 while (RXD_IS_UP2DT(rxdp)) {
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05002985 /*
2986 * If your are next to put index then it's
2987 * FIFO full condition
2988 */
Ananda Rajuda6971d2005-10-31 16:55:31 -05002989 if ((get_block == put_block) &&
2990 (get_info.offset + 1) == put_info.offset) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002991 DBG_PRINT(INTR_DBG, "%s: Ring Full\n",
2992 ring_data->dev->name);
Ananda Rajuda6971d2005-10-31 16:55:31 -05002993 break;
2994 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002995 skb = (struct sk_buff *) ((unsigned long)rxdp->Host_Control);
2996 if (skb == NULL) {
2997 DBG_PRINT(ERR_DBG, "%s: The skb is ",
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04002998 ring_data->dev->name);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07002999 DBG_PRINT(ERR_DBG, "Null in Rx Intr\n");
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003000 return 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003001 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003002 if (ring_data->rxd_mode == RXD_MODE_1) {
Veena Parat6d517a22007-07-23 02:20:51 -04003003 rxdp1 = (struct RxD1*)rxdp;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003004 pci_unmap_single(ring_data->pdev, (dma_addr_t)
Veena Parat6d517a22007-07-23 02:20:51 -04003005 rxdp1->Buffer0_ptr,
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003006 ring_data->mtu +
Veena Parat6d517a22007-07-23 02:20:51 -04003007 HEADER_ETHERNET_II_802_3_SIZE +
3008 HEADER_802_2_SIZE +
3009 HEADER_SNAP_SIZE,
3010 PCI_DMA_FROMDEVICE);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003011 } else if (ring_data->rxd_mode == RXD_MODE_3B) {
Veena Parat6d517a22007-07-23 02:20:51 -04003012 rxdp3 = (struct RxD3*)rxdp;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003013 pci_dma_sync_single_for_cpu(ring_data->pdev, (dma_addr_t)
Veena Parat6d517a22007-07-23 02:20:51 -04003014 rxdp3->Buffer0_ptr,
3015 BUF0_LEN, PCI_DMA_FROMDEVICE);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003016 pci_unmap_single(ring_data->pdev, (dma_addr_t)
Veena Parat6d517a22007-07-23 02:20:51 -04003017 rxdp3->Buffer2_ptr,
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003018 ring_data->mtu + 4,
Veena Parat6d517a22007-07-23 02:20:51 -04003019 PCI_DMA_FROMDEVICE);
Ananda Rajuda6971d2005-10-31 16:55:31 -05003020 }
Ananda Raju863c11a2006-04-21 19:03:13 -04003021 prefetch(skb->data);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003022 rx_osm_handler(ring_data, rxdp);
3023 get_info.offset++;
Ananda Rajuda6971d2005-10-31 16:55:31 -05003024 ring_data->rx_curr_get_info.offset = get_info.offset;
3025 rxdp = ring_data->rx_blocks[get_block].
3026 rxds[get_info.offset].virt_addr;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003027 if (get_info.offset == rxd_count[ring_data->rxd_mode]) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003028 get_info.offset = 0;
Ananda Rajuda6971d2005-10-31 16:55:31 -05003029 ring_data->rx_curr_get_info.offset = get_info.offset;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003030 get_block++;
Ananda Rajuda6971d2005-10-31 16:55:31 -05003031 if (get_block == ring_data->block_count)
3032 get_block = 0;
3033 ring_data->rx_curr_get_info.block_index = get_block;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003034 rxdp = ring_data->rx_blocks[get_block].block_virt_addr;
3035 }
3036
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003037 if (ring_data->nic->config.napi) {
3038 budget--;
3039 napi_pkts++;
3040 if (!budget)
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003041 break;
3042 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003043 pkt_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003044 if ((indicate_max_pkts) && (pkt_cnt > indicate_max_pkts))
3045 break;
3046 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003047 if (ring_data->lro) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05003048 /* Clear all LRO sessions before exiting */
3049 for (i=0; i<MAX_LRO_SESSIONS; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003050 struct lro *lro = &ring_data->lro0_n[i];
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05003051 if (lro->in_use) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04003052 update_L3L4_header(ring_data->nic, lro);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05003053 queue_rx_frame(lro->parent, lro->vlan_tag);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05003054 clear_lro_session(lro);
3055 }
3056 }
3057 }
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003058 return(napi_pkts);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003059}
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003060
3061/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07003062 * tx_intr_handler - Transmit interrupt handler
3063 * @nic : device private variable
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003064 * Description:
3065 * If an interrupt was raised to indicate DMA complete of the
3066 * Tx packet, this function is called. It identifies the last TxD
3067 * whose buffer was freed and frees all skbs whose data have already
Linus Torvalds1da177e2005-04-16 15:20:36 -07003068 * DMA'ed into the NICs internal memory.
3069 * Return Value:
3070 * NONE
3071 */
3072
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003073static void tx_intr_handler(struct fifo_info *fifo_data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003074{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003075 struct s2io_nic *nic = fifo_data->nic;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003076 struct tx_curr_get_info get_info, put_info;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003077 struct sk_buff *skb = NULL;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003078 struct TxD *txdlp;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003079 int pkt_cnt = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08003080 unsigned long flags = 0;
Olaf Heringf9046eb2007-06-19 22:41:10 +02003081 u8 err_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003082
Surjit Reang2fda0962008-01-24 02:08:59 -08003083 if (!spin_trylock_irqsave(&fifo_data->tx_lock, flags))
3084 return;
3085
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003086 get_info = fifo_data->tx_curr_get_info;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003087 memcpy(&put_info, &fifo_data->tx_curr_put_info, sizeof(put_info));
3088 txdlp = (struct TxD *) fifo_data->list_info[get_info.offset].
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003089 list_virt_addr;
3090 while ((!(txdlp->Control_1 & TXD_LIST_OWN_XENA)) &&
3091 (get_info.offset != put_info.offset) &&
3092 (txdlp->Host_Control)) {
3093 /* Check for TxD errors */
3094 if (txdlp->Control_1 & TXD_T_CODE) {
3095 unsigned long long err;
3096 err = txdlp->Control_1 & TXD_T_CODE;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003097 if (err & 0x1) {
3098 nic->mac_control.stats_info->sw_stat.
3099 parity_err_cnt++;
3100 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003101
3102 /* update t_code statistics */
Olaf Heringf9046eb2007-06-19 22:41:10 +02003103 err_mask = err >> 48;
3104 switch(err_mask) {
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003105 case 2:
3106 nic->mac_control.stats_info->sw_stat.
3107 tx_buf_abort_cnt++;
3108 break;
3109
3110 case 3:
3111 nic->mac_control.stats_info->sw_stat.
3112 tx_desc_abort_cnt++;
3113 break;
3114
3115 case 7:
3116 nic->mac_control.stats_info->sw_stat.
3117 tx_parity_err_cnt++;
3118 break;
3119
3120 case 10:
3121 nic->mac_control.stats_info->sw_stat.
3122 tx_link_loss_cnt++;
3123 break;
3124
3125 case 15:
3126 nic->mac_control.stats_info->sw_stat.
3127 tx_list_proc_err_cnt++;
3128 break;
3129 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003130 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003131
Ananda Rajufed5ecc2005-11-14 15:25:08 -05003132 skb = s2io_txdl_getskb(fifo_data, txdlp, get_info.offset);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003133 if (skb == NULL) {
Surjit Reang2fda0962008-01-24 02:08:59 -08003134 spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003135 DBG_PRINT(ERR_DBG, "%s: Null skb ",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07003136 __func__);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003137 DBG_PRINT(ERR_DBG, "in Tx Free Intr\n");
3138 return;
3139 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003140 pkt_cnt++;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003141
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003142 /* Updating the statistics block */
Breno Leitaodc56e632008-07-22 16:27:20 -03003143 nic->dev->stats.tx_bytes += skb->len;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003144 nic->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003145 dev_kfree_skb_irq(skb);
3146
3147 get_info.offset++;
Ananda Raju863c11a2006-04-21 19:03:13 -04003148 if (get_info.offset == get_info.fifo_len + 1)
3149 get_info.offset = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003150 txdlp = (struct TxD *) fifo_data->list_info
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003151 [get_info.offset].list_virt_addr;
3152 fifo_data->tx_curr_get_info.offset =
3153 get_info.offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003154 }
3155
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05003156 s2io_wake_tx_queue(fifo_data, pkt_cnt, nic->config.multiq);
Surjit Reang2fda0962008-01-24 02:08:59 -08003157
3158 spin_unlock_irqrestore(&fifo_data->tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003159}
3160
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003161/**
Ananda Rajubd1034f2006-04-21 19:20:22 -04003162 * s2io_mdio_write - Function to write in to MDIO registers
3163 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
3164 * @addr : address value
3165 * @value : data value
3166 * @dev : pointer to net_device structure
3167 * Description:
3168 * This function is used to write values to the MDIO registers
3169 * NONE
3170 */
3171static void s2io_mdio_write(u32 mmd_type, u64 addr, u16 value, struct net_device *dev)
3172{
3173 u64 val64 = 0x0;
Wang Chen4cf16532008-11-12 23:38:14 -08003174 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003175 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003176
3177 //address transaction
3178 val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
3179 | MDIO_MMD_DEV_ADDR(mmd_type)
3180 | MDIO_MMS_PRT_ADDR(0x0);
3181 writeq(val64, &bar0->mdio_control);
3182 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3183 writeq(val64, &bar0->mdio_control);
3184 udelay(100);
3185
3186 //Data transaction
3187 val64 = 0x0;
3188 val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
3189 | MDIO_MMD_DEV_ADDR(mmd_type)
3190 | MDIO_MMS_PRT_ADDR(0x0)
3191 | MDIO_MDIO_DATA(value)
3192 | MDIO_OP(MDIO_OP_WRITE_TRANS);
3193 writeq(val64, &bar0->mdio_control);
3194 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3195 writeq(val64, &bar0->mdio_control);
3196 udelay(100);
3197
3198 val64 = 0x0;
3199 val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
3200 | MDIO_MMD_DEV_ADDR(mmd_type)
3201 | MDIO_MMS_PRT_ADDR(0x0)
3202 | MDIO_OP(MDIO_OP_READ_TRANS);
3203 writeq(val64, &bar0->mdio_control);
3204 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3205 writeq(val64, &bar0->mdio_control);
3206 udelay(100);
3207
3208}
3209
3210/**
3211 * s2io_mdio_read - Function to write in to MDIO registers
3212 * @mmd_type : MMD type value (PMA/PMD/WIS/PCS/PHYXS)
3213 * @addr : address value
3214 * @dev : pointer to net_device structure
3215 * Description:
3216 * This function is used to read values to the MDIO registers
3217 * NONE
3218 */
3219static u64 s2io_mdio_read(u32 mmd_type, u64 addr, struct net_device *dev)
3220{
3221 u64 val64 = 0x0;
3222 u64 rval64 = 0x0;
Wang Chen4cf16532008-11-12 23:38:14 -08003223 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003224 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003225
3226 /* address transaction */
3227 val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
3228 | MDIO_MMD_DEV_ADDR(mmd_type)
3229 | MDIO_MMS_PRT_ADDR(0x0);
3230 writeq(val64, &bar0->mdio_control);
3231 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3232 writeq(val64, &bar0->mdio_control);
3233 udelay(100);
3234
3235 /* Data transaction */
3236 val64 = 0x0;
3237 val64 = val64 | MDIO_MMD_INDX_ADDR(addr)
3238 | MDIO_MMD_DEV_ADDR(mmd_type)
3239 | MDIO_MMS_PRT_ADDR(0x0)
3240 | MDIO_OP(MDIO_OP_READ_TRANS);
3241 writeq(val64, &bar0->mdio_control);
3242 val64 = val64 | MDIO_CTRL_START_TRANS(0xE);
3243 writeq(val64, &bar0->mdio_control);
3244 udelay(100);
3245
3246 /* Read the value from regs */
3247 rval64 = readq(&bar0->mdio_control);
3248 rval64 = rval64 & 0xFFFF0000;
3249 rval64 = rval64 >> 16;
3250 return rval64;
3251}
3252/**
3253 * s2io_chk_xpak_counter - Function to check the status of the xpak counters
3254 * @counter : couter value to be updated
3255 * @flag : flag to indicate the status
3256 * @type : counter type
3257 * Description:
3258 * This function is to check the status of the xpak counters value
3259 * NONE
3260 */
3261
3262static void s2io_chk_xpak_counter(u64 *counter, u64 * regs_stat, u32 index, u16 flag, u16 type)
3263{
3264 u64 mask = 0x3;
3265 u64 val64;
3266 int i;
3267 for(i = 0; i <index; i++)
3268 mask = mask << 0x2;
3269
3270 if(flag > 0)
3271 {
3272 *counter = *counter + 1;
3273 val64 = *regs_stat & mask;
3274 val64 = val64 >> (index * 0x2);
3275 val64 = val64 + 1;
3276 if(val64 == 3)
3277 {
3278 switch(type)
3279 {
3280 case 1:
3281 DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
3282 "service. Excessive temperatures may "
3283 "result in premature transceiver "
3284 "failure \n");
3285 break;
3286 case 2:
3287 DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
3288 "service Excessive bias currents may "
3289 "indicate imminent laser diode "
3290 "failure \n");
3291 break;
3292 case 3:
3293 DBG_PRINT(ERR_DBG, "Take Xframe NIC out of "
3294 "service Excessive laser output "
3295 "power may saturate far-end "
3296 "receiver\n");
3297 break;
3298 default:
3299 DBG_PRINT(ERR_DBG, "Incorrect XPAK Alarm "
3300 "type \n");
3301 }
3302 val64 = 0x0;
3303 }
3304 val64 = val64 << (index * 0x2);
3305 *regs_stat = (*regs_stat & (~mask)) | (val64);
3306
3307 } else {
3308 *regs_stat = *regs_stat & (~mask);
3309 }
3310}
3311
3312/**
3313 * s2io_updt_xpak_counter - Function to update the xpak counters
3314 * @dev : pointer to net_device struct
3315 * Description:
3316 * This function is to upate the status of the xpak counters value
3317 * NONE
3318 */
3319static void s2io_updt_xpak_counter(struct net_device *dev)
3320{
3321 u16 flag = 0x0;
3322 u16 type = 0x0;
3323 u16 val16 = 0x0;
3324 u64 val64 = 0x0;
3325 u64 addr = 0x0;
3326
Wang Chen4cf16532008-11-12 23:38:14 -08003327 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003328 struct stat_block *stat_info = sp->mac_control.stats_info;
Ananda Rajubd1034f2006-04-21 19:20:22 -04003329
3330 /* Check the communication with the MDIO slave */
3331 addr = 0x0000;
3332 val64 = 0x0;
3333 val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);
3334 if((val64 == 0xFFFF) || (val64 == 0x0000))
3335 {
3336 DBG_PRINT(ERR_DBG, "ERR: MDIO slave access failed - "
3337 "Returned %llx\n", (unsigned long long)val64);
3338 return;
3339 }
3340
3341 /* Check for the expecte value of 2040 at PMA address 0x0000 */
3342 if(val64 != 0x2040)
3343 {
3344 DBG_PRINT(ERR_DBG, "Incorrect value at PMA address 0x0000 - ");
3345 DBG_PRINT(ERR_DBG, "Returned: %llx- Expected: 0x2040\n",
3346 (unsigned long long)val64);
3347 return;
3348 }
3349
3350 /* Loading the DOM register to MDIO register */
3351 addr = 0xA100;
3352 s2io_mdio_write(MDIO_MMD_PMA_DEV_ADDR, addr, val16, dev);
3353 val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);
3354
3355 /* Reading the Alarm flags */
3356 addr = 0xA070;
3357 val64 = 0x0;
3358 val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);
3359
3360 flag = CHECKBIT(val64, 0x7);
3361 type = 1;
3362 s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_transceiver_temp_high,
3363 &stat_info->xpak_stat.xpak_regs_stat,
3364 0x0, flag, type);
3365
3366 if(CHECKBIT(val64, 0x6))
3367 stat_info->xpak_stat.alarm_transceiver_temp_low++;
3368
3369 flag = CHECKBIT(val64, 0x3);
3370 type = 2;
3371 s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_bias_current_high,
3372 &stat_info->xpak_stat.xpak_regs_stat,
3373 0x2, flag, type);
3374
3375 if(CHECKBIT(val64, 0x2))
3376 stat_info->xpak_stat.alarm_laser_bias_current_low++;
3377
3378 flag = CHECKBIT(val64, 0x1);
3379 type = 3;
3380 s2io_chk_xpak_counter(&stat_info->xpak_stat.alarm_laser_output_power_high,
3381 &stat_info->xpak_stat.xpak_regs_stat,
3382 0x4, flag, type);
3383
3384 if(CHECKBIT(val64, 0x0))
3385 stat_info->xpak_stat.alarm_laser_output_power_low++;
3386
3387 /* Reading the Warning flags */
3388 addr = 0xA074;
3389 val64 = 0x0;
3390 val64 = s2io_mdio_read(MDIO_MMD_PMA_DEV_ADDR, addr, dev);
3391
3392 if(CHECKBIT(val64, 0x7))
3393 stat_info->xpak_stat.warn_transceiver_temp_high++;
3394
3395 if(CHECKBIT(val64, 0x6))
3396 stat_info->xpak_stat.warn_transceiver_temp_low++;
3397
3398 if(CHECKBIT(val64, 0x3))
3399 stat_info->xpak_stat.warn_laser_bias_current_high++;
3400
3401 if(CHECKBIT(val64, 0x2))
3402 stat_info->xpak_stat.warn_laser_bias_current_low++;
3403
3404 if(CHECKBIT(val64, 0x1))
3405 stat_info->xpak_stat.warn_laser_output_power_high++;
3406
3407 if(CHECKBIT(val64, 0x0))
3408 stat_info->xpak_stat.warn_laser_output_power_low++;
3409}
3410
3411/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07003412 * wait_for_cmd_complete - waits for a command to complete.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003413 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07003414 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003415 * Description: Function that waits for a command to Write into RMAC
3416 * ADDR DATA registers to be completed and returns either success or
3417 * error depending on whether the command was complete or not.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003418 * Return value:
3419 * SUCCESS on success and FAILURE on failure.
3420 */
3421
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003422static int wait_for_cmd_complete(void __iomem *addr, u64 busy_bit,
3423 int bit_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003424{
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003425 int ret = FAILURE, cnt = 0, delay = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003426 u64 val64;
3427
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003428 if ((bit_state != S2IO_BIT_RESET) && (bit_state != S2IO_BIT_SET))
3429 return FAILURE;
3430
3431 do {
Ananda Rajuc92ca042006-04-21 19:18:03 -04003432 val64 = readq(addr);
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003433 if (bit_state == S2IO_BIT_RESET) {
3434 if (!(val64 & busy_bit)) {
3435 ret = SUCCESS;
3436 break;
3437 }
3438 } else {
3439 if (!(val64 & busy_bit)) {
3440 ret = SUCCESS;
3441 break;
3442 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003443 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04003444
3445 if(in_interrupt())
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003446 mdelay(delay);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003447 else
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003448 msleep(delay);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003449
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05003450 if (++cnt >= 10)
3451 delay = 50;
3452 } while (cnt < 20);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003453 return ret;
3454}
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003455/*
3456 * check_pci_device_id - Checks if the device id is supported
3457 * @id : device id
3458 * Description: Function to check if the pci device id is supported by driver.
3459 * Return value: Actual device id if supported else PCI_ANY_ID
3460 */
3461static u16 check_pci_device_id(u16 id)
3462{
3463 switch (id) {
3464 case PCI_DEVICE_ID_HERC_WIN:
3465 case PCI_DEVICE_ID_HERC_UNI:
3466 return XFRAME_II_DEVICE;
3467 case PCI_DEVICE_ID_S2IO_UNI:
3468 case PCI_DEVICE_ID_S2IO_WIN:
3469 return XFRAME_I_DEVICE;
3470 default:
3471 return PCI_ANY_ID;
3472 }
3473}
Linus Torvalds1da177e2005-04-16 15:20:36 -07003474
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003475/**
3476 * s2io_reset - Resets the card.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003477 * @sp : private member of the device structure.
3478 * Description: Function to Reset the card. This function then also
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003479 * restores the previously saved PCI configuration space registers as
Linus Torvalds1da177e2005-04-16 15:20:36 -07003480 * the card reset also resets the configuration space.
3481 * Return value:
3482 * void.
3483 */
3484
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003485static void s2io_reset(struct s2io_nic * sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003486{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003487 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003488 u64 val64;
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003489 u16 subid, pci_cmd;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003490 int i;
3491 u16 val16;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003492 unsigned long long up_cnt, down_cnt, up_time, down_time, reset_cnt;
3493 unsigned long long mem_alloc_cnt, mem_free_cnt, watchdog_cnt;
3494
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003495 DBG_PRINT(INIT_DBG,"%s - Resetting XFrame card %s\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07003496 __func__, sp->dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003497
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07003498 /* Back up the PCI-X CMD reg, dont want to lose MMRBC, OST settings */
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -07003499 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER, &(pci_cmd));
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07003500
Linus Torvalds1da177e2005-04-16 15:20:36 -07003501 val64 = SW_RESET_ALL;
3502 writeq(val64, &bar0->sw_reset);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003503 if (strstr(sp->product_name, "CX4")) {
3504 msleep(750);
3505 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07003506 msleep(250);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003507 for (i = 0; i < S2IO_MAX_PCI_CONFIG_SPACE_REINIT; i++) {
3508
3509 /* Restore the PCI state saved during initialization. */
3510 pci_restore_state(sp->pdev);
3511 pci_read_config_word(sp->pdev, 0x2, &val16);
3512 if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)
3513 break;
3514 msleep(200);
3515 }
3516
3517 if (check_pci_device_id(val16) == (u16)PCI_ANY_ID) {
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07003518 DBG_PRINT(ERR_DBG,"%s SW_Reset failed!\n", __func__);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05003519 }
3520
3521 pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER, pci_cmd);
3522
3523 s2io_init_pci(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003524
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003525 /* Set swapper to enable I/O register access */
3526 s2io_set_swapper(sp);
3527
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08003528 /* restore mac_addr entries */
3529 do_s2io_restore_unicast_mc(sp);
3530
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003531 /* Restore the MSIX table entries from local variables */
3532 restore_xmsi_data(sp);
3533
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003534 /* Clear certain PCI/PCI-X fields after reset */
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003535 if (sp->device_type == XFRAME_II_DEVICE) {
Ananda Rajub41477f2006-07-24 19:52:49 -04003536 /* Clear "detected parity error" bit */
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003537 pci_write_config_word(sp->pdev, PCI_STATUS, 0x8000);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003538
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003539 /* Clearing PCIX Ecc status register */
3540 pci_write_config_dword(sp->pdev, 0x68, 0x7C);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003541
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003542 /* Clearing PCI_STATUS error reflected here */
Jiri Slabyb7b5a122007-10-18 23:40:29 -07003543 writeq(s2BIT(62), &bar0->txpic_int_reg);
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07003544 }
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07003545
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003546 /* Reset device statistics maintained by OS */
3547 memset(&sp->stats, 0, sizeof (struct net_device_stats));
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003548
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003549 up_cnt = sp->mac_control.stats_info->sw_stat.link_up_cnt;
3550 down_cnt = sp->mac_control.stats_info->sw_stat.link_down_cnt;
3551 up_time = sp->mac_control.stats_info->sw_stat.link_up_time;
3552 down_time = sp->mac_control.stats_info->sw_stat.link_down_time;
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08003553 reset_cnt = sp->mac_control.stats_info->sw_stat.soft_reset_cnt;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003554 mem_alloc_cnt = sp->mac_control.stats_info->sw_stat.mem_allocated;
3555 mem_free_cnt = sp->mac_control.stats_info->sw_stat.mem_freed;
3556 watchdog_cnt = sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt;
3557 /* save link up/down time/cnt, reset/memory/watchdog cnt */
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08003558 memset(sp->mac_control.stats_info, 0, sizeof(struct stat_block));
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003559 /* restore link up/down time/cnt, reset/memory/watchdog cnt */
3560 sp->mac_control.stats_info->sw_stat.link_up_cnt = up_cnt;
3561 sp->mac_control.stats_info->sw_stat.link_down_cnt = down_cnt;
3562 sp->mac_control.stats_info->sw_stat.link_up_time = up_time;
3563 sp->mac_control.stats_info->sw_stat.link_down_time = down_time;
Ramkrishna Vepa363dc362007-03-06 17:01:00 -08003564 sp->mac_control.stats_info->sw_stat.soft_reset_cnt = reset_cnt;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003565 sp->mac_control.stats_info->sw_stat.mem_allocated = mem_alloc_cnt;
3566 sp->mac_control.stats_info->sw_stat.mem_freed = mem_free_cnt;
3567 sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt = watchdog_cnt;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003568
Linus Torvalds1da177e2005-04-16 15:20:36 -07003569 /* SXE-002: Configure link and activity LED to turn it off */
3570 subid = sp->pdev->subsystem_device;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07003571 if (((subid & 0xFF) >= 0x07) &&
3572 (sp->device_type == XFRAME_I_DEVICE)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003573 val64 = readq(&bar0->gpio_control);
3574 val64 |= 0x0000800000000000ULL;
3575 writeq(val64, &bar0->gpio_control);
3576 val64 = 0x0411040400000000ULL;
viro@ftp.linux.org.uk509a2672005-09-05 03:25:58 +01003577 writeq(val64, (void __iomem *)bar0 + 0x2700);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003578 }
3579
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07003580 /*
3581 * Clear spurious ECC interrupts that would have occured on
3582 * XFRAME II cards after reset.
3583 */
3584 if (sp->device_type == XFRAME_II_DEVICE) {
3585 val64 = readq(&bar0->pcc_err_reg);
3586 writeq(val64, &bar0->pcc_err_reg);
3587 }
3588
Linus Torvalds1da177e2005-04-16 15:20:36 -07003589 sp->device_enabled_once = FALSE;
3590}
3591
3592/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003593 * s2io_set_swapper - to set the swapper controle on the card
3594 * @sp : private member of the device structure,
Linus Torvalds1da177e2005-04-16 15:20:36 -07003595 * pointer to the s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003596 * Description: Function to set the swapper control on the card
Linus Torvalds1da177e2005-04-16 15:20:36 -07003597 * correctly depending on the 'endianness' of the system.
3598 * Return value:
3599 * SUCCESS on success and FAILURE on failure.
3600 */
3601
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003602static int s2io_set_swapper(struct s2io_nic * sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003603{
3604 struct net_device *dev = sp->dev;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003605 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003606 u64 val64, valt, valr;
3607
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003608 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003609 * Set proper endian settings and verify the same by reading
3610 * the PIF Feed-back register.
3611 */
3612
3613 val64 = readq(&bar0->pif_rd_swapper_fb);
3614 if (val64 != 0x0123456789ABCDEFULL) {
3615 int i = 0;
3616 u64 value[] = { 0xC30000C3C30000C3ULL, /* FE=1, SE=1 */
3617 0x8100008181000081ULL, /* FE=1, SE=0 */
3618 0x4200004242000042ULL, /* FE=0, SE=1 */
3619 0}; /* FE=0, SE=0 */
3620
3621 while(i<4) {
3622 writeq(value[i], &bar0->swapper_ctrl);
3623 val64 = readq(&bar0->pif_rd_swapper_fb);
3624 if (val64 == 0x0123456789ABCDEFULL)
3625 break;
3626 i++;
3627 }
3628 if (i == 4) {
3629 DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
3630 dev->name);
3631 DBG_PRINT(ERR_DBG, "feedback read %llx\n",
3632 (unsigned long long) val64);
3633 return FAILURE;
3634 }
3635 valr = value[i];
3636 } else {
3637 valr = readq(&bar0->swapper_ctrl);
3638 }
3639
3640 valt = 0x0123456789ABCDEFULL;
3641 writeq(valt, &bar0->xmsi_address);
3642 val64 = readq(&bar0->xmsi_address);
3643
3644 if(val64 != valt) {
3645 int i = 0;
3646 u64 value[] = { 0x00C3C30000C3C300ULL, /* FE=1, SE=1 */
3647 0x0081810000818100ULL, /* FE=1, SE=0 */
3648 0x0042420000424200ULL, /* FE=0, SE=1 */
3649 0}; /* FE=0, SE=0 */
3650
3651 while(i<4) {
3652 writeq((value[i] | valr), &bar0->swapper_ctrl);
3653 writeq(valt, &bar0->xmsi_address);
3654 val64 = readq(&bar0->xmsi_address);
3655 if(val64 == valt)
3656 break;
3657 i++;
3658 }
3659 if(i == 4) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003660 unsigned long long x = val64;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003661 DBG_PRINT(ERR_DBG, "Write failed, Xmsi_addr ");
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003662 DBG_PRINT(ERR_DBG, "reads:0x%llx\n", x);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003663 return FAILURE;
3664 }
3665 }
3666 val64 = readq(&bar0->swapper_ctrl);
3667 val64 &= 0xFFFF000000000000ULL;
3668
3669#ifdef __BIG_ENDIAN
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003670 /*
3671 * The device by default set to a big endian format, so a
Linus Torvalds1da177e2005-04-16 15:20:36 -07003672 * big endian driver need not set anything.
3673 */
3674 val64 |= (SWAPPER_CTRL_TXP_FE |
3675 SWAPPER_CTRL_TXP_SE |
3676 SWAPPER_CTRL_TXD_R_FE |
3677 SWAPPER_CTRL_TXD_W_FE |
3678 SWAPPER_CTRL_TXF_R_FE |
3679 SWAPPER_CTRL_RXD_R_FE |
3680 SWAPPER_CTRL_RXD_W_FE |
3681 SWAPPER_CTRL_RXF_W_FE |
3682 SWAPPER_CTRL_XMSI_FE |
Linus Torvalds1da177e2005-04-16 15:20:36 -07003683 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07003684 if (sp->config.intr_type == INTA)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003685 val64 |= SWAPPER_CTRL_XMSI_SE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003686 writeq(val64, &bar0->swapper_ctrl);
3687#else
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003688 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003689 * Initially we enable all bits to make it accessible by the
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003690 * driver, then we selectively enable only those bits that
Linus Torvalds1da177e2005-04-16 15:20:36 -07003691 * we want to set.
3692 */
3693 val64 |= (SWAPPER_CTRL_TXP_FE |
3694 SWAPPER_CTRL_TXP_SE |
3695 SWAPPER_CTRL_TXD_R_FE |
3696 SWAPPER_CTRL_TXD_R_SE |
3697 SWAPPER_CTRL_TXD_W_FE |
3698 SWAPPER_CTRL_TXD_W_SE |
3699 SWAPPER_CTRL_TXF_R_FE |
3700 SWAPPER_CTRL_RXD_R_FE |
3701 SWAPPER_CTRL_RXD_R_SE |
3702 SWAPPER_CTRL_RXD_W_FE |
3703 SWAPPER_CTRL_RXD_W_SE |
3704 SWAPPER_CTRL_RXF_W_FE |
3705 SWAPPER_CTRL_XMSI_FE |
Linus Torvalds1da177e2005-04-16 15:20:36 -07003706 SWAPPER_CTRL_STATS_FE | SWAPPER_CTRL_STATS_SE);
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07003707 if (sp->config.intr_type == INTA)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003708 val64 |= SWAPPER_CTRL_XMSI_SE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07003709 writeq(val64, &bar0->swapper_ctrl);
3710#endif
3711 val64 = readq(&bar0->swapper_ctrl);
3712
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003713 /*
3714 * Verifying if endian settings are accurate by reading a
Linus Torvalds1da177e2005-04-16 15:20:36 -07003715 * feedback register.
3716 */
3717 val64 = readq(&bar0->pif_rd_swapper_fb);
3718 if (val64 != 0x0123456789ABCDEFULL) {
3719 /* Endian settings are incorrect, calls for another dekko. */
3720 DBG_PRINT(ERR_DBG, "%s: Endian settings are wrong, ",
3721 dev->name);
3722 DBG_PRINT(ERR_DBG, "feedback read %llx\n",
3723 (unsigned long long) val64);
3724 return FAILURE;
3725 }
3726
3727 return SUCCESS;
3728}
3729
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003730static int wait_for_msix_trans(struct s2io_nic *nic, int i)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003731{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003732 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003733 u64 val64;
3734 int ret = 0, cnt = 0;
3735
3736 do {
3737 val64 = readq(&bar0->xmsi_access);
Jiri Slabyb7b5a122007-10-18 23:40:29 -07003738 if (!(val64 & s2BIT(15)))
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003739 break;
3740 mdelay(1);
3741 cnt++;
3742 } while(cnt < 5);
3743 if (cnt == 5) {
3744 DBG_PRINT(ERR_DBG, "XMSI # %d Access failed\n", i);
3745 ret = 1;
3746 }
3747
3748 return ret;
3749}
3750
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003751static void restore_xmsi_data(struct s2io_nic *nic)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003752{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003753 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003754 u64 val64;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003755 int i, msix_index;
3756
3757
3758 if (nic->device_type == XFRAME_I_DEVICE)
3759 return;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003760
Ananda Raju75c30b12006-07-24 19:55:09 -04003761 for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003762 msix_index = (i) ? ((i-1) * 8 + 1): 0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003763 writeq(nic->msix_info[i].addr, &bar0->xmsi_address);
3764 writeq(nic->msix_info[i].data, &bar0->xmsi_data);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003765 val64 = (s2BIT(7) | s2BIT(15) | vBIT(msix_index, 26, 6));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003766 writeq(val64, &bar0->xmsi_access);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003767 if (wait_for_msix_trans(nic, msix_index)) {
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07003768 DBG_PRINT(ERR_DBG, "failed in %s\n", __func__);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003769 continue;
3770 }
3771 }
3772}
3773
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003774static void store_xmsi_data(struct s2io_nic *nic)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003775{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003776 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003777 u64 val64, addr, data;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003778 int i, msix_index;
3779
3780 if (nic->device_type == XFRAME_I_DEVICE)
3781 return;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003782
3783 /* Store and display */
Ananda Raju75c30b12006-07-24 19:55:09 -04003784 for (i=0; i < MAX_REQUESTED_MSI_X; i++) {
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003785 msix_index = (i) ? ((i-1) * 8 + 1): 0;
3786 val64 = (s2BIT(15) | vBIT(msix_index, 26, 6));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003787 writeq(val64, &bar0->xmsi_access);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003788 if (wait_for_msix_trans(nic, msix_index)) {
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07003789 DBG_PRINT(ERR_DBG, "failed in %s\n", __func__);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003790 continue;
3791 }
3792 addr = readq(&bar0->xmsi_address);
3793 data = readq(&bar0->xmsi_data);
3794 if (addr && data) {
3795 nic->msix_info[i].addr = addr;
3796 nic->msix_info[i].data = data;
3797 }
3798 }
3799}
3800
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003801static int s2io_enable_msi_x(struct s2io_nic *nic)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003802{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05003803 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04003804 u64 rx_mat;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003805 u16 msi_control; /* Temp variable */
3806 int ret, i, j, msix_indx = 1;
3807
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003808 nic->entries = kmalloc(nic->num_entries * sizeof(struct msix_entry),
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003809 GFP_KERNEL);
Sivakumar Subramanibd684e42007-09-14 07:28:50 -04003810 if (!nic->entries) {
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04003811 DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n", \
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07003812 __func__);
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04003813 nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003814 return -ENOMEM;
3815 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003816 nic->mac_control.stats_info->sw_stat.mem_allocated
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003817 += (nic->num_entries * sizeof(struct msix_entry));
3818
3819 memset(nic->entries, 0, nic->num_entries * sizeof(struct msix_entry));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003820
3821 nic->s2io_entries =
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003822 kmalloc(nic->num_entries * sizeof(struct s2io_msix_entry),
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003823 GFP_KERNEL);
Sivakumar Subramanibd684e42007-09-14 07:28:50 -04003824 if (!nic->s2io_entries) {
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003825 DBG_PRINT(INFO_DBG, "%s: Memory allocation failed\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07003826 __func__);
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04003827 nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003828 kfree(nic->entries);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003829 nic->mac_control.stats_info->sw_stat.mem_freed
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003830 += (nic->num_entries * sizeof(struct msix_entry));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003831 return -ENOMEM;
3832 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003833 nic->mac_control.stats_info->sw_stat.mem_allocated
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003834 += (nic->num_entries * sizeof(struct s2io_msix_entry));
3835 memset(nic->s2io_entries, 0,
3836 nic->num_entries * sizeof(struct s2io_msix_entry));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003837
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04003838 nic->entries[0].entry = 0;
3839 nic->s2io_entries[0].entry = 0;
3840 nic->s2io_entries[0].in_use = MSIX_FLG;
3841 nic->s2io_entries[0].type = MSIX_ALARM_TYPE;
3842 nic->s2io_entries[0].arg = &nic->mac_control.fifos;
3843
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003844 for (i = 1; i < nic->num_entries; i++) {
3845 nic->entries[i].entry = ((i - 1) * 8) + 1;
3846 nic->s2io_entries[i].entry = ((i - 1) * 8) + 1;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003847 nic->s2io_entries[i].arg = NULL;
3848 nic->s2io_entries[i].in_use = 0;
3849 }
3850
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003851 rx_mat = readq(&bar0->rx_mat);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003852 for (j = 0; j < nic->config.rx_ring_num; j++) {
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003853 rx_mat |= RX_MAT_SET(j, msix_indx);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003854 nic->s2io_entries[j+1].arg = &nic->mac_control.rings[j];
3855 nic->s2io_entries[j+1].type = MSIX_RING_TYPE;
3856 nic->s2io_entries[j+1].in_use = MSIX_FLG;
3857 msix_indx += 8;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003858 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003859 writeq(rx_mat, &bar0->rx_mat);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003860 readq(&bar0->rx_mat);
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003861
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003862 ret = pci_enable_msix(nic->pdev, nic->entries, nic->num_entries);
Ananda Rajuc92ca042006-04-21 19:18:03 -04003863 /* We fail init if error or we get less vectors than min required */
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003864 if (ret) {
3865 DBG_PRINT(ERR_DBG, "%s: Enabling MSIX failed\n", nic->dev->name);
3866 kfree(nic->entries);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003867 nic->mac_control.stats_info->sw_stat.mem_freed
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003868 += (nic->num_entries * sizeof(struct msix_entry));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003869 kfree(nic->s2io_entries);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04003870 nic->mac_control.stats_info->sw_stat.mem_freed
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003871 += (nic->num_entries * sizeof(struct s2io_msix_entry));
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04003872 nic->entries = NULL;
3873 nic->s2io_entries = NULL;
3874 return -ENOMEM;
3875 }
3876
3877 /*
3878 * To enable MSI-X, MSI also needs to be enabled, due to a bug
3879 * in the herc NIC. (Temp change, needs to be removed later)
3880 */
3881 pci_read_config_word(nic->pdev, 0x42, &msi_control);
3882 msi_control |= 0x1; /* Enable MSI */
3883 pci_write_config_word(nic->pdev, 0x42, msi_control);
3884
3885 return 0;
3886}
3887
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003888/* Handle software interrupt used during MSI(X) test */
Adrian Bunk33390a72007-12-11 23:23:06 +01003889static irqreturn_t s2io_test_intr(int irq, void *dev_id)
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003890{
3891 struct s2io_nic *sp = dev_id;
3892
3893 sp->msi_detected = 1;
3894 wake_up(&sp->msi_wait);
3895
3896 return IRQ_HANDLED;
3897}
3898
3899/* Test interrupt path by forcing a a software IRQ */
Adrian Bunk33390a72007-12-11 23:23:06 +01003900static int s2io_test_msi(struct s2io_nic *sp)
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003901{
3902 struct pci_dev *pdev = sp->pdev;
3903 struct XENA_dev_config __iomem *bar0 = sp->bar0;
3904 int err;
3905 u64 val64, saved64;
3906
3907 err = request_irq(sp->entries[1].vector, s2io_test_intr, 0,
3908 sp->name, sp);
3909 if (err) {
3910 DBG_PRINT(ERR_DBG, "%s: PCI %s: cannot assign irq %d\n",
3911 sp->dev->name, pci_name(pdev), pdev->irq);
3912 return err;
3913 }
3914
3915 init_waitqueue_head (&sp->msi_wait);
3916 sp->msi_detected = 0;
3917
3918 saved64 = val64 = readq(&bar0->scheduled_int_ctrl);
3919 val64 |= SCHED_INT_CTRL_ONE_SHOT;
3920 val64 |= SCHED_INT_CTRL_TIMER_EN;
3921 val64 |= SCHED_INT_CTRL_INT2MSI(1);
3922 writeq(val64, &bar0->scheduled_int_ctrl);
3923
3924 wait_event_timeout(sp->msi_wait, sp->msi_detected, HZ/10);
3925
3926 if (!sp->msi_detected) {
3927 /* MSI(X) test failed, go back to INTx mode */
Joe Perches24500222007-11-19 17:48:28 -08003928 DBG_PRINT(ERR_DBG, "%s: PCI %s: No interrupt was generated "
Sivakumar Subramani8abc4d52007-09-15 13:11:34 -07003929 "using MSI(X) during test\n", sp->dev->name,
3930 pci_name(pdev));
3931
3932 err = -EOPNOTSUPP;
3933 }
3934
3935 free_irq(sp->entries[1].vector, sp);
3936
3937 writeq(saved64, &bar0->scheduled_int_ctrl);
3938
3939 return err;
3940}
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08003941
3942static void remove_msix_isr(struct s2io_nic *sp)
3943{
3944 int i;
3945 u16 msi_control;
3946
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04003947 for (i = 0; i < sp->num_entries; i++) {
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08003948 if (sp->s2io_entries[i].in_use ==
3949 MSIX_REGISTERED_SUCCESS) {
3950 int vector = sp->entries[i].vector;
3951 void *arg = sp->s2io_entries[i].arg;
3952 free_irq(vector, arg);
3953 }
3954 }
3955
3956 kfree(sp->entries);
3957 kfree(sp->s2io_entries);
3958 sp->entries = NULL;
3959 sp->s2io_entries = NULL;
3960
3961 pci_read_config_word(sp->pdev, 0x42, &msi_control);
3962 msi_control &= 0xFFFE; /* Disable MSI */
3963 pci_write_config_word(sp->pdev, 0x42, msi_control);
3964
3965 pci_disable_msix(sp->pdev);
3966}
3967
3968static void remove_inta_isr(struct s2io_nic *sp)
3969{
3970 struct net_device *dev = sp->dev;
3971
3972 free_irq(sp->pdev->irq, dev);
3973}
3974
Linus Torvalds1da177e2005-04-16 15:20:36 -07003975/* ********************************************************* *
3976 * Functions defined below concern the OS part of the driver *
3977 * ********************************************************* */
3978
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003979/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07003980 * s2io_open - open entry point of the driver
3981 * @dev : pointer to the device structure.
3982 * Description:
3983 * This function is the open entry point of the driver. It mainly calls a
3984 * function to allocate Rx buffers and inserts them into the buffer
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003985 * descriptors and then enables the Rx part of the NIC.
Linus Torvalds1da177e2005-04-16 15:20:36 -07003986 * Return value:
3987 * 0 on success and an appropriate (-)ve integer as defined in errno.h
3988 * file on failure.
3989 */
3990
Adrian Bunkac1f60d2005-11-06 01:46:47 +01003991static int s2io_open(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07003992{
Wang Chen4cf16532008-11-12 23:38:14 -08003993 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003994 int err = 0;
3995
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07003996 /*
3997 * Make sure you have link off by default every time
Linus Torvalds1da177e2005-04-16 15:20:36 -07003998 * Nic is initialized
3999 */
4000 netif_carrier_off(dev);
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07004001 sp->last_link_state = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004002
4003 /* Initialize H/W and enable interrupts */
Ananda Rajuc92ca042006-04-21 19:18:03 -04004004 err = s2io_card_up(sp);
4005 if (err) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004006 DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
4007 dev->name);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07004008 goto hw_init_failed;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004009 }
4010
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04004011 if (do_s2io_prog_unicast(dev, dev->dev_addr) == FAILURE) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004012 DBG_PRINT(ERR_DBG, "Set Mac Address Failed\n");
Ananda Rajue6a8fee2006-07-06 23:58:23 -07004013 s2io_card_down(sp);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004014 err = -ENODEV;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07004015 goto hw_init_failed;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004016 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004017 s2io_start_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004018 return 0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004019
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004020hw_init_failed:
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07004021 if (sp->config.intr_type == MSI_X) {
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004022 if (sp->entries) {
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004023 kfree(sp->entries);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04004024 sp->mac_control.stats_info->sw_stat.mem_freed
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004025 += (sp->num_entries * sizeof(struct msix_entry));
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004026 }
4027 if (sp->s2io_entries) {
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004028 kfree(sp->s2io_entries);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04004029 sp->mac_control.stats_info->sw_stat.mem_freed
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004030 += (sp->num_entries * sizeof(struct s2io_msix_entry));
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004031 }
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004032 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004033 return err;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004034}
4035
4036/**
4037 * s2io_close -close entry point of the driver
4038 * @dev : device pointer.
4039 * Description:
4040 * This is the stop entry point of the driver. It needs to undo exactly
4041 * whatever was done by the open entry point,thus it's usually referred to
4042 * as the close function.Among other things this function mainly stops the
4043 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
4044 * Return value:
4045 * 0 on success and an appropriate (-)ve integer as defined in errno.h
4046 * file on failure.
4047 */
4048
Adrian Bunkac1f60d2005-11-06 01:46:47 +01004049static int s2io_close(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004050{
Wang Chen4cf16532008-11-12 23:38:14 -08004051 struct s2io_nic *sp = netdev_priv(dev);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004052 struct config_param *config = &sp->config;
4053 u64 tmp64;
4054 int offset;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004055
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05004056 /* Return if the device is already closed *
4057 * Can happen when s2io_card_up failed in change_mtu *
4058 */
4059 if (!is_s2io_card_up(sp))
4060 return 0;
4061
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004062 s2io_stop_all_tx_queue(sp);
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004063 /* delete all populated mac entries */
4064 for (offset = 1; offset < config->max_mc_addr; offset++) {
4065 tmp64 = do_s2io_read_unicast_mc(sp, offset);
4066 if (tmp64 != S2IO_DISABLE_MAC_ENTRY)
4067 do_s2io_delete_unicast_mc(sp, tmp64);
4068 }
4069
Ananda Rajue6a8fee2006-07-06 23:58:23 -07004070 s2io_card_down(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004071
Linus Torvalds1da177e2005-04-16 15:20:36 -07004072 return 0;
4073}
4074
4075/**
4076 * s2io_xmit - Tx entry point of te driver
4077 * @skb : the socket buffer containing the Tx data.
4078 * @dev : device pointer.
4079 * Description :
4080 * This function is the Tx entry point of the driver. S2IO NIC supports
4081 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
4082 * NOTE: when device cant queue the pkt,just the trans_start variable will
4083 * not be upadted.
4084 * Return value:
4085 * 0 on success & 1 on failure.
4086 */
4087
Adrian Bunkac1f60d2005-11-06 01:46:47 +01004088static int s2io_xmit(struct sk_buff *skb, struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004089{
Wang Chen4cf16532008-11-12 23:38:14 -08004090 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004091 u16 frg_cnt, frg_len, i, queue, queue_len, put_off, get_off;
4092 register u64 val64;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004093 struct TxD *txdp;
4094 struct TxFIFO_element __iomem *tx_fifo;
Surjit Reang2fda0962008-01-24 02:08:59 -08004095 unsigned long flags = 0;
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004096 u16 vlan_tag = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08004097 struct fifo_info *fifo = NULL;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004098 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004099 struct config_param *config;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004100 int do_spin_lock = 1;
Ananda Raju75c30b12006-07-24 19:55:09 -04004101 int offload_type;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004102 int enable_per_list_interrupt = 0;
Veena Parat491abf22007-07-23 02:37:14 -04004103 struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004104
4105 mac_control = &sp->mac_control;
4106 config = &sp->config;
4107
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004108 DBG_PRINT(TX_DBG, "%s: In Neterion Tx routine\n", dev->name);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004109
4110 if (unlikely(skb->len <= 0)) {
4111 DBG_PRINT(TX_DBG, "%s:Buffer has no data..\n", dev->name);
4112 dev_kfree_skb_any(skb);
4113 return 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08004114 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004115
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004116 if (!is_s2io_card_up(sp)) {
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004117 DBG_PRINT(TX_DBG, "%s: Card going down for reset\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07004118 dev->name);
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004119 dev_kfree_skb(skb);
4120 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004121 }
4122
4123 queue = 0;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004124 if (sp->vlgrp && vlan_tx_tag_present(skb))
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004125 vlan_tag = vlan_tx_tag_get(skb);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004126 if (sp->config.tx_steering_type == TX_DEFAULT_STEERING) {
4127 if (skb->protocol == htons(ETH_P_IP)) {
4128 struct iphdr *ip;
4129 struct tcphdr *th;
4130 ip = ip_hdr(skb);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004131
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004132 if ((ip->frag_off & htons(IP_OFFSET|IP_MF)) == 0) {
4133 th = (struct tcphdr *)(((unsigned char *)ip) +
4134 ip->ihl*4);
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004135
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004136 if (ip->protocol == IPPROTO_TCP) {
4137 queue_len = sp->total_tcp_fifos;
4138 queue = (ntohs(th->source) +
4139 ntohs(th->dest)) &
4140 sp->fifo_selector[queue_len - 1];
4141 if (queue >= queue_len)
4142 queue = queue_len - 1;
4143 } else if (ip->protocol == IPPROTO_UDP) {
4144 queue_len = sp->total_udp_fifos;
4145 queue = (ntohs(th->source) +
4146 ntohs(th->dest)) &
4147 sp->fifo_selector[queue_len - 1];
4148 if (queue >= queue_len)
4149 queue = queue_len - 1;
4150 queue += sp->udp_fifo_idx;
4151 if (skb->len > 1024)
4152 enable_per_list_interrupt = 1;
4153 do_spin_lock = 0;
4154 }
4155 }
4156 }
4157 } else if (sp->config.tx_steering_type == TX_PRIORITY_STEERING)
4158 /* get fifo number based on skb->priority value */
4159 queue = config->fifo_mapping
4160 [skb->priority & (MAX_TX_FIFOS - 1)];
Surjit Reang2fda0962008-01-24 02:08:59 -08004161 fifo = &mac_control->fifos[queue];
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004162
4163 if (do_spin_lock)
4164 spin_lock_irqsave(&fifo->tx_lock, flags);
4165 else {
4166 if (unlikely(!spin_trylock_irqsave(&fifo->tx_lock, flags)))
4167 return NETDEV_TX_LOCKED;
4168 }
4169
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004170 if (sp->config.multiq) {
4171 if (__netif_subqueue_stopped(dev, fifo->fifo_no)) {
4172 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4173 return NETDEV_TX_BUSY;
4174 }
David S. Millerb19fa1f2008-07-08 23:14:24 -07004175 } else if (unlikely(fifo->queue_state == FIFO_QUEUE_STOP)) {
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004176 if (netif_queue_stopped(dev)) {
4177 spin_unlock_irqrestore(&fifo->tx_lock, flags);
4178 return NETDEV_TX_BUSY;
4179 }
4180 }
4181
Surjit Reang2fda0962008-01-24 02:08:59 -08004182 put_off = (u16) fifo->tx_curr_put_info.offset;
4183 get_off = (u16) fifo->tx_curr_get_info.offset;
4184 txdp = (struct TxD *) fifo->list_info[put_off].list_virt_addr;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004185
Surjit Reang2fda0962008-01-24 02:08:59 -08004186 queue_len = fifo->tx_curr_put_info.fifo_len + 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004187 /* Avoid "put" pointer going beyond "get" pointer */
Ananda Raju863c11a2006-04-21 19:03:13 -04004188 if (txdp->Host_Control ||
4189 ((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07004190 DBG_PRINT(TX_DBG, "Error in xmit, No free TXDs.\n");
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004191 s2io_stop_tx_queue(sp, fifo->fifo_no);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004192 dev_kfree_skb(skb);
Surjit Reang2fda0962008-01-24 02:08:59 -08004193 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004194 return 0;
4195 }
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07004196
Ananda Raju75c30b12006-07-24 19:55:09 -04004197 offload_type = s2io_offload_type(skb);
Ananda Raju75c30b12006-07-24 19:55:09 -04004198 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004199 txdp->Control_1 |= TXD_TCP_LSO_EN;
Ananda Raju75c30b12006-07-24 19:55:09 -04004200 txdp->Control_1 |= TXD_TCP_LSO_MSS(s2io_tcp_mss(skb));
Linus Torvalds1da177e2005-04-16 15:20:36 -07004201 }
Patrick McHardy84fa7932006-08-29 16:44:56 -07004202 if (skb->ip_summed == CHECKSUM_PARTIAL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07004203 txdp->Control_2 |=
4204 (TXD_TX_CKO_IPV4_EN | TXD_TX_CKO_TCP_EN |
4205 TXD_TX_CKO_UDP_EN);
4206 }
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004207 txdp->Control_1 |= TXD_GATHER_CODE_FIRST;
4208 txdp->Control_1 |= TXD_LIST_OWN_XENA;
Surjit Reang2fda0962008-01-24 02:08:59 -08004209 txdp->Control_2 |= TXD_INT_NUMBER(fifo->fifo_no);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05004210 if (enable_per_list_interrupt)
4211 if (put_off & (queue_len >> 5))
4212 txdp->Control_2 |= TXD_INT_TYPE_PER_LIST;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004213 if (vlan_tag) {
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07004214 txdp->Control_2 |= TXD_VLAN_ENABLE;
4215 txdp->Control_2 |= TXD_VLAN_TAG(vlan_tag);
4216 }
4217
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004218 frg_len = skb->len - skb->data_len;
Ananda Raju75c30b12006-07-24 19:55:09 -04004219 if (offload_type == SKB_GSO_UDP) {
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004220 int ufo_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004221
Ananda Raju75c30b12006-07-24 19:55:09 -04004222 ufo_size = s2io_udp_mss(skb);
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004223 ufo_size &= ~7;
4224 txdp->Control_1 |= TXD_UFO_EN;
4225 txdp->Control_1 |= TXD_UFO_MSS(ufo_size);
4226 txdp->Control_1 |= TXD_BUFFER0_SIZE(8);
4227#ifdef __BIG_ENDIAN
Al Viro3459feb2008-03-16 22:23:14 +00004228 /* both variants do cpu_to_be64(be32_to_cpu(...)) */
Surjit Reang2fda0962008-01-24 02:08:59 -08004229 fifo->ufo_in_band_v[put_off] =
Al Viro3459feb2008-03-16 22:23:14 +00004230 (__force u64)skb_shinfo(skb)->ip6_frag_id;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004231#else
Surjit Reang2fda0962008-01-24 02:08:59 -08004232 fifo->ufo_in_band_v[put_off] =
Al Viro3459feb2008-03-16 22:23:14 +00004233 (__force u64)skb_shinfo(skb)->ip6_frag_id << 32;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004234#endif
Surjit Reang2fda0962008-01-24 02:08:59 -08004235 txdp->Host_Control = (unsigned long)fifo->ufo_in_band_v;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004236 txdp->Buffer_Pointer = pci_map_single(sp->pdev,
Surjit Reang2fda0962008-01-24 02:08:59 -08004237 fifo->ufo_in_band_v,
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004238 sizeof(u64), PCI_DMA_TODEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004239 if (pci_dma_mapping_error(sp->pdev, txdp->Buffer_Pointer))
Veena Parat491abf22007-07-23 02:37:14 -04004240 goto pci_map_failed;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004241 txdp++;
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004242 }
4243
4244 txdp->Buffer_Pointer = pci_map_single
4245 (sp->pdev, skb->data, frg_len, PCI_DMA_TODEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004246 if (pci_dma_mapping_error(sp->pdev, txdp->Buffer_Pointer))
Veena Parat491abf22007-07-23 02:37:14 -04004247 goto pci_map_failed;
4248
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004249 txdp->Host_Control = (unsigned long) skb;
4250 txdp->Control_1 |= TXD_BUFFER0_SIZE(frg_len);
Ananda Raju75c30b12006-07-24 19:55:09 -04004251 if (offload_type == SKB_GSO_UDP)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004252 txdp->Control_1 |= TXD_UFO_EN;
4253
4254 frg_cnt = skb_shinfo(skb)->nr_frags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004255 /* For fragmented SKB. */
4256 for (i = 0; i < frg_cnt; i++) {
4257 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07004258 /* A '0' length fragment will be ignored */
4259 if (!frag->size)
4260 continue;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004261 txdp++;
4262 txdp->Buffer_Pointer = (u64) pci_map_page
4263 (sp->pdev, frag->page, frag->page_offset,
4264 frag->size, PCI_DMA_TODEVICE);
Ananda Rajuefd51b52006-01-19 14:11:54 -05004265 txdp->Control_1 = TXD_BUFFER0_SIZE(frag->size);
Ananda Raju75c30b12006-07-24 19:55:09 -04004266 if (offload_type == SKB_GSO_UDP)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004267 txdp->Control_1 |= TXD_UFO_EN;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004268 }
4269 txdp->Control_1 |= TXD_GATHER_CODE_LAST;
4270
Ananda Raju75c30b12006-07-24 19:55:09 -04004271 if (offload_type == SKB_GSO_UDP)
Ananda Rajufed5ecc2005-11-14 15:25:08 -05004272 frg_cnt++; /* as Txd0 was used for inband header */
4273
Linus Torvalds1da177e2005-04-16 15:20:36 -07004274 tx_fifo = mac_control->tx_FIFO_start[queue];
Surjit Reang2fda0962008-01-24 02:08:59 -08004275 val64 = fifo->list_info[put_off].list_phy_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004276 writeq(val64, &tx_fifo->TxDL_Pointer);
4277
4278 val64 = (TX_FIFO_LAST_TXD_NUM(frg_cnt) | TX_FIFO_FIRST_LIST |
4279 TX_FIFO_LAST_LIST);
Ananda Raju75c30b12006-07-24 19:55:09 -04004280 if (offload_type)
4281 val64 |= TX_FIFO_SPECIAL_FUNC;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004282
Linus Torvalds1da177e2005-04-16 15:20:36 -07004283 writeq(val64, &tx_fifo->List_Control);
4284
raghavendra.koushik@neterion.com303bcb42005-08-03 12:41:38 -07004285 mmiowb();
4286
Linus Torvalds1da177e2005-04-16 15:20:36 -07004287 put_off++;
Surjit Reang2fda0962008-01-24 02:08:59 -08004288 if (put_off == fifo->tx_curr_put_info.fifo_len + 1)
Ananda Raju863c11a2006-04-21 19:03:13 -04004289 put_off = 0;
Surjit Reang2fda0962008-01-24 02:08:59 -08004290 fifo->tx_curr_put_info.offset = put_off;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004291
4292 /* Avoid "put" pointer going beyond "get" pointer */
Ananda Raju863c11a2006-04-21 19:03:13 -04004293 if (((put_off+1) == queue_len ? 0 : (put_off+1)) == get_off) {
Ananda Rajubd1034f2006-04-21 19:20:22 -04004294 sp->mac_control.stats_info->sw_stat.fifo_full_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004295 DBG_PRINT(TX_DBG,
4296 "No free TxDs for xmit, Put: 0x%x Get:0x%x\n",
4297 put_off, get_off);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004298 s2io_stop_tx_queue(sp, fifo->fifo_no);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004299 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04004300 mac_control->stats_info->sw_stat.mem_allocated += skb->truesize;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004301 dev->trans_start = jiffies;
Surjit Reang2fda0962008-01-24 02:08:59 -08004302 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004303
Sreenivasa Honnurf6f4bfa2008-03-25 15:11:56 -04004304 if (sp->config.intr_type == MSI_X)
4305 tx_intr_handler(fifo);
4306
Linus Torvalds1da177e2005-04-16 15:20:36 -07004307 return 0;
Veena Parat491abf22007-07-23 02:37:14 -04004308pci_map_failed:
4309 stats->pci_map_fail_cnt++;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004310 s2io_stop_tx_queue(sp, fifo->fifo_no);
Veena Parat491abf22007-07-23 02:37:14 -04004311 stats->mem_freed += skb->truesize;
4312 dev_kfree_skb(skb);
Surjit Reang2fda0962008-01-24 02:08:59 -08004313 spin_unlock_irqrestore(&fifo->tx_lock, flags);
Veena Parat491abf22007-07-23 02:37:14 -04004314 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004315}
4316
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07004317static void
4318s2io_alarm_handle(unsigned long data)
4319{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004320 struct s2io_nic *sp = (struct s2io_nic *)data;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004321 struct net_device *dev = sp->dev;
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07004322
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004323 s2io_handle_errors(dev);
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07004324 mod_timer(&sp->alarm_timer, jiffies + HZ / 2);
4325}
4326
David Howells7d12e782006-10-05 14:55:46 +01004327static irqreturn_t s2io_msix_ring_handle(int irq, void *dev_id)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004328{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004329 struct ring_info *ring = (struct ring_info *)dev_id;
4330 struct s2io_nic *sp = ring->nic;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004331 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004332
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004333 if (unlikely(!is_s2io_card_up(sp)))
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004334 return IRQ_HANDLED;
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004335
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004336 if (sp->config.napi) {
Al Viro1a79d1c2008-06-02 10:59:02 +01004337 u8 __iomem *addr = NULL;
4338 u8 val8 = 0;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004339
Al Viro1a79d1c2008-06-02 10:59:02 +01004340 addr = (u8 __iomem *)&bar0->xmsi_mask_reg;
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004341 addr += (7 - ring->ring_no);
4342 val8 = (ring->ring_no == 0) ? 0x7f : 0xff;
4343 writeb(val8, addr);
4344 val8 = readb(addr);
Neil Horman908a7a12008-12-22 20:43:12 -08004345 netif_rx_schedule(&ring->napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004346 } else {
4347 rx_intr_handler(ring, 0);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004348 s2io_chk_rx_buffers(sp, ring);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004349 }
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05004350
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004351 return IRQ_HANDLED;
4352}
4353
David Howells7d12e782006-10-05 14:55:46 +01004354static irqreturn_t s2io_msix_fifo_handle(int irq, void *dev_id)
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004355{
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004356 int i;
4357 struct fifo_info *fifos = (struct fifo_info *)dev_id;
4358 struct s2io_nic *sp = fifos->nic;
4359 struct XENA_dev_config __iomem *bar0 = sp->bar0;
4360 struct config_param *config = &sp->config;
4361 u64 reason;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004362
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004363 if (unlikely(!is_s2io_card_up(sp)))
4364 return IRQ_NONE;
4365
4366 reason = readq(&bar0->general_int_status);
4367 if (unlikely(reason == S2IO_MINUS_ONE))
4368 /* Nothing much can be done. Get out */
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004369 return IRQ_HANDLED;
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004370
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004371 if (reason & (GEN_INTR_TXPIC | GEN_INTR_TXTRAFFIC)) {
4372 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004373
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004374 if (reason & GEN_INTR_TXPIC)
4375 s2io_txpic_intr_handle(sp);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004376
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004377 if (reason & GEN_INTR_TXTRAFFIC)
4378 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004379
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004380 for (i = 0; i < config->tx_fifo_num; i++)
4381 tx_intr_handler(&fifos[i]);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004382
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04004383 writeq(sp->general_int_mask, &bar0->general_int_mask);
4384 readl(&bar0->general_int_status);
4385 return IRQ_HANDLED;
4386 }
4387 /* The interrupt was not raised by us */
4388 return IRQ_NONE;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04004389}
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04004390
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004391static void s2io_txpic_intr_handle(struct s2io_nic *sp)
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004392{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004393 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004394 u64 val64;
4395
4396 val64 = readq(&bar0->pic_int_status);
4397 if (val64 & PIC_INT_GPIO) {
4398 val64 = readq(&bar0->gpio_int_reg);
4399 if ((val64 & GPIO_INT_REG_LINK_DOWN) &&
4400 (val64 & GPIO_INT_REG_LINK_UP)) {
Ananda Rajuc92ca042006-04-21 19:18:03 -04004401 /*
4402 * This is unstable state so clear both up/down
4403 * interrupt and adapter to re-evaluate the link state.
4404 */
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004405 val64 |= GPIO_INT_REG_LINK_DOWN;
4406 val64 |= GPIO_INT_REG_LINK_UP;
4407 writeq(val64, &bar0->gpio_int_reg);
Ananda Rajuc92ca042006-04-21 19:18:03 -04004408 val64 = readq(&bar0->gpio_int_mask);
4409 val64 &= ~(GPIO_INT_MASK_LINK_UP |
4410 GPIO_INT_MASK_LINK_DOWN);
4411 writeq(val64, &bar0->gpio_int_mask);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004412 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04004413 else if (val64 & GPIO_INT_REG_LINK_UP) {
4414 val64 = readq(&bar0->adapter_status);
Ananda Rajuc92ca042006-04-21 19:18:03 -04004415 /* Enable Adapter */
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004416 val64 = readq(&bar0->adapter_control);
4417 val64 |= ADAPTER_CNTL_EN;
4418 writeq(val64, &bar0->adapter_control);
4419 val64 |= ADAPTER_LED_ON;
4420 writeq(val64, &bar0->adapter_control);
4421 if (!sp->device_enabled_once)
4422 sp->device_enabled_once = 1;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004423
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004424 s2io_link(sp, LINK_UP);
4425 /*
4426 * unmask link down interrupt and mask link-up
4427 * intr
4428 */
4429 val64 = readq(&bar0->gpio_int_mask);
4430 val64 &= ~GPIO_INT_MASK_LINK_DOWN;
4431 val64 |= GPIO_INT_MASK_LINK_UP;
4432 writeq(val64, &bar0->gpio_int_mask);
Ananda Rajuc92ca042006-04-21 19:18:03 -04004433
Ananda Rajuc92ca042006-04-21 19:18:03 -04004434 }else if (val64 & GPIO_INT_REG_LINK_DOWN) {
4435 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004436 s2io_link(sp, LINK_DOWN);
4437 /* Link is down so unmaks link up interrupt */
4438 val64 = readq(&bar0->gpio_int_mask);
4439 val64 &= ~GPIO_INT_MASK_LINK_UP;
4440 val64 |= GPIO_INT_MASK_LINK_DOWN;
4441 writeq(val64, &bar0->gpio_int_mask);
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05004442
4443 /* turn off LED */
4444 val64 = readq(&bar0->adapter_control);
4445 val64 = val64 &(~ADAPTER_LED_ON);
4446 writeq(val64, &bar0->adapter_control);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004447 }
4448 }
Ananda Rajuc92ca042006-04-21 19:18:03 -04004449 val64 = readq(&bar0->gpio_int_mask);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07004450}
4451
Linus Torvalds1da177e2005-04-16 15:20:36 -07004452/**
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004453 * do_s2io_chk_alarm_bit - Check for alarm and incrment the counter
4454 * @value: alarm bits
4455 * @addr: address value
4456 * @cnt: counter variable
4457 * Description: Check for alarm and increment the counter
4458 * Return Value:
4459 * 1 - if alarm bit set
4460 * 0 - if alarm bit is not set
4461 */
Stephen Hemminger43b7c452007-10-05 12:39:21 -07004462static int do_s2io_chk_alarm_bit(u64 value, void __iomem * addr,
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004463 unsigned long long *cnt)
4464{
4465 u64 val64;
4466 val64 = readq(addr);
4467 if ( val64 & value ) {
4468 writeq(val64, addr);
4469 (*cnt)++;
4470 return 1;
4471 }
4472 return 0;
4473
4474}
4475
4476/**
4477 * s2io_handle_errors - Xframe error indication handler
4478 * @nic: device private variable
4479 * Description: Handle alarms such as loss of link, single or
4480 * double ECC errors, critical and serious errors.
4481 * Return Value:
4482 * NONE
4483 */
4484static void s2io_handle_errors(void * dev_id)
4485{
4486 struct net_device *dev = (struct net_device *) dev_id;
Wang Chen4cf16532008-11-12 23:38:14 -08004487 struct s2io_nic *sp = netdev_priv(dev);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004488 struct XENA_dev_config __iomem *bar0 = sp->bar0;
4489 u64 temp64 = 0,val64=0;
4490 int i = 0;
4491
4492 struct swStat *sw_stat = &sp->mac_control.stats_info->sw_stat;
4493 struct xpakStat *stats = &sp->mac_control.stats_info->xpak_stat;
4494
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004495 if (!is_s2io_card_up(sp))
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004496 return;
4497
4498 if (pci_channel_offline(sp->pdev))
4499 return;
4500
4501 memset(&sw_stat->ring_full_cnt, 0,
4502 sizeof(sw_stat->ring_full_cnt));
4503
4504 /* Handling the XPAK counters update */
4505 if(stats->xpak_timer_count < 72000) {
4506 /* waiting for an hour */
4507 stats->xpak_timer_count++;
4508 } else {
4509 s2io_updt_xpak_counter(dev);
4510 /* reset the count to zero */
4511 stats->xpak_timer_count = 0;
4512 }
4513
4514 /* Handling link status change error Intr */
4515 if (s2io_link_fault_indication(sp) == MAC_RMAC_ERR_TIMER) {
4516 val64 = readq(&bar0->mac_rmac_err_reg);
4517 writeq(val64, &bar0->mac_rmac_err_reg);
4518 if (val64 & RMAC_LINK_STATE_CHANGE_INT)
4519 schedule_work(&sp->set_link_task);
4520 }
4521
4522 /* In case of a serious error, the device will be Reset. */
4523 if (do_s2io_chk_alarm_bit(SERR_SOURCE_ANY, &bar0->serr_source,
4524 &sw_stat->serious_err_cnt))
4525 goto reset;
4526
4527 /* Check for data parity error */
4528 if (do_s2io_chk_alarm_bit(GPIO_INT_REG_DP_ERR_INT, &bar0->gpio_int_reg,
4529 &sw_stat->parity_err_cnt))
4530 goto reset;
4531
4532 /* Check for ring full counter */
4533 if (sp->device_type == XFRAME_II_DEVICE) {
4534 val64 = readq(&bar0->ring_bump_counter1);
4535 for (i=0; i<4; i++) {
4536 temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
4537 temp64 >>= 64 - ((i+1)*16);
4538 sw_stat->ring_full_cnt[i] += temp64;
4539 }
4540
4541 val64 = readq(&bar0->ring_bump_counter2);
4542 for (i=0; i<4; i++) {
4543 temp64 = ( val64 & vBIT(0xFFFF,(i*16),16));
4544 temp64 >>= 64 - ((i+1)*16);
4545 sw_stat->ring_full_cnt[i+4] += temp64;
4546 }
4547 }
4548
4549 val64 = readq(&bar0->txdma_int_status);
4550 /*check for pfc_err*/
4551 if (val64 & TXDMA_PFC_INT) {
4552 if (do_s2io_chk_alarm_bit(PFC_ECC_DB_ERR | PFC_SM_ERR_ALARM|
4553 PFC_MISC_0_ERR | PFC_MISC_1_ERR|
4554 PFC_PCIX_ERR, &bar0->pfc_err_reg,
4555 &sw_stat->pfc_err_cnt))
4556 goto reset;
4557 do_s2io_chk_alarm_bit(PFC_ECC_SG_ERR, &bar0->pfc_err_reg,
4558 &sw_stat->pfc_err_cnt);
4559 }
4560
4561 /*check for tda_err*/
4562 if (val64 & TXDMA_TDA_INT) {
4563 if(do_s2io_chk_alarm_bit(TDA_Fn_ECC_DB_ERR | TDA_SM0_ERR_ALARM |
4564 TDA_SM1_ERR_ALARM, &bar0->tda_err_reg,
4565 &sw_stat->tda_err_cnt))
4566 goto reset;
4567 do_s2io_chk_alarm_bit(TDA_Fn_ECC_SG_ERR | TDA_PCIX_ERR,
4568 &bar0->tda_err_reg, &sw_stat->tda_err_cnt);
4569 }
4570 /*check for pcc_err*/
4571 if (val64 & TXDMA_PCC_INT) {
4572 if (do_s2io_chk_alarm_bit(PCC_SM_ERR_ALARM | PCC_WR_ERR_ALARM
4573 | PCC_N_SERR | PCC_6_COF_OV_ERR
4574 | PCC_7_COF_OV_ERR | PCC_6_LSO_OV_ERR
4575 | PCC_7_LSO_OV_ERR | PCC_FB_ECC_DB_ERR
4576 | PCC_TXB_ECC_DB_ERR, &bar0->pcc_err_reg,
4577 &sw_stat->pcc_err_cnt))
4578 goto reset;
4579 do_s2io_chk_alarm_bit(PCC_FB_ECC_SG_ERR | PCC_TXB_ECC_SG_ERR,
4580 &bar0->pcc_err_reg, &sw_stat->pcc_err_cnt);
4581 }
4582
4583 /*check for tti_err*/
4584 if (val64 & TXDMA_TTI_INT) {
4585 if (do_s2io_chk_alarm_bit(TTI_SM_ERR_ALARM, &bar0->tti_err_reg,
4586 &sw_stat->tti_err_cnt))
4587 goto reset;
4588 do_s2io_chk_alarm_bit(TTI_ECC_SG_ERR | TTI_ECC_DB_ERR,
4589 &bar0->tti_err_reg, &sw_stat->tti_err_cnt);
4590 }
4591
4592 /*check for lso_err*/
4593 if (val64 & TXDMA_LSO_INT) {
4594 if (do_s2io_chk_alarm_bit(LSO6_ABORT | LSO7_ABORT
4595 | LSO6_SM_ERR_ALARM | LSO7_SM_ERR_ALARM,
4596 &bar0->lso_err_reg, &sw_stat->lso_err_cnt))
4597 goto reset;
4598 do_s2io_chk_alarm_bit(LSO6_SEND_OFLOW | LSO7_SEND_OFLOW,
4599 &bar0->lso_err_reg, &sw_stat->lso_err_cnt);
4600 }
4601
4602 /*check for tpa_err*/
4603 if (val64 & TXDMA_TPA_INT) {
4604 if (do_s2io_chk_alarm_bit(TPA_SM_ERR_ALARM, &bar0->tpa_err_reg,
4605 &sw_stat->tpa_err_cnt))
4606 goto reset;
4607 do_s2io_chk_alarm_bit(TPA_TX_FRM_DROP, &bar0->tpa_err_reg,
4608 &sw_stat->tpa_err_cnt);
4609 }
4610
4611 /*check for sm_err*/
4612 if (val64 & TXDMA_SM_INT) {
4613 if (do_s2io_chk_alarm_bit(SM_SM_ERR_ALARM, &bar0->sm_err_reg,
4614 &sw_stat->sm_err_cnt))
4615 goto reset;
4616 }
4617
4618 val64 = readq(&bar0->mac_int_status);
4619 if (val64 & MAC_INT_STATUS_TMAC_INT) {
4620 if (do_s2io_chk_alarm_bit(TMAC_TX_BUF_OVRN | TMAC_TX_SM_ERR,
4621 &bar0->mac_tmac_err_reg,
4622 &sw_stat->mac_tmac_err_cnt))
4623 goto reset;
4624 do_s2io_chk_alarm_bit(TMAC_ECC_SG_ERR | TMAC_ECC_DB_ERR
4625 | TMAC_DESC_ECC_SG_ERR | TMAC_DESC_ECC_DB_ERR,
4626 &bar0->mac_tmac_err_reg,
4627 &sw_stat->mac_tmac_err_cnt);
4628 }
4629
4630 val64 = readq(&bar0->xgxs_int_status);
4631 if (val64 & XGXS_INT_STATUS_TXGXS) {
4632 if (do_s2io_chk_alarm_bit(TXGXS_ESTORE_UFLOW | TXGXS_TX_SM_ERR,
4633 &bar0->xgxs_txgxs_err_reg,
4634 &sw_stat->xgxs_txgxs_err_cnt))
4635 goto reset;
4636 do_s2io_chk_alarm_bit(TXGXS_ECC_SG_ERR | TXGXS_ECC_DB_ERR,
4637 &bar0->xgxs_txgxs_err_reg,
4638 &sw_stat->xgxs_txgxs_err_cnt);
4639 }
4640
4641 val64 = readq(&bar0->rxdma_int_status);
4642 if (val64 & RXDMA_INT_RC_INT_M) {
4643 if (do_s2io_chk_alarm_bit(RC_PRCn_ECC_DB_ERR | RC_FTC_ECC_DB_ERR
4644 | RC_PRCn_SM_ERR_ALARM |RC_FTC_SM_ERR_ALARM,
4645 &bar0->rc_err_reg, &sw_stat->rc_err_cnt))
4646 goto reset;
4647 do_s2io_chk_alarm_bit(RC_PRCn_ECC_SG_ERR | RC_FTC_ECC_SG_ERR
4648 | RC_RDA_FAIL_WR_Rn, &bar0->rc_err_reg,
4649 &sw_stat->rc_err_cnt);
4650 if (do_s2io_chk_alarm_bit(PRC_PCI_AB_RD_Rn | PRC_PCI_AB_WR_Rn
4651 | PRC_PCI_AB_F_WR_Rn, &bar0->prc_pcix_err_reg,
4652 &sw_stat->prc_pcix_err_cnt))
4653 goto reset;
4654 do_s2io_chk_alarm_bit(PRC_PCI_DP_RD_Rn | PRC_PCI_DP_WR_Rn
4655 | PRC_PCI_DP_F_WR_Rn, &bar0->prc_pcix_err_reg,
4656 &sw_stat->prc_pcix_err_cnt);
4657 }
4658
4659 if (val64 & RXDMA_INT_RPA_INT_M) {
4660 if (do_s2io_chk_alarm_bit(RPA_SM_ERR_ALARM | RPA_CREDIT_ERR,
4661 &bar0->rpa_err_reg, &sw_stat->rpa_err_cnt))
4662 goto reset;
4663 do_s2io_chk_alarm_bit(RPA_ECC_SG_ERR | RPA_ECC_DB_ERR,
4664 &bar0->rpa_err_reg, &sw_stat->rpa_err_cnt);
4665 }
4666
4667 if (val64 & RXDMA_INT_RDA_INT_M) {
4668 if (do_s2io_chk_alarm_bit(RDA_RXDn_ECC_DB_ERR
4669 | RDA_FRM_ECC_DB_N_AERR | RDA_SM1_ERR_ALARM
4670 | RDA_SM0_ERR_ALARM | RDA_RXD_ECC_DB_SERR,
4671 &bar0->rda_err_reg, &sw_stat->rda_err_cnt))
4672 goto reset;
4673 do_s2io_chk_alarm_bit(RDA_RXDn_ECC_SG_ERR | RDA_FRM_ECC_SG_ERR
4674 | RDA_MISC_ERR | RDA_PCIX_ERR,
4675 &bar0->rda_err_reg, &sw_stat->rda_err_cnt);
4676 }
4677
4678 if (val64 & RXDMA_INT_RTI_INT_M) {
4679 if (do_s2io_chk_alarm_bit(RTI_SM_ERR_ALARM, &bar0->rti_err_reg,
4680 &sw_stat->rti_err_cnt))
4681 goto reset;
4682 do_s2io_chk_alarm_bit(RTI_ECC_SG_ERR | RTI_ECC_DB_ERR,
4683 &bar0->rti_err_reg, &sw_stat->rti_err_cnt);
4684 }
4685
4686 val64 = readq(&bar0->mac_int_status);
4687 if (val64 & MAC_INT_STATUS_RMAC_INT) {
4688 if (do_s2io_chk_alarm_bit(RMAC_RX_BUFF_OVRN | RMAC_RX_SM_ERR,
4689 &bar0->mac_rmac_err_reg,
4690 &sw_stat->mac_rmac_err_cnt))
4691 goto reset;
4692 do_s2io_chk_alarm_bit(RMAC_UNUSED_INT|RMAC_SINGLE_ECC_ERR|
4693 RMAC_DOUBLE_ECC_ERR, &bar0->mac_rmac_err_reg,
4694 &sw_stat->mac_rmac_err_cnt);
4695 }
4696
4697 val64 = readq(&bar0->xgxs_int_status);
4698 if (val64 & XGXS_INT_STATUS_RXGXS) {
4699 if (do_s2io_chk_alarm_bit(RXGXS_ESTORE_OFLOW | RXGXS_RX_SM_ERR,
4700 &bar0->xgxs_rxgxs_err_reg,
4701 &sw_stat->xgxs_rxgxs_err_cnt))
4702 goto reset;
4703 }
4704
4705 val64 = readq(&bar0->mc_int_status);
4706 if(val64 & MC_INT_STATUS_MC_INT) {
4707 if (do_s2io_chk_alarm_bit(MC_ERR_REG_SM_ERR, &bar0->mc_err_reg,
4708 &sw_stat->mc_err_cnt))
4709 goto reset;
4710
4711 /* Handling Ecc errors */
4712 if (val64 & (MC_ERR_REG_ECC_ALL_SNG | MC_ERR_REG_ECC_ALL_DBL)) {
4713 writeq(val64, &bar0->mc_err_reg);
4714 if (val64 & MC_ERR_REG_ECC_ALL_DBL) {
4715 sw_stat->double_ecc_errs++;
4716 if (sp->device_type != XFRAME_II_DEVICE) {
4717 /*
4718 * Reset XframeI only if critical error
4719 */
4720 if (val64 &
4721 (MC_ERR_REG_MIRI_ECC_DB_ERR_0 |
4722 MC_ERR_REG_MIRI_ECC_DB_ERR_1))
4723 goto reset;
4724 }
4725 } else
4726 sw_stat->single_ecc_errs++;
4727 }
4728 }
4729 return;
4730
4731reset:
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05004732 s2io_stop_all_tx_queue(sp);
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07004733 schedule_work(&sp->rst_timer_task);
4734 sw_stat->soft_reset_cnt++;
4735 return;
4736}
4737
4738/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07004739 * s2io_isr - ISR handler of the device .
4740 * @irq: the irq of the device.
4741 * @dev_id: a void pointer to the dev structure of the NIC.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004742 * Description: This function is the ISR handler of the device. It
4743 * identifies the reason for the interrupt and calls the relevant
4744 * service routines. As a contongency measure, this ISR allocates the
Linus Torvalds1da177e2005-04-16 15:20:36 -07004745 * recv buffers, if their numbers are below the panic value which is
4746 * presently set to 25% of the original number of rcv buffers allocated.
4747 * Return value:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004748 * IRQ_HANDLED: will be returned if IRQ was handled by this routine
Linus Torvalds1da177e2005-04-16 15:20:36 -07004749 * IRQ_NONE: will be returned if interrupt is not from our device
4750 */
David Howells7d12e782006-10-05 14:55:46 +01004751static irqreturn_t s2io_isr(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004752{
4753 struct net_device *dev = (struct net_device *) dev_id;
Wang Chen4cf16532008-11-12 23:38:14 -08004754 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004755 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004756 int i;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004757 u64 reason = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004758 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004759 struct config_param *config;
4760
Linas Vepstasd796fdb2007-05-14 18:37:30 -05004761 /* Pretend we handled any irq's from a disconnected card */
4762 if (pci_channel_offline(sp->pdev))
4763 return IRQ_NONE;
4764
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004765 if (!is_s2io_card_up(sp))
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004766 return IRQ_NONE;
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004767
Linus Torvalds1da177e2005-04-16 15:20:36 -07004768 mac_control = &sp->mac_control;
4769 config = &sp->config;
4770
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004771 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07004772 * Identify the cause for interrupt and call the appropriate
4773 * interrupt handler. Causes for the interrupt could be;
4774 * 1. Rx of packet.
4775 * 2. Tx complete.
4776 * 3. Link down.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004777 */
4778 reason = readq(&bar0->general_int_status);
4779
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004780 if (unlikely(reason == S2IO_MINUS_ONE) ) {
4781 /* Nothing much can be done. Get out */
4782 return IRQ_HANDLED;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004783 }
4784
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004785 if (reason & (GEN_INTR_RXTRAFFIC |
4786 GEN_INTR_TXTRAFFIC | GEN_INTR_TXPIC))
4787 {
4788 writeq(S2IO_MINUS_ONE, &bar0->general_int_mask);
4789
4790 if (config->napi) {
4791 if (reason & GEN_INTR_RXTRAFFIC) {
Neil Horman908a7a12008-12-22 20:43:12 -08004792 netif_rx_schedule(&sp->napi);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004793 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_mask);
4794 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
4795 readl(&bar0->rx_traffic_int);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004796 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004797 } else {
4798 /*
4799 * rx_traffic_int reg is an R1 register, writing all 1's
4800 * will ensure that the actual interrupt causing bit
4801 * get's cleared and hence a read can be avoided.
4802 */
4803 if (reason & GEN_INTR_RXTRAFFIC)
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004804 writeq(S2IO_MINUS_ONE, &bar0->rx_traffic_int);
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004805
4806 for (i = 0; i < config->rx_ring_num; i++)
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04004807 rx_intr_handler(&mac_control->rings[i], 0);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004808 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004809
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004810 /*
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004811 * tx_traffic_int reg is an R1 register, writing all 1's
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05004812 * will ensure that the actual interrupt causing bit get's
4813 * cleared and hence a read can be avoided.
4814 */
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004815 if (reason & GEN_INTR_TXTRAFFIC)
4816 writeq(S2IO_MINUS_ONE, &bar0->tx_traffic_int);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05004817
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004818 for (i = 0; i < config->tx_fifo_num; i++)
4819 tx_intr_handler(&mac_control->fifos[i]);
4820
4821 if (reason & GEN_INTR_TXPIC)
4822 s2io_txpic_intr_handle(sp);
4823
4824 /*
4825 * Reallocate the buffers from the interrupt handler itself.
4826 */
4827 if (!config->napi) {
4828 for (i = 0; i < config->rx_ring_num; i++)
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07004829 s2io_chk_rx_buffers(sp, &mac_control->rings[i]);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004830 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07004831 writeq(sp->general_int_mask, &bar0->general_int_mask);
4832 readl(&bar0->general_int_status);
4833
4834 return IRQ_HANDLED;
4835
4836 }
4837 else if (!reason) {
4838 /* The interrupt was not raised by us */
4839 return IRQ_NONE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004840 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07004841
Linus Torvalds1da177e2005-04-16 15:20:36 -07004842 return IRQ_HANDLED;
4843}
4844
4845/**
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004846 * s2io_updt_stats -
4847 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004848static void s2io_updt_stats(struct s2io_nic *sp)
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004849{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004850 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004851 u64 val64;
4852 int cnt = 0;
4853
Sivakumar Subramani92b84432007-09-06 06:51:14 -04004854 if (is_s2io_card_up(sp)) {
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004855 /* Apprx 30us on a 133 MHz bus */
4856 val64 = SET_UPDT_CLICKS(10) |
4857 STAT_CFG_ONE_SHOT_EN | STAT_CFG_STAT_EN;
4858 writeq(val64, &bar0->stat_cfg);
4859 do {
4860 udelay(100);
4861 val64 = readq(&bar0->stat_cfg);
Jiri Slabyb7b5a122007-10-18 23:40:29 -07004862 if (!(val64 & s2BIT(0)))
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004863 break;
4864 cnt++;
4865 if (cnt == 5)
4866 break; /* Updt failed */
4867 } while(1);
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04004868 }
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004869}
4870
4871/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004872 * s2io_get_stats - Updates the device statistics structure.
Linus Torvalds1da177e2005-04-16 15:20:36 -07004873 * @dev : pointer to the device structure.
4874 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004875 * This function updates the device statistics structure in the s2io_nic
Linus Torvalds1da177e2005-04-16 15:20:36 -07004876 * structure and returns a pointer to the same.
4877 * Return value:
4878 * pointer to the updated net_device_stats structure.
4879 */
4880
Adrian Bunkac1f60d2005-11-06 01:46:47 +01004881static struct net_device_stats *s2io_get_stats(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07004882{
Wang Chen4cf16532008-11-12 23:38:14 -08004883 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004884 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004885 struct config_param *config;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04004886 int i;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004887
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004888
Linus Torvalds1da177e2005-04-16 15:20:36 -07004889 mac_control = &sp->mac_control;
4890 config = &sp->config;
4891
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004892 /* Configure Stats for immediate updt */
4893 s2io_updt_stats(sp);
4894
Breno Leitaodc56e632008-07-22 16:27:20 -03004895 /* Using sp->stats as a staging area, because reset (due to mtu
4896 change, for example) will clear some hardware counters */
4897 dev->stats.tx_packets +=
4898 le32_to_cpu(mac_control->stats_info->tmac_frms) -
4899 sp->stats.tx_packets;
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07004900 sp->stats.tx_packets =
4901 le32_to_cpu(mac_control->stats_info->tmac_frms);
Breno Leitaodc56e632008-07-22 16:27:20 -03004902 dev->stats.tx_errors +=
4903 le32_to_cpu(mac_control->stats_info->tmac_any_err_frms) -
4904 sp->stats.tx_errors;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004905 sp->stats.tx_errors =
4906 le32_to_cpu(mac_control->stats_info->tmac_any_err_frms);
Breno Leitaodc56e632008-07-22 16:27:20 -03004907 dev->stats.rx_errors +=
4908 le64_to_cpu(mac_control->stats_info->rmac_drop_frms) -
4909 sp->stats.rx_errors;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004910 sp->stats.rx_errors =
Al Viroee705db2006-09-23 01:28:17 +01004911 le64_to_cpu(mac_control->stats_info->rmac_drop_frms);
Breno Leitaodc56e632008-07-22 16:27:20 -03004912 dev->stats.multicast =
4913 le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms) -
4914 sp->stats.multicast;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004915 sp->stats.multicast =
4916 le32_to_cpu(mac_control->stats_info->rmac_vld_mcst_frms);
Breno Leitaodc56e632008-07-22 16:27:20 -03004917 dev->stats.rx_length_errors =
4918 le64_to_cpu(mac_control->stats_info->rmac_long_frms) -
4919 sp->stats.rx_length_errors;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004920 sp->stats.rx_length_errors =
Al Viroee705db2006-09-23 01:28:17 +01004921 le64_to_cpu(mac_control->stats_info->rmac_long_frms);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004922
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04004923 /* collect per-ring rx_packets and rx_bytes */
Breno Leitaodc56e632008-07-22 16:27:20 -03004924 dev->stats.rx_packets = dev->stats.rx_bytes = 0;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04004925 for (i = 0; i < config->rx_ring_num; i++) {
Breno Leitaodc56e632008-07-22 16:27:20 -03004926 dev->stats.rx_packets += mac_control->rings[i].rx_packets;
4927 dev->stats.rx_bytes += mac_control->rings[i].rx_bytes;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04004928 }
4929
Breno Leitaodc56e632008-07-22 16:27:20 -03004930 return (&dev->stats);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004931}
4932
4933/**
4934 * s2io_set_multicast - entry point for multicast address enable/disable.
4935 * @dev : pointer to the device structure
4936 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07004937 * This function is a driver entry point which gets called by the kernel
4938 * whenever multicast addresses must be enabled/disabled. This also gets
Linus Torvalds1da177e2005-04-16 15:20:36 -07004939 * called to set/reset promiscuous mode. Depending on the deivce flag, we
4940 * determine, if multicast address must be enabled or if promiscuous mode
4941 * is to be disabled etc.
4942 * Return value:
4943 * void.
4944 */
4945
4946static void s2io_set_multicast(struct net_device *dev)
4947{
4948 int i, j, prev_cnt;
4949 struct dev_mc_list *mclist;
Wang Chen4cf16532008-11-12 23:38:14 -08004950 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05004951 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004952 u64 val64 = 0, multi_mac = 0x010203040506ULL, mask =
4953 0xfeffffffffffULL;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004954 u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, mac_addr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004955 void __iomem *add;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004956 struct config_param *config = &sp->config;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004957
4958 if ((dev->flags & IFF_ALLMULTI) && (!sp->m_cast_flg)) {
4959 /* Enable all Multicast addresses */
4960 writeq(RMAC_ADDR_DATA0_MEM_ADDR(multi_mac),
4961 &bar0->rmac_addr_data0_mem);
4962 writeq(RMAC_ADDR_DATA1_MEM_MASK(mask),
4963 &bar0->rmac_addr_data1_mem);
4964 val64 = RMAC_ADDR_CMD_MEM_WE |
4965 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004966 RMAC_ADDR_CMD_MEM_OFFSET(config->max_mc_addr - 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004967 writeq(val64, &bar0->rmac_addr_cmd_mem);
4968 /* Wait till command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04004969 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05004970 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
4971 S2IO_BIT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004972
4973 sp->m_cast_flg = 1;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08004974 sp->all_multi_pos = config->max_mc_addr - 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07004975 } else if ((dev->flags & IFF_ALLMULTI) && (sp->m_cast_flg)) {
4976 /* Disable all Multicast addresses */
4977 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
4978 &bar0->rmac_addr_data0_mem);
raghavendra.koushik@neterion.com5e25b9d2005-08-03 12:27:09 -07004979 writeq(RMAC_ADDR_DATA1_MEM_MASK(0x0),
4980 &bar0->rmac_addr_data1_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004981 val64 = RMAC_ADDR_CMD_MEM_WE |
4982 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
4983 RMAC_ADDR_CMD_MEM_OFFSET(sp->all_multi_pos);
4984 writeq(val64, &bar0->rmac_addr_cmd_mem);
4985 /* Wait till command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04004986 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05004987 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
4988 S2IO_BIT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07004989
4990 sp->m_cast_flg = 0;
4991 sp->all_multi_pos = 0;
4992 }
4993
4994 if ((dev->flags & IFF_PROMISC) && (!sp->promisc_flg)) {
4995 /* Put the NIC into promiscuous mode */
4996 add = &bar0->mac_cfg;
4997 val64 = readq(&bar0->mac_cfg);
4998 val64 |= MAC_CFG_RMAC_PROM_ENABLE;
4999
5000 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
5001 writel((u32) val64, add);
5002 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
5003 writel((u32) (val64 >> 32), (add + 4));
5004
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005005 if (vlan_tag_strip != 1) {
5006 val64 = readq(&bar0->rx_pa_cfg);
5007 val64 &= ~RX_PA_CFG_STRIP_VLAN_TAG;
5008 writeq(val64, &bar0->rx_pa_cfg);
Breno Leitaocd0fce02008-09-04 17:52:54 -03005009 sp->vlan_strip_flag = 0;
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005010 }
5011
Linus Torvalds1da177e2005-04-16 15:20:36 -07005012 val64 = readq(&bar0->mac_cfg);
5013 sp->promisc_flg = 1;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07005014 DBG_PRINT(INFO_DBG, "%s: entered promiscuous mode\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07005015 dev->name);
5016 } else if (!(dev->flags & IFF_PROMISC) && (sp->promisc_flg)) {
5017 /* Remove the NIC from promiscuous mode */
5018 add = &bar0->mac_cfg;
5019 val64 = readq(&bar0->mac_cfg);
5020 val64 &= ~MAC_CFG_RMAC_PROM_ENABLE;
5021
5022 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
5023 writel((u32) val64, add);
5024 writeq(RMAC_CFG_KEY(0x4C0D), &bar0->rmac_cfg_key);
5025 writel((u32) (val64 >> 32), (add + 4));
5026
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005027 if (vlan_tag_strip != 0) {
5028 val64 = readq(&bar0->rx_pa_cfg);
5029 val64 |= RX_PA_CFG_STRIP_VLAN_TAG;
5030 writeq(val64, &bar0->rx_pa_cfg);
Breno Leitaocd0fce02008-09-04 17:52:54 -03005031 sp->vlan_strip_flag = 1;
Sivakumar Subramani926930b2007-02-24 01:59:39 -05005032 }
5033
Linus Torvalds1da177e2005-04-16 15:20:36 -07005034 val64 = readq(&bar0->mac_cfg);
5035 sp->promisc_flg = 0;
ravinandan.arakali@neterion.com776bd202005-09-06 21:36:56 -07005036 DBG_PRINT(INFO_DBG, "%s: left promiscuous mode\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07005037 dev->name);
5038 }
5039
5040 /* Update individual M_CAST address list */
5041 if ((!sp->m_cast_flg) && dev->mc_count) {
5042 if (dev->mc_count >
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005043 (config->max_mc_addr - config->max_mac_addr)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005044 DBG_PRINT(ERR_DBG, "%s: No more Rx filters ",
5045 dev->name);
5046 DBG_PRINT(ERR_DBG, "can be added, please enable ");
5047 DBG_PRINT(ERR_DBG, "ALL_MULTI instead\n");
5048 return;
5049 }
5050
5051 prev_cnt = sp->mc_addr_count;
5052 sp->mc_addr_count = dev->mc_count;
5053
5054 /* Clear out the previous list of Mc in the H/W. */
5055 for (i = 0; i < prev_cnt; i++) {
5056 writeq(RMAC_ADDR_DATA0_MEM_ADDR(dis_addr),
5057 &bar0->rmac_addr_data0_mem);
5058 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005059 &bar0->rmac_addr_data1_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005060 val64 = RMAC_ADDR_CMD_MEM_WE |
5061 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5062 RMAC_ADDR_CMD_MEM_OFFSET
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005063 (config->mc_start_offset + i);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005064 writeq(val64, &bar0->rmac_addr_cmd_mem);
5065
5066 /* Wait for command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04005067 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05005068 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5069 S2IO_BIT_RESET)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005070 DBG_PRINT(ERR_DBG, "%s: Adding ",
5071 dev->name);
5072 DBG_PRINT(ERR_DBG, "Multicasts failed\n");
5073 return;
5074 }
5075 }
5076
5077 /* Create the new Rx filter list and update the same in H/W. */
5078 for (i = 0, mclist = dev->mc_list; i < dev->mc_count;
5079 i++, mclist = mclist->next) {
5080 memcpy(sp->usr_addrs[i].addr, mclist->dmi_addr,
5081 ETH_ALEN);
Jeff Garzika7a80d52006-03-04 12:06:51 -05005082 mac_addr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005083 for (j = 0; j < ETH_ALEN; j++) {
5084 mac_addr |= mclist->dmi_addr[j];
5085 mac_addr <<= 8;
5086 }
5087 mac_addr >>= 8;
5088 writeq(RMAC_ADDR_DATA0_MEM_ADDR(mac_addr),
5089 &bar0->rmac_addr_data0_mem);
5090 writeq(RMAC_ADDR_DATA1_MEM_MASK(0ULL),
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005091 &bar0->rmac_addr_data1_mem);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005092 val64 = RMAC_ADDR_CMD_MEM_WE |
5093 RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5094 RMAC_ADDR_CMD_MEM_OFFSET
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005095 (i + config->mc_start_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005096 writeq(val64, &bar0->rmac_addr_cmd_mem);
5097
5098 /* Wait for command completes */
Ananda Rajuc92ca042006-04-21 19:18:03 -04005099 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05005100 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5101 S2IO_BIT_RESET)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005102 DBG_PRINT(ERR_DBG, "%s: Adding ",
5103 dev->name);
5104 DBG_PRINT(ERR_DBG, "Multicasts failed\n");
5105 return;
5106 }
5107 }
5108 }
5109}
5110
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005111/* read from CAM unicast & multicast addresses and store it in
5112 * def_mac_addr structure
5113 */
Hannes Ederdac499f2008-12-25 23:56:45 -08005114static void do_s2io_store_unicast_mc(struct s2io_nic *sp)
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005115{
5116 int offset;
5117 u64 mac_addr = 0x0;
5118 struct config_param *config = &sp->config;
5119
5120 /* store unicast & multicast mac addresses */
5121 for (offset = 0; offset < config->max_mc_addr; offset++) {
5122 mac_addr = do_s2io_read_unicast_mc(sp, offset);
5123 /* if read fails disable the entry */
5124 if (mac_addr == FAILURE)
5125 mac_addr = S2IO_DISABLE_MAC_ENTRY;
5126 do_s2io_copy_mac_addr(sp, offset, mac_addr);
5127 }
5128}
5129
5130/* restore unicast & multicast MAC to CAM from def_mac_addr structure */
5131static void do_s2io_restore_unicast_mc(struct s2io_nic *sp)
5132{
5133 int offset;
5134 struct config_param *config = &sp->config;
5135 /* restore unicast mac address */
5136 for (offset = 0; offset < config->max_mac_addr; offset++)
5137 do_s2io_prog_unicast(sp->dev,
5138 sp->def_mac_addr[offset].mac_addr);
5139
5140 /* restore multicast mac address */
5141 for (offset = config->mc_start_offset;
5142 offset < config->max_mc_addr; offset++)
5143 do_s2io_add_mc(sp, sp->def_mac_addr[offset].mac_addr);
5144}
5145
5146/* add a multicast MAC address to CAM */
5147static int do_s2io_add_mc(struct s2io_nic *sp, u8 *addr)
5148{
5149 int i;
5150 u64 mac_addr = 0;
5151 struct config_param *config = &sp->config;
5152
5153 for (i = 0; i < ETH_ALEN; i++) {
5154 mac_addr <<= 8;
5155 mac_addr |= addr[i];
5156 }
5157 if ((0ULL == mac_addr) || (mac_addr == S2IO_DISABLE_MAC_ENTRY))
5158 return SUCCESS;
5159
5160 /* check if the multicast mac already preset in CAM */
5161 for (i = config->mc_start_offset; i < config->max_mc_addr; i++) {
5162 u64 tmp64;
5163 tmp64 = do_s2io_read_unicast_mc(sp, i);
5164 if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
5165 break;
5166
5167 if (tmp64 == mac_addr)
5168 return SUCCESS;
5169 }
5170 if (i == config->max_mc_addr) {
5171 DBG_PRINT(ERR_DBG,
5172 "CAM full no space left for multicast MAC\n");
5173 return FAILURE;
5174 }
5175 /* Update the internal structure with this new mac address */
5176 do_s2io_copy_mac_addr(sp, i, mac_addr);
5177
5178 return (do_s2io_add_mac(sp, mac_addr, i));
5179}
5180
5181/* add MAC address to CAM */
5182static int do_s2io_add_mac(struct s2io_nic *sp, u64 addr, int off)
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005183{
5184 u64 val64;
5185 struct XENA_dev_config __iomem *bar0 = sp->bar0;
5186
5187 writeq(RMAC_ADDR_DATA0_MEM_ADDR(addr),
5188 &bar0->rmac_addr_data0_mem);
5189
5190 val64 =
5191 RMAC_ADDR_CMD_MEM_WE | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5192 RMAC_ADDR_CMD_MEM_OFFSET(off);
5193 writeq(val64, &bar0->rmac_addr_cmd_mem);
5194
5195 /* Wait till command completes */
5196 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
5197 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5198 S2IO_BIT_RESET)) {
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005199 DBG_PRINT(INFO_DBG, "do_s2io_add_mac failed\n");
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005200 return FAILURE;
5201 }
5202 return SUCCESS;
5203}
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005204/* deletes a specified unicast/multicast mac entry from CAM */
5205static int do_s2io_delete_unicast_mc(struct s2io_nic *sp, u64 addr)
5206{
5207 int offset;
5208 u64 dis_addr = S2IO_DISABLE_MAC_ENTRY, tmp64;
5209 struct config_param *config = &sp->config;
5210
5211 for (offset = 1;
5212 offset < config->max_mc_addr; offset++) {
5213 tmp64 = do_s2io_read_unicast_mc(sp, offset);
5214 if (tmp64 == addr) {
5215 /* disable the entry by writing 0xffffffffffffULL */
5216 if (do_s2io_add_mac(sp, dis_addr, offset) == FAILURE)
5217 return FAILURE;
5218 /* store the new mac list from CAM */
5219 do_s2io_store_unicast_mc(sp);
5220 return SUCCESS;
5221 }
5222 }
5223 DBG_PRINT(ERR_DBG, "MAC address 0x%llx not found in CAM\n",
5224 (unsigned long long)addr);
5225 return FAILURE;
5226}
5227
5228/* read mac entries from CAM */
5229static u64 do_s2io_read_unicast_mc(struct s2io_nic *sp, int offset)
5230{
5231 u64 tmp64 = 0xffffffffffff0000ULL, val64;
5232 struct XENA_dev_config __iomem *bar0 = sp->bar0;
5233
5234 /* read mac addr */
5235 val64 =
5236 RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
5237 RMAC_ADDR_CMD_MEM_OFFSET(offset);
5238 writeq(val64, &bar0->rmac_addr_cmd_mem);
5239
5240 /* Wait till command completes */
5241 if (wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
5242 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING,
5243 S2IO_BIT_RESET)) {
5244 DBG_PRINT(INFO_DBG, "do_s2io_read_unicast_mc failed\n");
5245 return FAILURE;
5246 }
5247 tmp64 = readq(&bar0->rmac_addr_data0_mem);
5248 return (tmp64 >> 16);
5249}
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005250
Linus Torvalds1da177e2005-04-16 15:20:36 -07005251/**
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005252 * s2io_set_mac_addr driver entry point
5253 */
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005254
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005255static int s2io_set_mac_addr(struct net_device *dev, void *p)
5256{
5257 struct sockaddr *addr = p;
5258
5259 if (!is_valid_ether_addr(addr->sa_data))
5260 return -EINVAL;
5261
5262 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
5263
5264 /* store the MAC address in CAM */
5265 return (do_s2io_prog_unicast(dev, dev->dev_addr));
5266}
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005267/**
5268 * do_s2io_prog_unicast - Programs the Xframe mac address
Linus Torvalds1da177e2005-04-16 15:20:36 -07005269 * @dev : pointer to the device structure.
5270 * @addr: a uchar pointer to the new mac address which is to be set.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005271 * Description : This procedure will program the Xframe to receive
Linus Torvalds1da177e2005-04-16 15:20:36 -07005272 * frames with new Mac Address
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005273 * Return value: SUCCESS on success and an appropriate (-)ve integer
Linus Torvalds1da177e2005-04-16 15:20:36 -07005274 * as defined in errno.h file on failure.
5275 */
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005276
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005277static int do_s2io_prog_unicast(struct net_device *dev, u8 *addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005278{
Wang Chen4cf16532008-11-12 23:38:14 -08005279 struct s2io_nic *sp = netdev_priv(dev);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005280 register u64 mac_addr = 0, perm_addr = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005281 int i;
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005282 u64 tmp64;
5283 struct config_param *config = &sp->config;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005284
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005285 /*
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005286 * Set the new MAC address as the new unicast filter and reflect this
5287 * change on the device address registered with the OS. It will be
5288 * at offset 0.
5289 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07005290 for (i = 0; i < ETH_ALEN; i++) {
5291 mac_addr <<= 8;
5292 mac_addr |= addr[i];
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005293 perm_addr <<= 8;
5294 perm_addr |= sp->def_mac_addr[0].mac_addr[i];
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05005295 }
5296
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04005297 /* check if the dev_addr is different than perm_addr */
5298 if (mac_addr == perm_addr)
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05005299 return SUCCESS;
5300
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005301 /* check if the mac already preset in CAM */
5302 for (i = 1; i < config->max_mac_addr; i++) {
5303 tmp64 = do_s2io_read_unicast_mc(sp, i);
5304 if (tmp64 == S2IO_DISABLE_MAC_ENTRY) /* CAM entry is empty */
5305 break;
5306
5307 if (tmp64 == mac_addr) {
5308 DBG_PRINT(INFO_DBG,
5309 "MAC addr:0x%llx already present in CAM\n",
5310 (unsigned long long)mac_addr);
5311 return SUCCESS;
5312 }
5313 }
5314 if (i == config->max_mac_addr) {
5315 DBG_PRINT(ERR_DBG, "CAM full no space left for Unicast MAC\n");
5316 return FAILURE;
5317 }
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05005318 /* Update the internal structure with this new mac address */
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08005319 do_s2io_copy_mac_addr(sp, i, mac_addr);
5320 return (do_s2io_add_mac(sp, mac_addr, i));
Linus Torvalds1da177e2005-04-16 15:20:36 -07005321}
5322
5323/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005324 * s2io_ethtool_sset - Sets different link parameters.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005325 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
5326 * @info: pointer to the structure with parameters given by ethtool to set
5327 * link information.
5328 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005329 * The function sets different link parameters provided by the user onto
Linus Torvalds1da177e2005-04-16 15:20:36 -07005330 * the NIC.
5331 * Return value:
5332 * 0 on success.
5333*/
5334
5335static int s2io_ethtool_sset(struct net_device *dev,
5336 struct ethtool_cmd *info)
5337{
Wang Chen4cf16532008-11-12 23:38:14 -08005338 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005339 if ((info->autoneg == AUTONEG_ENABLE) ||
5340 (info->speed != SPEED_10000) || (info->duplex != DUPLEX_FULL))
5341 return -EINVAL;
5342 else {
5343 s2io_close(sp->dev);
5344 s2io_open(sp->dev);
5345 }
5346
5347 return 0;
5348}
5349
5350/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005351 * s2io_ethtol_gset - Return link specific information.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005352 * @sp : private member of the device structure, pointer to the
5353 * s2io_nic structure.
5354 * @info : pointer to the structure with parameters given by ethtool
5355 * to return link information.
5356 * Description:
5357 * Returns link specific information like speed, duplex etc.. to ethtool.
5358 * Return value :
5359 * return 0 on success.
5360 */
5361
5362static int s2io_ethtool_gset(struct net_device *dev, struct ethtool_cmd *info)
5363{
Wang Chen4cf16532008-11-12 23:38:14 -08005364 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005365 info->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
5366 info->advertising = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
5367 info->port = PORT_FIBRE;
Sivakumar Subramani1a7eb722007-09-14 07:43:16 -04005368
5369 /* info->transceiver */
5370 info->transceiver = XCVR_EXTERNAL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005371
5372 if (netif_carrier_ok(sp->dev)) {
5373 info->speed = 10000;
5374 info->duplex = DUPLEX_FULL;
5375 } else {
5376 info->speed = -1;
5377 info->duplex = -1;
5378 }
5379
5380 info->autoneg = AUTONEG_DISABLE;
5381 return 0;
5382}
5383
5384/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005385 * s2io_ethtool_gdrvinfo - Returns driver specific information.
5386 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005387 * s2io_nic structure.
5388 * @info : pointer to the structure with parameters given by ethtool to
5389 * return driver information.
5390 * Description:
5391 * Returns driver specefic information like name, version etc.. to ethtool.
5392 * Return value:
5393 * void
5394 */
5395
5396static void s2io_ethtool_gdrvinfo(struct net_device *dev,
5397 struct ethtool_drvinfo *info)
5398{
Wang Chen4cf16532008-11-12 23:38:14 -08005399 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005400
John W. Linvilledbc23092005-09-28 17:50:51 -04005401 strncpy(info->driver, s2io_driver_name, sizeof(info->driver));
5402 strncpy(info->version, s2io_driver_version, sizeof(info->version));
5403 strncpy(info->fw_version, "", sizeof(info->fw_version));
5404 strncpy(info->bus_info, pci_name(sp->pdev), sizeof(info->bus_info));
Linus Torvalds1da177e2005-04-16 15:20:36 -07005405 info->regdump_len = XENA_REG_SPACE;
5406 info->eedump_len = XENA_EEPROM_SPACE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005407}
5408
5409/**
5410 * s2io_ethtool_gregs - dumps the entire space of Xfame into the buffer.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005411 * @sp: private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005412 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005413 * @regs : pointer to the structure with parameters given by ethtool for
Linus Torvalds1da177e2005-04-16 15:20:36 -07005414 * dumping the registers.
5415 * @reg_space: The input argumnet into which all the registers are dumped.
5416 * Description:
5417 * Dumps the entire register space of xFrame NIC into the user given
5418 * buffer area.
5419 * Return value :
5420 * void .
5421*/
5422
5423static void s2io_ethtool_gregs(struct net_device *dev,
5424 struct ethtool_regs *regs, void *space)
5425{
5426 int i;
5427 u64 reg;
5428 u8 *reg_space = (u8 *) space;
Wang Chen4cf16532008-11-12 23:38:14 -08005429 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005430
5431 regs->len = XENA_REG_SPACE;
5432 regs->version = sp->pdev->subsystem_device;
5433
5434 for (i = 0; i < regs->len; i += 8) {
5435 reg = readq(sp->bar0 + i);
5436 memcpy((reg_space + i), &reg, 8);
5437 }
5438}
5439
5440/**
5441 * s2io_phy_id - timer function that alternates adapter LED.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005442 * @data : address of the private member of the device structure, which
Linus Torvalds1da177e2005-04-16 15:20:36 -07005443 * is a pointer to the s2io_nic structure, provided as an u32.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005444 * Description: This is actually the timer function that alternates the
5445 * adapter LED bit of the adapter control bit to set/reset every time on
5446 * invocation. The timer is set for 1/2 a second, hence tha NIC blinks
Linus Torvalds1da177e2005-04-16 15:20:36 -07005447 * once every second.
5448*/
5449static void s2io_phy_id(unsigned long data)
5450{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005451 struct s2io_nic *sp = (struct s2io_nic *) data;
5452 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005453 u64 val64 = 0;
5454 u16 subid;
5455
5456 subid = sp->pdev->subsystem_device;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07005457 if ((sp->device_type == XFRAME_II_DEVICE) ||
5458 ((subid & 0xFF) >= 0x07)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005459 val64 = readq(&bar0->gpio_control);
5460 val64 ^= GPIO_CTRL_GPIO_0;
5461 writeq(val64, &bar0->gpio_control);
5462 } else {
5463 val64 = readq(&bar0->adapter_control);
5464 val64 ^= ADAPTER_LED_ON;
5465 writeq(val64, &bar0->adapter_control);
5466 }
5467
5468 mod_timer(&sp->id_timer, jiffies + HZ / 2);
5469}
5470
5471/**
5472 * s2io_ethtool_idnic - To physically identify the nic on the system.
5473 * @sp : private member of the device structure, which is a pointer to the
5474 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005475 * @id : pointer to the structure with identification parameters given by
Linus Torvalds1da177e2005-04-16 15:20:36 -07005476 * ethtool.
5477 * Description: Used to physically identify the NIC on the system.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005478 * The Link LED will blink for a time specified by the user for
Linus Torvalds1da177e2005-04-16 15:20:36 -07005479 * identification.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005480 * NOTE: The Link has to be Up to be able to blink the LED. Hence
Linus Torvalds1da177e2005-04-16 15:20:36 -07005481 * identification is possible only if it's link is up.
5482 * Return value:
5483 * int , returns 0 on success
5484 */
5485
5486static int s2io_ethtool_idnic(struct net_device *dev, u32 data)
5487{
5488 u64 val64 = 0, last_gpio_ctrl_val;
Wang Chen4cf16532008-11-12 23:38:14 -08005489 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005490 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005491 u16 subid;
5492
5493 subid = sp->pdev->subsystem_device;
5494 last_gpio_ctrl_val = readq(&bar0->gpio_control);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07005495 if ((sp->device_type == XFRAME_I_DEVICE) &&
5496 ((subid & 0xFF) < 0x07)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005497 val64 = readq(&bar0->adapter_control);
5498 if (!(val64 & ADAPTER_CNTL_EN)) {
5499 printk(KERN_ERR
5500 "Adapter Link down, cannot blink LED\n");
5501 return -EFAULT;
5502 }
5503 }
5504 if (sp->id_timer.function == NULL) {
5505 init_timer(&sp->id_timer);
5506 sp->id_timer.function = s2io_phy_id;
5507 sp->id_timer.data = (unsigned long) sp;
5508 }
5509 mod_timer(&sp->id_timer, jiffies);
5510 if (data)
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005511 msleep_interruptible(data * HZ);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005512 else
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005513 msleep_interruptible(MAX_FLICKER_TIME);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005514 del_timer_sync(&sp->id_timer);
5515
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07005516 if (CARDS_WITH_FAULTY_LINK_INDICATORS(sp->device_type, subid)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005517 writeq(last_gpio_ctrl_val, &bar0->gpio_control);
5518 last_gpio_ctrl_val = readq(&bar0->gpio_control);
5519 }
5520
5521 return 0;
5522}
5523
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005524static void s2io_ethtool_gringparam(struct net_device *dev,
5525 struct ethtool_ringparam *ering)
5526{
Wang Chen4cf16532008-11-12 23:38:14 -08005527 struct s2io_nic *sp = netdev_priv(dev);
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005528 int i,tx_desc_count=0,rx_desc_count=0;
5529
5530 if (sp->rxd_mode == RXD_MODE_1)
5531 ering->rx_max_pending = MAX_RX_DESC_1;
5532 else if (sp->rxd_mode == RXD_MODE_3B)
5533 ering->rx_max_pending = MAX_RX_DESC_2;
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005534
5535 ering->tx_max_pending = MAX_TX_DESC;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04005536 for (i = 0 ; i < sp->config.tx_fifo_num ; i++)
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005537 tx_desc_count += sp->config.tx_cfg[i].fifo_len;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04005538
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005539 DBG_PRINT(INFO_DBG,"\nmax txds : %d\n",sp->config.max_txds);
5540 ering->tx_pending = tx_desc_count;
5541 rx_desc_count = 0;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04005542 for (i = 0 ; i < sp->config.rx_ring_num ; i++)
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005543 rx_desc_count += sp->config.rx_cfg[i].num_rxd;
Veena Paratb6627672007-07-23 02:39:43 -04005544
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04005545 ering->rx_pending = rx_desc_count;
5546
5547 ering->rx_mini_max_pending = 0;
5548 ering->rx_mini_pending = 0;
5549 if(sp->rxd_mode == RXD_MODE_1)
5550 ering->rx_jumbo_max_pending = MAX_RX_DESC_1;
5551 else if (sp->rxd_mode == RXD_MODE_3B)
5552 ering->rx_jumbo_max_pending = MAX_RX_DESC_2;
5553 ering->rx_jumbo_pending = rx_desc_count;
5554}
5555
Linus Torvalds1da177e2005-04-16 15:20:36 -07005556/**
5557 * s2io_ethtool_getpause_data -Pause frame frame generation and reception.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005558 * @sp : private member of the device structure, which is a pointer to the
5559 * s2io_nic structure.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005560 * @ep : pointer to the structure with pause parameters given by ethtool.
5561 * Description:
5562 * Returns the Pause frame generation and reception capability of the NIC.
5563 * Return value:
5564 * void
5565 */
5566static void s2io_ethtool_getpause_data(struct net_device *dev,
5567 struct ethtool_pauseparam *ep)
5568{
5569 u64 val64;
Wang Chen4cf16532008-11-12 23:38:14 -08005570 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005571 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005572
5573 val64 = readq(&bar0->rmac_pause_cfg);
5574 if (val64 & RMAC_PAUSE_GEN_ENABLE)
5575 ep->tx_pause = TRUE;
5576 if (val64 & RMAC_PAUSE_RX_ENABLE)
5577 ep->rx_pause = TRUE;
5578 ep->autoneg = FALSE;
5579}
5580
5581/**
5582 * s2io_ethtool_setpause_data - set/reset pause frame generation.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005583 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005584 * s2io_nic structure.
5585 * @ep : pointer to the structure with pause parameters given by ethtool.
5586 * Description:
5587 * It can be used to set or reset Pause frame generation or reception
5588 * support of the NIC.
5589 * Return value:
5590 * int, returns 0 on Success
5591 */
5592
5593static int s2io_ethtool_setpause_data(struct net_device *dev,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005594 struct ethtool_pauseparam *ep)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005595{
5596 u64 val64;
Wang Chen4cf16532008-11-12 23:38:14 -08005597 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005598 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005599
5600 val64 = readq(&bar0->rmac_pause_cfg);
5601 if (ep->tx_pause)
5602 val64 |= RMAC_PAUSE_GEN_ENABLE;
5603 else
5604 val64 &= ~RMAC_PAUSE_GEN_ENABLE;
5605 if (ep->rx_pause)
5606 val64 |= RMAC_PAUSE_RX_ENABLE;
5607 else
5608 val64 &= ~RMAC_PAUSE_RX_ENABLE;
5609 writeq(val64, &bar0->rmac_pause_cfg);
5610 return 0;
5611}
5612
5613/**
5614 * read_eeprom - reads 4 bytes of data from user given offset.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005615 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005616 * s2io_nic structure.
5617 * @off : offset at which the data must be written
5618 * @data : Its an output parameter where the data read at the given
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005619 * offset is stored.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005620 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005621 * Will read 4 bytes of data from the user given offset and return the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005622 * read data.
5623 * NOTE: Will allow to read only part of the EEPROM visible through the
5624 * I2C bus.
5625 * Return value:
5626 * -1 on failure and 0 on success.
5627 */
5628
5629#define S2IO_DEV_ID 5
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005630static int read_eeprom(struct s2io_nic * sp, int off, u64 * data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005631{
5632 int ret = -1;
5633 u32 exit_cnt = 0;
5634 u64 val64;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005635 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005636
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005637 if (sp->device_type == XFRAME_I_DEVICE) {
5638 val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
5639 I2C_CONTROL_BYTE_CNT(0x3) | I2C_CONTROL_READ |
5640 I2C_CONTROL_CNTL_START;
5641 SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005642
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005643 while (exit_cnt < 5) {
5644 val64 = readq(&bar0->i2c_control);
5645 if (I2C_CONTROL_CNTL_END(val64)) {
5646 *data = I2C_CONTROL_GET_DATA(val64);
5647 ret = 0;
5648 break;
5649 }
5650 msleep(50);
5651 exit_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005652 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005653 }
5654
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005655 if (sp->device_type == XFRAME_II_DEVICE) {
5656 val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
Jeff Garzik6aa20a22006-09-13 13:24:59 -04005657 SPI_CONTROL_BYTECNT(0x3) |
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005658 SPI_CONTROL_CMD(0x3) | SPI_CONTROL_ADDR(off);
5659 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5660 val64 |= SPI_CONTROL_REQ;
5661 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5662 while (exit_cnt < 5) {
5663 val64 = readq(&bar0->spi_control);
5664 if (val64 & SPI_CONTROL_NACK) {
5665 ret = 1;
5666 break;
5667 } else if (val64 & SPI_CONTROL_DONE) {
5668 *data = readq(&bar0->spi_data);
5669 *data &= 0xffffff;
5670 ret = 0;
5671 break;
5672 }
5673 msleep(50);
5674 exit_cnt++;
5675 }
5676 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005677 return ret;
5678}
5679
5680/**
5681 * write_eeprom - actually writes the relevant part of the data value.
5682 * @sp : private member of the device structure, which is a pointer to the
5683 * s2io_nic structure.
5684 * @off : offset at which the data must be written
5685 * @data : The data that is to be written
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005686 * @cnt : Number of bytes of the data that are actually to be written into
Linus Torvalds1da177e2005-04-16 15:20:36 -07005687 * the Eeprom. (max of 3)
5688 * Description:
5689 * Actually writes the relevant part of the data value into the Eeprom
5690 * through the I2C bus.
5691 * Return value:
5692 * 0 on success, -1 on failure.
5693 */
5694
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005695static int write_eeprom(struct s2io_nic * sp, int off, u64 data, int cnt)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005696{
5697 int exit_cnt = 0, ret = -1;
5698 u64 val64;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005699 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005700
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005701 if (sp->device_type == XFRAME_I_DEVICE) {
5702 val64 = I2C_CONTROL_DEV_ID(S2IO_DEV_ID) | I2C_CONTROL_ADDR(off) |
5703 I2C_CONTROL_BYTE_CNT(cnt) | I2C_CONTROL_SET_DATA((u32)data) |
5704 I2C_CONTROL_CNTL_START;
5705 SPECIAL_REG_WRITE(val64, &bar0->i2c_control, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005706
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005707 while (exit_cnt < 5) {
5708 val64 = readq(&bar0->i2c_control);
5709 if (I2C_CONTROL_CNTL_END(val64)) {
5710 if (!(val64 & I2C_CONTROL_NACK))
5711 ret = 0;
5712 break;
5713 }
5714 msleep(50);
5715 exit_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005716 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005717 }
5718
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005719 if (sp->device_type == XFRAME_II_DEVICE) {
5720 int write_cnt = (cnt == 8) ? 0 : cnt;
5721 writeq(SPI_DATA_WRITE(data,(cnt<<3)), &bar0->spi_data);
5722
5723 val64 = SPI_CONTROL_KEY(0x9) | SPI_CONTROL_SEL1 |
Jeff Garzik6aa20a22006-09-13 13:24:59 -04005724 SPI_CONTROL_BYTECNT(write_cnt) |
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005725 SPI_CONTROL_CMD(0x2) | SPI_CONTROL_ADDR(off);
5726 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5727 val64 |= SPI_CONTROL_REQ;
5728 SPECIAL_REG_WRITE(val64, &bar0->spi_control, LF);
5729 while (exit_cnt < 5) {
5730 val64 = readq(&bar0->spi_control);
5731 if (val64 & SPI_CONTROL_NACK) {
5732 ret = 1;
5733 break;
5734 } else if (val64 & SPI_CONTROL_DONE) {
5735 ret = 0;
5736 break;
5737 }
5738 msleep(50);
5739 exit_cnt++;
5740 }
5741 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07005742 return ret;
5743}
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005744static void s2io_vpd_read(struct s2io_nic *nic)
Ananda Raju9dc737a2006-04-21 19:05:41 -04005745{
Ananda Rajub41477f2006-07-24 19:52:49 -04005746 u8 *vpd_data;
5747 u8 data;
Ananda Raju9dc737a2006-04-21 19:05:41 -04005748 int i=0, cnt, fail = 0;
5749 int vpd_addr = 0x80;
5750
5751 if (nic->device_type == XFRAME_II_DEVICE) {
5752 strcpy(nic->product_name, "Xframe II 10GbE network adapter");
5753 vpd_addr = 0x80;
5754 }
5755 else {
5756 strcpy(nic->product_name, "Xframe I 10GbE network adapter");
5757 vpd_addr = 0x50;
5758 }
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005759 strcpy(nic->serial_num, "NOT AVAILABLE");
Ananda Raju9dc737a2006-04-21 19:05:41 -04005760
Ananda Rajub41477f2006-07-24 19:52:49 -04005761 vpd_data = kmalloc(256, GFP_KERNEL);
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04005762 if (!vpd_data) {
5763 nic->mac_control.stats_info->sw_stat.mem_alloc_fail_cnt++;
Ananda Rajub41477f2006-07-24 19:52:49 -04005764 return;
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04005765 }
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04005766 nic->mac_control.stats_info->sw_stat.mem_allocated += 256;
Ananda Rajub41477f2006-07-24 19:52:49 -04005767
Ananda Raju9dc737a2006-04-21 19:05:41 -04005768 for (i = 0; i < 256; i +=4 ) {
5769 pci_write_config_byte(nic->pdev, (vpd_addr + 2), i);
5770 pci_read_config_byte(nic->pdev, (vpd_addr + 2), &data);
5771 pci_write_config_byte(nic->pdev, (vpd_addr + 3), 0);
5772 for (cnt = 0; cnt <5; cnt++) {
5773 msleep(2);
5774 pci_read_config_byte(nic->pdev, (vpd_addr + 3), &data);
5775 if (data == 0x80)
5776 break;
5777 }
5778 if (cnt >= 5) {
5779 DBG_PRINT(ERR_DBG, "Read of VPD data failed\n");
5780 fail = 1;
5781 break;
5782 }
5783 pci_read_config_dword(nic->pdev, (vpd_addr + 4),
5784 (u32 *)&vpd_data[i]);
5785 }
Sivakumar Subramani19a60522007-01-31 13:30:49 -05005786
5787 if(!fail) {
5788 /* read serial number of adapter */
5789 for (cnt = 0; cnt < 256; cnt++) {
5790 if ((vpd_data[cnt] == 'S') &&
5791 (vpd_data[cnt+1] == 'N') &&
5792 (vpd_data[cnt+2] < VPD_STRING_LEN)) {
5793 memset(nic->serial_num, 0, VPD_STRING_LEN);
5794 memcpy(nic->serial_num, &vpd_data[cnt + 3],
5795 vpd_data[cnt+2]);
5796 break;
5797 }
5798 }
5799 }
5800
5801 if ((!fail) && (vpd_data[1] < VPD_STRING_LEN)) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04005802 memset(nic->product_name, 0, vpd_data[1]);
5803 memcpy(nic->product_name, &vpd_data[3], vpd_data[1]);
5804 }
Ananda Rajub41477f2006-07-24 19:52:49 -04005805 kfree(vpd_data);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04005806 nic->mac_control.stats_info->sw_stat.mem_freed += 256;
Ananda Raju9dc737a2006-04-21 19:05:41 -04005807}
5808
Linus Torvalds1da177e2005-04-16 15:20:36 -07005809/**
5810 * s2io_ethtool_geeprom - reads the value stored in the Eeprom.
5811 * @sp : private member of the device structure, which is a pointer to the * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005812 * @eeprom : pointer to the user level structure provided by ethtool,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005813 * containing all relevant information.
5814 * @data_buf : user defined value to be written into Eeprom.
5815 * Description: Reads the values stored in the Eeprom at given offset
5816 * for a given length. Stores these values int the input argument data
5817 * buffer 'data_buf' and returns these to the caller (ethtool.)
5818 * Return value:
5819 * int 0 on success
5820 */
5821
5822static int s2io_ethtool_geeprom(struct net_device *dev,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005823 struct ethtool_eeprom *eeprom, u8 * data_buf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005824{
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005825 u32 i, valid;
5826 u64 data;
Wang Chen4cf16532008-11-12 23:38:14 -08005827 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005828
5829 eeprom->magic = sp->pdev->vendor | (sp->pdev->device << 16);
5830
5831 if ((eeprom->offset + eeprom->len) > (XENA_EEPROM_SPACE))
5832 eeprom->len = XENA_EEPROM_SPACE - eeprom->offset;
5833
5834 for (i = 0; i < eeprom->len; i += 4) {
5835 if (read_eeprom(sp, (eeprom->offset + i), &data)) {
5836 DBG_PRINT(ERR_DBG, "Read of EEPROM failed\n");
5837 return -EFAULT;
5838 }
5839 valid = INV(data);
5840 memcpy((data_buf + i), &valid, 4);
5841 }
5842 return 0;
5843}
5844
5845/**
5846 * s2io_ethtool_seeprom - tries to write the user provided value in Eeprom
5847 * @sp : private member of the device structure, which is a pointer to the
5848 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005849 * @eeprom : pointer to the user level structure provided by ethtool,
Linus Torvalds1da177e2005-04-16 15:20:36 -07005850 * containing all relevant information.
5851 * @data_buf ; user defined value to be written into Eeprom.
5852 * Description:
5853 * Tries to write the user provided value in the Eeprom, at the offset
5854 * given by the user.
5855 * Return value:
5856 * 0 on success, -EFAULT on failure.
5857 */
5858
5859static int s2io_ethtool_seeprom(struct net_device *dev,
5860 struct ethtool_eeprom *eeprom,
5861 u8 * data_buf)
5862{
5863 int len = eeprom->len, cnt = 0;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005864 u64 valid = 0, data;
Wang Chen4cf16532008-11-12 23:38:14 -08005865 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07005866
5867 if (eeprom->magic != (sp->pdev->vendor | (sp->pdev->device << 16))) {
5868 DBG_PRINT(ERR_DBG,
5869 "ETHTOOL_WRITE_EEPROM Err: Magic value ");
5870 DBG_PRINT(ERR_DBG, "is wrong, Its not 0x%x\n",
5871 eeprom->magic);
5872 return -EFAULT;
5873 }
5874
5875 while (len) {
5876 data = (u32) data_buf[cnt] & 0x000000FF;
5877 if (data) {
5878 valid = (u32) (data << 24);
5879 } else
5880 valid = data;
5881
5882 if (write_eeprom(sp, (eeprom->offset + cnt), valid, 0)) {
5883 DBG_PRINT(ERR_DBG,
5884 "ETHTOOL_WRITE_EEPROM Err: Cannot ");
5885 DBG_PRINT(ERR_DBG,
5886 "write into the specified offset\n");
5887 return -EFAULT;
5888 }
5889 cnt++;
5890 len--;
5891 }
5892
5893 return 0;
5894}
5895
5896/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005897 * s2io_register_test - reads and writes into all clock domains.
5898 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07005899 * s2io_nic structure.
5900 * @data : variable that returns the result of each of the test conducted b
5901 * by the driver.
5902 * Description:
5903 * Read and write into all clock domains. The NIC has 3 clock domains,
5904 * see that registers in all the three regions are accessible.
5905 * Return value:
5906 * 0 on success.
5907 */
5908
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005909static int s2io_register_test(struct s2io_nic * sp, uint64_t * data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005910{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005911 struct XENA_dev_config __iomem *bar0 = sp->bar0;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005912 u64 val64 = 0, exp_val;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005913 int fail = 0;
5914
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005915 val64 = readq(&bar0->pif_rd_swapper_fb);
5916 if (val64 != 0x123456789abcdefULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005917 fail = 1;
5918 DBG_PRINT(INFO_DBG, "Read Test level 1 fails\n");
5919 }
5920
5921 val64 = readq(&bar0->rmac_pause_cfg);
5922 if (val64 != 0xc000ffff00000000ULL) {
5923 fail = 1;
5924 DBG_PRINT(INFO_DBG, "Read Test level 2 fails\n");
5925 }
5926
5927 val64 = readq(&bar0->rx_queue_cfg);
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005928 if (sp->device_type == XFRAME_II_DEVICE)
5929 exp_val = 0x0404040404040404ULL;
5930 else
5931 exp_val = 0x0808080808080808ULL;
5932 if (val64 != exp_val) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07005933 fail = 1;
5934 DBG_PRINT(INFO_DBG, "Read Test level 3 fails\n");
5935 }
5936
5937 val64 = readq(&bar0->xgxs_efifo_cfg);
5938 if (val64 != 0x000000001923141EULL) {
5939 fail = 1;
5940 DBG_PRINT(INFO_DBG, "Read Test level 4 fails\n");
5941 }
5942
5943 val64 = 0x5A5A5A5A5A5A5A5AULL;
5944 writeq(val64, &bar0->xmsi_data);
5945 val64 = readq(&bar0->xmsi_data);
5946 if (val64 != 0x5A5A5A5A5A5A5A5AULL) {
5947 fail = 1;
5948 DBG_PRINT(ERR_DBG, "Write Test level 1 fails\n");
5949 }
5950
5951 val64 = 0xA5A5A5A5A5A5A5A5ULL;
5952 writeq(val64, &bar0->xmsi_data);
5953 val64 = readq(&bar0->xmsi_data);
5954 if (val64 != 0xA5A5A5A5A5A5A5A5ULL) {
5955 fail = 1;
5956 DBG_PRINT(ERR_DBG, "Write Test level 2 fails\n");
5957 }
5958
5959 *data = fail;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005960 return fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005961}
5962
5963/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005964 * s2io_eeprom_test - to verify that EEprom in the xena can be programmed.
Linus Torvalds1da177e2005-04-16 15:20:36 -07005965 * @sp : private member of the device structure, which is a pointer to the
5966 * s2io_nic structure.
5967 * @data:variable that returns the result of each of the test conducted by
5968 * the driver.
5969 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07005970 * Verify that EEPROM in the xena can be programmed using I2C_CONTROL
Linus Torvalds1da177e2005-04-16 15:20:36 -07005971 * register.
5972 * Return value:
5973 * 0 on success.
5974 */
5975
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05005976static int s2io_eeprom_test(struct s2io_nic * sp, uint64_t * data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07005977{
5978 int fail = 0;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005979 u64 ret_data, org_4F0, org_7F0;
5980 u8 saved_4F0 = 0, saved_7F0 = 0;
5981 struct net_device *dev = sp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005982
5983 /* Test Write Error at offset 0 */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005984 /* Note that SPI interface allows write access to all areas
5985 * of EEPROM. Hence doing all negative testing only for Xframe I.
5986 */
5987 if (sp->device_type == XFRAME_I_DEVICE)
5988 if (!write_eeprom(sp, 0, 0, 3))
5989 fail = 1;
5990
5991 /* Save current values at offsets 0x4F0 and 0x7F0 */
5992 if (!read_eeprom(sp, 0x4F0, &org_4F0))
5993 saved_4F0 = 1;
5994 if (!read_eeprom(sp, 0x7F0, &org_7F0))
5995 saved_7F0 = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07005996
5997 /* Test Write at offset 4f0 */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07005998 if (write_eeprom(sp, 0x4F0, 0x012345, 3))
Linus Torvalds1da177e2005-04-16 15:20:36 -07005999 fail = 1;
6000 if (read_eeprom(sp, 0x4F0, &ret_data))
6001 fail = 1;
6002
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006003 if (ret_data != 0x012345) {
Andrew Morton26b76252005-12-14 19:25:23 -08006004 DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x4F0. "
6005 "Data written %llx Data read %llx\n",
6006 dev->name, (unsigned long long)0x12345,
6007 (unsigned long long)ret_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006008 fail = 1;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006009 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006010
6011 /* Reset the EEPROM data go FFFF */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006012 write_eeprom(sp, 0x4F0, 0xFFFFFF, 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006013
6014 /* Test Write Request Error at offset 0x7c */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006015 if (sp->device_type == XFRAME_I_DEVICE)
6016 if (!write_eeprom(sp, 0x07C, 0, 3))
6017 fail = 1;
6018
6019 /* Test Write Request at offset 0x7f0 */
6020 if (write_eeprom(sp, 0x7F0, 0x012345, 3))
6021 fail = 1;
6022 if (read_eeprom(sp, 0x7F0, &ret_data))
Linus Torvalds1da177e2005-04-16 15:20:36 -07006023 fail = 1;
6024
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006025 if (ret_data != 0x012345) {
Andrew Morton26b76252005-12-14 19:25:23 -08006026 DBG_PRINT(ERR_DBG, "%s: eeprom test error at offset 0x7F0. "
6027 "Data written %llx Data read %llx\n",
6028 dev->name, (unsigned long long)0x12345,
6029 (unsigned long long)ret_data);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006030 fail = 1;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006031 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006032
6033 /* Reset the EEPROM data go FFFF */
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006034 write_eeprom(sp, 0x7F0, 0xFFFFFF, 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006035
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006036 if (sp->device_type == XFRAME_I_DEVICE) {
6037 /* Test Write Error at offset 0x80 */
6038 if (!write_eeprom(sp, 0x080, 0, 3))
6039 fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006040
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006041 /* Test Write Error at offset 0xfc */
6042 if (!write_eeprom(sp, 0x0FC, 0, 3))
6043 fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006044
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006045 /* Test Write Error at offset 0x100 */
6046 if (!write_eeprom(sp, 0x100, 0, 3))
6047 fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006048
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006049 /* Test Write Error at offset 4ec */
6050 if (!write_eeprom(sp, 0x4EC, 0, 3))
6051 fail = 1;
6052 }
6053
6054 /* Restore values at offsets 0x4F0 and 0x7F0 */
6055 if (saved_4F0)
6056 write_eeprom(sp, 0x4F0, org_4F0, 3);
6057 if (saved_7F0)
6058 write_eeprom(sp, 0x7F0, org_7F0, 3);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006059
6060 *data = fail;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006061 return fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006062}
6063
6064/**
6065 * s2io_bist_test - invokes the MemBist test of the card .
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006066 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07006067 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006068 * @data:variable that returns the result of each of the test conducted by
Linus Torvalds1da177e2005-04-16 15:20:36 -07006069 * the driver.
6070 * Description:
6071 * This invokes the MemBist test of the card. We give around
6072 * 2 secs time for the Test to complete. If it's still not complete
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006073 * within this peiod, we consider that the test failed.
Linus Torvalds1da177e2005-04-16 15:20:36 -07006074 * Return value:
6075 * 0 on success and -1 on failure.
6076 */
6077
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006078static int s2io_bist_test(struct s2io_nic * sp, uint64_t * data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006079{
6080 u8 bist = 0;
6081 int cnt = 0, ret = -1;
6082
6083 pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
6084 bist |= PCI_BIST_START;
6085 pci_write_config_word(sp->pdev, PCI_BIST, bist);
6086
6087 while (cnt < 20) {
6088 pci_read_config_byte(sp->pdev, PCI_BIST, &bist);
6089 if (!(bist & PCI_BIST_START)) {
6090 *data = (bist & PCI_BIST_CODE_MASK);
6091 ret = 0;
6092 break;
6093 }
6094 msleep(100);
6095 cnt++;
6096 }
6097
6098 return ret;
6099}
6100
6101/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006102 * s2io-link_test - verifies the link state of the nic
6103 * @sp ; private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07006104 * s2io_nic structure.
6105 * @data: variable that returns the result of each of the test conducted by
6106 * the driver.
6107 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006108 * The function verifies the link state of the NIC and updates the input
Linus Torvalds1da177e2005-04-16 15:20:36 -07006109 * argument 'data' appropriately.
6110 * Return value:
6111 * 0 on success.
6112 */
6113
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006114static int s2io_link_test(struct s2io_nic * sp, uint64_t * data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006115{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006116 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006117 u64 val64;
6118
6119 val64 = readq(&bar0->adapter_status);
Ananda Rajuc92ca042006-04-21 19:18:03 -04006120 if(!(LINK_IS_UP(val64)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07006121 *data = 1;
Ananda Rajuc92ca042006-04-21 19:18:03 -04006122 else
6123 *data = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006124
Ananda Rajub41477f2006-07-24 19:52:49 -04006125 return *data;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006126}
6127
6128/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006129 * s2io_rldram_test - offline test for access to the RldRam chip on the NIC
6130 * @sp - private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07006131 * s2io_nic structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006132 * @data - variable that returns the result of each of the test
Linus Torvalds1da177e2005-04-16 15:20:36 -07006133 * conducted by the driver.
6134 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006135 * This is one of the offline test that tests the read and write
Linus Torvalds1da177e2005-04-16 15:20:36 -07006136 * access to the RldRam chip on the NIC.
6137 * Return value:
6138 * 0 on success.
6139 */
6140
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006141static int s2io_rldram_test(struct s2io_nic * sp, uint64_t * data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006142{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006143 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006144 u64 val64;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006145 int cnt, iteration = 0, test_fail = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006146
6147 val64 = readq(&bar0->adapter_control);
6148 val64 &= ~ADAPTER_ECC_EN;
6149 writeq(val64, &bar0->adapter_control);
6150
6151 val64 = readq(&bar0->mc_rldram_test_ctrl);
6152 val64 |= MC_RLDRAM_TEST_MODE;
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006153 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006154
6155 val64 = readq(&bar0->mc_rldram_mrs);
6156 val64 |= MC_RLDRAM_QUEUE_SIZE_ENABLE;
6157 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
6158
6159 val64 |= MC_RLDRAM_MRS_ENABLE;
6160 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_mrs, UF);
6161
6162 while (iteration < 2) {
6163 val64 = 0x55555555aaaa0000ULL;
6164 if (iteration == 1) {
6165 val64 ^= 0xFFFFFFFFFFFF0000ULL;
6166 }
6167 writeq(val64, &bar0->mc_rldram_test_d0);
6168
6169 val64 = 0xaaaa5a5555550000ULL;
6170 if (iteration == 1) {
6171 val64 ^= 0xFFFFFFFFFFFF0000ULL;
6172 }
6173 writeq(val64, &bar0->mc_rldram_test_d1);
6174
6175 val64 = 0x55aaaaaaaa5a0000ULL;
6176 if (iteration == 1) {
6177 val64 ^= 0xFFFFFFFFFFFF0000ULL;
6178 }
6179 writeq(val64, &bar0->mc_rldram_test_d2);
6180
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006181 val64 = (u64) (0x0000003ffffe0100ULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006182 writeq(val64, &bar0->mc_rldram_test_add);
6183
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006184 val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_WRITE |
6185 MC_RLDRAM_TEST_GO;
6186 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006187
6188 for (cnt = 0; cnt < 5; cnt++) {
6189 val64 = readq(&bar0->mc_rldram_test_ctrl);
6190 if (val64 & MC_RLDRAM_TEST_DONE)
6191 break;
6192 msleep(200);
6193 }
6194
6195 if (cnt == 5)
6196 break;
6197
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006198 val64 = MC_RLDRAM_TEST_MODE | MC_RLDRAM_TEST_GO;
6199 SPECIAL_REG_WRITE(val64, &bar0->mc_rldram_test_ctrl, LF);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006200
6201 for (cnt = 0; cnt < 5; cnt++) {
6202 val64 = readq(&bar0->mc_rldram_test_ctrl);
6203 if (val64 & MC_RLDRAM_TEST_DONE)
6204 break;
6205 msleep(500);
6206 }
6207
6208 if (cnt == 5)
6209 break;
6210
6211 val64 = readq(&bar0->mc_rldram_test_ctrl);
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006212 if (!(val64 & MC_RLDRAM_TEST_PASS))
6213 test_fail = 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006214
6215 iteration++;
6216 }
6217
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006218 *data = test_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006219
ravinandan.arakali@neterion.comad4ebed2005-10-17 18:26:20 -07006220 /* Bring the adapter out of test mode */
6221 SPECIAL_REG_WRITE(0, &bar0->mc_rldram_test_ctrl, LF);
6222
6223 return test_fail;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006224}
6225
6226/**
6227 * s2io_ethtool_test - conducts 6 tsets to determine the health of card.
6228 * @sp : private member of the device structure, which is a pointer to the
6229 * s2io_nic structure.
6230 * @ethtest : pointer to a ethtool command specific structure that will be
6231 * returned to the user.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006232 * @data : variable that returns the result of each of the test
Linus Torvalds1da177e2005-04-16 15:20:36 -07006233 * conducted by the driver.
6234 * Description:
6235 * This function conducts 6 tests ( 4 offline and 2 online) to determine
6236 * the health of the card.
6237 * Return value:
6238 * void
6239 */
6240
6241static void s2io_ethtool_test(struct net_device *dev,
6242 struct ethtool_test *ethtest,
6243 uint64_t * data)
6244{
Wang Chen4cf16532008-11-12 23:38:14 -08006245 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006246 int orig_state = netif_running(sp->dev);
6247
6248 if (ethtest->flags == ETH_TEST_FL_OFFLINE) {
6249 /* Offline Tests. */
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006250 if (orig_state)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006251 s2io_close(sp->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006252
6253 if (s2io_register_test(sp, &data[0]))
6254 ethtest->flags |= ETH_TEST_FL_FAILED;
6255
6256 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006257
6258 if (s2io_rldram_test(sp, &data[3]))
6259 ethtest->flags |= ETH_TEST_FL_FAILED;
6260
6261 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006262
6263 if (s2io_eeprom_test(sp, &data[1]))
6264 ethtest->flags |= ETH_TEST_FL_FAILED;
6265
6266 if (s2io_bist_test(sp, &data[4]))
6267 ethtest->flags |= ETH_TEST_FL_FAILED;
6268
6269 if (orig_state)
6270 s2io_open(sp->dev);
6271
6272 data[2] = 0;
6273 } else {
6274 /* Online Tests. */
6275 if (!orig_state) {
6276 DBG_PRINT(ERR_DBG,
6277 "%s: is not up, cannot run test\n",
6278 dev->name);
6279 data[0] = -1;
6280 data[1] = -1;
6281 data[2] = -1;
6282 data[3] = -1;
6283 data[4] = -1;
6284 }
6285
6286 if (s2io_link_test(sp, &data[2]))
6287 ethtest->flags |= ETH_TEST_FL_FAILED;
6288
6289 data[0] = 0;
6290 data[1] = 0;
6291 data[3] = 0;
6292 data[4] = 0;
6293 }
6294}
6295
6296static void s2io_get_ethtool_stats(struct net_device *dev,
6297 struct ethtool_stats *estats,
6298 u64 * tmp_stats)
6299{
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07006300 int i = 0, k;
Wang Chen4cf16532008-11-12 23:38:14 -08006301 struct s2io_nic *sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006302 struct stat_block *stat_info = sp->mac_control.stats_info;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006303
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07006304 s2io_updt_stats(sp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006305 tmp_stats[i++] =
6306 (u64)le32_to_cpu(stat_info->tmac_frms_oflow) << 32 |
6307 le32_to_cpu(stat_info->tmac_frms);
6308 tmp_stats[i++] =
6309 (u64)le32_to_cpu(stat_info->tmac_data_octets_oflow) << 32 |
6310 le32_to_cpu(stat_info->tmac_data_octets);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006311 tmp_stats[i++] = le64_to_cpu(stat_info->tmac_drop_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006312 tmp_stats[i++] =
6313 (u64)le32_to_cpu(stat_info->tmac_mcst_frms_oflow) << 32 |
6314 le32_to_cpu(stat_info->tmac_mcst_frms);
6315 tmp_stats[i++] =
6316 (u64)le32_to_cpu(stat_info->tmac_bcst_frms_oflow) << 32 |
6317 le32_to_cpu(stat_info->tmac_bcst_frms);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006318 tmp_stats[i++] = le64_to_cpu(stat_info->tmac_pause_ctrl_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006319 tmp_stats[i++] =
6320 (u64)le32_to_cpu(stat_info->tmac_ttl_octets_oflow) << 32 |
6321 le32_to_cpu(stat_info->tmac_ttl_octets);
6322 tmp_stats[i++] =
6323 (u64)le32_to_cpu(stat_info->tmac_ucst_frms_oflow) << 32 |
6324 le32_to_cpu(stat_info->tmac_ucst_frms);
6325 tmp_stats[i++] =
6326 (u64)le32_to_cpu(stat_info->tmac_nucst_frms_oflow) << 32 |
6327 le32_to_cpu(stat_info->tmac_nucst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006328 tmp_stats[i++] =
6329 (u64)le32_to_cpu(stat_info->tmac_any_err_frms_oflow) << 32 |
6330 le32_to_cpu(stat_info->tmac_any_err_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006331 tmp_stats[i++] = le64_to_cpu(stat_info->tmac_ttl_less_fb_octets);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006332 tmp_stats[i++] = le64_to_cpu(stat_info->tmac_vld_ip_octets);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006333 tmp_stats[i++] =
6334 (u64)le32_to_cpu(stat_info->tmac_vld_ip_oflow) << 32 |
6335 le32_to_cpu(stat_info->tmac_vld_ip);
6336 tmp_stats[i++] =
6337 (u64)le32_to_cpu(stat_info->tmac_drop_ip_oflow) << 32 |
6338 le32_to_cpu(stat_info->tmac_drop_ip);
6339 tmp_stats[i++] =
6340 (u64)le32_to_cpu(stat_info->tmac_icmp_oflow) << 32 |
6341 le32_to_cpu(stat_info->tmac_icmp);
6342 tmp_stats[i++] =
6343 (u64)le32_to_cpu(stat_info->tmac_rst_tcp_oflow) << 32 |
6344 le32_to_cpu(stat_info->tmac_rst_tcp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006345 tmp_stats[i++] = le64_to_cpu(stat_info->tmac_tcp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006346 tmp_stats[i++] = (u64)le32_to_cpu(stat_info->tmac_udp_oflow) << 32 |
6347 le32_to_cpu(stat_info->tmac_udp);
6348 tmp_stats[i++] =
6349 (u64)le32_to_cpu(stat_info->rmac_vld_frms_oflow) << 32 |
6350 le32_to_cpu(stat_info->rmac_vld_frms);
6351 tmp_stats[i++] =
6352 (u64)le32_to_cpu(stat_info->rmac_data_octets_oflow) << 32 |
6353 le32_to_cpu(stat_info->rmac_data_octets);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006354 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_fcs_err_frms);
6355 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_drop_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006356 tmp_stats[i++] =
6357 (u64)le32_to_cpu(stat_info->rmac_vld_mcst_frms_oflow) << 32 |
6358 le32_to_cpu(stat_info->rmac_vld_mcst_frms);
6359 tmp_stats[i++] =
6360 (u64)le32_to_cpu(stat_info->rmac_vld_bcst_frms_oflow) << 32 |
6361 le32_to_cpu(stat_info->rmac_vld_bcst_frms);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006362 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_in_rng_len_err_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006363 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_out_rng_len_err_frms);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006364 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_long_frms);
6365 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_pause_ctrl_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006366 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_unsup_ctrl_frms);
6367 tmp_stats[i++] =
6368 (u64)le32_to_cpu(stat_info->rmac_ttl_octets_oflow) << 32 |
6369 le32_to_cpu(stat_info->rmac_ttl_octets);
6370 tmp_stats[i++] =
6371 (u64)le32_to_cpu(stat_info->rmac_accepted_ucst_frms_oflow)
6372 << 32 | le32_to_cpu(stat_info->rmac_accepted_ucst_frms);
6373 tmp_stats[i++] =
6374 (u64)le32_to_cpu(stat_info->rmac_accepted_nucst_frms_oflow)
6375 << 32 | le32_to_cpu(stat_info->rmac_accepted_nucst_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006376 tmp_stats[i++] =
6377 (u64)le32_to_cpu(stat_info->rmac_discarded_frms_oflow) << 32 |
6378 le32_to_cpu(stat_info->rmac_discarded_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006379 tmp_stats[i++] =
6380 (u64)le32_to_cpu(stat_info->rmac_drop_events_oflow)
6381 << 32 | le32_to_cpu(stat_info->rmac_drop_events);
6382 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_less_fb_octets);
6383 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_frms);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006384 tmp_stats[i++] =
6385 (u64)le32_to_cpu(stat_info->rmac_usized_frms_oflow) << 32 |
6386 le32_to_cpu(stat_info->rmac_usized_frms);
6387 tmp_stats[i++] =
6388 (u64)le32_to_cpu(stat_info->rmac_osized_frms_oflow) << 32 |
6389 le32_to_cpu(stat_info->rmac_osized_frms);
6390 tmp_stats[i++] =
6391 (u64)le32_to_cpu(stat_info->rmac_frag_frms_oflow) << 32 |
6392 le32_to_cpu(stat_info->rmac_frag_frms);
6393 tmp_stats[i++] =
6394 (u64)le32_to_cpu(stat_info->rmac_jabber_frms_oflow) << 32 |
6395 le32_to_cpu(stat_info->rmac_jabber_frms);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006396 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_64_frms);
6397 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_65_127_frms);
6398 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_128_255_frms);
6399 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_256_511_frms);
6400 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_512_1023_frms);
6401 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_1024_1518_frms);
6402 tmp_stats[i++] =
6403 (u64)le32_to_cpu(stat_info->rmac_ip_oflow) << 32 |
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006404 le32_to_cpu(stat_info->rmac_ip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006405 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ip_octets);
6406 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_hdr_err_ip);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006407 tmp_stats[i++] =
6408 (u64)le32_to_cpu(stat_info->rmac_drop_ip_oflow) << 32 |
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006409 le32_to_cpu(stat_info->rmac_drop_ip);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006410 tmp_stats[i++] =
6411 (u64)le32_to_cpu(stat_info->rmac_icmp_oflow) << 32 |
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006412 le32_to_cpu(stat_info->rmac_icmp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006413 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_tcp);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006414 tmp_stats[i++] =
6415 (u64)le32_to_cpu(stat_info->rmac_udp_oflow) << 32 |
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006416 le32_to_cpu(stat_info->rmac_udp);
6417 tmp_stats[i++] =
6418 (u64)le32_to_cpu(stat_info->rmac_err_drp_udp_oflow) << 32 |
6419 le32_to_cpu(stat_info->rmac_err_drp_udp);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006420 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_err_sym);
6421 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q0);
6422 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q1);
6423 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q2);
6424 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q3);
6425 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q4);
6426 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q5);
6427 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q6);
6428 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_frms_q7);
6429 tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q0);
6430 tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q1);
6431 tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q2);
6432 tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q3);
6433 tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q4);
6434 tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q5);
6435 tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q6);
6436 tmp_stats[i++] = le16_to_cpu(stat_info->rmac_full_q7);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006437 tmp_stats[i++] =
6438 (u64)le32_to_cpu(stat_info->rmac_pause_cnt_oflow) << 32 |
6439 le32_to_cpu(stat_info->rmac_pause_cnt);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006440 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_data_err_cnt);
6441 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_xgmii_ctrl_err_cnt);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07006442 tmp_stats[i++] =
6443 (u64)le32_to_cpu(stat_info->rmac_accepted_ip_oflow) << 32 |
6444 le32_to_cpu(stat_info->rmac_accepted_ip);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006445 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_err_tcp);
Ananda Rajubd1034f2006-04-21 19:20:22 -04006446 tmp_stats[i++] = le32_to_cpu(stat_info->rd_req_cnt);
6447 tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_cnt);
6448 tmp_stats[i++] = le32_to_cpu(stat_info->new_rd_req_rtry_cnt);
6449 tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_cnt);
6450 tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_rd_ack_cnt);
6451 tmp_stats[i++] = le32_to_cpu(stat_info->wr_req_cnt);
6452 tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_cnt);
6453 tmp_stats[i++] = le32_to_cpu(stat_info->new_wr_req_rtry_cnt);
6454 tmp_stats[i++] = le32_to_cpu(stat_info->wr_rtry_cnt);
6455 tmp_stats[i++] = le32_to_cpu(stat_info->wr_disc_cnt);
6456 tmp_stats[i++] = le32_to_cpu(stat_info->rd_rtry_wr_ack_cnt);
6457 tmp_stats[i++] = le32_to_cpu(stat_info->txp_wr_cnt);
6458 tmp_stats[i++] = le32_to_cpu(stat_info->txd_rd_cnt);
6459 tmp_stats[i++] = le32_to_cpu(stat_info->txd_wr_cnt);
6460 tmp_stats[i++] = le32_to_cpu(stat_info->rxd_rd_cnt);
6461 tmp_stats[i++] = le32_to_cpu(stat_info->rxd_wr_cnt);
6462 tmp_stats[i++] = le32_to_cpu(stat_info->txf_rd_cnt);
6463 tmp_stats[i++] = le32_to_cpu(stat_info->rxf_wr_cnt);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006464
6465 /* Enhanced statistics exist only for Hercules */
6466 if(sp->device_type == XFRAME_II_DEVICE) {
6467 tmp_stats[i++] =
6468 le64_to_cpu(stat_info->rmac_ttl_1519_4095_frms);
6469 tmp_stats[i++] =
6470 le64_to_cpu(stat_info->rmac_ttl_4096_8191_frms);
6471 tmp_stats[i++] =
6472 le64_to_cpu(stat_info->rmac_ttl_8192_max_frms);
6473 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_ttl_gt_max_frms);
6474 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_osized_alt_frms);
6475 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_jabber_alt_frms);
6476 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_gt_max_alt_frms);
6477 tmp_stats[i++] = le64_to_cpu(stat_info->rmac_vlan_frms);
6478 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_len_discard);
6479 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_fcs_discard);
6480 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_pf_discard);
6481 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_da_discard);
6482 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_red_discard);
6483 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_rts_discard);
6484 tmp_stats[i++] = le32_to_cpu(stat_info->rmac_ingm_full_discard);
6485 tmp_stats[i++] = le32_to_cpu(stat_info->link_fault_cnt);
6486 }
6487
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07006488 tmp_stats[i++] = 0;
6489 tmp_stats[i++] = stat_info->sw_stat.single_ecc_errs;
6490 tmp_stats[i++] = stat_info->sw_stat.double_ecc_errs;
Ananda Rajubd1034f2006-04-21 19:20:22 -04006491 tmp_stats[i++] = stat_info->sw_stat.parity_err_cnt;
6492 tmp_stats[i++] = stat_info->sw_stat.serious_err_cnt;
6493 tmp_stats[i++] = stat_info->sw_stat.soft_reset_cnt;
6494 tmp_stats[i++] = stat_info->sw_stat.fifo_full_cnt;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07006495 for (k = 0; k < MAX_RX_RINGS; k++)
6496 tmp_stats[i++] = stat_info->sw_stat.ring_full_cnt[k];
Ananda Rajubd1034f2006-04-21 19:20:22 -04006497 tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_high;
6498 tmp_stats[i++] = stat_info->xpak_stat.alarm_transceiver_temp_low;
6499 tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_high;
6500 tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_bias_current_low;
6501 tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_high;
6502 tmp_stats[i++] = stat_info->xpak_stat.alarm_laser_output_power_low;
6503 tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_high;
6504 tmp_stats[i++] = stat_info->xpak_stat.warn_transceiver_temp_low;
6505 tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_high;
6506 tmp_stats[i++] = stat_info->xpak_stat.warn_laser_bias_current_low;
6507 tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_high;
6508 tmp_stats[i++] = stat_info->xpak_stat.warn_laser_output_power_low;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05006509 tmp_stats[i++] = stat_info->sw_stat.clubbed_frms_cnt;
6510 tmp_stats[i++] = stat_info->sw_stat.sending_both;
6511 tmp_stats[i++] = stat_info->sw_stat.outof_sequence_pkts;
6512 tmp_stats[i++] = stat_info->sw_stat.flush_max_pkts;
Andrew Mortonfe931392006-02-03 01:45:12 -08006513 if (stat_info->sw_stat.num_aggregations) {
Ananda Rajubd1034f2006-04-21 19:20:22 -04006514 u64 tmp = stat_info->sw_stat.sum_avg_pkts_aggregated;
6515 int count = 0;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04006516 /*
Ananda Rajubd1034f2006-04-21 19:20:22 -04006517 * Since 64-bit divide does not work on all platforms,
6518 * do repeated subtraction.
6519 */
6520 while (tmp >= stat_info->sw_stat.num_aggregations) {
6521 tmp -= stat_info->sw_stat.num_aggregations;
6522 count++;
6523 }
6524 tmp_stats[i++] = count;
Andrew Mortonfe931392006-02-03 01:45:12 -08006525 }
Ananda Rajubd1034f2006-04-21 19:20:22 -04006526 else
6527 tmp_stats[i++] = 0;
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04006528 tmp_stats[i++] = stat_info->sw_stat.mem_alloc_fail_cnt;
Veena Parat491abf22007-07-23 02:37:14 -04006529 tmp_stats[i++] = stat_info->sw_stat.pci_map_fail_cnt;
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04006530 tmp_stats[i++] = stat_info->sw_stat.watchdog_timer_cnt;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04006531 tmp_stats[i++] = stat_info->sw_stat.mem_allocated;
6532 tmp_stats[i++] = stat_info->sw_stat.mem_freed;
6533 tmp_stats[i++] = stat_info->sw_stat.link_up_cnt;
6534 tmp_stats[i++] = stat_info->sw_stat.link_down_cnt;
6535 tmp_stats[i++] = stat_info->sw_stat.link_up_time;
6536 tmp_stats[i++] = stat_info->sw_stat.link_down_time;
6537
6538 tmp_stats[i++] = stat_info->sw_stat.tx_buf_abort_cnt;
6539 tmp_stats[i++] = stat_info->sw_stat.tx_desc_abort_cnt;
6540 tmp_stats[i++] = stat_info->sw_stat.tx_parity_err_cnt;
6541 tmp_stats[i++] = stat_info->sw_stat.tx_link_loss_cnt;
6542 tmp_stats[i++] = stat_info->sw_stat.tx_list_proc_err_cnt;
6543
6544 tmp_stats[i++] = stat_info->sw_stat.rx_parity_err_cnt;
6545 tmp_stats[i++] = stat_info->sw_stat.rx_abort_cnt;
6546 tmp_stats[i++] = stat_info->sw_stat.rx_parity_abort_cnt;
6547 tmp_stats[i++] = stat_info->sw_stat.rx_rda_fail_cnt;
6548 tmp_stats[i++] = stat_info->sw_stat.rx_unkn_prot_cnt;
6549 tmp_stats[i++] = stat_info->sw_stat.rx_fcs_err_cnt;
6550 tmp_stats[i++] = stat_info->sw_stat.rx_buf_size_err_cnt;
6551 tmp_stats[i++] = stat_info->sw_stat.rx_rxd_corrupt_cnt;
6552 tmp_stats[i++] = stat_info->sw_stat.rx_unkn_err_cnt;
Sivakumar Subramani8116f3c2007-09-17 13:05:35 -07006553 tmp_stats[i++] = stat_info->sw_stat.tda_err_cnt;
6554 tmp_stats[i++] = stat_info->sw_stat.pfc_err_cnt;
6555 tmp_stats[i++] = stat_info->sw_stat.pcc_err_cnt;
6556 tmp_stats[i++] = stat_info->sw_stat.tti_err_cnt;
6557 tmp_stats[i++] = stat_info->sw_stat.tpa_err_cnt;
6558 tmp_stats[i++] = stat_info->sw_stat.sm_err_cnt;
6559 tmp_stats[i++] = stat_info->sw_stat.lso_err_cnt;
6560 tmp_stats[i++] = stat_info->sw_stat.mac_tmac_err_cnt;
6561 tmp_stats[i++] = stat_info->sw_stat.mac_rmac_err_cnt;
6562 tmp_stats[i++] = stat_info->sw_stat.xgxs_txgxs_err_cnt;
6563 tmp_stats[i++] = stat_info->sw_stat.xgxs_rxgxs_err_cnt;
6564 tmp_stats[i++] = stat_info->sw_stat.rc_err_cnt;
6565 tmp_stats[i++] = stat_info->sw_stat.prc_pcix_err_cnt;
6566 tmp_stats[i++] = stat_info->sw_stat.rpa_err_cnt;
6567 tmp_stats[i++] = stat_info->sw_stat.rda_err_cnt;
6568 tmp_stats[i++] = stat_info->sw_stat.rti_err_cnt;
6569 tmp_stats[i++] = stat_info->sw_stat.mc_err_cnt;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006570}
6571
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006572static int s2io_ethtool_get_regs_len(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006573{
6574 return (XENA_REG_SPACE);
6575}
6576
6577
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006578static u32 s2io_ethtool_get_rx_csum(struct net_device * dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006579{
Wang Chen4cf16532008-11-12 23:38:14 -08006580 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006581
6582 return (sp->rx_csum);
6583}
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006584
6585static int s2io_ethtool_set_rx_csum(struct net_device *dev, u32 data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006586{
Wang Chen4cf16532008-11-12 23:38:14 -08006587 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006588
6589 if (data)
6590 sp->rx_csum = 1;
6591 else
6592 sp->rx_csum = 0;
6593
6594 return 0;
6595}
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006596
6597static int s2io_get_eeprom_len(struct net_device *dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006598{
6599 return (XENA_EEPROM_SPACE);
6600}
6601
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006602static int s2io_get_sset_count(struct net_device *dev, int sset)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006603{
Wang Chen4cf16532008-11-12 23:38:14 -08006604 struct s2io_nic *sp = netdev_priv(dev);
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006605
6606 switch (sset) {
6607 case ETH_SS_TEST:
6608 return S2IO_TEST_LEN;
6609 case ETH_SS_STATS:
6610 switch(sp->device_type) {
6611 case XFRAME_I_DEVICE:
6612 return XFRAME_I_STAT_LEN;
6613 case XFRAME_II_DEVICE:
6614 return XFRAME_II_STAT_LEN;
6615 default:
6616 return 0;
6617 }
6618 default:
6619 return -EOPNOTSUPP;
6620 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006621}
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006622
6623static void s2io_ethtool_get_strings(struct net_device *dev,
6624 u32 stringset, u8 * data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006625{
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006626 int stat_size = 0;
Wang Chen4cf16532008-11-12 23:38:14 -08006627 struct s2io_nic *sp = netdev_priv(dev);
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006628
Linus Torvalds1da177e2005-04-16 15:20:36 -07006629 switch (stringset) {
6630 case ETH_SS_TEST:
6631 memcpy(data, s2io_gstrings, S2IO_STRINGS_LEN);
6632 break;
6633 case ETH_SS_STATS:
Sivakumar Subramanifa1f0cb2007-02-24 02:03:22 -05006634 stat_size = sizeof(ethtool_xena_stats_keys);
6635 memcpy(data, &ethtool_xena_stats_keys,stat_size);
6636 if(sp->device_type == XFRAME_II_DEVICE) {
6637 memcpy(data + stat_size,
6638 &ethtool_enhanced_stats_keys,
6639 sizeof(ethtool_enhanced_stats_keys));
6640 stat_size += sizeof(ethtool_enhanced_stats_keys);
6641 }
6642
6643 memcpy(data + stat_size, &ethtool_driver_stats_keys,
6644 sizeof(ethtool_driver_stats_keys));
Linus Torvalds1da177e2005-04-16 15:20:36 -07006645 }
6646}
Linus Torvalds1da177e2005-04-16 15:20:36 -07006647
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006648static int s2io_ethtool_op_set_tx_csum(struct net_device *dev, u32 data)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006649{
6650 if (data)
6651 dev->features |= NETIF_F_IP_CSUM;
6652 else
6653 dev->features &= ~NETIF_F_IP_CSUM;
6654
6655 return 0;
6656}
6657
Ananda Raju75c30b12006-07-24 19:55:09 -04006658static u32 s2io_ethtool_op_get_tso(struct net_device *dev)
6659{
6660 return (dev->features & NETIF_F_TSO) != 0;
6661}
6662static int s2io_ethtool_op_set_tso(struct net_device *dev, u32 data)
6663{
6664 if (data)
6665 dev->features |= (NETIF_F_TSO | NETIF_F_TSO6);
6666 else
6667 dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
6668
6669 return 0;
6670}
Linus Torvalds1da177e2005-04-16 15:20:36 -07006671
Jeff Garzik7282d492006-09-13 14:30:00 -04006672static const struct ethtool_ops netdev_ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07006673 .get_settings = s2io_ethtool_gset,
6674 .set_settings = s2io_ethtool_sset,
6675 .get_drvinfo = s2io_ethtool_gdrvinfo,
6676 .get_regs_len = s2io_ethtool_get_regs_len,
6677 .get_regs = s2io_ethtool_gregs,
6678 .get_link = ethtool_op_get_link,
6679 .get_eeprom_len = s2io_get_eeprom_len,
6680 .get_eeprom = s2io_ethtool_geeprom,
6681 .set_eeprom = s2io_ethtool_seeprom,
Sreenivasa Honnur0cec35e2007-05-10 04:06:28 -04006682 .get_ringparam = s2io_ethtool_gringparam,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006683 .get_pauseparam = s2io_ethtool_getpause_data,
6684 .set_pauseparam = s2io_ethtool_setpause_data,
6685 .get_rx_csum = s2io_ethtool_get_rx_csum,
6686 .set_rx_csum = s2io_ethtool_set_rx_csum,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006687 .set_tx_csum = s2io_ethtool_op_set_tx_csum,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006688 .set_sg = ethtool_op_set_sg,
Ananda Raju75c30b12006-07-24 19:55:09 -04006689 .get_tso = s2io_ethtool_op_get_tso,
6690 .set_tso = s2io_ethtool_op_set_tso,
Ananda Rajufed5ecc2005-11-14 15:25:08 -05006691 .set_ufo = ethtool_op_set_ufo,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006692 .self_test = s2io_ethtool_test,
6693 .get_strings = s2io_ethtool_get_strings,
6694 .phys_id = s2io_ethtool_idnic,
Jeff Garzikb9f2c042007-10-03 18:07:32 -07006695 .get_ethtool_stats = s2io_get_ethtool_stats,
6696 .get_sset_count = s2io_get_sset_count,
Linus Torvalds1da177e2005-04-16 15:20:36 -07006697};
6698
6699/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006700 * s2io_ioctl - Entry point for the Ioctl
Linus Torvalds1da177e2005-04-16 15:20:36 -07006701 * @dev : Device pointer.
6702 * @ifr : An IOCTL specefic structure, that can contain a pointer to
6703 * a proprietary structure used to pass information to the driver.
6704 * @cmd : This is used to distinguish between the different commands that
6705 * can be passed to the IOCTL functions.
6706 * Description:
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07006707 * Currently there are no special functionality supported in IOCTL, hence
6708 * function always return EOPNOTSUPPORTED
Linus Torvalds1da177e2005-04-16 15:20:36 -07006709 */
6710
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006711static int s2io_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006712{
6713 return -EOPNOTSUPP;
6714}
6715
6716/**
6717 * s2io_change_mtu - entry point to change MTU size for the device.
6718 * @dev : device pointer.
6719 * @new_mtu : the new MTU size for the device.
6720 * Description: A driver entry point to change MTU size for the device.
6721 * Before changing the MTU the device must be stopped.
6722 * Return value:
6723 * 0 on success and an appropriate (-)ve integer as defined in errno.h
6724 * file on failure.
6725 */
6726
Adrian Bunkac1f60d2005-11-06 01:46:47 +01006727static int s2io_change_mtu(struct net_device *dev, int new_mtu)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006728{
Wang Chen4cf16532008-11-12 23:38:14 -08006729 struct s2io_nic *sp = netdev_priv(dev);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006730 int ret = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006731
6732 if ((new_mtu < MIN_MTU) || (new_mtu > S2IO_JUMBO_SIZE)) {
6733 DBG_PRINT(ERR_DBG, "%s: MTU size is invalid.\n",
6734 dev->name);
6735 return -EPERM;
6736 }
6737
Linus Torvalds1da177e2005-04-16 15:20:36 -07006738 dev->mtu = new_mtu;
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006739 if (netif_running(dev)) {
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05006740 s2io_stop_all_tx_queue(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07006741 s2io_card_down(sp);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006742 ret = s2io_card_up(sp);
6743 if (ret) {
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006744 DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07006745 __func__);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006746 return ret;
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006747 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05006748 s2io_wake_all_tx_queue(sp);
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006749 } else { /* Device is down */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006750 struct XENA_dev_config __iomem *bar0 = sp->bar0;
raghavendra.koushik@neterion.comd8892c62005-08-03 12:33:12 -07006751 u64 val64 = new_mtu;
6752
6753 writeq(vBIT(val64, 2, 14), &bar0->rmac_max_pyld_len);
6754 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006755
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05006756 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006757}
6758
6759/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07006760 * s2io_set_link - Set the LInk status
6761 * @data: long pointer to device private structue
6762 * Description: Sets the link status for the adapter
6763 */
6764
David Howellsc4028952006-11-22 14:57:56 +00006765static void s2io_set_link(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07006766{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006767 struct s2io_nic *nic = container_of(work, struct s2io_nic, set_link_task);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006768 struct net_device *dev = nic->dev;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006769 struct XENA_dev_config __iomem *bar0 = nic->bar0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006770 register u64 val64;
6771 u16 subid;
6772
Francois Romieu22747d62007-02-15 23:37:50 +01006773 rtnl_lock();
6774
6775 if (!netif_running(dev))
6776 goto out_unlock;
6777
Sivakumar Subramani92b84432007-09-06 06:51:14 -04006778 if (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(nic->state))) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07006779 /* The card is being reset, no point doing anything */
Francois Romieu22747d62007-02-15 23:37:50 +01006780 goto out_unlock;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006781 }
6782
6783 subid = nic->pdev->subsystem_device;
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07006784 if (s2io_link_fault_indication(nic) == MAC_RMAC_ERR_TIMER) {
6785 /*
6786 * Allow a small delay for the NICs self initiated
6787 * cleanup to complete.
6788 */
6789 msleep(100);
6790 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006791
6792 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006793 if (LINK_IS_UP(val64)) {
6794 if (!(readq(&bar0->adapter_control) & ADAPTER_CNTL_EN)) {
6795 if (verify_xena_quiescence(nic)) {
6796 val64 = readq(&bar0->adapter_control);
6797 val64 |= ADAPTER_CNTL_EN;
Linus Torvalds1da177e2005-04-16 15:20:36 -07006798 writeq(val64, &bar0->adapter_control);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006799 if (CARDS_WITH_FAULTY_LINK_INDICATORS(
6800 nic->device_type, subid)) {
6801 val64 = readq(&bar0->gpio_control);
6802 val64 |= GPIO_CTRL_GPIO_0;
6803 writeq(val64, &bar0->gpio_control);
6804 val64 = readq(&bar0->gpio_control);
6805 } else {
6806 val64 |= ADAPTER_LED_ON;
6807 writeq(val64, &bar0->adapter_control);
raghavendra.koushik@neterion.coma371a072005-08-03 12:38:59 -07006808 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006809 nic->device_enabled_once = TRUE;
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006810 } else {
6811 DBG_PRINT(ERR_DBG, "%s: Error: ", dev->name);
6812 DBG_PRINT(ERR_DBG, "device is not Quiescent\n");
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05006813 s2io_stop_all_tx_queue(nic);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006814 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07006815 }
Sivakumar Subramani92c48792007-08-06 05:38:19 -04006816 val64 = readq(&bar0->adapter_control);
6817 val64 |= ADAPTER_LED_ON;
6818 writeq(val64, &bar0->adapter_control);
6819 s2io_link(nic, LINK_UP);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006820 } else {
6821 if (CARDS_WITH_FAULTY_LINK_INDICATORS(nic->device_type,
6822 subid)) {
6823 val64 = readq(&bar0->gpio_control);
6824 val64 &= ~GPIO_CTRL_GPIO_0;
6825 writeq(val64, &bar0->gpio_control);
6826 val64 = readq(&bar0->gpio_control);
6827 }
Sivakumar Subramani92c48792007-08-06 05:38:19 -04006828 /* turn off LED */
6829 val64 = readq(&bar0->adapter_control);
6830 val64 = val64 &(~ADAPTER_LED_ON);
6831 writeq(val64, &bar0->adapter_control);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05006832 s2io_link(nic, LINK_DOWN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07006833 }
Sivakumar Subramani92b84432007-09-06 06:51:14 -04006834 clear_bit(__S2IO_STATE_LINK_TASK, &(nic->state));
Francois Romieu22747d62007-02-15 23:37:50 +01006835
6836out_unlock:
Sivakumar Subramanid8d70ca2007-02-24 02:04:24 -05006837 rtnl_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -07006838}
6839
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006840static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp,
6841 struct buffAdd *ba,
6842 struct sk_buff **skb, u64 *temp0, u64 *temp1,
6843 u64 *temp2, int size)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006844{
6845 struct net_device *dev = sp->dev;
Veena Parat491abf22007-07-23 02:37:14 -04006846 struct swStat *stats = &sp->mac_control.stats_info->sw_stat;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006847
6848 if ((sp->rxd_mode == RXD_MODE_1) && (rxdp->Host_Control == 0)) {
Veena Parat6d517a22007-07-23 02:20:51 -04006849 struct RxD1 *rxdp1 = (struct RxD1 *)rxdp;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006850 /* allocate skb */
6851 if (*skb) {
6852 DBG_PRINT(INFO_DBG, "SKB is not NULL\n");
6853 /*
6854 * As Rx frame are not going to be processed,
6855 * using same mapped address for the Rxd
6856 * buffer pointer
6857 */
Veena Parat6d517a22007-07-23 02:20:51 -04006858 rxdp1->Buffer0_ptr = *temp0;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006859 } else {
6860 *skb = dev_alloc_skb(size);
6861 if (!(*skb)) {
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -08006862 DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04006863 DBG_PRINT(INFO_DBG, "memory to allocate ");
6864 DBG_PRINT(INFO_DBG, "1 buf mode SKBs\n");
6865 sp->mac_control.stats_info->sw_stat. \
6866 mem_alloc_fail_cnt++;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006867 return -ENOMEM ;
6868 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04006869 sp->mac_control.stats_info->sw_stat.mem_allocated
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04006870 += (*skb)->truesize;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006871 /* storing the mapped addr in a temp variable
6872 * such it will be used for next rxd whose
6873 * Host Control is NULL
6874 */
Veena Parat6d517a22007-07-23 02:20:51 -04006875 rxdp1->Buffer0_ptr = *temp0 =
Ananda Raju5d3213c2006-04-21 19:23:26 -04006876 pci_map_single( sp->pdev, (*skb)->data,
6877 size - NET_IP_ALIGN,
6878 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006879 if (pci_dma_mapping_error(sp->pdev, rxdp1->Buffer0_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04006880 goto memalloc_failed;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006881 rxdp->Host_Control = (unsigned long) (*skb);
6882 }
6883 } else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) {
Veena Parat6d517a22007-07-23 02:20:51 -04006884 struct RxD3 *rxdp3 = (struct RxD3 *)rxdp;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006885 /* Two buffer Mode */
6886 if (*skb) {
Veena Parat6d517a22007-07-23 02:20:51 -04006887 rxdp3->Buffer2_ptr = *temp2;
6888 rxdp3->Buffer0_ptr = *temp0;
6889 rxdp3->Buffer1_ptr = *temp1;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006890 } else {
6891 *skb = dev_alloc_skb(size);
David Rientjes2ceaac72006-10-30 14:19:25 -08006892 if (!(*skb)) {
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04006893 DBG_PRINT(INFO_DBG, "%s: Out of ", dev->name);
6894 DBG_PRINT(INFO_DBG, "memory to allocate ");
6895 DBG_PRINT(INFO_DBG, "2 buf mode SKBs\n");
6896 sp->mac_control.stats_info->sw_stat. \
6897 mem_alloc_fail_cnt++;
David Rientjes2ceaac72006-10-30 14:19:25 -08006898 return -ENOMEM;
6899 }
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04006900 sp->mac_control.stats_info->sw_stat.mem_allocated
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04006901 += (*skb)->truesize;
Veena Parat6d517a22007-07-23 02:20:51 -04006902 rxdp3->Buffer2_ptr = *temp2 =
Ananda Raju5d3213c2006-04-21 19:23:26 -04006903 pci_map_single(sp->pdev, (*skb)->data,
6904 dev->mtu + 4,
6905 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006906 if (pci_dma_mapping_error(sp->pdev, rxdp3->Buffer2_ptr))
Veena Parat491abf22007-07-23 02:37:14 -04006907 goto memalloc_failed;
Veena Parat6d517a22007-07-23 02:20:51 -04006908 rxdp3->Buffer0_ptr = *temp0 =
Ananda Raju5d3213c2006-04-21 19:23:26 -04006909 pci_map_single( sp->pdev, ba->ba_0, BUF0_LEN,
6910 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006911 if (pci_dma_mapping_error(sp->pdev,
6912 rxdp3->Buffer0_ptr)) {
Veena Parat491abf22007-07-23 02:37:14 -04006913 pci_unmap_single (sp->pdev,
Al Viro3e847422007-08-02 19:21:30 +01006914 (dma_addr_t)rxdp3->Buffer2_ptr,
Veena Parat491abf22007-07-23 02:37:14 -04006915 dev->mtu + 4, PCI_DMA_FROMDEVICE);
6916 goto memalloc_failed;
6917 }
Ananda Raju5d3213c2006-04-21 19:23:26 -04006918 rxdp->Host_Control = (unsigned long) (*skb);
6919
6920 /* Buffer-1 will be dummy buffer not used */
Veena Parat6d517a22007-07-23 02:20:51 -04006921 rxdp3->Buffer1_ptr = *temp1 =
Ananda Raju5d3213c2006-04-21 19:23:26 -04006922 pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN,
Ananda Raju5d3213c2006-04-21 19:23:26 -04006923 PCI_DMA_FROMDEVICE);
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07006924 if (pci_dma_mapping_error(sp->pdev,
6925 rxdp3->Buffer1_ptr)) {
Veena Parat491abf22007-07-23 02:37:14 -04006926 pci_unmap_single (sp->pdev,
Al Viro3e847422007-08-02 19:21:30 +01006927 (dma_addr_t)rxdp3->Buffer0_ptr,
6928 BUF0_LEN, PCI_DMA_FROMDEVICE);
6929 pci_unmap_single (sp->pdev,
6930 (dma_addr_t)rxdp3->Buffer2_ptr,
Veena Parat491abf22007-07-23 02:37:14 -04006931 dev->mtu + 4, PCI_DMA_FROMDEVICE);
6932 goto memalloc_failed;
6933 }
Ananda Raju5d3213c2006-04-21 19:23:26 -04006934 }
6935 }
6936 return 0;
Veena Parat491abf22007-07-23 02:37:14 -04006937 memalloc_failed:
6938 stats->pci_map_fail_cnt++;
6939 stats->mem_freed += (*skb)->truesize;
6940 dev_kfree_skb(*skb);
6941 return -ENOMEM;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006942}
Veena Parat491abf22007-07-23 02:37:14 -04006943
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006944static void set_rxd_buffer_size(struct s2io_nic *sp, struct RxD_t *rxdp,
6945 int size)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006946{
6947 struct net_device *dev = sp->dev;
6948 if (sp->rxd_mode == RXD_MODE_1) {
6949 rxdp->Control_2 = SET_BUFFER0_SIZE_1( size - NET_IP_ALIGN);
6950 } else if (sp->rxd_mode == RXD_MODE_3B) {
6951 rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN);
6952 rxdp->Control_2 |= SET_BUFFER1_SIZE_3(1);
6953 rxdp->Control_2 |= SET_BUFFER2_SIZE_3( dev->mtu + 4);
Ananda Raju5d3213c2006-04-21 19:23:26 -04006954 }
6955}
6956
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006957static int rxd_owner_bit_reset(struct s2io_nic *sp)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006958{
6959 int i, j, k, blk_cnt = 0, size;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006960 struct mac_info * mac_control = &sp->mac_control;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006961 struct config_param *config = &sp->config;
6962 struct net_device *dev = sp->dev;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006963 struct RxD_t *rxdp = NULL;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006964 struct sk_buff *skb = NULL;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05006965 struct buffAdd *ba = NULL;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006966 u64 temp0_64 = 0, temp1_64 = 0, temp2_64 = 0;
6967
6968 /* Calculate the size based on ring mode */
6969 size = dev->mtu + HEADER_ETHERNET_II_802_3_SIZE +
6970 HEADER_802_2_SIZE + HEADER_SNAP_SIZE;
6971 if (sp->rxd_mode == RXD_MODE_1)
6972 size += NET_IP_ALIGN;
6973 else if (sp->rxd_mode == RXD_MODE_3B)
6974 size = dev->mtu + ALIGN_SIZE + BUF0_LEN + 4;
Ananda Raju5d3213c2006-04-21 19:23:26 -04006975
6976 for (i = 0; i < config->rx_ring_num; i++) {
6977 blk_cnt = config->rx_cfg[i].num_rxd /
6978 (rxd_count[sp->rxd_mode] +1);
6979
6980 for (j = 0; j < blk_cnt; j++) {
6981 for (k = 0; k < rxd_count[sp->rxd_mode]; k++) {
6982 rxdp = mac_control->rings[i].
6983 rx_blocks[j].rxds[k].virt_addr;
Veena Parat6d517a22007-07-23 02:20:51 -04006984 if(sp->rxd_mode == RXD_MODE_3B)
Ananda Raju5d3213c2006-04-21 19:23:26 -04006985 ba = &mac_control->rings[i].ba[j][k];
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05006986 if (set_rxd_buffer_pointer(sp, rxdp, ba,
Ananda Raju5d3213c2006-04-21 19:23:26 -04006987 &skb,(u64 *)&temp0_64,
6988 (u64 *)&temp1_64,
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05006989 (u64 *)&temp2_64,
Marcin Slusarz20cbe732008-05-14 16:20:17 -07006990 size) == -ENOMEM) {
Sivakumar Subramaniac1f90d2007-02-24 02:01:31 -05006991 return 0;
6992 }
Ananda Raju5d3213c2006-04-21 19:23:26 -04006993
6994 set_rxd_buffer_size(sp, rxdp, size);
6995 wmb();
6996 /* flip the Ownership bit to Hardware */
6997 rxdp->Control_1 |= RXD_OWN_XENA;
6998 }
6999 }
7000 }
7001 return 0;
7002
7003}
7004
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007005static int s2io_add_isr(struct s2io_nic * sp)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007006{
7007 int ret = 0;
7008 struct net_device *dev = sp->dev;
7009 int err = 0;
7010
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007011 if (sp->config.intr_type == MSI_X)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007012 ret = s2io_enable_msi_x(sp);
7013 if (ret) {
7014 DBG_PRINT(ERR_DBG, "%s: Defaulting to INTA\n", dev->name);
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007015 sp->config.intr_type = INTA;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007016 }
7017
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007018 /* Store the values of the MSIX table in the struct s2io_nic structure */
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007019 store_xmsi_data(sp);
7020
7021 /* After proper initialization of H/W, register ISR */
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007022 if (sp->config.intr_type == MSI_X) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007023 int i, msix_rx_cnt = 0;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007024
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007025 for (i = 0; i < sp->num_entries; i++) {
7026 if (sp->s2io_entries[i].in_use == MSIX_FLG) {
7027 if (sp->s2io_entries[i].type ==
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007028 MSIX_RING_TYPE) {
7029 sprintf(sp->desc[i], "%s:MSI-X-%d-RX",
7030 dev->name, i);
7031 err = request_irq(sp->entries[i].vector,
7032 s2io_msix_ring_handle, 0,
7033 sp->desc[i],
7034 sp->s2io_entries[i].arg);
7035 } else if (sp->s2io_entries[i].type ==
7036 MSIX_ALARM_TYPE) {
7037 sprintf(sp->desc[i], "%s:MSI-X-%d-TX",
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007038 dev->name, i);
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007039 err = request_irq(sp->entries[i].vector,
7040 s2io_msix_fifo_handle, 0,
7041 sp->desc[i],
7042 sp->s2io_entries[i].arg);
7043
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007044 }
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007045 /* if either data or addr is zero print it. */
7046 if (!(sp->msix_info[i].addr &&
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007047 sp->msix_info[i].data)) {
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007048 DBG_PRINT(ERR_DBG,
7049 "%s @Addr:0x%llx Data:0x%llx\n",
7050 sp->desc[i],
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007051 (unsigned long long)
7052 sp->msix_info[i].addr,
Al Viro3459feb2008-03-16 22:23:14 +00007053 (unsigned long long)
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007054 ntohl(sp->msix_info[i].data));
7055 } else
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007056 msix_rx_cnt++;
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007057 if (err) {
7058 remove_msix_isr(sp);
7059
7060 DBG_PRINT(ERR_DBG,
7061 "%s:MSI-X-%d registration "
7062 "failed\n", dev->name, i);
7063
7064 DBG_PRINT(ERR_DBG,
7065 "%s: Defaulting to INTA\n",
7066 dev->name);
7067 sp->config.intr_type = INTA;
7068 break;
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007069 }
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007070 sp->s2io_entries[i].in_use =
7071 MSIX_REGISTERED_SUCCESS;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007072 }
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007073 }
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007074 if (!err) {
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007075 printk(KERN_INFO "MSI-X-RX %d entries enabled\n",
Sreenivasa Honnurac731ab2008-05-12 13:41:32 -04007076 --msix_rx_cnt);
7077 DBG_PRINT(INFO_DBG, "MSI-X-TX entries enabled"
7078 " through alarm vector\n");
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007079 }
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007080 }
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007081 if (sp->config.intr_type == INTA) {
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007082 err = request_irq((int) sp->pdev->irq, s2io_isr, IRQF_SHARED,
7083 sp->name, dev);
7084 if (err) {
7085 DBG_PRINT(ERR_DBG, "%s: ISR registration failed\n",
7086 dev->name);
7087 return -1;
7088 }
7089 }
7090 return 0;
7091}
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007092static void s2io_rem_isr(struct s2io_nic * sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007093{
Sreenivasa Honnur18b2b7b2007-11-14 01:41:06 -08007094 if (sp->config.intr_type == MSI_X)
7095 remove_msix_isr(sp);
7096 else
7097 remove_inta_isr(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007098}
7099
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007100static void do_s2io_card_down(struct s2io_nic * sp, int do_io)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007101{
7102 int cnt = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007103 struct XENA_dev_config __iomem *bar0 = sp->bar0;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007104 register u64 val64 = 0;
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007105 struct config_param *config;
7106 config = &sp->config;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007107
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05007108 if (!is_s2io_card_up(sp))
7109 return;
7110
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007111 del_timer_sync(&sp->alarm_timer);
7112 /* If s2io_set_link task is executing, wait till it completes. */
Sivakumar Subramani92b84432007-09-06 06:51:14 -04007113 while (test_and_set_bit(__S2IO_STATE_LINK_TASK, &(sp->state))) {
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007114 msleep(50);
7115 }
Sivakumar Subramani92b84432007-09-06 06:51:14 -04007116 clear_bit(__S2IO_STATE_CARD_UP, &sp->state);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007117
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007118 /* Disable napi */
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007119 if (sp->config.napi) {
7120 int off = 0;
7121 if (config->intr_type == MSI_X) {
7122 for (; off < sp->config.rx_ring_num; off++)
7123 napi_disable(&sp->mac_control.rings[off].napi);
7124 }
7125 else
7126 napi_disable(&sp->napi);
7127 }
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007128
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007129 /* disable Tx and Rx traffic on the NIC */
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007130 if (do_io)
7131 stop_nic(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007132
7133 s2io_rem_isr(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007134
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04007135 /* stop the tx queue, indicate link down */
7136 s2io_link(sp, LINK_DOWN);
7137
Linus Torvalds1da177e2005-04-16 15:20:36 -07007138 /* Check if the device is Quiescent and then Reset the NIC */
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007139 while(do_io) {
Ananda Raju5d3213c2006-04-21 19:23:26 -04007140 /* As per the HW requirement we need to replenish the
7141 * receive buffer to avoid the ring bump. Since there is
7142 * no intention of processing the Rx frame at this pointwe are
7143 * just settting the ownership bit of rxd in Each Rx
7144 * ring to HW and set the appropriate buffer size
7145 * based on the ring mode
7146 */
7147 rxd_owner_bit_reset(sp);
7148
Linus Torvalds1da177e2005-04-16 15:20:36 -07007149 val64 = readq(&bar0->adapter_status);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007150 if (verify_xena_quiescence(sp)) {
7151 if(verify_pcc_quiescent(sp, sp->device_enabled_once))
Linus Torvalds1da177e2005-04-16 15:20:36 -07007152 break;
7153 }
7154
7155 msleep(50);
7156 cnt++;
7157 if (cnt == 10) {
7158 DBG_PRINT(ERR_DBG,
7159 "s2io_close:Device not Quiescent ");
7160 DBG_PRINT(ERR_DBG, "adaper status reads 0x%llx\n",
7161 (unsigned long long) val64);
7162 break;
7163 }
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007164 }
7165 if (do_io)
7166 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007167
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007168 /* Free all Tx buffers */
7169 free_tx_buffers(sp);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007170
7171 /* Free all Rx buffers */
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007172 free_rx_buffers(sp);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07007173
Sivakumar Subramani92b84432007-09-06 06:51:14 -04007174 clear_bit(__S2IO_STATE_LINK_TASK, &(sp->state));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007175}
7176
Linas Vepstasd796fdb2007-05-14 18:37:30 -05007177static void s2io_card_down(struct s2io_nic * sp)
7178{
7179 do_s2io_card_down(sp, 1);
7180}
7181
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007182static int s2io_card_up(struct s2io_nic * sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007183{
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04007184 int i, ret = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007185 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007186 struct config_param *config;
7187 struct net_device *dev = (struct net_device *) sp->dev;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007188 u16 interruptible;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007189
7190 /* Initialize the H/W I/O registers */
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05007191 ret = init_nic(sp);
7192 if (ret != 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007193 DBG_PRINT(ERR_DBG, "%s: H/W initialization failed\n",
7194 dev->name);
Sreenivasa Honnur9f74ffd2007-11-30 01:46:08 -05007195 if (ret != -EIO)
7196 s2io_reset(sp);
7197 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007198 }
7199
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007200 /*
7201 * Initializing the Rx buffers. For now we are considering only 1
Linus Torvalds1da177e2005-04-16 15:20:36 -07007202 * Rx ring and initializing buffers into 30 Rx blocks
7203 */
7204 mac_control = &sp->mac_control;
7205 config = &sp->config;
7206
7207 for (i = 0; i < config->rx_ring_num; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007208 mac_control->rings[i].mtu = dev->mtu;
FUJITA Tomonori8d8bb392008-07-25 19:44:49 -07007209 ret = fill_rx_buffers(sp, &mac_control->rings[i], 1);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007210 if (ret) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007211 DBG_PRINT(ERR_DBG, "%s: Out of memory in Open\n",
7212 dev->name);
7213 s2io_reset(sp);
7214 free_rx_buffers(sp);
7215 return -ENOMEM;
7216 }
7217 DBG_PRINT(INFO_DBG, "Buf in ring:%d is %d:\n", i,
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007218 mac_control->rings[i].rx_bufs_left);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007219 }
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007220
7221 /* Initialise napi */
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04007222 if (config->napi) {
7223 int i;
7224 if (config->intr_type == MSI_X) {
7225 for (i = 0; i < sp->config.rx_ring_num; i++)
7226 napi_enable(&sp->mac_control.rings[i].napi);
7227 } else {
7228 napi_enable(&sp->napi);
7229 }
7230 }
Sreenivasa Honnur5f490c92008-01-14 20:23:04 -05007231
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007232 /* Maintain the state prior to the open */
7233 if (sp->promisc_flg)
7234 sp->promisc_flg = 0;
7235 if (sp->m_cast_flg) {
7236 sp->m_cast_flg = 0;
7237 sp->all_multi_pos= 0;
7238 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007239
7240 /* Setting its receive mode */
7241 s2io_set_multicast(dev);
7242
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007243 if (sp->lro) {
Ananda Rajub41477f2006-07-24 19:52:49 -04007244 /* Initialize max aggregatable pkts per session based on MTU */
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007245 sp->lro_max_aggr_per_sess = ((1<<16) - 1) / dev->mtu;
7246 /* Check if we can use(if specified) user provided value */
7247 if (lro_max_pkts < sp->lro_max_aggr_per_sess)
7248 sp->lro_max_aggr_per_sess = lro_max_pkts;
7249 }
7250
Linus Torvalds1da177e2005-04-16 15:20:36 -07007251 /* Enable Rx Traffic and interrupts on the NIC */
7252 if (start_nic(sp)) {
7253 DBG_PRINT(ERR_DBG, "%s: Starting NIC failed\n", dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007254 s2io_reset(sp);
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007255 free_rx_buffers(sp);
7256 return -ENODEV;
7257 }
7258
7259 /* Add interrupt service routine */
7260 if (s2io_add_isr(sp) != 0) {
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007261 if (sp->config.intr_type == MSI_X)
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007262 s2io_rem_isr(sp);
7263 s2io_reset(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007264 free_rx_buffers(sp);
7265 return -ENODEV;
7266 }
7267
raghavendra.koushik@neterion.com25fff882005-08-03 12:34:11 -07007268 S2IO_TIMER_CONF(sp->alarm_timer, s2io_alarm_handle, sp, (HZ/2));
7269
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04007270 set_bit(__S2IO_STATE_CARD_UP, &sp->state);
7271
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007272 /* Enable select interrupts */
Sivakumar Subramani9caab452007-09-06 06:21:54 -04007273 en_dis_err_alarms(sp, ENA_ALL_INTRS, ENABLE_INTRS);
Sreenivasa Honnur01e16fa2008-07-09 23:49:21 -04007274 if (sp->config.intr_type != INTA) {
7275 interruptible = TX_TRAFFIC_INTR | TX_PIC_INTR;
7276 en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
7277 } else {
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007278 interruptible = TX_TRAFFIC_INTR | RX_TRAFFIC_INTR;
Sivakumar Subramani9caab452007-09-06 06:21:54 -04007279 interruptible |= TX_PIC_INTR;
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007280 en_dis_able_nic_intrs(sp, interruptible, ENABLE_INTRS);
7281 }
7282
Linus Torvalds1da177e2005-04-16 15:20:36 -07007283 return 0;
7284}
7285
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007286/**
Linus Torvalds1da177e2005-04-16 15:20:36 -07007287 * s2io_restart_nic - Resets the NIC.
7288 * @data : long pointer to the device private structure
7289 * Description:
7290 * This function is scheduled to be run by the s2io_tx_watchdog
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007291 * function after 0.5 secs to reset the NIC. The idea is to reduce
Linus Torvalds1da177e2005-04-16 15:20:36 -07007292 * the run time of the watch dog routine which is run holding a
7293 * spin lock.
7294 */
7295
David Howellsc4028952006-11-22 14:57:56 +00007296static void s2io_restart_nic(struct work_struct *work)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007297{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007298 struct s2io_nic *sp = container_of(work, struct s2io_nic, rst_timer_task);
David Howellsc4028952006-11-22 14:57:56 +00007299 struct net_device *dev = sp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007300
Francois Romieu22747d62007-02-15 23:37:50 +01007301 rtnl_lock();
7302
7303 if (!netif_running(dev))
7304 goto out_unlock;
7305
Ananda Rajue6a8fee2006-07-06 23:58:23 -07007306 s2io_card_down(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007307 if (s2io_card_up(sp)) {
7308 DBG_PRINT(ERR_DBG, "%s: Device bring up failed\n",
7309 dev->name);
7310 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007311 s2io_wake_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007312 DBG_PRINT(ERR_DBG, "%s: was reset by Tx watchdog timer\n",
7313 dev->name);
Francois Romieu22747d62007-02-15 23:37:50 +01007314out_unlock:
7315 rtnl_unlock();
Linus Torvalds1da177e2005-04-16 15:20:36 -07007316}
7317
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007318/**
7319 * s2io_tx_watchdog - Watchdog for transmit side.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007320 * @dev : Pointer to net device structure
7321 * Description:
7322 * This function is triggered if the Tx Queue is stopped
7323 * for a pre-defined amount of time when the Interface is still up.
7324 * If the Interface is jammed in such a situation, the hardware is
7325 * reset (by s2io_close) and restarted again (by s2io_open) to
7326 * overcome any problem that might have been caused in the hardware.
7327 * Return value:
7328 * void
7329 */
7330
7331static void s2io_tx_watchdog(struct net_device *dev)
7332{
Wang Chen4cf16532008-11-12 23:38:14 -08007333 struct s2io_nic *sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007334
7335 if (netif_carrier_ok(dev)) {
Sreenivasa Honnurc53d4942007-05-10 04:18:54 -04007336 sp->mac_control.stats_info->sw_stat.watchdog_timer_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007337 schedule_work(&sp->rst_timer_task);
Ananda Rajubd1034f2006-04-21 19:20:22 -04007338 sp->mac_control.stats_info->sw_stat.soft_reset_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007339 }
7340}
7341
7342/**
7343 * rx_osm_handler - To perform some OS related operations on SKB.
7344 * @sp: private member of the device structure,pointer to s2io_nic structure.
7345 * @skb : the socket buffer pointer.
7346 * @len : length of the packet
7347 * @cksum : FCS checksum of the frame.
7348 * @ring_no : the ring from which this RxD was extracted.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007349 * Description:
Ananda Rajub41477f2006-07-24 19:52:49 -04007350 * This function is called by the Rx interrupt serivce routine to perform
Linus Torvalds1da177e2005-04-16 15:20:36 -07007351 * some OS related operations on the SKB before passing it to the upper
7352 * layers. It mainly checks if the checksum is OK, if so adds it to the
7353 * SKBs cksum variable, increments the Rx packet count and passes the SKB
7354 * to the upper layer. If the checksum is wrong, it increments the Rx
7355 * packet error count, frees the SKB and returns error.
7356 * Return value:
7357 * SUCCESS on success and -1 on failure.
7358 */
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007359static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007360{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007361 struct s2io_nic *sp = ring_data->nic;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007362 struct net_device *dev = (struct net_device *) ring_data->dev;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007363 struct sk_buff *skb = (struct sk_buff *)
7364 ((unsigned long) rxdp->Host_Control);
7365 int ring_no = ring_data->ring_no;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007366 u16 l3_csum, l4_csum;
Ananda Raju863c11a2006-04-21 19:03:13 -04007367 unsigned long long err = rxdp->Control_1 & RXD_T_CODE;
Ingo Molnar2e6a6842008-11-25 16:47:35 -08007368 struct lro *uninitialized_var(lro);
Olaf Heringf9046eb2007-06-19 22:41:10 +02007369 u8 err_mask;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007370
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007371 skb->dev = dev;
Ananda Rajuc92ca042006-04-21 19:18:03 -04007372
Ananda Raju863c11a2006-04-21 19:03:13 -04007373 if (err) {
Ananda Rajubd1034f2006-04-21 19:20:22 -04007374 /* Check for parity error */
7375 if (err & 0x1) {
7376 sp->mac_control.stats_info->sw_stat.parity_err_cnt++;
7377 }
Olaf Heringf9046eb2007-06-19 22:41:10 +02007378 err_mask = err >> 48;
7379 switch(err_mask) {
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007380 case 1:
7381 sp->mac_control.stats_info->sw_stat.
7382 rx_parity_err_cnt++;
7383 break;
Ananda Rajubd1034f2006-04-21 19:20:22 -04007384
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007385 case 2:
7386 sp->mac_control.stats_info->sw_stat.
7387 rx_abort_cnt++;
7388 break;
7389
7390 case 3:
7391 sp->mac_control.stats_info->sw_stat.
7392 rx_parity_abort_cnt++;
7393 break;
7394
7395 case 4:
7396 sp->mac_control.stats_info->sw_stat.
7397 rx_rda_fail_cnt++;
7398 break;
7399
7400 case 5:
7401 sp->mac_control.stats_info->sw_stat.
7402 rx_unkn_prot_cnt++;
7403 break;
7404
7405 case 6:
7406 sp->mac_control.stats_info->sw_stat.
7407 rx_fcs_err_cnt++;
7408 break;
7409
7410 case 7:
7411 sp->mac_control.stats_info->sw_stat.
7412 rx_buf_size_err_cnt++;
7413 break;
7414
7415 case 8:
7416 sp->mac_control.stats_info->sw_stat.
7417 rx_rxd_corrupt_cnt++;
7418 break;
7419
7420 case 15:
7421 sp->mac_control.stats_info->sw_stat.
7422 rx_unkn_err_cnt++;
7423 break;
7424 }
Ananda Raju863c11a2006-04-21 19:03:13 -04007425 /*
7426 * Drop the packet if bad transfer code. Exception being
7427 * 0x5, which could be due to unsupported IPv6 extension header.
7428 * In this case, we let stack handle the packet.
7429 * Note that in this case, since checksum will be incorrect,
7430 * stack will validate the same.
7431 */
Olaf Heringf9046eb2007-06-19 22:41:10 +02007432 if (err_mask != 0x5) {
7433 DBG_PRINT(ERR_DBG, "%s: Rx error Value: 0x%x\n",
7434 dev->name, err_mask);
Breno Leitaodc56e632008-07-22 16:27:20 -03007435 dev->stats.rx_crc_errors++;
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04007436 sp->mac_control.stats_info->sw_stat.mem_freed
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007437 += skb->truesize;
Ananda Raju863c11a2006-04-21 19:03:13 -04007438 dev_kfree_skb(skb);
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007439 ring_data->rx_bufs_left -= 1;
Ananda Raju863c11a2006-04-21 19:03:13 -04007440 rxdp->Host_Control = 0;
7441 return 0;
7442 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007443 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007444
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007445 /* Updating statistics */
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007446 ring_data->rx_packets++;
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007447 rxdp->Host_Control = 0;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007448 if (sp->rxd_mode == RXD_MODE_1) {
7449 int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007450
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007451 ring_data->rx_bytes += len;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007452 skb_put(skb, len);
7453
Veena Parat6d517a22007-07-23 02:20:51 -04007454 } else if (sp->rxd_mode == RXD_MODE_3B) {
Ananda Rajuda6971d2005-10-31 16:55:31 -05007455 int get_block = ring_data->rx_curr_get_info.block_index;
7456 int get_off = ring_data->rx_curr_get_info.offset;
7457 int buf0_len = RXD_GET_BUFFER0_SIZE_3(rxdp->Control_2);
7458 int buf2_len = RXD_GET_BUFFER2_SIZE_3(rxdp->Control_2);
7459 unsigned char *buff = skb_push(skb, buf0_len);
7460
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007461 struct buffAdd *ba = &ring_data->ba[get_block][get_off];
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007462 ring_data->rx_bytes += buf0_len + buf2_len;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007463 memcpy(buff, ba->ba_0, buf0_len);
Veena Parat6d517a22007-07-23 02:20:51 -04007464 skb_put(skb, buf2_len);
Ananda Rajuda6971d2005-10-31 16:55:31 -05007465 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007466
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007467 if ((rxdp->Control_1 & TCP_OR_UDP_FRAME) && ((!ring_data->lro) ||
7468 (ring_data->lro && (!(rxdp->Control_1 & RXD_FRAME_IP_FRAG)))) &&
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007469 (sp->rx_csum)) {
7470 l3_csum = RXD_GET_L3_CKSUM(rxdp->Control_1);
7471 l4_csum = RXD_GET_L4_CKSUM(rxdp->Control_1);
7472 if ((l3_csum == L3_CKSUM_OK) && (l4_csum == L4_CKSUM_OK)) {
7473 /*
7474 * NIC verifies if the Checksum of the received
7475 * frame is Ok or not and accordingly returns
7476 * a flag in the RxD.
7477 */
7478 skb->ip_summed = CHECKSUM_UNNECESSARY;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007479 if (ring_data->lro) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007480 u32 tcp_len;
7481 u8 *tcp;
7482 int ret = 0;
7483
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007484 ret = s2io_club_tcp_session(ring_data,
7485 skb->data, &tcp, &tcp_len, &lro,
7486 rxdp, sp);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007487 switch (ret) {
7488 case 3: /* Begin anew */
7489 lro->parent = skb;
7490 goto aggregate;
7491 case 1: /* Aggregate */
7492 {
7493 lro_append_pkt(sp, lro,
7494 skb, tcp_len);
7495 goto aggregate;
7496 }
7497 case 4: /* Flush session */
7498 {
7499 lro_append_pkt(sp, lro,
7500 skb, tcp_len);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007501 queue_rx_frame(lro->parent,
7502 lro->vlan_tag);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007503 clear_lro_session(lro);
7504 sp->mac_control.stats_info->
7505 sw_stat.flush_max_pkts++;
7506 goto aggregate;
7507 }
7508 case 2: /* Flush both */
7509 lro->parent->data_len =
7510 lro->frags_len;
7511 sp->mac_control.stats_info->
7512 sw_stat.sending_both++;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007513 queue_rx_frame(lro->parent,
7514 lro->vlan_tag);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007515 clear_lro_session(lro);
7516 goto send_up;
7517 case 0: /* sessions exceeded */
Ananda Rajuc92ca042006-04-21 19:18:03 -04007518 case -1: /* non-TCP or not
7519 * L2 aggregatable
7520 */
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007521 case 5: /*
7522 * First pkt in session not
7523 * L3/L4 aggregatable
7524 */
7525 break;
7526 default:
7527 DBG_PRINT(ERR_DBG,
7528 "%s: Samadhana!!\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07007529 __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007530 BUG();
7531 }
7532 }
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007533 } else {
7534 /*
7535 * Packet with erroneous checksum, let the
7536 * upper layers deal with it.
7537 */
7538 skb->ip_summed = CHECKSUM_NONE;
7539 }
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007540 } else
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007541 skb->ip_summed = CHECKSUM_NONE;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007542
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007543 sp->mac_control.stats_info->sw_stat.mem_freed += skb->truesize;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007544send_up:
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05007545 queue_rx_frame(skb, RXD_GET_VLAN_TAG(rxdp->Control_2));
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05007546aggregate:
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007547 sp->mac_control.rings[ring_no].rx_bufs_left -= 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007548 return SUCCESS;
7549}
7550
7551/**
7552 * s2io_link - stops/starts the Tx queue.
7553 * @sp : private member of the device structure, which is a pointer to the
7554 * s2io_nic structure.
7555 * @link : inidicates whether link is UP/DOWN.
7556 * Description:
7557 * This function stops/starts the Tx queue depending on whether the link
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007558 * status of the NIC is is down or up. This is called by the Alarm
7559 * interrupt handler whenever a link change interrupt comes up.
Linus Torvalds1da177e2005-04-16 15:20:36 -07007560 * Return value:
7561 * void.
7562 */
7563
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007564static void s2io_link(struct s2io_nic * sp, int link)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007565{
7566 struct net_device *dev = (struct net_device *) sp->dev;
7567
7568 if (link != sp->last_link_state) {
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08007569 init_tti(sp, link);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007570 if (link == LINK_DOWN) {
7571 DBG_PRINT(ERR_DBG, "%s: Link down\n", dev->name);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007572 s2io_stop_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007573 netif_carrier_off(dev);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007574 if(sp->mac_control.stats_info->sw_stat.link_up_cnt)
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04007575 sp->mac_control.stats_info->sw_stat.link_up_time =
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007576 jiffies - sp->start_time;
7577 sp->mac_control.stats_info->sw_stat.link_down_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007578 } else {
7579 DBG_PRINT(ERR_DBG, "%s: Link Up\n", dev->name);
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007580 if (sp->mac_control.stats_info->sw_stat.link_down_cnt)
Sivakumar Subramani8a4bdba2007-09-18 18:14:20 -04007581 sp->mac_control.stats_info->sw_stat.link_down_time =
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007582 jiffies - sp->start_time;
7583 sp->mac_control.stats_info->sw_stat.link_up_cnt++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007584 netif_carrier_on(dev);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007585 s2io_wake_all_tx_queue(sp);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007586 }
7587 }
7588 sp->last_link_state = link;
Sreenivasa Honnur491976b2007-05-10 04:22:25 -04007589 sp->start_time = jiffies;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007590}
7591
7592/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007593 * s2io_init_pci -Initialization of PCI and PCI-X configuration registers .
7594 * @sp : private member of the device structure, which is a pointer to the
Linus Torvalds1da177e2005-04-16 15:20:36 -07007595 * s2io_nic structure.
7596 * Description:
7597 * This function initializes a few of the PCI and PCI-X configuration registers
7598 * with recommended values.
7599 * Return value:
7600 * void
7601 */
7602
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007603static void s2io_init_pci(struct s2io_nic * sp)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007604{
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007605 u16 pci_cmd = 0, pcix_cmd = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007606
7607 /* Enable Data Parity Error Recovery in PCI-X command register. */
7608 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007609 &(pcix_cmd));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007610 pci_write_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007611 (pcix_cmd | 1));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007612 pci_read_config_word(sp->pdev, PCIX_COMMAND_REGISTER,
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007613 &(pcix_cmd));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007614
7615 /* Set the PErr Response bit in PCI command register. */
7616 pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
7617 pci_write_config_word(sp->pdev, PCI_COMMAND,
7618 (pci_cmd | PCI_COMMAND_PARITY));
7619 pci_read_config_word(sp->pdev, PCI_COMMAND, &pci_cmd);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007620}
7621
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007622static int s2io_verify_parm(struct pci_dev *pdev, u8 *dev_intr_type,
7623 u8 *dev_multiq)
Ananda Raju9dc737a2006-04-21 19:05:41 -04007624{
Surjit Reang2fda0962008-01-24 02:08:59 -08007625 if ((tx_fifo_num > MAX_TX_FIFOS) ||
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007626 (tx_fifo_num < 1)) {
Surjit Reang2fda0962008-01-24 02:08:59 -08007627 DBG_PRINT(ERR_DBG, "s2io: Requested number of tx fifos "
7628 "(%d) not supported\n", tx_fifo_num);
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007629
7630 if (tx_fifo_num < 1)
7631 tx_fifo_num = 1;
7632 else
7633 tx_fifo_num = MAX_TX_FIFOS;
7634
Surjit Reang2fda0962008-01-24 02:08:59 -08007635 DBG_PRINT(ERR_DBG, "s2io: Default to %d ", tx_fifo_num);
7636 DBG_PRINT(ERR_DBG, "tx fifos\n");
Ananda Raju9dc737a2006-04-21 19:05:41 -04007637 }
Surjit Reang2fda0962008-01-24 02:08:59 -08007638
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007639 if (multiq)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007640 *dev_multiq = multiq;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007641
7642 if (tx_steering_type && (1 == tx_fifo_num)) {
7643 if (tx_steering_type != TX_DEFAULT_STEERING)
7644 DBG_PRINT(ERR_DBG,
7645 "s2io: Tx steering is not supported with "
7646 "one fifo. Disabling Tx steering.\n");
7647 tx_steering_type = NO_STEERING;
7648 }
7649
7650 if ((tx_steering_type < NO_STEERING) ||
7651 (tx_steering_type > TX_DEFAULT_STEERING)) {
7652 DBG_PRINT(ERR_DBG, "s2io: Requested transmit steering not "
7653 "supported\n");
7654 DBG_PRINT(ERR_DBG, "s2io: Disabling transmit steering\n");
7655 tx_steering_type = NO_STEERING;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007656 }
7657
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007658 if (rx_ring_num > MAX_RX_RINGS) {
7659 DBG_PRINT(ERR_DBG, "s2io: Requested number of rx rings not "
Ananda Raju9dc737a2006-04-21 19:05:41 -04007660 "supported\n");
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007661 DBG_PRINT(ERR_DBG, "s2io: Default to %d rx rings\n",
7662 MAX_RX_RINGS);
7663 rx_ring_num = MAX_RX_RINGS;
Ananda Raju9dc737a2006-04-21 19:05:41 -04007664 }
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007665
Veena Parateccb8622007-07-23 02:23:54 -04007666 if ((*dev_intr_type != INTA) && (*dev_intr_type != MSI_X)) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04007667 DBG_PRINT(ERR_DBG, "s2io: Wrong intr_type requested. "
7668 "Defaulting to INTA\n");
7669 *dev_intr_type = INTA;
7670 }
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07007671
Ananda Raju9dc737a2006-04-21 19:05:41 -04007672 if ((*dev_intr_type == MSI_X) &&
7673 ((pdev->device != PCI_DEVICE_ID_HERC_WIN) &&
7674 (pdev->device != PCI_DEVICE_ID_HERC_UNI))) {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04007675 DBG_PRINT(ERR_DBG, "s2io: Xframe I does not support MSI_X. "
Ananda Raju9dc737a2006-04-21 19:05:41 -04007676 "Defaulting to INTA\n");
7677 *dev_intr_type = INTA;
7678 }
Sivakumar Subramanifb6a8252007-02-24 01:51:50 -05007679
Veena Parat6d517a22007-07-23 02:20:51 -04007680 if ((rx_ring_mode != 1) && (rx_ring_mode != 2)) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04007681 DBG_PRINT(ERR_DBG, "s2io: Requested ring mode not supported\n");
Veena Parat6d517a22007-07-23 02:20:51 -04007682 DBG_PRINT(ERR_DBG, "s2io: Defaulting to 1-buffer mode\n");
7683 rx_ring_mode = 1;
Ananda Raju9dc737a2006-04-21 19:05:41 -04007684 }
7685 return SUCCESS;
7686}
7687
Linus Torvalds1da177e2005-04-16 15:20:36 -07007688/**
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007689 * rts_ds_steer - Receive traffic steering based on IPv4 or IPv6 TOS
7690 * or Traffic class respectively.
Ramkrishna Vepab7c56782007-12-17 11:40:15 -08007691 * @nic: device private variable
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007692 * Description: The function configures the receive steering to
7693 * desired receive ring.
7694 * Return Value: SUCCESS on success and
7695 * '-1' on failure (endian settings incorrect).
7696 */
7697static int rts_ds_steer(struct s2io_nic *nic, u8 ds_codepoint, u8 ring)
7698{
7699 struct XENA_dev_config __iomem *bar0 = nic->bar0;
7700 register u64 val64 = 0;
7701
7702 if (ds_codepoint > 63)
7703 return FAILURE;
7704
7705 val64 = RTS_DS_MEM_DATA(ring);
7706 writeq(val64, &bar0->rts_ds_mem_data);
7707
7708 val64 = RTS_DS_MEM_CTRL_WE |
7709 RTS_DS_MEM_CTRL_STROBE_NEW_CMD |
7710 RTS_DS_MEM_CTRL_OFFSET(ds_codepoint);
7711
7712 writeq(val64, &bar0->rts_ds_mem_ctrl);
7713
7714 return wait_for_cmd_complete(&bar0->rts_ds_mem_ctrl,
7715 RTS_DS_MEM_CTRL_STROBE_CMD_BEING_EXECUTED,
7716 S2IO_BIT_RESET);
7717}
7718
Stephen Hemminger04025092008-11-21 17:28:55 -08007719static const struct net_device_ops s2io_netdev_ops = {
7720 .ndo_open = s2io_open,
7721 .ndo_stop = s2io_close,
7722 .ndo_get_stats = s2io_get_stats,
7723 .ndo_start_xmit = s2io_xmit,
7724 .ndo_validate_addr = eth_validate_addr,
7725 .ndo_set_multicast_list = s2io_set_multicast,
7726 .ndo_do_ioctl = s2io_ioctl,
7727 .ndo_set_mac_address = s2io_set_mac_addr,
7728 .ndo_change_mtu = s2io_change_mtu,
7729 .ndo_vlan_rx_register = s2io_vlan_rx_register,
7730 .ndo_vlan_rx_kill_vid = s2io_vlan_rx_kill_vid,
7731 .ndo_tx_timeout = s2io_tx_watchdog,
7732#ifdef CONFIG_NET_POLL_CONTROLLER
7733 .ndo_poll_controller = s2io_netpoll,
7734#endif
7735};
7736
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05007737/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007738 * s2io_init_nic - Initialization of the adapter .
Linus Torvalds1da177e2005-04-16 15:20:36 -07007739 * @pdev : structure containing the PCI related information of the device.
7740 * @pre: List of PCI devices supported by the driver listed in s2io_tbl.
7741 * Description:
7742 * The function initializes an adapter identified by the pci_dec structure.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007743 * All OS related initialization including memory and device structure and
7744 * initlaization of the device private variable is done. Also the swapper
7745 * control register is initialized to enable read and write into the I/O
Linus Torvalds1da177e2005-04-16 15:20:36 -07007746 * registers of the device.
7747 * Return value:
7748 * returns 0 on success and negative on failure.
7749 */
7750
7751static int __devinit
7752s2io_init_nic(struct pci_dev *pdev, const struct pci_device_id *pre)
7753{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007754 struct s2io_nic *sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007755 struct net_device *dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007756 int i, j, ret;
7757 int dma_flag = FALSE;
7758 u32 mac_up, mac_down;
7759 u64 val64 = 0, tmp64 = 0;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007760 struct XENA_dev_config __iomem *bar0 = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007761 u16 subid;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007762 struct mac_info *mac_control;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007763 struct config_param *config;
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007764 int mode;
Ravinandan Arakalicc6e7c42005-10-04 06:41:24 -04007765 u8 dev_intr_type = intr_type;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007766 u8 dev_multiq = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007767
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007768 ret = s2io_verify_parm(pdev, &dev_intr_type, &dev_multiq);
7769 if (ret)
Ananda Raju9dc737a2006-04-21 19:05:41 -04007770 return ret;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007771
7772 if ((ret = pci_enable_device(pdev))) {
7773 DBG_PRINT(ERR_DBG,
7774 "s2io_init_nic: pci_enable_device failed\n");
7775 return ret;
7776 }
7777
Domen Puncer1e7f0bd2005-06-26 18:22:14 -04007778 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007779 DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 64bit DMA\n");
7780 dma_flag = TRUE;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007781 if (pci_set_consistent_dma_mask
Domen Puncer1e7f0bd2005-06-26 18:22:14 -04007782 (pdev, DMA_64BIT_MASK)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007783 DBG_PRINT(ERR_DBG,
7784 "Unable to obtain 64bit DMA for \
7785 consistent allocations\n");
7786 pci_disable_device(pdev);
7787 return -ENOMEM;
7788 }
Domen Puncer1e7f0bd2005-06-26 18:22:14 -04007789 } else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007790 DBG_PRINT(INIT_DBG, "s2io_init_nic: Using 32bit DMA\n");
7791 } else {
7792 pci_disable_device(pdev);
7793 return -ENOMEM;
7794 }
Veena Parateccb8622007-07-23 02:23:54 -04007795 if ((ret = pci_request_regions(pdev, s2io_driver_name))) {
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07007796 DBG_PRINT(ERR_DBG, "%s: Request Regions failed - %x \n", __func__, ret);
Veena Parateccb8622007-07-23 02:23:54 -04007797 pci_disable_device(pdev);
7798 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007799 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007800 if (dev_multiq)
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007801 dev = alloc_etherdev_mq(sizeof(struct s2io_nic), tx_fifo_num);
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007802 else
David S. Millerb19fa1f2008-07-08 23:14:24 -07007803 dev = alloc_etherdev(sizeof(struct s2io_nic));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007804 if (dev == NULL) {
7805 DBG_PRINT(ERR_DBG, "Device allocation failed\n");
7806 pci_disable_device(pdev);
7807 pci_release_regions(pdev);
7808 return -ENODEV;
7809 }
7810
7811 pci_set_master(pdev);
7812 pci_set_drvdata(pdev, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007813 SET_NETDEV_DEV(dev, &pdev->dev);
7814
7815 /* Private member variable initialized to s2io NIC structure */
Wang Chen4cf16532008-11-12 23:38:14 -08007816 sp = netdev_priv(dev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007817 memset(sp, 0, sizeof(struct s2io_nic));
Linus Torvalds1da177e2005-04-16 15:20:36 -07007818 sp->dev = dev;
7819 sp->pdev = pdev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007820 sp->high_dma_flag = dma_flag;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007821 sp->device_enabled_once = FALSE;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007822 if (rx_ring_mode == 1)
7823 sp->rxd_mode = RXD_MODE_1;
7824 if (rx_ring_mode == 2)
7825 sp->rxd_mode = RXD_MODE_3B;
Ananda Rajuda6971d2005-10-31 16:55:31 -05007826
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07007827 sp->config.intr_type = dev_intr_type;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007828
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007829 if ((pdev->device == PCI_DEVICE_ID_HERC_WIN) ||
7830 (pdev->device == PCI_DEVICE_ID_HERC_UNI))
7831 sp->device_type = XFRAME_II_DEVICE;
7832 else
7833 sp->device_type = XFRAME_I_DEVICE;
7834
Stephen Hemminger43b7c452007-10-05 12:39:21 -07007835 sp->lro = lro_enable;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04007836
Linus Torvalds1da177e2005-04-16 15:20:36 -07007837 /* Initialize some PCI/PCI-X fields of the NIC. */
7838 s2io_init_pci(sp);
7839
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007840 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07007841 * Setting the device configuration parameters.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007842 * Most of these parameters can be specified by the user during
7843 * module insertion as they are module loadable parameters. If
7844 * these parameters are not not specified during load time, they
Linus Torvalds1da177e2005-04-16 15:20:36 -07007845 * are initialized with default values.
7846 */
7847 mac_control = &sp->mac_control;
7848 config = &sp->config;
7849
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07007850 config->napi = napi;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007851 config->tx_steering_type = tx_steering_type;
Sivakumar Subramani596c5c92007-09-15 14:24:03 -07007852
Linus Torvalds1da177e2005-04-16 15:20:36 -07007853 /* Tx side parameters. */
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007854 if (config->tx_steering_type == TX_PRIORITY_STEERING)
7855 config->tx_fifo_num = MAX_TX_FIFOS;
7856 else
7857 config->tx_fifo_num = tx_fifo_num;
7858
7859 /* Initialize the fifos used for tx steering */
7860 if (config->tx_fifo_num < 5) {
7861 if (config->tx_fifo_num == 1)
7862 sp->total_tcp_fifos = 1;
7863 else
7864 sp->total_tcp_fifos = config->tx_fifo_num - 1;
7865 sp->udp_fifo_idx = config->tx_fifo_num - 1;
7866 sp->total_udp_fifos = 1;
7867 sp->other_fifo_idx = sp->total_tcp_fifos - 1;
7868 } else {
7869 sp->total_tcp_fifos = (tx_fifo_num - FIFO_UDP_MAX_NUM -
7870 FIFO_OTHER_MAX_NUM);
7871 sp->udp_fifo_idx = sp->total_tcp_fifos;
7872 sp->total_udp_fifos = FIFO_UDP_MAX_NUM;
7873 sp->other_fifo_idx = sp->udp_fifo_idx + FIFO_UDP_MAX_NUM;
7874 }
7875
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007876 config->multiq = dev_multiq;
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007877 for (i = 0; i < config->tx_fifo_num; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007878 config->tx_cfg[i].fifo_len = tx_fifo_len[i];
7879 config->tx_cfg[i].fifo_priority = i;
7880 }
7881
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007882 /* mapping the QoS priority to the configured fifos */
7883 for (i = 0; i < MAX_TX_FIFOS; i++)
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05007884 config->fifo_mapping[i] = fifo_map[config->tx_fifo_num - 1][i];
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07007885
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05007886 /* map the hashing selector table to the configured fifos */
7887 for (i = 0; i < config->tx_fifo_num; i++)
7888 sp->fifo_selector[i] = fifo_selector[i];
7889
7890
Linus Torvalds1da177e2005-04-16 15:20:36 -07007891 config->tx_intr_type = TXD_INT_TYPE_UTILZ;
7892 for (i = 0; i < config->tx_fifo_num; i++) {
7893 config->tx_cfg[i].f_no_snoop =
7894 (NO_SNOOP_TXD | NO_SNOOP_TXD_BUFFER);
7895 if (config->tx_cfg[i].fifo_len < 65) {
7896 config->tx_intr_type = TXD_INT_TYPE_PER_LIST;
7897 break;
7898 }
7899 }
Ananda Rajufed5ecc2005-11-14 15:25:08 -05007900 /* + 2 because one Txd for skb->data and one Txd for UFO */
7901 config->max_txds = MAX_SKB_FRAGS + 2;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007902
7903 /* Rx side parameters. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07007904 config->rx_ring_num = rx_ring_num;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007905 for (i = 0; i < config->rx_ring_num; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07007906 config->rx_cfg[i].num_rxd = rx_ring_sz[i] *
Ananda Rajuda6971d2005-10-31 16:55:31 -05007907 (rxd_count[sp->rxd_mode] + 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007908 config->rx_cfg[i].ring_priority = i;
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04007909 mac_control->rings[i].rx_bufs_left = 0;
7910 mac_control->rings[i].rxd_mode = sp->rxd_mode;
7911 mac_control->rings[i].rxd_count = rxd_count[sp->rxd_mode];
7912 mac_control->rings[i].pdev = sp->pdev;
7913 mac_control->rings[i].dev = sp->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007914 }
7915
7916 for (i = 0; i < rx_ring_num; i++) {
7917 config->rx_cfg[i].ring_org = RING_ORG_BUFF1;
7918 config->rx_cfg[i].f_no_snoop =
7919 (NO_SNOOP_RXD | NO_SNOOP_RXD_BUFFER);
7920 }
7921
7922 /* Setting Mac Control parameters */
7923 mac_control->rmac_pause_time = rmac_pause_time;
7924 mac_control->mc_pause_threshold_q0q3 = mc_pause_threshold_q0q3;
7925 mac_control->mc_pause_threshold_q4q7 = mc_pause_threshold_q4q7;
7926
7927
Linus Torvalds1da177e2005-04-16 15:20:36 -07007928 /* initialize the shared memory used by the NIC and the host */
7929 if (init_shared_mem(sp)) {
7930 DBG_PRINT(ERR_DBG, "%s: Memory allocation failed\n",
Ananda Rajub41477f2006-07-24 19:52:49 -04007931 dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007932 ret = -ENOMEM;
7933 goto mem_alloc_failed;
7934 }
7935
Arjan van de Ven275f1652008-10-20 21:42:39 -07007936 sp->bar0 = pci_ioremap_bar(pdev, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007937 if (!sp->bar0) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007938 DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem1\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07007939 dev->name);
7940 ret = -ENOMEM;
7941 goto bar0_remap_failed;
7942 }
7943
Arjan van de Ven275f1652008-10-20 21:42:39 -07007944 sp->bar1 = pci_ioremap_bar(pdev, 2);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007945 if (!sp->bar1) {
Sivakumar Subramani19a60522007-01-31 13:30:49 -05007946 DBG_PRINT(ERR_DBG, "%s: Neterion: cannot remap io mem2\n",
Linus Torvalds1da177e2005-04-16 15:20:36 -07007947 dev->name);
7948 ret = -ENOMEM;
7949 goto bar1_remap_failed;
7950 }
7951
7952 dev->irq = pdev->irq;
7953 dev->base_addr = (unsigned long) sp->bar0;
7954
7955 /* Initializing the BAR1 address as the start of the FIFO pointer. */
7956 for (j = 0; j < MAX_TX_FIFOS; j++) {
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05007957 mac_control->tx_FIFO_start[j] = (struct TxFIFO_element __iomem *)
Linus Torvalds1da177e2005-04-16 15:20:36 -07007958 (sp->bar1 + (j * 0x00020000));
7959 }
7960
7961 /* Driver entry points */
Stephen Hemminger04025092008-11-21 17:28:55 -08007962 dev->netdev_ops = &s2io_netdev_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007963 SET_ETHTOOL_OPS(dev, &netdev_ethtool_ops);
raghavendra.koushik@neterion.combe3a6b02005-08-03 12:35:55 -07007964 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
Brian Haley612eff02006-06-15 14:36:36 -04007965
Linus Torvalds1da177e2005-04-16 15:20:36 -07007966 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
7967 if (sp->high_dma_flag == TRUE)
7968 dev->features |= NETIF_F_HIGHDMA;
Linus Torvalds1da177e2005-04-16 15:20:36 -07007969 dev->features |= NETIF_F_TSO;
Herbert Xuf83ef8c2006-06-30 13:37:03 -07007970 dev->features |= NETIF_F_TSO6;
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05007971 if ((sp->device_type & XFRAME_II_DEVICE) && (ufo)) {
Ananda Rajufed5ecc2005-11-14 15:25:08 -05007972 dev->features |= NETIF_F_UFO;
7973 dev->features |= NETIF_F_HW_CSUM;
7974 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07007975 dev->watchdog_timeo = WATCH_DOG_TIMEOUT;
David Howellsc4028952006-11-22 14:57:56 +00007976 INIT_WORK(&sp->rst_timer_task, s2io_restart_nic);
7977 INIT_WORK(&sp->set_link_task, s2io_set_link);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007978
ravinandan.arakali@neterion.come960fc52005-08-12 10:15:59 -07007979 pci_save_state(sp->pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07007980
7981 /* Setting swapper control on the NIC, for proper reset operation */
7982 if (s2io_set_swapper(sp)) {
7983 DBG_PRINT(ERR_DBG, "%s:swapper settings are wrong\n",
7984 dev->name);
7985 ret = -EAGAIN;
7986 goto set_swap_failed;
7987 }
7988
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007989 /* Verify if the Herc works on the slot its placed into */
7990 if (sp->device_type & XFRAME_II_DEVICE) {
7991 mode = s2io_verify_pci_mode(sp);
7992 if (mode < 0) {
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07007993 DBG_PRINT(ERR_DBG, "%s: ", __func__);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07007994 DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
7995 ret = -EBADSLT;
7996 goto set_swap_failed;
7997 }
7998 }
7999
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008000 if (sp->config.intr_type == MSI_X) {
8001 sp->num_entries = config->rx_ring_num + 1;
8002 ret = s2io_enable_msi_x(sp);
8003
8004 if (!ret) {
8005 ret = s2io_test_msi(sp);
8006 /* rollback MSI-X, will re-enable during add_isr() */
8007 remove_msix_isr(sp);
8008 }
8009 if (ret) {
8010
8011 DBG_PRINT(ERR_DBG,
8012 "%s: MSI-X requested but failed to enable\n",
8013 dev->name);
8014 sp->config.intr_type = INTA;
8015 }
8016 }
8017
8018 if (config->intr_type == MSI_X) {
8019 for (i = 0; i < config->rx_ring_num ; i++)
8020 netif_napi_add(dev, &mac_control->rings[i].napi,
8021 s2io_poll_msix, 64);
8022 } else {
8023 netif_napi_add(dev, &sp->napi, s2io_poll_inta, 64);
8024 }
8025
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008026 /* Not needed for Herc */
8027 if (sp->device_type & XFRAME_I_DEVICE) {
8028 /*
8029 * Fix for all "FFs" MAC address problems observed on
8030 * Alpha platforms
8031 */
8032 fix_mac_address(sp);
8033 s2io_reset(sp);
8034 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07008035
8036 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07008037 * MAC address initialization.
8038 * For now only one mac address will be read and used.
8039 */
8040 bar0 = sp->bar0;
8041 val64 = RMAC_ADDR_CMD_MEM_RD | RMAC_ADDR_CMD_MEM_STROBE_NEW_CMD |
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08008042 RMAC_ADDR_CMD_MEM_OFFSET(0 + S2IO_MAC_ADDR_START_OFFSET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008043 writeq(val64, &bar0->rmac_addr_cmd_mem);
Ananda Rajuc92ca042006-04-21 19:18:03 -04008044 wait_for_cmd_complete(&bar0->rmac_addr_cmd_mem,
Sivakumar Subramani9fc93a42007-02-24 01:57:32 -05008045 RMAC_ADDR_CMD_MEM_STROBE_CMD_EXECUTING, S2IO_BIT_RESET);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008046 tmp64 = readq(&bar0->rmac_addr_data0_mem);
8047 mac_down = (u32) tmp64;
8048 mac_up = (u32) (tmp64 >> 32);
8049
Linus Torvalds1da177e2005-04-16 15:20:36 -07008050 sp->def_mac_addr[0].mac_addr[3] = (u8) (mac_up);
8051 sp->def_mac_addr[0].mac_addr[2] = (u8) (mac_up >> 8);
8052 sp->def_mac_addr[0].mac_addr[1] = (u8) (mac_up >> 16);
8053 sp->def_mac_addr[0].mac_addr[0] = (u8) (mac_up >> 24);
8054 sp->def_mac_addr[0].mac_addr[5] = (u8) (mac_down >> 16);
8055 sp->def_mac_addr[0].mac_addr[4] = (u8) (mac_down >> 24);
8056
Linus Torvalds1da177e2005-04-16 15:20:36 -07008057 /* Set the factory defined MAC address initially */
8058 dev->addr_len = ETH_ALEN;
8059 memcpy(dev->dev_addr, sp->def_mac_addr, ETH_ALEN);
Sivakumar Subramani2fd37682007-09-14 07:39:19 -04008060 memcpy(dev->perm_addr, dev->dev_addr, ETH_ALEN);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008061
Sreenivasa Honnurfaa4f792008-01-24 01:45:43 -08008062 /* initialize number of multicast & unicast MAC entries variables */
8063 if (sp->device_type == XFRAME_I_DEVICE) {
8064 config->max_mc_addr = S2IO_XENA_MAX_MC_ADDRESSES;
8065 config->max_mac_addr = S2IO_XENA_MAX_MAC_ADDRESSES;
8066 config->mc_start_offset = S2IO_XENA_MC_ADDR_START_OFFSET;
8067 } else if (sp->device_type == XFRAME_II_DEVICE) {
8068 config->max_mc_addr = S2IO_HERC_MAX_MC_ADDRESSES;
8069 config->max_mac_addr = S2IO_HERC_MAX_MAC_ADDRESSES;
8070 config->mc_start_offset = S2IO_HERC_MC_ADDR_START_OFFSET;
8071 }
8072
8073 /* store mac addresses from CAM to s2io_nic structure */
8074 do_s2io_store_unicast_mc(sp);
8075
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008076 /* Configure MSIX vector for number of rings configured plus one */
8077 if ((sp->device_type == XFRAME_II_DEVICE) &&
8078 (config->intr_type == MSI_X))
8079 sp->num_entries = config->rx_ring_num + 1;
8080
Sivakumar Subramanic77dd432007-08-06 05:36:28 -04008081 /* Store the values of the MSIX table in the s2io_nic structure */
8082 store_xmsi_data(sp);
Ananda Rajub41477f2006-07-24 19:52:49 -04008083 /* reset Nic and bring it to known state */
8084 s2io_reset(sp);
8085
Linus Torvalds1da177e2005-04-16 15:20:36 -07008086 /*
Sreenivasa Honnur99993af2008-04-23 13:29:42 -04008087 * Initialize link state flags
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008088 * and the card state parameter
Linus Torvalds1da177e2005-04-16 15:20:36 -07008089 */
Sivakumar Subramani92b84432007-09-06 06:51:14 -04008090 sp->state = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07008091
Linus Torvalds1da177e2005-04-16 15:20:36 -07008092 /* Initialize spinlocks */
Surjit Reang2fda0962008-01-24 02:08:59 -08008093 for (i = 0; i < sp->config.tx_fifo_num; i++)
8094 spin_lock_init(&mac_control->fifos[i].tx_lock);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008095
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008096 /*
8097 * SXE-002: Configure link and activity LED to init state
8098 * on driver load.
Linus Torvalds1da177e2005-04-16 15:20:36 -07008099 */
8100 subid = sp->pdev->subsystem_device;
8101 if ((subid & 0xFF) >= 0x07) {
8102 val64 = readq(&bar0->gpio_control);
8103 val64 |= 0x0000800000000000ULL;
8104 writeq(val64, &bar0->gpio_control);
8105 val64 = 0x0411040400000000ULL;
8106 writeq(val64, (void __iomem *) bar0 + 0x2700);
8107 val64 = readq(&bar0->gpio_control);
8108 }
8109
8110 sp->rx_csum = 1; /* Rx chksum verify enabled by default */
8111
8112 if (register_netdev(dev)) {
8113 DBG_PRINT(ERR_DBG, "Device registration failed\n");
8114 ret = -ENODEV;
8115 goto register_failed;
8116 }
Ananda Raju9dc737a2006-04-21 19:05:41 -04008117 s2io_vpd_read(sp);
Ramkrishna Vepa0c61ed52007-03-09 18:28:32 -08008118 DBG_PRINT(ERR_DBG, "Copyright(c) 2002-2007 Neterion Inc.\n");
Ananda Rajub41477f2006-07-24 19:52:49 -04008119 DBG_PRINT(ERR_DBG, "%s: Neterion %s (rev %d)\n",dev->name,
Auke Kok44c10132007-06-08 15:46:36 -07008120 sp->product_name, pdev->revision);
Ananda Rajub41477f2006-07-24 19:52:49 -04008121 DBG_PRINT(ERR_DBG, "%s: Driver version %s\n", dev->name,
8122 s2io_driver_version);
Johannes Berge1749612008-10-27 15:59:26 -07008123 DBG_PRINT(ERR_DBG, "%s: MAC ADDR: %pM\n", dev->name, dev->dev_addr);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05008124 DBG_PRINT(ERR_DBG, "SERIAL NUMBER: %s\n", sp->serial_num);
Ananda Raju9dc737a2006-04-21 19:05:41 -04008125 if (sp->device_type & XFRAME_II_DEVICE) {
raghavendra.koushik@neterion.com0b1f7eb2005-08-03 12:39:56 -07008126 mode = s2io_print_pci_mode(sp);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008127 if (mode < 0) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04008128 DBG_PRINT(ERR_DBG, " Unsupported PCI bus mode\n");
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008129 ret = -EBADSLT;
Ananda Raju9dc737a2006-04-21 19:05:41 -04008130 unregister_netdev(dev);
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008131 goto set_swap_failed;
8132 }
raghavendra.koushik@neterion.com541ae682005-08-03 12:36:55 -07008133 }
Ananda Raju9dc737a2006-04-21 19:05:41 -04008134 switch(sp->rxd_mode) {
8135 case RXD_MODE_1:
8136 DBG_PRINT(ERR_DBG, "%s: 1-Buffer receive mode enabled\n",
8137 dev->name);
8138 break;
8139 case RXD_MODE_3B:
8140 DBG_PRINT(ERR_DBG, "%s: 2-Buffer receive mode enabled\n",
8141 dev->name);
8142 break;
Ananda Raju9dc737a2006-04-21 19:05:41 -04008143 }
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008144
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008145 switch (sp->config.napi) {
8146 case 0:
8147 DBG_PRINT(ERR_DBG, "%s: NAPI disabled\n", dev->name);
8148 break;
8149 case 1:
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008150 DBG_PRINT(ERR_DBG, "%s: NAPI enabled\n", dev->name);
Sreenivasa Honnurf61e0a32008-05-12 13:42:17 -04008151 break;
8152 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008153
8154 DBG_PRINT(ERR_DBG, "%s: Using %d Tx fifo(s)\n", dev->name,
8155 sp->config.tx_fifo_num);
8156
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008157 DBG_PRINT(ERR_DBG, "%s: Using %d Rx ring(s)\n", dev->name,
8158 sp->config.rx_ring_num);
8159
Sivakumar Subramanieaae7f72007-09-15 14:14:22 -07008160 switch(sp->config.intr_type) {
Ananda Raju9dc737a2006-04-21 19:05:41 -04008161 case INTA:
8162 DBG_PRINT(ERR_DBG, "%s: Interrupt type INTA\n", dev->name);
8163 break;
Ananda Raju9dc737a2006-04-21 19:05:41 -04008164 case MSI_X:
8165 DBG_PRINT(ERR_DBG, "%s: Interrupt type MSI-X\n", dev->name);
8166 break;
8167 }
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008168 if (sp->config.multiq) {
Ilpo Järvinena505f4f2008-08-19 10:36:01 +03008169 for (i = 0; i < sp->config.tx_fifo_num; i++)
8170 mac_control->fifos[i].multiq = config->multiq;
Sreenivasa Honnur3a3d5752008-02-20 16:44:07 -05008171 DBG_PRINT(ERR_DBG, "%s: Multiqueue support enabled\n",
8172 dev->name);
8173 } else
8174 DBG_PRINT(ERR_DBG, "%s: Multiqueue support disabled\n",
8175 dev->name);
8176
Sreenivasa Honnur6cfc4822008-02-20 17:07:51 -05008177 switch (sp->config.tx_steering_type) {
8178 case NO_STEERING:
8179 DBG_PRINT(ERR_DBG, "%s: No steering enabled for"
8180 " transmit\n", dev->name);
8181 break;
8182 case TX_PRIORITY_STEERING:
8183 DBG_PRINT(ERR_DBG, "%s: Priority steering enabled for"
8184 " transmit\n", dev->name);
8185 break;
8186 case TX_DEFAULT_STEERING:
8187 DBG_PRINT(ERR_DBG, "%s: Default steering enabled for"
8188 " transmit\n", dev->name);
8189 }
8190
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008191 if (sp->lro)
8192 DBG_PRINT(ERR_DBG, "%s: Large receive offload enabled\n",
Ananda Raju9dc737a2006-04-21 19:05:41 -04008193 dev->name);
Sivakumar Subramanidb874e62007-01-31 13:28:08 -05008194 if (ufo)
8195 DBG_PRINT(ERR_DBG, "%s: UDP Fragmentation Offload(UFO)"
8196 " enabled\n", dev->name);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07008197 /* Initialize device name */
Ananda Raju9dc737a2006-04-21 19:05:41 -04008198 sprintf(sp->name, "%s Neterion %s", dev->name, sp->product_name);
raghavendra.koushik@neterion.com7ba013a2005-08-03 12:29:20 -07008199
Breno Leitaocd0fce02008-09-04 17:52:54 -03008200 if (vlan_tag_strip)
8201 sp->vlan_strip_flag = 1;
8202 else
8203 sp->vlan_strip_flag = 0;
8204
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008205 /*
8206 * Make Link state as off at this point, when the Link change
8207 * interrupt comes the state will be automatically changed to
Linus Torvalds1da177e2005-04-16 15:20:36 -07008208 * the right state.
8209 */
8210 netif_carrier_off(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008211
8212 return 0;
8213
8214 register_failed:
8215 set_swap_failed:
8216 iounmap(sp->bar1);
8217 bar1_remap_failed:
8218 iounmap(sp->bar0);
8219 bar0_remap_failed:
8220 mem_alloc_failed:
8221 free_shared_mem(sp);
8222 pci_disable_device(pdev);
Veena Parateccb8622007-07-23 02:23:54 -04008223 pci_release_regions(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008224 pci_set_drvdata(pdev, NULL);
8225 free_netdev(dev);
8226
8227 return ret;
8228}
8229
8230/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008231 * s2io_rem_nic - Free the PCI device
Linus Torvalds1da177e2005-04-16 15:20:36 -07008232 * @pdev: structure containing the PCI related information of the device.
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008233 * Description: This function is called by the Pci subsystem to release a
Linus Torvalds1da177e2005-04-16 15:20:36 -07008234 * PCI device and free up all resource held up by the device. This could
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008235 * be in response to a Hot plug event or when the driver is to be removed
Linus Torvalds1da177e2005-04-16 15:20:36 -07008236 * from memory.
8237 */
8238
8239static void __devexit s2io_rem_nic(struct pci_dev *pdev)
8240{
8241 struct net_device *dev =
8242 (struct net_device *) pci_get_drvdata(pdev);
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008243 struct s2io_nic *sp;
Linus Torvalds1da177e2005-04-16 15:20:36 -07008244
8245 if (dev == NULL) {
8246 DBG_PRINT(ERR_DBG, "Driver Data is NULL!!\n");
8247 return;
8248 }
8249
Francois Romieu22747d62007-02-15 23:37:50 +01008250 flush_scheduled_work();
8251
Wang Chen4cf16532008-11-12 23:38:14 -08008252 sp = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008253 unregister_netdev(dev);
8254
8255 free_shared_mem(sp);
8256 iounmap(sp->bar0);
8257 iounmap(sp->bar1);
Veena Parateccb8622007-07-23 02:23:54 -04008258 pci_release_regions(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008259 pci_set_drvdata(pdev, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008260 free_netdev(dev);
Sivakumar Subramani19a60522007-01-31 13:30:49 -05008261 pci_disable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008262}
8263
8264/**
8265 * s2io_starter - Entry point for the driver
8266 * Description: This function is the entry point for the driver. It verifies
8267 * the module loadable parameters and initializes PCI configuration space.
8268 */
8269
Stephen Hemminger43b7c452007-10-05 12:39:21 -07008270static int __init s2io_starter(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07008271{
Jeff Garzik29917622006-08-19 17:48:59 -04008272 return pci_register_driver(&s2io_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07008273}
8274
8275/**
raghavendra.koushik@neterion.com20346722005-08-03 12:24:33 -07008276 * s2io_closer - Cleanup routine for the driver
Linus Torvalds1da177e2005-04-16 15:20:36 -07008277 * Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
8278 */
8279
Sivakumar Subramani372cc592007-01-31 13:32:57 -05008280static __exit void s2io_closer(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -07008281{
8282 pci_unregister_driver(&s2io_driver);
8283 DBG_PRINT(INIT_DBG, "cleanup done\n");
8284}
8285
8286module_init(s2io_starter);
8287module_exit(s2io_closer);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008288
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008289static int check_L2_lro_capable(u8 *buffer, struct iphdr **ip,
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008290 struct tcphdr **tcp, struct RxD_t *rxdp,
8291 struct s2io_nic *sp)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008292{
8293 int ip_off;
8294 u8 l2_type = (u8)((rxdp->Control_1 >> 37) & 0x7), ip_len;
8295
8296 if (!(rxdp->Control_1 & RXD_FRAME_PROTO_TCP)) {
8297 DBG_PRINT(INIT_DBG,"%s: Non-TCP frames not supported for LRO\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008298 __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008299 return -1;
8300 }
8301
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008302 /* Checking for DIX type or DIX type with VLAN */
8303 if ((l2_type == 0)
8304 || (l2_type == 4)) {
8305 ip_off = HEADER_ETHERNET_II_802_3_SIZE;
8306 /*
8307 * If vlan stripping is disabled and the frame is VLAN tagged,
8308 * shift the offset by the VLAN header size bytes.
8309 */
Breno Leitaocd0fce02008-09-04 17:52:54 -03008310 if ((!sp->vlan_strip_flag) &&
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008311 (rxdp->Control_1 & RXD_FRAME_VLAN_TAG))
8312 ip_off += HEADER_VLAN_SIZE;
8313 } else {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008314 /* LLC, SNAP etc are considered non-mergeable */
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008315 return -1;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008316 }
8317
8318 *ip = (struct iphdr *)((u8 *)buffer + ip_off);
8319 ip_len = (u8)((*ip)->ihl);
8320 ip_len <<= 2;
8321 *tcp = (struct tcphdr *)((unsigned long)*ip + ip_len);
8322
8323 return 0;
8324}
8325
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008326static int check_for_socket_match(struct lro *lro, struct iphdr *ip,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008327 struct tcphdr *tcp)
8328{
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008329 DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008330 if ((lro->iph->saddr != ip->saddr) || (lro->iph->daddr != ip->daddr) ||
8331 (lro->tcph->source != tcp->source) || (lro->tcph->dest != tcp->dest))
8332 return -1;
8333 return 0;
8334}
8335
8336static inline int get_l4_pyld_length(struct iphdr *ip, struct tcphdr *tcp)
8337{
8338 return(ntohs(ip->tot_len) - (ip->ihl << 2) - (tcp->doff << 2));
8339}
8340
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008341static void initiate_new_session(struct lro *lro, u8 *l2h,
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008342 struct iphdr *ip, struct tcphdr *tcp, u32 tcp_pyld_len, u16 vlan_tag)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008343{
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008344 DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008345 lro->l2h = l2h;
8346 lro->iph = ip;
8347 lro->tcph = tcp;
8348 lro->tcp_next_seq = tcp_pyld_len + ntohl(tcp->seq);
Surjit Reangc8855952008-02-03 04:27:38 -08008349 lro->tcp_ack = tcp->ack_seq;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008350 lro->sg_num = 1;
8351 lro->total_len = ntohs(ip->tot_len);
8352 lro->frags_len = 0;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008353 lro->vlan_tag = vlan_tag;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008354 /*
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008355 * check if we saw TCP timestamp. Other consistency checks have
8356 * already been done.
8357 */
8358 if (tcp->doff == 8) {
Surjit Reangc8855952008-02-03 04:27:38 -08008359 __be32 *ptr;
8360 ptr = (__be32 *)(tcp+1);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008361 lro->saw_ts = 1;
Surjit Reangc8855952008-02-03 04:27:38 -08008362 lro->cur_tsval = ntohl(*(ptr+1));
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008363 lro->cur_tsecr = *(ptr+2);
8364 }
8365 lro->in_use = 1;
8366}
8367
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008368static void update_L3L4_header(struct s2io_nic *sp, struct lro *lro)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008369{
8370 struct iphdr *ip = lro->iph;
8371 struct tcphdr *tcp = lro->tcph;
Al Virobd4f3ae2007-02-09 16:40:15 +00008372 __sum16 nchk;
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008373 struct stat_block *statinfo = sp->mac_control.stats_info;
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008374 DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008375
8376 /* Update L3 header */
8377 ip->tot_len = htons(lro->total_len);
8378 ip->check = 0;
8379 nchk = ip_fast_csum((u8 *)lro->iph, ip->ihl);
8380 ip->check = nchk;
8381
8382 /* Update L4 header */
8383 tcp->ack_seq = lro->tcp_ack;
8384 tcp->window = lro->window;
8385
8386 /* Update tsecr field if this session has timestamps enabled */
8387 if (lro->saw_ts) {
Surjit Reangc8855952008-02-03 04:27:38 -08008388 __be32 *ptr = (__be32 *)(tcp + 1);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008389 *(ptr+2) = lro->cur_tsecr;
8390 }
8391
8392 /* Update counters required for calculation of
8393 * average no. of packets aggregated.
8394 */
8395 statinfo->sw_stat.sum_avg_pkts_aggregated += lro->sg_num;
8396 statinfo->sw_stat.num_aggregations++;
8397}
8398
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008399static void aggregate_new_rx(struct lro *lro, struct iphdr *ip,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008400 struct tcphdr *tcp, u32 l4_pyld)
8401{
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008402 DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008403 lro->total_len += l4_pyld;
8404 lro->frags_len += l4_pyld;
8405 lro->tcp_next_seq += l4_pyld;
8406 lro->sg_num++;
8407
8408 /* Update ack seq no. and window ad(from this pkt) in LRO object */
8409 lro->tcp_ack = tcp->ack_seq;
8410 lro->window = tcp->window;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008411
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008412 if (lro->saw_ts) {
Surjit Reangc8855952008-02-03 04:27:38 -08008413 __be32 *ptr;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008414 /* Update tsecr and tsval from this packet */
Surjit Reangc8855952008-02-03 04:27:38 -08008415 ptr = (__be32 *)(tcp+1);
8416 lro->cur_tsval = ntohl(*(ptr+1));
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008417 lro->cur_tsecr = *(ptr + 2);
8418 }
8419}
8420
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008421static int verify_l3_l4_lro_capable(struct lro *l_lro, struct iphdr *ip,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008422 struct tcphdr *tcp, u32 tcp_pyld_len)
8423{
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008424 u8 *ptr;
8425
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008426 DBG_PRINT(INFO_DBG,"%s: Been here...\n", __func__);
Andrew Morton79dc1902006-02-03 01:45:13 -08008427
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008428 if (!tcp_pyld_len) {
8429 /* Runt frame or a pure ack */
8430 return -1;
8431 }
8432
8433 if (ip->ihl != 5) /* IP has options */
8434 return -1;
8435
Ananda Raju75c30b12006-07-24 19:55:09 -04008436 /* If we see CE codepoint in IP header, packet is not mergeable */
8437 if (INET_ECN_is_ce(ipv4_get_dsfield(ip)))
8438 return -1;
8439
8440 /* If we see ECE or CWR flags in TCP header, packet is not mergeable */
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008441 if (tcp->urg || tcp->psh || tcp->rst || tcp->syn || tcp->fin ||
Ananda Raju75c30b12006-07-24 19:55:09 -04008442 tcp->ece || tcp->cwr || !tcp->ack) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008443 /*
8444 * Currently recognize only the ack control word and
8445 * any other control field being set would result in
8446 * flushing the LRO session
8447 */
8448 return -1;
8449 }
8450
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008451 /*
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008452 * Allow only one TCP timestamp option. Don't aggregate if
8453 * any other options are detected.
8454 */
8455 if (tcp->doff != 5 && tcp->doff != 8)
8456 return -1;
8457
8458 if (tcp->doff == 8) {
Jeff Garzik6aa20a22006-09-13 13:24:59 -04008459 ptr = (u8 *)(tcp + 1);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008460 while (*ptr == TCPOPT_NOP)
8461 ptr++;
8462 if (*ptr != TCPOPT_TIMESTAMP || *(ptr+1) != TCPOLEN_TIMESTAMP)
8463 return -1;
8464
8465 /* Ensure timestamp value increases monotonically */
8466 if (l_lro)
Surjit Reangc8855952008-02-03 04:27:38 -08008467 if (l_lro->cur_tsval > ntohl(*((__be32 *)(ptr+2))))
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008468 return -1;
8469
8470 /* timestamp echo reply should be non-zero */
Surjit Reangc8855952008-02-03 04:27:38 -08008471 if (*((__be32 *)(ptr+6)) == 0)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008472 return -1;
8473 }
8474
8475 return 0;
8476}
8477
8478static int
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008479s2io_club_tcp_session(struct ring_info *ring_data, u8 *buffer, u8 **tcp,
8480 u32 *tcp_len, struct lro **lro, struct RxD_t *rxdp,
8481 struct s2io_nic *sp)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008482{
8483 struct iphdr *ip;
8484 struct tcphdr *tcph;
8485 int ret = 0, i;
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008486 u16 vlan_tag = 0;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008487
8488 if (!(ret = check_L2_lro_capable(buffer, &ip, (struct tcphdr **)tcp,
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008489 rxdp, sp))) {
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008490 DBG_PRINT(INFO_DBG,"IP Saddr: %x Daddr: %x\n",
8491 ip->saddr, ip->daddr);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008492 } else
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008493 return ret;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008494
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008495 vlan_tag = RXD_GET_VLAN_TAG(rxdp->Control_2);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008496 tcph = (struct tcphdr *)*tcp;
8497 *tcp_len = get_l4_pyld_length(ip, tcph);
8498 for (i=0; i<MAX_LRO_SESSIONS; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008499 struct lro *l_lro = &ring_data->lro0_n[i];
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008500 if (l_lro->in_use) {
8501 if (check_for_socket_match(l_lro, ip, tcph))
8502 continue;
8503 /* Sock pair matched */
8504 *lro = l_lro;
8505
8506 if ((*lro)->tcp_next_seq != ntohl(tcph->seq)) {
8507 DBG_PRINT(INFO_DBG, "%s:Out of order. expected "
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008508 "0x%x, actual 0x%x\n", __func__,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008509 (*lro)->tcp_next_seq,
8510 ntohl(tcph->seq));
8511
8512 sp->mac_control.stats_info->
8513 sw_stat.outof_sequence_pkts++;
8514 ret = 2;
8515 break;
8516 }
8517
8518 if (!verify_l3_l4_lro_capable(l_lro, ip, tcph,*tcp_len))
8519 ret = 1; /* Aggregate */
8520 else
8521 ret = 2; /* Flush both */
8522 break;
8523 }
8524 }
8525
8526 if (ret == 0) {
8527 /* Before searching for available LRO objects,
8528 * check if the pkt is L3/L4 aggregatable. If not
8529 * don't create new LRO session. Just send this
8530 * packet up.
8531 */
8532 if (verify_l3_l4_lro_capable(NULL, ip, tcph, *tcp_len)) {
8533 return 5;
8534 }
8535
8536 for (i=0; i<MAX_LRO_SESSIONS; i++) {
Sreenivasa Honnur0425b462008-04-28 21:08:45 -04008537 struct lro *l_lro = &ring_data->lro0_n[i];
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008538 if (!(l_lro->in_use)) {
8539 *lro = l_lro;
8540 ret = 3; /* Begin anew */
8541 break;
8542 }
8543 }
8544 }
8545
8546 if (ret == 0) { /* sessions exceeded */
8547 DBG_PRINT(INFO_DBG,"%s:All LRO sessions already in use\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008548 __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008549 *lro = NULL;
8550 return ret;
8551 }
8552
8553 switch (ret) {
8554 case 3:
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008555 initiate_new_session(*lro, buffer, ip, tcph, *tcp_len,
8556 vlan_tag);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008557 break;
8558 case 2:
8559 update_L3L4_header(sp, *lro);
8560 break;
8561 case 1:
8562 aggregate_new_rx(*lro, ip, tcph, *tcp_len);
8563 if ((*lro)->sg_num == sp->lro_max_aggr_per_sess) {
8564 update_L3L4_header(sp, *lro);
8565 ret = 4; /* Flush the LRO */
8566 }
8567 break;
8568 default:
8569 DBG_PRINT(ERR_DBG,"%s:Dont know, can't say!!\n",
Harvey Harrisonb39d66a2008-08-20 16:52:04 -07008570 __func__);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008571 break;
8572 }
8573
8574 return ret;
8575}
8576
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008577static void clear_lro_session(struct lro *lro)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008578{
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008579 static u16 lro_struct_size = sizeof(struct lro);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008580
8581 memset(lro, 0, lro_struct_size);
8582}
8583
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008584static void queue_rx_frame(struct sk_buff *skb, u16 vlan_tag)
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008585{
8586 struct net_device *dev = skb->dev;
Wang Chen4cf16532008-11-12 23:38:14 -08008587 struct s2io_nic *sp = netdev_priv(dev);
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008588
8589 skb->protocol = eth_type_trans(skb, dev);
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008590 if (sp->vlgrp && vlan_tag
Breno Leitaocd0fce02008-09-04 17:52:54 -03008591 && (sp->vlan_strip_flag)) {
Sreenivasa Honnurcdb5bf02008-02-20 17:09:15 -05008592 /* Queueing the vlan frame to the upper layer */
8593 if (sp->config.napi)
8594 vlan_hwaccel_receive_skb(skb, sp->vlgrp, vlan_tag);
8595 else
8596 vlan_hwaccel_rx(skb, sp->vlgrp, vlan_tag);
8597 } else {
8598 if (sp->config.napi)
8599 netif_receive_skb(skb);
8600 else
8601 netif_rx(skb);
8602 }
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008603}
8604
Ralf Baechle1ee6dd72007-01-31 14:09:29 -05008605static void lro_append_pkt(struct s2io_nic *sp, struct lro *lro,
8606 struct sk_buff *skb,
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008607 u32 tcp_len)
8608{
Ananda Raju75c30b12006-07-24 19:55:09 -04008609 struct sk_buff *first = lro->parent;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008610
8611 first->len += tcp_len;
8612 first->data_len = lro->frags_len;
8613 skb_pull(skb, (skb->len - tcp_len));
Ananda Raju75c30b12006-07-24 19:55:09 -04008614 if (skb_shinfo(first)->frag_list)
8615 lro->last_frag->next = skb;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008616 else
8617 skb_shinfo(first)->frag_list = skb;
Sivakumar Subramani372cc592007-01-31 13:32:57 -05008618 first->truesize += skb->truesize;
Ananda Raju75c30b12006-07-24 19:55:09 -04008619 lro->last_frag = skb;
Ravinandan Arakali7d3d04392006-01-25 14:53:07 -05008620 sp->mac_control.stats_info->sw_stat.clubbed_frms_cnt++;
8621 return;
8622}
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008623
8624/**
8625 * s2io_io_error_detected - called when PCI error is detected
8626 * @pdev: Pointer to PCI device
Rolf Eike Beer8453d432007-07-10 11:58:02 +02008627 * @state: The current pci connection state
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008628 *
8629 * This function is called after a PCI bus error affecting
8630 * this device has been detected.
8631 */
8632static pci_ers_result_t s2io_io_error_detected(struct pci_dev *pdev,
8633 pci_channel_state_t state)
8634{
8635 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08008636 struct s2io_nic *sp = netdev_priv(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008637
8638 netif_device_detach(netdev);
8639
8640 if (netif_running(netdev)) {
8641 /* Bring down the card, while avoiding PCI I/O */
8642 do_s2io_card_down(sp, 0);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008643 }
8644 pci_disable_device(pdev);
8645
8646 return PCI_ERS_RESULT_NEED_RESET;
8647}
8648
8649/**
8650 * s2io_io_slot_reset - called after the pci bus has been reset.
8651 * @pdev: Pointer to PCI device
8652 *
8653 * Restart the card from scratch, as if from a cold-boot.
8654 * At this point, the card has exprienced a hard reset,
8655 * followed by fixups by BIOS, and has its config space
8656 * set up identically to what it was at cold boot.
8657 */
8658static pci_ers_result_t s2io_io_slot_reset(struct pci_dev *pdev)
8659{
8660 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08008661 struct s2io_nic *sp = netdev_priv(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008662
8663 if (pci_enable_device(pdev)) {
8664 printk(KERN_ERR "s2io: "
8665 "Cannot re-enable PCI device after reset.\n");
8666 return PCI_ERS_RESULT_DISCONNECT;
8667 }
8668
8669 pci_set_master(pdev);
8670 s2io_reset(sp);
8671
8672 return PCI_ERS_RESULT_RECOVERED;
8673}
8674
8675/**
8676 * s2io_io_resume - called when traffic can start flowing again.
8677 * @pdev: Pointer to PCI device
8678 *
8679 * This callback is called when the error recovery driver tells
8680 * us that its OK to resume normal operation.
8681 */
8682static void s2io_io_resume(struct pci_dev *pdev)
8683{
8684 struct net_device *netdev = pci_get_drvdata(pdev);
Wang Chen4cf16532008-11-12 23:38:14 -08008685 struct s2io_nic *sp = netdev_priv(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008686
8687 if (netif_running(netdev)) {
8688 if (s2io_card_up(sp)) {
8689 printk(KERN_ERR "s2io: "
8690 "Can't bring device back up after reset.\n");
8691 return;
8692 }
8693
8694 if (s2io_set_mac_addr(netdev, netdev->dev_addr) == FAILURE) {
8695 s2io_card_down(sp);
8696 printk(KERN_ERR "s2io: "
8697 "Can't resetore mac addr after reset.\n");
8698 return;
8699 }
8700 }
8701
8702 netif_device_attach(netdev);
David S. Millerfd2ea0a2008-07-17 01:56:23 -07008703 netif_tx_wake_all_queues(netdev);
Linas Vepstasd796fdb2007-05-14 18:37:30 -05008704}