| Lars-Peter Clausen | 9869848 | 2010-07-17 11:08:43 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> |
| 3 | * JZ4740 IRQ definitions |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License as published by the |
| 7 | * Free Software Foundation; either version 2 of the License, or (at your |
| 8 | * option) any later version. |
| 9 | * |
| 10 | * You should have received a copy of the GNU General Public License along |
| 11 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 12 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #ifndef __ASM_MACH_JZ4740_IRQ_H__ |
| 17 | #define __ASM_MACH_JZ4740_IRQ_H__ |
| 18 | |
| 19 | #define MIPS_CPU_IRQ_BASE 0 |
| 20 | #define JZ4740_IRQ_BASE 8 |
| 21 | |
| 22 | /* 1st-level interrupts */ |
| 23 | #define JZ4740_IRQ(x) (JZ4740_IRQ_BASE + (x)) |
| 24 | #define JZ4740_IRQ_I2C JZ4740_IRQ(1) |
| 25 | #define JZ4740_IRQ_UHC JZ4740_IRQ(3) |
| 26 | #define JZ4740_IRQ_UART1 JZ4740_IRQ(8) |
| 27 | #define JZ4740_IRQ_UART0 JZ4740_IRQ(9) |
| 28 | #define JZ4740_IRQ_SADC JZ4740_IRQ(12) |
| 29 | #define JZ4740_IRQ_MSC JZ4740_IRQ(14) |
| 30 | #define JZ4740_IRQ_RTC JZ4740_IRQ(15) |
| 31 | #define JZ4740_IRQ_SSI JZ4740_IRQ(16) |
| 32 | #define JZ4740_IRQ_CIM JZ4740_IRQ(17) |
| 33 | #define JZ4740_IRQ_AIC JZ4740_IRQ(18) |
| 34 | #define JZ4740_IRQ_ETH JZ4740_IRQ(19) |
| 35 | #define JZ4740_IRQ_DMAC JZ4740_IRQ(20) |
| 36 | #define JZ4740_IRQ_TCU2 JZ4740_IRQ(21) |
| 37 | #define JZ4740_IRQ_TCU1 JZ4740_IRQ(22) |
| 38 | #define JZ4740_IRQ_TCU0 JZ4740_IRQ(23) |
| 39 | #define JZ4740_IRQ_UDC JZ4740_IRQ(24) |
| 40 | #define JZ4740_IRQ_GPIO3 JZ4740_IRQ(25) |
| 41 | #define JZ4740_IRQ_GPIO2 JZ4740_IRQ(26) |
| 42 | #define JZ4740_IRQ_GPIO1 JZ4740_IRQ(27) |
| 43 | #define JZ4740_IRQ_GPIO0 JZ4740_IRQ(28) |
| 44 | #define JZ4740_IRQ_IPU JZ4740_IRQ(29) |
| 45 | #define JZ4740_IRQ_LCD JZ4740_IRQ(30) |
| 46 | |
| 47 | /* 2nd-level interrupts */ |
| 48 | #define JZ4740_IRQ_DMA(x) (JZ4740_IRQ(32) + (X)) |
| 49 | |
| 50 | #define JZ4740_IRQ_INTC_GPIO(x) (JZ4740_IRQ_GPIO0 - (x)) |
| 51 | #define JZ4740_IRQ_GPIO(x) (JZ4740_IRQ(48) + (x)) |
| 52 | |
| 53 | #define JZ4740_IRQ_ADC_BASE JZ4740_IRQ(176) |
| 54 | |
| 55 | #define NR_IRQS (JZ4740_IRQ_ADC_BASE + 6) |
| 56 | |
| 57 | #endif |