Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2006 ARM Ltd. |
| 3 | * Copyright (c) 2010 ST-Ericsson SA |
| 4 | * |
| 5 | * Author: Peter Pearse <peter.pearse@arm.com> |
| 6 | * Author: Linus Walleij <linus.walleij@stericsson.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify it |
| 9 | * under the terms of the GNU General Public License as published by the Free |
| 10 | * Software Foundation; either version 2 of the License, or (at your option) |
| 11 | * any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, but WITHOUT |
| 14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 16 | * more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License along with |
| 19 | * this program; if not, write to the Free Software Foundation, Inc., 59 |
| 20 | * Temple Place - Suite 330, Boston, MA 02111-1307, USA. |
| 21 | * |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 22 | * The full GNU General Public License is in this distribution in the file |
| 23 | * called COPYING. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 24 | * |
| 25 | * Documentation: ARM DDI 0196G == PL080 |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 26 | * Documentation: ARM DDI 0218E == PL081 |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 27 | * |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 28 | * PL080 & PL081 both have 16 sets of DMA signals that can be routed to any |
| 29 | * channel. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 30 | * |
| 31 | * The PL080 has 8 channels available for simultaneous use, and the PL081 |
| 32 | * has only two channels. So on these DMA controllers the number of channels |
| 33 | * and the number of incoming DMA signals are two totally different things. |
| 34 | * It is usually not possible to theoretically handle all physical signals, |
| 35 | * so a multiplexing scheme with possible denial of use is necessary. |
| 36 | * |
| 37 | * The PL080 has a dual bus master, PL081 has a single master. |
| 38 | * |
| 39 | * Memory to peripheral transfer may be visualized as |
| 40 | * Get data from memory to DMAC |
| 41 | * Until no data left |
| 42 | * On burst request from peripheral |
| 43 | * Destination burst from DMAC to peripheral |
| 44 | * Clear burst request |
| 45 | * Raise terminal count interrupt |
| 46 | * |
| 47 | * For peripherals with a FIFO: |
| 48 | * Source burst size == half the depth of the peripheral FIFO |
| 49 | * Destination burst size == the depth of the peripheral FIFO |
| 50 | * |
| 51 | * (Bursts are irrelevant for mem to mem transfers - there are no burst |
| 52 | * signals, the DMA controller will simply facilitate its AHB master.) |
| 53 | * |
| 54 | * ASSUMES default (little) endianness for DMA transfers |
| 55 | * |
Russell King - ARM Linux | 9dc2c20 | 2011-01-03 22:33:06 +0000 | [diff] [blame] | 56 | * The PL08x has two flow control settings: |
| 57 | * - DMAC flow control: the transfer size defines the number of transfers |
| 58 | * which occur for the current LLI entry, and the DMAC raises TC at the |
| 59 | * end of every LLI entry. Observed behaviour shows the DMAC listening |
| 60 | * to both the BREQ and SREQ signals (contrary to documented), |
| 61 | * transferring data if either is active. The LBREQ and LSREQ signals |
| 62 | * are ignored. |
| 63 | * |
| 64 | * - Peripheral flow control: the transfer size is ignored (and should be |
| 65 | * zero). The data is transferred from the current LLI entry, until |
| 66 | * after the final transfer signalled by LBREQ or LSREQ. The DMAC |
| 67 | * will then move to the next LLI entry. |
| 68 | * |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 69 | * Global TODO: |
| 70 | * - Break out common code from arch/arm/mach-s3c64xx and share |
| 71 | */ |
Russell King - ARM Linux | 730404a | 2011-01-03 22:34:07 +0000 | [diff] [blame] | 72 | #include <linux/amba/bus.h> |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 73 | #include <linux/amba/pl08x.h> |
| 74 | #include <linux/debugfs.h> |
Viresh Kumar | 0c38d70 | 2011-08-05 15:32:28 +0530 | [diff] [blame] | 75 | #include <linux/delay.h> |
| 76 | #include <linux/device.h> |
| 77 | #include <linux/dmaengine.h> |
| 78 | #include <linux/dmapool.h> |
Vinod Koul | 8516f52 | 2011-09-02 16:43:44 +0530 | [diff] [blame] | 79 | #include <linux/dma-mapping.h> |
Viresh Kumar | 0c38d70 | 2011-08-05 15:32:28 +0530 | [diff] [blame] | 80 | #include <linux/init.h> |
| 81 | #include <linux/interrupt.h> |
| 82 | #include <linux/module.h> |
Viresh Kumar | b7b6018 | 2011-08-05 15:32:33 +0530 | [diff] [blame] | 83 | #include <linux/pm_runtime.h> |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 84 | #include <linux/seq_file.h> |
Viresh Kumar | 0c38d70 | 2011-08-05 15:32:28 +0530 | [diff] [blame] | 85 | #include <linux/slab.h> |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 86 | #include <asm/hardware/pl080.h> |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 87 | |
Russell King - ARM Linux | d2ebfb3 | 2012-03-06 22:34:26 +0000 | [diff] [blame] | 88 | #include "dmaengine.h" |
| 89 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 90 | #define DRIVER_NAME "pl08xdmac" |
| 91 | |
Russell King - ARM Linux | 7703eac | 2011-08-31 09:34:35 +0100 | [diff] [blame] | 92 | static struct amba_driver pl08x_amba_driver; |
| 93 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 94 | /** |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 95 | * struct vendor_data - vendor-specific config parameters for PL08x derivatives |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 96 | * @channels: the number of channels available in this variant |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 97 | * @dualmaster: whether this version supports dual AHB masters or not. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 98 | */ |
| 99 | struct vendor_data { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 100 | u8 channels; |
| 101 | bool dualmaster; |
| 102 | }; |
| 103 | |
| 104 | /* |
| 105 | * PL08X private data structures |
Russell King - ARM Linux | e8b5e11 | 2011-01-03 22:30:24 +0000 | [diff] [blame] | 106 | * An LLI struct - see PL08x TRM. Note that next uses bit[0] as a bus bit, |
Russell King - ARM Linux | e25761d | 2011-01-03 22:37:52 +0000 | [diff] [blame] | 107 | * start & end do not - their bus bit info is in cctl. Also note that these |
| 108 | * are fixed 32-bit quantities. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 109 | */ |
Russell King - ARM Linux | 7cb72ad | 2011-01-03 22:35:28 +0000 | [diff] [blame] | 110 | struct pl08x_lli { |
Russell King - ARM Linux | e25761d | 2011-01-03 22:37:52 +0000 | [diff] [blame] | 111 | u32 src; |
| 112 | u32 dst; |
Russell King - ARM Linux | bfddfb4 | 2011-01-03 22:38:12 +0000 | [diff] [blame] | 113 | u32 lli; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 114 | u32 cctl; |
| 115 | }; |
| 116 | |
| 117 | /** |
| 118 | * struct pl08x_driver_data - the local state holder for the PL08x |
| 119 | * @slave: slave engine for this instance |
| 120 | * @memcpy: memcpy engine for this instance |
| 121 | * @base: virtual memory base (remapped) for the PL08x |
| 122 | * @adev: the corresponding AMBA (PrimeCell) bus entry |
| 123 | * @vd: vendor data for this PL08x variant |
| 124 | * @pd: platform data passed in from the platform/machine |
| 125 | * @phy_chans: array of data for the physical channels |
| 126 | * @pool: a pool for the LLI descriptors |
| 127 | * @pool_ctr: counter of LLIs in the pool |
Viresh Kumar | 3e27ee8 | 2011-08-05 15:32:27 +0530 | [diff] [blame] | 128 | * @lli_buses: bitmask to or in to LLI pointer selecting AHB port for LLI |
| 129 | * fetches |
Russell King - ARM Linux | 30749cb | 2011-01-03 22:41:13 +0000 | [diff] [blame] | 130 | * @mem_buses: set to indicate memory transfers on AHB2. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 131 | * @lock: a spinlock for this struct |
| 132 | */ |
| 133 | struct pl08x_driver_data { |
| 134 | struct dma_device slave; |
| 135 | struct dma_device memcpy; |
| 136 | void __iomem *base; |
| 137 | struct amba_device *adev; |
Russell King - ARM Linux | f96ca9ec | 2011-01-03 22:35:08 +0000 | [diff] [blame] | 138 | const struct vendor_data *vd; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 139 | struct pl08x_platform_data *pd; |
| 140 | struct pl08x_phy_chan *phy_chans; |
| 141 | struct dma_pool *pool; |
| 142 | int pool_ctr; |
Russell King - ARM Linux | 30749cb | 2011-01-03 22:41:13 +0000 | [diff] [blame] | 143 | u8 lli_buses; |
| 144 | u8 mem_buses; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 145 | spinlock_t lock; |
| 146 | }; |
| 147 | |
| 148 | /* |
| 149 | * PL08X specific defines |
| 150 | */ |
| 151 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 152 | /* Size (bytes) of each LLI buffer allocated for one transfer */ |
| 153 | # define PL08X_LLI_TSFR_SIZE 0x2000 |
| 154 | |
Russell King - ARM Linux | e8b5e11 | 2011-01-03 22:30:24 +0000 | [diff] [blame] | 155 | /* Maximum times we call dma_pool_alloc on this pool without freeing */ |
Russell King - ARM Linux | 7cb72ad | 2011-01-03 22:35:28 +0000 | [diff] [blame] | 156 | #define MAX_NUM_TSFR_LLIS (PL08X_LLI_TSFR_SIZE/sizeof(struct pl08x_lli)) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 157 | #define PL08X_ALIGN 8 |
| 158 | |
| 159 | static inline struct pl08x_dma_chan *to_pl08x_chan(struct dma_chan *chan) |
| 160 | { |
| 161 | return container_of(chan, struct pl08x_dma_chan, chan); |
| 162 | } |
| 163 | |
Russell King - ARM Linux | 501e67e | 2011-01-03 22:44:57 +0000 | [diff] [blame] | 164 | static inline struct pl08x_txd *to_pl08x_txd(struct dma_async_tx_descriptor *tx) |
| 165 | { |
| 166 | return container_of(tx, struct pl08x_txd, tx); |
| 167 | } |
| 168 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 169 | /* |
| 170 | * Physical channel handling |
| 171 | */ |
| 172 | |
| 173 | /* Whether a certain channel is busy or not */ |
| 174 | static int pl08x_phy_channel_busy(struct pl08x_phy_chan *ch) |
| 175 | { |
| 176 | unsigned int val; |
| 177 | |
| 178 | val = readl(ch->base + PL080_CH_CONFIG); |
| 179 | return val & PL080_CONFIG_ACTIVE; |
| 180 | } |
| 181 | |
| 182 | /* |
| 183 | * Set the initial DMA register values i.e. those for the first LLI |
Russell King - ARM Linux | e8b5e11 | 2011-01-03 22:30:24 +0000 | [diff] [blame] | 184 | * The next LLI pointer and the configuration interrupt bit have |
Russell King - ARM Linux | c885bee | 2011-01-03 22:38:52 +0000 | [diff] [blame] | 185 | * been set when the LLIs were constructed. Poke them into the hardware |
| 186 | * and start the transfer. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 187 | */ |
Russell King - ARM Linux | c885bee | 2011-01-03 22:38:52 +0000 | [diff] [blame] | 188 | static void pl08x_start_txd(struct pl08x_dma_chan *plchan, |
| 189 | struct pl08x_txd *txd) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 190 | { |
Russell King - ARM Linux | c885bee | 2011-01-03 22:38:52 +0000 | [diff] [blame] | 191 | struct pl08x_driver_data *pl08x = plchan->host; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 192 | struct pl08x_phy_chan *phychan = plchan->phychan; |
Russell King - ARM Linux | 19524d7 | 2011-01-03 22:39:13 +0000 | [diff] [blame] | 193 | struct pl08x_lli *lli = &txd->llis_va[0]; |
Russell King - ARM Linux | 09b3c32 | 2011-01-03 22:39:53 +0000 | [diff] [blame] | 194 | u32 val; |
Russell King - ARM Linux | c885bee | 2011-01-03 22:38:52 +0000 | [diff] [blame] | 195 | |
| 196 | plchan->at = txd; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 197 | |
Russell King - ARM Linux | c885bee | 2011-01-03 22:38:52 +0000 | [diff] [blame] | 198 | /* Wait for channel inactive */ |
| 199 | while (pl08x_phy_channel_busy(phychan)) |
Russell King - ARM Linux | 19386b32 | 2011-01-03 22:36:29 +0000 | [diff] [blame] | 200 | cpu_relax(); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 201 | |
Russell King - ARM Linux | c885bee | 2011-01-03 22:38:52 +0000 | [diff] [blame] | 202 | dev_vdbg(&pl08x->adev->dev, |
| 203 | "WRITE channel %d: csrc=0x%08x, cdst=0x%08x, " |
Russell King - ARM Linux | 19524d7 | 2011-01-03 22:39:13 +0000 | [diff] [blame] | 204 | "clli=0x%08x, cctl=0x%08x, ccfg=0x%08x\n", |
| 205 | phychan->id, lli->src, lli->dst, lli->lli, lli->cctl, |
Russell King - ARM Linux | 09b3c32 | 2011-01-03 22:39:53 +0000 | [diff] [blame] | 206 | txd->ccfg); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 207 | |
Russell King - ARM Linux | 19524d7 | 2011-01-03 22:39:13 +0000 | [diff] [blame] | 208 | writel(lli->src, phychan->base + PL080_CH_SRC_ADDR); |
| 209 | writel(lli->dst, phychan->base + PL080_CH_DST_ADDR); |
| 210 | writel(lli->lli, phychan->base + PL080_CH_LLI); |
| 211 | writel(lli->cctl, phychan->base + PL080_CH_CONTROL); |
Russell King - ARM Linux | 09b3c32 | 2011-01-03 22:39:53 +0000 | [diff] [blame] | 212 | writel(txd->ccfg, phychan->base + PL080_CH_CONFIG); |
Russell King - ARM Linux | c885bee | 2011-01-03 22:38:52 +0000 | [diff] [blame] | 213 | |
| 214 | /* Enable the DMA channel */ |
| 215 | /* Do not access config register until channel shows as disabled */ |
| 216 | while (readl(pl08x->base + PL080_EN_CHAN) & (1 << phychan->id)) |
| 217 | cpu_relax(); |
| 218 | |
| 219 | /* Do not access config register until channel shows as inactive */ |
| 220 | val = readl(phychan->base + PL080_CH_CONFIG); |
| 221 | while ((val & PL080_CONFIG_ACTIVE) || (val & PL080_CONFIG_ENABLE)) |
| 222 | val = readl(phychan->base + PL080_CH_CONFIG); |
| 223 | |
| 224 | writel(val | PL080_CONFIG_ENABLE, phychan->base + PL080_CH_CONFIG); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 225 | } |
| 226 | |
| 227 | /* |
Russell King - ARM Linux | 8179661 | 2011-01-27 12:37:44 +0000 | [diff] [blame] | 228 | * Pause the channel by setting the HALT bit. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 229 | * |
Russell King - ARM Linux | 8179661 | 2011-01-27 12:37:44 +0000 | [diff] [blame] | 230 | * For M->P transfers, pause the DMAC first and then stop the peripheral - |
| 231 | * the FIFO can only drain if the peripheral is still requesting data. |
| 232 | * (note: this can still timeout if the DMAC FIFO never drains of data.) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 233 | * |
Russell King - ARM Linux | 8179661 | 2011-01-27 12:37:44 +0000 | [diff] [blame] | 234 | * For P->M transfers, disable the peripheral first to stop it filling |
| 235 | * the DMAC FIFO, and then pause the DMAC. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 236 | */ |
| 237 | static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) |
| 238 | { |
| 239 | u32 val; |
Russell King - ARM Linux | 8179661 | 2011-01-27 12:37:44 +0000 | [diff] [blame] | 240 | int timeout; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 241 | |
| 242 | /* Set the HALT bit and wait for the FIFO to drain */ |
| 243 | val = readl(ch->base + PL080_CH_CONFIG); |
| 244 | val |= PL080_CONFIG_HALT; |
| 245 | writel(val, ch->base + PL080_CH_CONFIG); |
| 246 | |
| 247 | /* Wait for channel inactive */ |
Russell King - ARM Linux | 8179661 | 2011-01-27 12:37:44 +0000 | [diff] [blame] | 248 | for (timeout = 1000; timeout; timeout--) { |
| 249 | if (!pl08x_phy_channel_busy(ch)) |
| 250 | break; |
| 251 | udelay(1); |
| 252 | } |
| 253 | if (pl08x_phy_channel_busy(ch)) |
| 254 | pr_err("pl08x: channel%u timeout waiting for pause\n", ch->id); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 255 | } |
| 256 | |
| 257 | static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch) |
| 258 | { |
| 259 | u32 val; |
| 260 | |
| 261 | /* Clear the HALT bit */ |
| 262 | val = readl(ch->base + PL080_CH_CONFIG); |
| 263 | val &= ~PL080_CONFIG_HALT; |
| 264 | writel(val, ch->base + PL080_CH_CONFIG); |
| 265 | } |
| 266 | |
Russell King - ARM Linux | fb52621 | 2011-01-27 12:32:53 +0000 | [diff] [blame] | 267 | /* |
| 268 | * pl08x_terminate_phy_chan() stops the channel, clears the FIFO and |
| 269 | * clears any pending interrupt status. This should not be used for |
| 270 | * an on-going transfer, but as a method of shutting down a channel |
| 271 | * (eg, when it's no longer used) or terminating a transfer. |
| 272 | */ |
| 273 | static void pl08x_terminate_phy_chan(struct pl08x_driver_data *pl08x, |
| 274 | struct pl08x_phy_chan *ch) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 275 | { |
Russell King - ARM Linux | fb52621 | 2011-01-27 12:32:53 +0000 | [diff] [blame] | 276 | u32 val = readl(ch->base + PL080_CH_CONFIG); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 277 | |
Russell King - ARM Linux | fb52621 | 2011-01-27 12:32:53 +0000 | [diff] [blame] | 278 | val &= ~(PL080_CONFIG_ENABLE | PL080_CONFIG_ERR_IRQ_MASK | |
| 279 | PL080_CONFIG_TC_IRQ_MASK); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 280 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 281 | writel(val, ch->base + PL080_CH_CONFIG); |
Russell King - ARM Linux | fb52621 | 2011-01-27 12:32:53 +0000 | [diff] [blame] | 282 | |
| 283 | writel(1 << ch->id, pl08x->base + PL080_ERR_CLEAR); |
| 284 | writel(1 << ch->id, pl08x->base + PL080_TC_CLEAR); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 285 | } |
| 286 | |
| 287 | static inline u32 get_bytes_in_cctl(u32 cctl) |
| 288 | { |
| 289 | /* The source width defines the number of bytes */ |
| 290 | u32 bytes = cctl & PL080_CONTROL_TRANSFER_SIZE_MASK; |
| 291 | |
| 292 | switch (cctl >> PL080_CONTROL_SWIDTH_SHIFT) { |
| 293 | case PL080_WIDTH_8BIT: |
| 294 | break; |
| 295 | case PL080_WIDTH_16BIT: |
| 296 | bytes *= 2; |
| 297 | break; |
| 298 | case PL080_WIDTH_32BIT: |
| 299 | bytes *= 4; |
| 300 | break; |
| 301 | } |
| 302 | return bytes; |
| 303 | } |
| 304 | |
| 305 | /* The channel should be paused when calling this */ |
| 306 | static u32 pl08x_getbytes_chan(struct pl08x_dma_chan *plchan) |
| 307 | { |
| 308 | struct pl08x_phy_chan *ch; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 309 | struct pl08x_txd *txd; |
| 310 | unsigned long flags; |
Russell King - ARM Linux | cace658 | 2011-01-03 22:37:31 +0000 | [diff] [blame] | 311 | size_t bytes = 0; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 312 | |
| 313 | spin_lock_irqsave(&plchan->lock, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 314 | ch = plchan->phychan; |
| 315 | txd = plchan->at; |
| 316 | |
| 317 | /* |
Russell King - ARM Linux | db9f136 | 2011-01-03 22:38:32 +0000 | [diff] [blame] | 318 | * Follow the LLIs to get the number of remaining |
| 319 | * bytes in the currently active transaction. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 320 | */ |
| 321 | if (ch && txd) { |
Russell King - ARM Linux | 4c0df6a | 2011-01-03 22:36:50 +0000 | [diff] [blame] | 322 | u32 clli = readl(ch->base + PL080_CH_LLI) & ~PL080_LLI_LM_AHB2; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 323 | |
Russell King - ARM Linux | db9f136 | 2011-01-03 22:38:32 +0000 | [diff] [blame] | 324 | /* First get the remaining bytes in the active transfer */ |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 325 | bytes = get_bytes_in_cctl(readl(ch->base + PL080_CH_CONTROL)); |
| 326 | |
| 327 | if (clli) { |
Russell King - ARM Linux | db9f136 | 2011-01-03 22:38:32 +0000 | [diff] [blame] | 328 | struct pl08x_lli *llis_va = txd->llis_va; |
| 329 | dma_addr_t llis_bus = txd->llis_bus; |
| 330 | int index; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 331 | |
Russell King - ARM Linux | db9f136 | 2011-01-03 22:38:32 +0000 | [diff] [blame] | 332 | BUG_ON(clli < llis_bus || clli >= llis_bus + |
| 333 | sizeof(struct pl08x_lli) * MAX_NUM_TSFR_LLIS); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 334 | |
Russell King - ARM Linux | db9f136 | 2011-01-03 22:38:32 +0000 | [diff] [blame] | 335 | /* |
| 336 | * Locate the next LLI - as this is an array, |
| 337 | * it's simple maths to find. |
| 338 | */ |
| 339 | index = (clli - llis_bus) / sizeof(struct pl08x_lli); |
| 340 | |
| 341 | for (; index < MAX_NUM_TSFR_LLIS; index++) { |
| 342 | bytes += get_bytes_in_cctl(llis_va[index].cctl); |
| 343 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 344 | /* |
Russell King - ARM Linux | e8b5e11 | 2011-01-03 22:30:24 +0000 | [diff] [blame] | 345 | * A LLI pointer of 0 terminates the LLI list |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 346 | */ |
Russell King - ARM Linux | db9f136 | 2011-01-03 22:38:32 +0000 | [diff] [blame] | 347 | if (!llis_va[index].lli) |
| 348 | break; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 349 | } |
| 350 | } |
| 351 | } |
| 352 | |
| 353 | /* Sum up all queued transactions */ |
Russell King - ARM Linux | 15c1723 | 2011-01-03 22:44:36 +0000 | [diff] [blame] | 354 | if (!list_empty(&plchan->pend_list)) { |
Russell King - ARM Linux | db9f136 | 2011-01-03 22:38:32 +0000 | [diff] [blame] | 355 | struct pl08x_txd *txdi; |
Russell King - ARM Linux | 15c1723 | 2011-01-03 22:44:36 +0000 | [diff] [blame] | 356 | list_for_each_entry(txdi, &plchan->pend_list, node) { |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 357 | struct pl08x_sg *dsg; |
| 358 | list_for_each_entry(dsg, &txd->dsg_list, node) |
| 359 | bytes += dsg->len; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 360 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 361 | } |
| 362 | |
| 363 | spin_unlock_irqrestore(&plchan->lock, flags); |
| 364 | |
| 365 | return bytes; |
| 366 | } |
| 367 | |
| 368 | /* |
| 369 | * Allocate a physical channel for a virtual channel |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 370 | * |
| 371 | * Try to locate a physical channel to be used for this transfer. If all |
| 372 | * are taken return NULL and the requester will have to cope by using |
| 373 | * some fallback PIO mode or retrying later. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 374 | */ |
| 375 | static struct pl08x_phy_chan * |
| 376 | pl08x_get_phy_channel(struct pl08x_driver_data *pl08x, |
| 377 | struct pl08x_dma_chan *virt_chan) |
| 378 | { |
| 379 | struct pl08x_phy_chan *ch = NULL; |
| 380 | unsigned long flags; |
| 381 | int i; |
| 382 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 383 | for (i = 0; i < pl08x->vd->channels; i++) { |
| 384 | ch = &pl08x->phy_chans[i]; |
| 385 | |
| 386 | spin_lock_irqsave(&ch->lock, flags); |
| 387 | |
| 388 | if (!ch->serving) { |
| 389 | ch->serving = virt_chan; |
| 390 | ch->signal = -1; |
| 391 | spin_unlock_irqrestore(&ch->lock, flags); |
| 392 | break; |
| 393 | } |
| 394 | |
| 395 | spin_unlock_irqrestore(&ch->lock, flags); |
| 396 | } |
| 397 | |
| 398 | if (i == pl08x->vd->channels) { |
| 399 | /* No physical channel available, cope with it */ |
| 400 | return NULL; |
| 401 | } |
| 402 | |
Viresh Kumar | b7b6018 | 2011-08-05 15:32:33 +0530 | [diff] [blame] | 403 | pm_runtime_get_sync(&pl08x->adev->dev); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 404 | return ch; |
| 405 | } |
| 406 | |
| 407 | static inline void pl08x_put_phy_channel(struct pl08x_driver_data *pl08x, |
| 408 | struct pl08x_phy_chan *ch) |
| 409 | { |
| 410 | unsigned long flags; |
| 411 | |
Russell King - ARM Linux | fb52621 | 2011-01-27 12:32:53 +0000 | [diff] [blame] | 412 | spin_lock_irqsave(&ch->lock, flags); |
| 413 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 414 | /* Stop the channel and clear its interrupts */ |
Russell King - ARM Linux | fb52621 | 2011-01-27 12:32:53 +0000 | [diff] [blame] | 415 | pl08x_terminate_phy_chan(pl08x, ch); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 416 | |
Viresh Kumar | b7b6018 | 2011-08-05 15:32:33 +0530 | [diff] [blame] | 417 | pm_runtime_put(&pl08x->adev->dev); |
| 418 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 419 | /* Mark it as free */ |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 420 | ch->serving = NULL; |
| 421 | spin_unlock_irqrestore(&ch->lock, flags); |
| 422 | } |
| 423 | |
| 424 | /* |
| 425 | * LLI handling |
| 426 | */ |
| 427 | |
| 428 | static inline unsigned int pl08x_get_bytes_for_cctl(unsigned int coded) |
| 429 | { |
| 430 | switch (coded) { |
| 431 | case PL080_WIDTH_8BIT: |
| 432 | return 1; |
| 433 | case PL080_WIDTH_16BIT: |
| 434 | return 2; |
| 435 | case PL080_WIDTH_32BIT: |
| 436 | return 4; |
| 437 | default: |
| 438 | break; |
| 439 | } |
| 440 | BUG(); |
| 441 | return 0; |
| 442 | } |
| 443 | |
| 444 | static inline u32 pl08x_cctl_bits(u32 cctl, u8 srcwidth, u8 dstwidth, |
Russell King - ARM Linux | cace658 | 2011-01-03 22:37:31 +0000 | [diff] [blame] | 445 | size_t tsize) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 446 | { |
| 447 | u32 retbits = cctl; |
| 448 | |
Russell King - ARM Linux | e8b5e11 | 2011-01-03 22:30:24 +0000 | [diff] [blame] | 449 | /* Remove all src, dst and transfer size bits */ |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 450 | retbits &= ~PL080_CONTROL_DWIDTH_MASK; |
| 451 | retbits &= ~PL080_CONTROL_SWIDTH_MASK; |
| 452 | retbits &= ~PL080_CONTROL_TRANSFER_SIZE_MASK; |
| 453 | |
| 454 | /* Then set the bits according to the parameters */ |
| 455 | switch (srcwidth) { |
| 456 | case 1: |
| 457 | retbits |= PL080_WIDTH_8BIT << PL080_CONTROL_SWIDTH_SHIFT; |
| 458 | break; |
| 459 | case 2: |
| 460 | retbits |= PL080_WIDTH_16BIT << PL080_CONTROL_SWIDTH_SHIFT; |
| 461 | break; |
| 462 | case 4: |
| 463 | retbits |= PL080_WIDTH_32BIT << PL080_CONTROL_SWIDTH_SHIFT; |
| 464 | break; |
| 465 | default: |
| 466 | BUG(); |
| 467 | break; |
| 468 | } |
| 469 | |
| 470 | switch (dstwidth) { |
| 471 | case 1: |
| 472 | retbits |= PL080_WIDTH_8BIT << PL080_CONTROL_DWIDTH_SHIFT; |
| 473 | break; |
| 474 | case 2: |
| 475 | retbits |= PL080_WIDTH_16BIT << PL080_CONTROL_DWIDTH_SHIFT; |
| 476 | break; |
| 477 | case 4: |
| 478 | retbits |= PL080_WIDTH_32BIT << PL080_CONTROL_DWIDTH_SHIFT; |
| 479 | break; |
| 480 | default: |
| 481 | BUG(); |
| 482 | break; |
| 483 | } |
| 484 | |
| 485 | retbits |= tsize << PL080_CONTROL_TRANSFER_SIZE_SHIFT; |
| 486 | return retbits; |
| 487 | } |
| 488 | |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 489 | struct pl08x_lli_build_data { |
| 490 | struct pl08x_txd *txd; |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 491 | struct pl08x_bus_data srcbus; |
| 492 | struct pl08x_bus_data dstbus; |
| 493 | size_t remainder; |
Russell King - ARM Linux | 25c94f7 | 2011-07-21 17:11:46 +0100 | [diff] [blame] | 494 | u32 lli_bus; |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 495 | }; |
| 496 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 497 | /* |
Viresh Kumar | 0532e6f | 2011-08-05 15:32:31 +0530 | [diff] [blame] | 498 | * Autoselect a master bus to use for the transfer. Slave will be the chosen as |
| 499 | * victim in case src & dest are not similarly aligned. i.e. If after aligning |
| 500 | * masters address with width requirements of transfer (by sending few byte by |
| 501 | * byte data), slave is still not aligned, then its width will be reduced to |
| 502 | * BYTE. |
| 503 | * - prefers the destination bus if both available |
Viresh Kumar | 036f05f | 2011-08-05 15:32:41 +0530 | [diff] [blame] | 504 | * - prefers bus with fixed address (i.e. peripheral) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 505 | */ |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 506 | static void pl08x_choose_master_bus(struct pl08x_lli_build_data *bd, |
| 507 | struct pl08x_bus_data **mbus, struct pl08x_bus_data **sbus, u32 cctl) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 508 | { |
| 509 | if (!(cctl & PL080_CONTROL_DST_INCR)) { |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 510 | *mbus = &bd->dstbus; |
| 511 | *sbus = &bd->srcbus; |
Viresh Kumar | 036f05f | 2011-08-05 15:32:41 +0530 | [diff] [blame] | 512 | } else if (!(cctl & PL080_CONTROL_SRC_INCR)) { |
| 513 | *mbus = &bd->srcbus; |
| 514 | *sbus = &bd->dstbus; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 515 | } else { |
Viresh Kumar | 036f05f | 2011-08-05 15:32:41 +0530 | [diff] [blame] | 516 | if (bd->dstbus.buswidth >= bd->srcbus.buswidth) { |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 517 | *mbus = &bd->dstbus; |
| 518 | *sbus = &bd->srcbus; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 519 | } else { |
Viresh Kumar | 036f05f | 2011-08-05 15:32:41 +0530 | [diff] [blame] | 520 | *mbus = &bd->srcbus; |
| 521 | *sbus = &bd->dstbus; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 522 | } |
| 523 | } |
| 524 | } |
| 525 | |
| 526 | /* |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 527 | * Fills in one LLI for a certain transfer descriptor and advance the counter |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 528 | */ |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 529 | static void pl08x_fill_lli_for_desc(struct pl08x_lli_build_data *bd, |
| 530 | int num_llis, int len, u32 cctl) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 531 | { |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 532 | struct pl08x_lli *llis_va = bd->txd->llis_va; |
| 533 | dma_addr_t llis_bus = bd->txd->llis_bus; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 534 | |
| 535 | BUG_ON(num_llis >= MAX_NUM_TSFR_LLIS); |
| 536 | |
Russell King - ARM Linux | 30749cb | 2011-01-03 22:41:13 +0000 | [diff] [blame] | 537 | llis_va[num_llis].cctl = cctl; |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 538 | llis_va[num_llis].src = bd->srcbus.addr; |
| 539 | llis_va[num_llis].dst = bd->dstbus.addr; |
Viresh Kumar | 3e27ee8 | 2011-08-05 15:32:27 +0530 | [diff] [blame] | 540 | llis_va[num_llis].lli = llis_bus + (num_llis + 1) * |
| 541 | sizeof(struct pl08x_lli); |
Russell King - ARM Linux | 25c94f7 | 2011-07-21 17:11:46 +0100 | [diff] [blame] | 542 | llis_va[num_llis].lli |= bd->lli_bus; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 543 | |
| 544 | if (cctl & PL080_CONTROL_SRC_INCR) |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 545 | bd->srcbus.addr += len; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 546 | if (cctl & PL080_CONTROL_DST_INCR) |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 547 | bd->dstbus.addr += len; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 548 | |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 549 | BUG_ON(bd->remainder < len); |
Russell King - ARM Linux | cace658 | 2011-01-03 22:37:31 +0000 | [diff] [blame] | 550 | |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 551 | bd->remainder -= len; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 552 | } |
| 553 | |
Viresh Kumar | 03af500 | 2011-08-05 15:32:39 +0530 | [diff] [blame] | 554 | static inline void prep_byte_width_lli(struct pl08x_lli_build_data *bd, |
| 555 | u32 *cctl, u32 len, int num_llis, size_t *total_bytes) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 556 | { |
Viresh Kumar | 03af500 | 2011-08-05 15:32:39 +0530 | [diff] [blame] | 557 | *cctl = pl08x_cctl_bits(*cctl, 1, 1, len); |
| 558 | pl08x_fill_lli_for_desc(bd, num_llis, len, *cctl); |
| 559 | (*total_bytes) += len; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 560 | } |
| 561 | |
| 562 | /* |
| 563 | * This fills in the table of LLIs for the transfer descriptor |
| 564 | * Note that we assume we never have to change the burst sizes |
| 565 | * Return 0 for error |
| 566 | */ |
| 567 | static int pl08x_fill_llis_for_desc(struct pl08x_driver_data *pl08x, |
| 568 | struct pl08x_txd *txd) |
| 569 | { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 570 | struct pl08x_bus_data *mbus, *sbus; |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 571 | struct pl08x_lli_build_data bd; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 572 | int num_llis = 0; |
Viresh Kumar | 03af500 | 2011-08-05 15:32:39 +0530 | [diff] [blame] | 573 | u32 cctl, early_bytes = 0; |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 574 | size_t max_bytes_per_lli, total_bytes; |
Russell King - ARM Linux | 7cb72ad | 2011-01-03 22:35:28 +0000 | [diff] [blame] | 575 | struct pl08x_lli *llis_va; |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 576 | struct pl08x_sg *dsg; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 577 | |
Viresh Kumar | 3e27ee8 | 2011-08-05 15:32:27 +0530 | [diff] [blame] | 578 | txd->llis_va = dma_pool_alloc(pl08x->pool, GFP_NOWAIT, &txd->llis_bus); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 579 | if (!txd->llis_va) { |
| 580 | dev_err(&pl08x->adev->dev, "%s no memory for llis\n", __func__); |
| 581 | return 0; |
| 582 | } |
| 583 | |
| 584 | pl08x->pool_ctr++; |
| 585 | |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 586 | bd.txd = txd; |
Russell King - ARM Linux | 25c94f7 | 2011-07-21 17:11:46 +0100 | [diff] [blame] | 587 | bd.lli_bus = (pl08x->lli_buses & PL08X_AHB2) ? PL080_LLI_LM_AHB2 : 0; |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 588 | cctl = txd->cctl; |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 589 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 590 | /* Find maximum width of the source bus */ |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 591 | bd.srcbus.maxwidth = |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 592 | pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_SWIDTH_MASK) >> |
| 593 | PL080_CONTROL_SWIDTH_SHIFT); |
| 594 | |
| 595 | /* Find maximum width of the destination bus */ |
Russell King - ARM Linux | 542361f | 2011-01-03 22:43:15 +0000 | [diff] [blame] | 596 | bd.dstbus.maxwidth = |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 597 | pl08x_get_bytes_for_cctl((cctl & PL080_CONTROL_DWIDTH_MASK) >> |
| 598 | PL080_CONTROL_DWIDTH_SHIFT); |
| 599 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 600 | list_for_each_entry(dsg, &txd->dsg_list, node) { |
| 601 | total_bytes = 0; |
| 602 | cctl = txd->cctl; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 603 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 604 | bd.srcbus.addr = dsg->src_addr; |
| 605 | bd.dstbus.addr = dsg->dst_addr; |
| 606 | bd.remainder = dsg->len; |
| 607 | bd.srcbus.buswidth = bd.srcbus.maxwidth; |
| 608 | bd.dstbus.buswidth = bd.dstbus.maxwidth; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 609 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 610 | pl08x_choose_master_bus(&bd, &mbus, &sbus, cctl); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 611 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 612 | dev_vdbg(&pl08x->adev->dev, "src=0x%08x%s/%u dst=0x%08x%s/%u len=%zu\n", |
| 613 | bd.srcbus.addr, cctl & PL080_CONTROL_SRC_INCR ? "+" : "", |
| 614 | bd.srcbus.buswidth, |
| 615 | bd.dstbus.addr, cctl & PL080_CONTROL_DST_INCR ? "+" : "", |
| 616 | bd.dstbus.buswidth, |
| 617 | bd.remainder); |
| 618 | dev_vdbg(&pl08x->adev->dev, "mbus=%s sbus=%s\n", |
| 619 | mbus == &bd.srcbus ? "src" : "dst", |
| 620 | sbus == &bd.srcbus ? "src" : "dst"); |
Russell King - ARM Linux | fc74eb7 | 2011-07-21 17:12:06 +0100 | [diff] [blame] | 621 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 622 | /* |
| 623 | * Zero length is only allowed if all these requirements are |
| 624 | * met: |
| 625 | * - flow controller is peripheral. |
| 626 | * - src.addr is aligned to src.width |
| 627 | * - dst.addr is aligned to dst.width |
| 628 | * |
| 629 | * sg_len == 1 should be true, as there can be two cases here: |
| 630 | * |
| 631 | * - Memory addresses are contiguous and are not scattered. |
| 632 | * Here, Only one sg will be passed by user driver, with |
| 633 | * memory address and zero length. We pass this to controller |
| 634 | * and after the transfer it will receive the last burst |
| 635 | * request from peripheral and so transfer finishes. |
| 636 | * |
| 637 | * - Memory addresses are scattered and are not contiguous. |
| 638 | * Here, Obviously as DMA controller doesn't know when a lli's |
| 639 | * transfer gets over, it can't load next lli. So in this |
| 640 | * case, there has to be an assumption that only one lli is |
| 641 | * supported. Thus, we can't have scattered addresses. |
| 642 | */ |
| 643 | if (!bd.remainder) { |
| 644 | u32 fc = (txd->ccfg & PL080_CONFIG_FLOW_CONTROL_MASK) >> |
| 645 | PL080_CONFIG_FLOW_CONTROL_SHIFT; |
| 646 | if (!((fc >= PL080_FLOW_SRC2DST_DST) && |
Viresh Kumar | 0a23565 | 2011-08-05 15:32:42 +0530 | [diff] [blame] | 647 | (fc <= PL080_FLOW_SRC2DST_SRC))) { |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 648 | dev_err(&pl08x->adev->dev, "%s sg len can't be zero", |
| 649 | __func__); |
| 650 | return 0; |
| 651 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 652 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 653 | if ((bd.srcbus.addr % bd.srcbus.buswidth) || |
Julia Lawall | 880db3f | 2012-01-12 22:49:29 +0100 | [diff] [blame] | 654 | (bd.dstbus.addr % bd.dstbus.buswidth)) { |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 655 | dev_err(&pl08x->adev->dev, |
| 656 | "%s src & dst address must be aligned to src" |
| 657 | " & dst width if peripheral is flow controller", |
| 658 | __func__); |
| 659 | return 0; |
| 660 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 661 | |
Viresh Kumar | 16a2e7d | 2011-08-05 15:32:37 +0530 | [diff] [blame] | 662 | cctl = pl08x_cctl_bits(cctl, bd.srcbus.buswidth, |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 663 | bd.dstbus.buswidth, 0); |
| 664 | pl08x_fill_lli_for_desc(&bd, num_llis++, 0, cctl); |
| 665 | break; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 666 | } |
| 667 | |
| 668 | /* |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 669 | * Send byte by byte for following cases |
| 670 | * - Less than a bus width available |
| 671 | * - until master bus is aligned |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 672 | */ |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 673 | if (bd.remainder < mbus->buswidth) |
| 674 | early_bytes = bd.remainder; |
| 675 | else if ((mbus->addr) % (mbus->buswidth)) { |
| 676 | early_bytes = mbus->buswidth - (mbus->addr) % |
| 677 | (mbus->buswidth); |
| 678 | if ((bd.remainder - early_bytes) < mbus->buswidth) |
| 679 | early_bytes = bd.remainder; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 680 | } |
Viresh Kumar | 16a2e7d | 2011-08-05 15:32:37 +0530 | [diff] [blame] | 681 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 682 | if (early_bytes) { |
| 683 | dev_vdbg(&pl08x->adev->dev, |
| 684 | "%s byte width LLIs (remain 0x%08x)\n", |
| 685 | __func__, bd.remainder); |
| 686 | prep_byte_width_lli(&bd, &cctl, early_bytes, num_llis++, |
| 687 | &total_bytes); |
| 688 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 689 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 690 | if (bd.remainder) { |
| 691 | /* |
| 692 | * Master now aligned |
| 693 | * - if slave is not then we must set its width down |
| 694 | */ |
| 695 | if (sbus->addr % sbus->buswidth) { |
| 696 | dev_dbg(&pl08x->adev->dev, |
| 697 | "%s set down bus width to one byte\n", |
| 698 | __func__); |
| 699 | |
| 700 | sbus->buswidth = 1; |
| 701 | } |
| 702 | |
| 703 | /* |
| 704 | * Bytes transferred = tsize * src width, not |
| 705 | * MIN(buswidths) |
| 706 | */ |
| 707 | max_bytes_per_lli = bd.srcbus.buswidth * |
| 708 | PL080_CONTROL_TRANSFER_SIZE_MASK; |
| 709 | dev_vdbg(&pl08x->adev->dev, |
| 710 | "%s max bytes per lli = %zu\n", |
| 711 | __func__, max_bytes_per_lli); |
| 712 | |
| 713 | /* |
| 714 | * Make largest possible LLIs until less than one bus |
| 715 | * width left |
| 716 | */ |
| 717 | while (bd.remainder > (mbus->buswidth - 1)) { |
| 718 | size_t lli_len, tsize, width; |
| 719 | |
| 720 | /* |
| 721 | * If enough left try to send max possible, |
| 722 | * otherwise try to send the remainder |
| 723 | */ |
| 724 | lli_len = min(bd.remainder, max_bytes_per_lli); |
| 725 | |
| 726 | /* |
| 727 | * Check against maximum bus alignment: |
| 728 | * Calculate actual transfer size in relation to |
| 729 | * bus width an get a maximum remainder of the |
| 730 | * highest bus width - 1 |
| 731 | */ |
| 732 | width = max(mbus->buswidth, sbus->buswidth); |
| 733 | lli_len = (lli_len / width) * width; |
| 734 | tsize = lli_len / bd.srcbus.buswidth; |
| 735 | |
| 736 | dev_vdbg(&pl08x->adev->dev, |
| 737 | "%s fill lli with single lli chunk of " |
| 738 | "size 0x%08zx (remainder 0x%08zx)\n", |
| 739 | __func__, lli_len, bd.remainder); |
| 740 | |
| 741 | cctl = pl08x_cctl_bits(cctl, bd.srcbus.buswidth, |
| 742 | bd.dstbus.buswidth, tsize); |
| 743 | pl08x_fill_lli_for_desc(&bd, num_llis++, |
| 744 | lli_len, cctl); |
| 745 | total_bytes += lli_len; |
| 746 | } |
| 747 | |
| 748 | /* |
| 749 | * Send any odd bytes |
| 750 | */ |
| 751 | if (bd.remainder) { |
| 752 | dev_vdbg(&pl08x->adev->dev, |
| 753 | "%s align with boundary, send odd bytes (remain %zu)\n", |
| 754 | __func__, bd.remainder); |
| 755 | prep_byte_width_lli(&bd, &cctl, bd.remainder, |
| 756 | num_llis++, &total_bytes); |
| 757 | } |
| 758 | } |
| 759 | |
| 760 | if (total_bytes != dsg->len) { |
| 761 | dev_err(&pl08x->adev->dev, |
| 762 | "%s size of encoded lli:s don't match total txd, transferred 0x%08zx from size 0x%08zx\n", |
| 763 | __func__, total_bytes, dsg->len); |
| 764 | return 0; |
| 765 | } |
| 766 | |
| 767 | if (num_llis >= MAX_NUM_TSFR_LLIS) { |
| 768 | dev_err(&pl08x->adev->dev, |
| 769 | "%s need to increase MAX_NUM_TSFR_LLIS from 0x%08x\n", |
| 770 | __func__, (u32) MAX_NUM_TSFR_LLIS); |
| 771 | return 0; |
| 772 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 773 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 774 | |
Russell King - ARM Linux | b58b6b5 | 2011-01-03 22:34:48 +0000 | [diff] [blame] | 775 | llis_va = txd->llis_va; |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 776 | /* The final LLI terminates the LLI. */ |
Russell King - ARM Linux | bfddfb4 | 2011-01-03 22:38:12 +0000 | [diff] [blame] | 777 | llis_va[num_llis - 1].lli = 0; |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 778 | /* The final LLI element shall also fire an interrupt. */ |
Russell King - ARM Linux | b58b6b5 | 2011-01-03 22:34:48 +0000 | [diff] [blame] | 779 | llis_va[num_llis - 1].cctl |= PL080_CONTROL_TC_IRQ_EN; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 780 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 781 | #ifdef VERBOSE_DEBUG |
| 782 | { |
| 783 | int i; |
| 784 | |
Russell King - ARM Linux | fc74eb7 | 2011-07-21 17:12:06 +0100 | [diff] [blame] | 785 | dev_vdbg(&pl08x->adev->dev, |
| 786 | "%-3s %-9s %-10s %-10s %-10s %s\n", |
| 787 | "lli", "", "csrc", "cdst", "clli", "cctl"); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 788 | for (i = 0; i < num_llis; i++) { |
| 789 | dev_vdbg(&pl08x->adev->dev, |
Russell King - ARM Linux | fc74eb7 | 2011-07-21 17:12:06 +0100 | [diff] [blame] | 790 | "%3d @%p: 0x%08x 0x%08x 0x%08x 0x%08x\n", |
| 791 | i, &llis_va[i], llis_va[i].src, |
| 792 | llis_va[i].dst, llis_va[i].lli, llis_va[i].cctl |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 793 | ); |
| 794 | } |
| 795 | } |
| 796 | #endif |
| 797 | |
| 798 | return num_llis; |
| 799 | } |
| 800 | |
| 801 | /* You should call this with the struct pl08x lock held */ |
| 802 | static void pl08x_free_txd(struct pl08x_driver_data *pl08x, |
| 803 | struct pl08x_txd *txd) |
| 804 | { |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 805 | struct pl08x_sg *dsg, *_dsg; |
| 806 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 807 | /* Free the LLI */ |
Viresh Kumar | c120564 | 2011-08-05 15:32:44 +0530 | [diff] [blame] | 808 | if (txd->llis_va) |
| 809 | dma_pool_free(pl08x->pool, txd->llis_va, txd->llis_bus); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 810 | |
| 811 | pl08x->pool_ctr--; |
| 812 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 813 | list_for_each_entry_safe(dsg, _dsg, &txd->dsg_list, node) { |
| 814 | list_del(&dsg->node); |
| 815 | kfree(dsg); |
| 816 | } |
| 817 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 818 | kfree(txd); |
| 819 | } |
| 820 | |
| 821 | static void pl08x_free_txd_list(struct pl08x_driver_data *pl08x, |
| 822 | struct pl08x_dma_chan *plchan) |
| 823 | { |
| 824 | struct pl08x_txd *txdi = NULL; |
| 825 | struct pl08x_txd *next; |
| 826 | |
Russell King - ARM Linux | 15c1723 | 2011-01-03 22:44:36 +0000 | [diff] [blame] | 827 | if (!list_empty(&plchan->pend_list)) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 828 | list_for_each_entry_safe(txdi, |
Russell King - ARM Linux | 15c1723 | 2011-01-03 22:44:36 +0000 | [diff] [blame] | 829 | next, &plchan->pend_list, node) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 830 | list_del(&txdi->node); |
| 831 | pl08x_free_txd(pl08x, txdi); |
| 832 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 833 | } |
| 834 | } |
| 835 | |
| 836 | /* |
| 837 | * The DMA ENGINE API |
| 838 | */ |
| 839 | static int pl08x_alloc_chan_resources(struct dma_chan *chan) |
| 840 | { |
| 841 | return 0; |
| 842 | } |
| 843 | |
| 844 | static void pl08x_free_chan_resources(struct dma_chan *chan) |
| 845 | { |
| 846 | } |
| 847 | |
| 848 | /* |
| 849 | * This should be called with the channel plchan->lock held |
| 850 | */ |
| 851 | static int prep_phy_channel(struct pl08x_dma_chan *plchan, |
| 852 | struct pl08x_txd *txd) |
| 853 | { |
| 854 | struct pl08x_driver_data *pl08x = plchan->host; |
| 855 | struct pl08x_phy_chan *ch; |
| 856 | int ret; |
| 857 | |
| 858 | /* Check if we already have a channel */ |
Viresh Kumar | 8f0d30f | 2011-11-29 12:56:50 +0530 | [diff] [blame] | 859 | if (plchan->phychan) { |
| 860 | ch = plchan->phychan; |
| 861 | goto got_channel; |
| 862 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 863 | |
| 864 | ch = pl08x_get_phy_channel(pl08x, plchan); |
| 865 | if (!ch) { |
| 866 | /* No physical channel available, cope with it */ |
| 867 | dev_dbg(&pl08x->adev->dev, "no physical channel available for xfer on %s\n", plchan->name); |
| 868 | return -EBUSY; |
| 869 | } |
| 870 | |
| 871 | /* |
| 872 | * OK we have a physical channel: for memcpy() this is all we |
| 873 | * need, but for slaves the physical signals may be muxed! |
| 874 | * Can the platform allow us to use this channel? |
| 875 | */ |
Viresh Kumar | 16ca810 | 2011-08-05 15:32:35 +0530 | [diff] [blame] | 876 | if (plchan->slave && pl08x->pd->get_signal) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 877 | ret = pl08x->pd->get_signal(plchan); |
| 878 | if (ret < 0) { |
| 879 | dev_dbg(&pl08x->adev->dev, |
| 880 | "unable to use physical channel %d for transfer on %s due to platform restrictions\n", |
| 881 | ch->id, plchan->name); |
| 882 | /* Release physical channel & return */ |
| 883 | pl08x_put_phy_channel(pl08x, ch); |
| 884 | return -EBUSY; |
| 885 | } |
| 886 | ch->signal = ret; |
| 887 | } |
| 888 | |
Viresh Kumar | 8f0d30f | 2011-11-29 12:56:50 +0530 | [diff] [blame] | 889 | plchan->phychan = ch; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 890 | dev_dbg(&pl08x->adev->dev, "allocated physical channel %d and signal %d for xfer on %s\n", |
| 891 | ch->id, |
| 892 | ch->signal, |
| 893 | plchan->name); |
| 894 | |
Viresh Kumar | 8f0d30f | 2011-11-29 12:56:50 +0530 | [diff] [blame] | 895 | got_channel: |
| 896 | /* Assign the flow control signal to this channel */ |
| 897 | if (txd->direction == DMA_MEM_TO_DEV) |
| 898 | txd->ccfg |= ch->signal << PL080_CONFIG_DST_SEL_SHIFT; |
| 899 | else if (txd->direction == DMA_DEV_TO_MEM) |
| 900 | txd->ccfg |= ch->signal << PL080_CONFIG_SRC_SEL_SHIFT; |
| 901 | |
Russell King - ARM Linux | 8087aac | 2011-01-03 22:45:17 +0000 | [diff] [blame] | 902 | plchan->phychan_hold++; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 903 | |
| 904 | return 0; |
| 905 | } |
| 906 | |
Russell King - ARM Linux | 8c8cc2b | 2011-01-03 22:36:09 +0000 | [diff] [blame] | 907 | static void release_phy_channel(struct pl08x_dma_chan *plchan) |
| 908 | { |
| 909 | struct pl08x_driver_data *pl08x = plchan->host; |
| 910 | |
| 911 | if ((plchan->phychan->signal >= 0) && pl08x->pd->put_signal) { |
| 912 | pl08x->pd->put_signal(plchan); |
| 913 | plchan->phychan->signal = -1; |
| 914 | } |
| 915 | pl08x_put_phy_channel(pl08x, plchan->phychan); |
| 916 | plchan->phychan = NULL; |
| 917 | } |
| 918 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 919 | static dma_cookie_t pl08x_tx_submit(struct dma_async_tx_descriptor *tx) |
| 920 | { |
| 921 | struct pl08x_dma_chan *plchan = to_pl08x_chan(tx->chan); |
Russell King - ARM Linux | 501e67e | 2011-01-03 22:44:57 +0000 | [diff] [blame] | 922 | struct pl08x_txd *txd = to_pl08x_txd(tx); |
Russell King - ARM Linux | c370e59 | 2011-01-03 22:45:37 +0000 | [diff] [blame] | 923 | unsigned long flags; |
Russell King - ARM Linux | 884485e | 2012-03-06 22:34:46 +0000 | [diff] [blame] | 924 | dma_cookie_t cookie; |
Russell King - ARM Linux | c370e59 | 2011-01-03 22:45:37 +0000 | [diff] [blame] | 925 | |
| 926 | spin_lock_irqsave(&plchan->lock, flags); |
Russell King - ARM Linux | 884485e | 2012-03-06 22:34:46 +0000 | [diff] [blame] | 927 | cookie = dma_cookie_assign(tx); |
Russell King - ARM Linux | 501e67e | 2011-01-03 22:44:57 +0000 | [diff] [blame] | 928 | |
| 929 | /* Put this onto the pending list */ |
| 930 | list_add_tail(&txd->node, &plchan->pend_list); |
| 931 | |
| 932 | /* |
| 933 | * If there was no physical channel available for this memcpy, |
| 934 | * stack the request up and indicate that the channel is waiting |
| 935 | * for a free physical channel. |
| 936 | */ |
| 937 | if (!plchan->slave && !plchan->phychan) { |
| 938 | /* Do this memcpy whenever there is a channel ready */ |
| 939 | plchan->state = PL08X_CHAN_WAITING; |
| 940 | plchan->waiting = txd; |
Russell King - ARM Linux | 8087aac | 2011-01-03 22:45:17 +0000 | [diff] [blame] | 941 | } else { |
| 942 | plchan->phychan_hold--; |
Russell King - ARM Linux | 501e67e | 2011-01-03 22:44:57 +0000 | [diff] [blame] | 943 | } |
| 944 | |
Russell King - ARM Linux | c370e59 | 2011-01-03 22:45:37 +0000 | [diff] [blame] | 945 | spin_unlock_irqrestore(&plchan->lock, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 946 | |
Russell King - ARM Linux | 884485e | 2012-03-06 22:34:46 +0000 | [diff] [blame] | 947 | return cookie; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 948 | } |
| 949 | |
| 950 | static struct dma_async_tx_descriptor *pl08x_prep_dma_interrupt( |
| 951 | struct dma_chan *chan, unsigned long flags) |
| 952 | { |
| 953 | struct dma_async_tx_descriptor *retval = NULL; |
| 954 | |
| 955 | return retval; |
| 956 | } |
| 957 | |
| 958 | /* |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 959 | * Code accessing dma_async_is_complete() in a tight loop may give problems. |
| 960 | * If slaves are relying on interrupts to signal completion this function |
| 961 | * must not be called with interrupts disabled. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 962 | */ |
Viresh Kumar | 3e27ee8 | 2011-08-05 15:32:27 +0530 | [diff] [blame] | 963 | static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan, |
| 964 | dma_cookie_t cookie, struct dma_tx_state *txstate) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 965 | { |
| 966 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 967 | enum dma_status ret; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 968 | |
Russell King - ARM Linux | 96a2af4 | 2012-03-06 22:35:27 +0000 | [diff] [blame] | 969 | ret = dma_cookie_status(chan, cookie, txstate); |
| 970 | if (ret == DMA_SUCCESS) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 971 | return ret; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 972 | |
| 973 | /* |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 974 | * This cookie not complete yet |
Russell King - ARM Linux | 96a2af4 | 2012-03-06 22:35:27 +0000 | [diff] [blame] | 975 | * Get number of bytes left in the active transactions and queue |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 976 | */ |
Russell King - ARM Linux | 96a2af4 | 2012-03-06 22:35:27 +0000 | [diff] [blame] | 977 | dma_set_residue(txstate, pl08x_getbytes_chan(plchan)); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 978 | |
| 979 | if (plchan->state == PL08X_CHAN_PAUSED) |
| 980 | return DMA_PAUSED; |
| 981 | |
| 982 | /* Whether waiting or running, we're in progress */ |
| 983 | return DMA_IN_PROGRESS; |
| 984 | } |
| 985 | |
| 986 | /* PrimeCell DMA extension */ |
| 987 | struct burst_table { |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 988 | u32 burstwords; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 989 | u32 reg; |
| 990 | }; |
| 991 | |
| 992 | static const struct burst_table burst_sizes[] = { |
| 993 | { |
| 994 | .burstwords = 256, |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 995 | .reg = PL080_BSIZE_256, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 996 | }, |
| 997 | { |
| 998 | .burstwords = 128, |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 999 | .reg = PL080_BSIZE_128, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1000 | }, |
| 1001 | { |
| 1002 | .burstwords = 64, |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 1003 | .reg = PL080_BSIZE_64, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1004 | }, |
| 1005 | { |
| 1006 | .burstwords = 32, |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 1007 | .reg = PL080_BSIZE_32, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1008 | }, |
| 1009 | { |
| 1010 | .burstwords = 16, |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 1011 | .reg = PL080_BSIZE_16, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1012 | }, |
| 1013 | { |
| 1014 | .burstwords = 8, |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 1015 | .reg = PL080_BSIZE_8, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1016 | }, |
| 1017 | { |
| 1018 | .burstwords = 4, |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 1019 | .reg = PL080_BSIZE_4, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1020 | }, |
| 1021 | { |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 1022 | .burstwords = 0, |
| 1023 | .reg = PL080_BSIZE_1, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1024 | }, |
| 1025 | }; |
| 1026 | |
Russell King - ARM Linux | 121c847 | 2011-07-21 17:13:48 +0100 | [diff] [blame] | 1027 | /* |
| 1028 | * Given the source and destination available bus masks, select which |
| 1029 | * will be routed to each port. We try to have source and destination |
| 1030 | * on separate ports, but always respect the allowable settings. |
| 1031 | */ |
| 1032 | static u32 pl08x_select_bus(u8 src, u8 dst) |
| 1033 | { |
| 1034 | u32 cctl = 0; |
| 1035 | |
| 1036 | if (!(dst & PL08X_AHB1) || ((dst & PL08X_AHB2) && (src & PL08X_AHB1))) |
| 1037 | cctl |= PL080_CONTROL_DST_AHB2; |
| 1038 | if (!(src & PL08X_AHB1) || ((src & PL08X_AHB2) && !(dst & PL08X_AHB2))) |
| 1039 | cctl |= PL080_CONTROL_SRC_AHB2; |
| 1040 | |
| 1041 | return cctl; |
| 1042 | } |
| 1043 | |
Russell King - ARM Linux | f14c426 | 2011-07-21 17:12:47 +0100 | [diff] [blame] | 1044 | static u32 pl08x_cctl(u32 cctl) |
| 1045 | { |
| 1046 | cctl &= ~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 | |
| 1047 | PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR | |
| 1048 | PL080_CONTROL_PROT_MASK); |
| 1049 | |
| 1050 | /* Access the cell in privileged mode, non-bufferable, non-cacheable */ |
| 1051 | return cctl | PL080_CONTROL_PROT_SYS; |
| 1052 | } |
| 1053 | |
Russell King - ARM Linux | aa88cda | 2011-07-21 17:13:28 +0100 | [diff] [blame] | 1054 | static u32 pl08x_width(enum dma_slave_buswidth width) |
| 1055 | { |
| 1056 | switch (width) { |
| 1057 | case DMA_SLAVE_BUSWIDTH_1_BYTE: |
| 1058 | return PL080_WIDTH_8BIT; |
| 1059 | case DMA_SLAVE_BUSWIDTH_2_BYTES: |
| 1060 | return PL080_WIDTH_16BIT; |
| 1061 | case DMA_SLAVE_BUSWIDTH_4_BYTES: |
| 1062 | return PL080_WIDTH_32BIT; |
Vinod Koul | f32807f | 2011-07-25 19:22:01 +0530 | [diff] [blame] | 1063 | default: |
| 1064 | return ~0; |
Russell King - ARM Linux | aa88cda | 2011-07-21 17:13:28 +0100 | [diff] [blame] | 1065 | } |
Russell King - ARM Linux | aa88cda | 2011-07-21 17:13:28 +0100 | [diff] [blame] | 1066 | } |
| 1067 | |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 1068 | static u32 pl08x_burst(u32 maxburst) |
| 1069 | { |
| 1070 | int i; |
| 1071 | |
| 1072 | for (i = 0; i < ARRAY_SIZE(burst_sizes); i++) |
| 1073 | if (burst_sizes[i].burstwords <= maxburst) |
| 1074 | break; |
| 1075 | |
| 1076 | return burst_sizes[i].reg; |
| 1077 | } |
| 1078 | |
Russell King - ARM Linux | f0fd944 | 2011-01-03 22:45:57 +0000 | [diff] [blame] | 1079 | static int dma_set_runtime_config(struct dma_chan *chan, |
| 1080 | struct dma_slave_config *config) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1081 | { |
| 1082 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); |
| 1083 | struct pl08x_driver_data *pl08x = plchan->host; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1084 | enum dma_slave_buswidth addr_width; |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 1085 | u32 width, burst, maxburst; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1086 | u32 cctl = 0; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1087 | |
Russell King - ARM Linux | b7f7586 | 2011-01-03 22:46:17 +0000 | [diff] [blame] | 1088 | if (!plchan->slave) |
| 1089 | return -EINVAL; |
| 1090 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1091 | /* Transfer direction */ |
| 1092 | plchan->runtime_direction = config->direction; |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1093 | if (config->direction == DMA_MEM_TO_DEV) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1094 | addr_width = config->dst_addr_width; |
| 1095 | maxburst = config->dst_maxburst; |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1096 | } else if (config->direction == DMA_DEV_TO_MEM) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1097 | addr_width = config->src_addr_width; |
| 1098 | maxburst = config->src_maxburst; |
| 1099 | } else { |
| 1100 | dev_err(&pl08x->adev->dev, |
| 1101 | "bad runtime_config: alien transfer direction\n"); |
Russell King - ARM Linux | f0fd944 | 2011-01-03 22:45:57 +0000 | [diff] [blame] | 1102 | return -EINVAL; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1103 | } |
| 1104 | |
Russell King - ARM Linux | aa88cda | 2011-07-21 17:13:28 +0100 | [diff] [blame] | 1105 | width = pl08x_width(addr_width); |
| 1106 | if (width == ~0) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1107 | dev_err(&pl08x->adev->dev, |
| 1108 | "bad runtime_config: alien address width\n"); |
Russell King - ARM Linux | f0fd944 | 2011-01-03 22:45:57 +0000 | [diff] [blame] | 1109 | return -EINVAL; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1110 | } |
| 1111 | |
Russell King - ARM Linux | aa88cda | 2011-07-21 17:13:28 +0100 | [diff] [blame] | 1112 | cctl |= width << PL080_CONTROL_SWIDTH_SHIFT; |
| 1113 | cctl |= width << PL080_CONTROL_DWIDTH_SHIFT; |
| 1114 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1115 | /* |
Russell King - ARM Linux | 4440aac | 2011-01-03 22:30:44 +0000 | [diff] [blame] | 1116 | * If this channel will only request single transfers, set this |
| 1117 | * down to ONE element. Also select one element if no maxburst |
| 1118 | * is specified. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1119 | */ |
Russell King - ARM Linux | 760596c6 | 2011-07-21 17:14:08 +0100 | [diff] [blame] | 1120 | if (plchan->cd->single) |
| 1121 | maxburst = 1; |
| 1122 | |
| 1123 | burst = pl08x_burst(maxburst); |
| 1124 | cctl |= burst << PL080_CONTROL_SB_SIZE_SHIFT; |
| 1125 | cctl |= burst << PL080_CONTROL_DB_SIZE_SHIFT; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1126 | |
Viresh Kumar | 8c9f7aa | 2012-02-01 16:12:20 +0530 | [diff] [blame] | 1127 | plchan->device_fc = config->device_fc; |
| 1128 | |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1129 | if (plchan->runtime_direction == DMA_DEV_TO_MEM) { |
Russell King - ARM Linux | b207b4d | 2011-07-21 17:12:27 +0100 | [diff] [blame] | 1130 | plchan->src_addr = config->src_addr; |
Russell King - ARM Linux | 121c847 | 2011-07-21 17:13:48 +0100 | [diff] [blame] | 1131 | plchan->src_cctl = pl08x_cctl(cctl) | PL080_CONTROL_DST_INCR | |
| 1132 | pl08x_select_bus(plchan->cd->periph_buses, |
| 1133 | pl08x->mem_buses); |
Russell King - ARM Linux | b207b4d | 2011-07-21 17:12:27 +0100 | [diff] [blame] | 1134 | } else { |
| 1135 | plchan->dst_addr = config->dst_addr; |
Russell King - ARM Linux | 121c847 | 2011-07-21 17:13:48 +0100 | [diff] [blame] | 1136 | plchan->dst_cctl = pl08x_cctl(cctl) | PL080_CONTROL_SRC_INCR | |
| 1137 | pl08x_select_bus(pl08x->mem_buses, |
| 1138 | plchan->cd->periph_buses); |
Russell King - ARM Linux | b207b4d | 2011-07-21 17:12:27 +0100 | [diff] [blame] | 1139 | } |
Russell King - ARM Linux | f0fd944 | 2011-01-03 22:45:57 +0000 | [diff] [blame] | 1140 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1141 | dev_dbg(&pl08x->adev->dev, |
| 1142 | "configured channel %s (%s) for %s, data width %d, " |
Russell King - ARM Linux | 4983a04 | 2011-01-03 22:39:33 +0000 | [diff] [blame] | 1143 | "maxburst %d words, LE, CCTL=0x%08x\n", |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1144 | dma_chan_name(chan), plchan->name, |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1145 | (config->direction == DMA_DEV_TO_MEM) ? "RX" : "TX", |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1146 | addr_width, |
| 1147 | maxburst, |
Russell King - ARM Linux | 4983a04 | 2011-01-03 22:39:33 +0000 | [diff] [blame] | 1148 | cctl); |
Russell King - ARM Linux | f0fd944 | 2011-01-03 22:45:57 +0000 | [diff] [blame] | 1149 | |
| 1150 | return 0; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1151 | } |
| 1152 | |
| 1153 | /* |
| 1154 | * Slave transactions callback to the slave device to allow |
| 1155 | * synchronization of slave DMA signals with the DMAC enable |
| 1156 | */ |
| 1157 | static void pl08x_issue_pending(struct dma_chan *chan) |
| 1158 | { |
| 1159 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1160 | unsigned long flags; |
| 1161 | |
| 1162 | spin_lock_irqsave(&plchan->lock, flags); |
Russell King - ARM Linux | 9c0bb43 | 2011-01-03 22:32:05 +0000 | [diff] [blame] | 1163 | /* Something is already active, or we're waiting for a channel... */ |
| 1164 | if (plchan->at || plchan->state == PL08X_CHAN_WAITING) { |
| 1165 | spin_unlock_irqrestore(&plchan->lock, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1166 | return; |
Russell King - ARM Linux | 9c0bb43 | 2011-01-03 22:32:05 +0000 | [diff] [blame] | 1167 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1168 | |
| 1169 | /* Take the first element in the queue and execute it */ |
Russell King - ARM Linux | 15c1723 | 2011-01-03 22:44:36 +0000 | [diff] [blame] | 1170 | if (!list_empty(&plchan->pend_list)) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1171 | struct pl08x_txd *next; |
| 1172 | |
Russell King - ARM Linux | 15c1723 | 2011-01-03 22:44:36 +0000 | [diff] [blame] | 1173 | next = list_first_entry(&plchan->pend_list, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1174 | struct pl08x_txd, |
| 1175 | node); |
| 1176 | list_del(&next->node); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1177 | plchan->state = PL08X_CHAN_RUNNING; |
| 1178 | |
Russell King - ARM Linux | c885bee | 2011-01-03 22:38:52 +0000 | [diff] [blame] | 1179 | pl08x_start_txd(plchan, next); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1180 | } |
| 1181 | |
| 1182 | spin_unlock_irqrestore(&plchan->lock, flags); |
| 1183 | } |
| 1184 | |
| 1185 | static int pl08x_prep_channel_resources(struct pl08x_dma_chan *plchan, |
| 1186 | struct pl08x_txd *txd) |
| 1187 | { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1188 | struct pl08x_driver_data *pl08x = plchan->host; |
Russell King - ARM Linux | c370e59 | 2011-01-03 22:45:37 +0000 | [diff] [blame] | 1189 | unsigned long flags; |
| 1190 | int num_llis, ret; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1191 | |
| 1192 | num_llis = pl08x_fill_llis_for_desc(pl08x, txd); |
Russell King - ARM Linux | dafa731 | 2011-01-03 22:31:45 +0000 | [diff] [blame] | 1193 | if (!num_llis) { |
Viresh Kumar | 57001a6 | 2011-08-05 15:32:45 +0530 | [diff] [blame] | 1194 | spin_lock_irqsave(&plchan->lock, flags); |
| 1195 | pl08x_free_txd(pl08x, txd); |
| 1196 | spin_unlock_irqrestore(&plchan->lock, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1197 | return -EINVAL; |
Russell King - ARM Linux | dafa731 | 2011-01-03 22:31:45 +0000 | [diff] [blame] | 1198 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1199 | |
Russell King - ARM Linux | c370e59 | 2011-01-03 22:45:37 +0000 | [diff] [blame] | 1200 | spin_lock_irqsave(&plchan->lock, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1201 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1202 | /* |
| 1203 | * See if we already have a physical channel allocated, |
| 1204 | * else this is the time to try to get one. |
| 1205 | */ |
| 1206 | ret = prep_phy_channel(plchan, txd); |
| 1207 | if (ret) { |
| 1208 | /* |
Russell King - ARM Linux | 501e67e | 2011-01-03 22:44:57 +0000 | [diff] [blame] | 1209 | * No physical channel was available. |
| 1210 | * |
| 1211 | * memcpy transfers can be sorted out at submission time. |
| 1212 | * |
| 1213 | * Slave transfers may have been denied due to platform |
| 1214 | * channel muxing restrictions. Since there is no guarantee |
| 1215 | * that this will ever be resolved, and the signal must be |
| 1216 | * acquired AFTER acquiring the physical channel, we will let |
| 1217 | * them be NACK:ed with -EBUSY here. The drivers can retry |
| 1218 | * the prep() call if they are eager on doing this using DMA. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1219 | */ |
| 1220 | if (plchan->slave) { |
| 1221 | pl08x_free_txd_list(pl08x, plchan); |
Russell King - ARM Linux | 501e67e | 2011-01-03 22:44:57 +0000 | [diff] [blame] | 1222 | pl08x_free_txd(pl08x, txd); |
Russell King - ARM Linux | c370e59 | 2011-01-03 22:45:37 +0000 | [diff] [blame] | 1223 | spin_unlock_irqrestore(&plchan->lock, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1224 | return -EBUSY; |
| 1225 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1226 | } else |
| 1227 | /* |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 1228 | * Else we're all set, paused and ready to roll, status |
| 1229 | * will switch to PL08X_CHAN_RUNNING when we call |
| 1230 | * issue_pending(). If there is something running on the |
| 1231 | * channel already we don't change its state. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1232 | */ |
| 1233 | if (plchan->state == PL08X_CHAN_IDLE) |
| 1234 | plchan->state = PL08X_CHAN_PAUSED; |
| 1235 | |
Russell King - ARM Linux | c370e59 | 2011-01-03 22:45:37 +0000 | [diff] [blame] | 1236 | spin_unlock_irqrestore(&plchan->lock, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1237 | |
| 1238 | return 0; |
| 1239 | } |
| 1240 | |
Russell King - ARM Linux | c042879 | 2011-01-03 22:43:56 +0000 | [diff] [blame] | 1241 | static struct pl08x_txd *pl08x_get_txd(struct pl08x_dma_chan *plchan, |
| 1242 | unsigned long flags) |
Russell King - ARM Linux | ac3cd20 | 2011-01-03 22:35:49 +0000 | [diff] [blame] | 1243 | { |
Viresh Kumar | b201c11 | 2011-08-05 15:32:29 +0530 | [diff] [blame] | 1244 | struct pl08x_txd *txd = kzalloc(sizeof(*txd), GFP_NOWAIT); |
Russell King - ARM Linux | ac3cd20 | 2011-01-03 22:35:49 +0000 | [diff] [blame] | 1245 | |
| 1246 | if (txd) { |
| 1247 | dma_async_tx_descriptor_init(&txd->tx, &plchan->chan); |
Russell King - ARM Linux | c042879 | 2011-01-03 22:43:56 +0000 | [diff] [blame] | 1248 | txd->tx.flags = flags; |
Russell King - ARM Linux | ac3cd20 | 2011-01-03 22:35:49 +0000 | [diff] [blame] | 1249 | txd->tx.tx_submit = pl08x_tx_submit; |
| 1250 | INIT_LIST_HEAD(&txd->node); |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1251 | INIT_LIST_HEAD(&txd->dsg_list); |
Russell King - ARM Linux | 4983a04 | 2011-01-03 22:39:33 +0000 | [diff] [blame] | 1252 | |
| 1253 | /* Always enable error and terminal interrupts */ |
| 1254 | txd->ccfg = PL080_CONFIG_ERR_IRQ_MASK | |
| 1255 | PL080_CONFIG_TC_IRQ_MASK; |
Russell King - ARM Linux | ac3cd20 | 2011-01-03 22:35:49 +0000 | [diff] [blame] | 1256 | } |
| 1257 | return txd; |
| 1258 | } |
| 1259 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1260 | /* |
| 1261 | * Initialize a descriptor to be used by memcpy submit |
| 1262 | */ |
| 1263 | static struct dma_async_tx_descriptor *pl08x_prep_dma_memcpy( |
| 1264 | struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, |
| 1265 | size_t len, unsigned long flags) |
| 1266 | { |
| 1267 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); |
| 1268 | struct pl08x_driver_data *pl08x = plchan->host; |
| 1269 | struct pl08x_txd *txd; |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1270 | struct pl08x_sg *dsg; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1271 | int ret; |
| 1272 | |
Russell King - ARM Linux | c042879 | 2011-01-03 22:43:56 +0000 | [diff] [blame] | 1273 | txd = pl08x_get_txd(plchan, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1274 | if (!txd) { |
| 1275 | dev_err(&pl08x->adev->dev, |
| 1276 | "%s no memory for descriptor\n", __func__); |
| 1277 | return NULL; |
| 1278 | } |
| 1279 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1280 | dsg = kzalloc(sizeof(struct pl08x_sg), GFP_NOWAIT); |
| 1281 | if (!dsg) { |
| 1282 | pl08x_free_txd(pl08x, txd); |
| 1283 | dev_err(&pl08x->adev->dev, "%s no memory for pl080 sg\n", |
| 1284 | __func__); |
| 1285 | return NULL; |
| 1286 | } |
| 1287 | list_add_tail(&dsg->node, &txd->dsg_list); |
| 1288 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1289 | txd->direction = DMA_NONE; |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1290 | dsg->src_addr = src; |
| 1291 | dsg->dst_addr = dest; |
| 1292 | dsg->len = len; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1293 | |
| 1294 | /* Set platform data for m2m */ |
Russell King - ARM Linux | 4983a04 | 2011-01-03 22:39:33 +0000 | [diff] [blame] | 1295 | txd->ccfg |= PL080_FLOW_MEM2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT; |
Russell King - ARM Linux | c7da9a5 | 2011-01-03 22:40:53 +0000 | [diff] [blame] | 1296 | txd->cctl = pl08x->pd->memcpy_channel.cctl & |
| 1297 | ~(PL080_CONTROL_DST_AHB2 | PL080_CONTROL_SRC_AHB2); |
Russell King - ARM Linux | 4983a04 | 2011-01-03 22:39:33 +0000 | [diff] [blame] | 1298 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1299 | /* Both to be incremented or the code will break */ |
Russell King - ARM Linux | 70b5ed6 | 2011-01-03 22:40:13 +0000 | [diff] [blame] | 1300 | txd->cctl |= PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR; |
Russell King - ARM Linux | c7da9a5 | 2011-01-03 22:40:53 +0000 | [diff] [blame] | 1301 | |
Russell King - ARM Linux | c7da9a5 | 2011-01-03 22:40:53 +0000 | [diff] [blame] | 1302 | if (pl08x->vd->dualmaster) |
Russell King - ARM Linux | 121c847 | 2011-07-21 17:13:48 +0100 | [diff] [blame] | 1303 | txd->cctl |= pl08x_select_bus(pl08x->mem_buses, |
| 1304 | pl08x->mem_buses); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1305 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1306 | ret = pl08x_prep_channel_resources(plchan, txd); |
| 1307 | if (ret) |
| 1308 | return NULL; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1309 | |
| 1310 | return &txd->tx; |
| 1311 | } |
| 1312 | |
Russell King - ARM Linux | 3e2a037 | 2011-01-03 22:32:46 +0000 | [diff] [blame] | 1313 | static struct dma_async_tx_descriptor *pl08x_prep_slave_sg( |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1314 | struct dma_chan *chan, struct scatterlist *sgl, |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1315 | unsigned int sg_len, enum dma_transfer_direction direction, |
Alexandre Bounine | 185ecb5 | 2012-03-08 15:35:13 -0500 | [diff] [blame] | 1316 | unsigned long flags, void *context) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1317 | { |
| 1318 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); |
| 1319 | struct pl08x_driver_data *pl08x = plchan->host; |
| 1320 | struct pl08x_txd *txd; |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1321 | struct pl08x_sg *dsg; |
| 1322 | struct scatterlist *sg; |
| 1323 | dma_addr_t slave_addr; |
Viresh Kumar | 0a23565 | 2011-08-05 15:32:42 +0530 | [diff] [blame] | 1324 | int ret, tmp; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1325 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1326 | dev_dbg(&pl08x->adev->dev, "%s prepare transaction of %d bytes from %s\n", |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1327 | __func__, sgl->length, plchan->name); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1328 | |
Russell King - ARM Linux | c042879 | 2011-01-03 22:43:56 +0000 | [diff] [blame] | 1329 | txd = pl08x_get_txd(plchan, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1330 | if (!txd) { |
| 1331 | dev_err(&pl08x->adev->dev, "%s no txd\n", __func__); |
| 1332 | return NULL; |
| 1333 | } |
| 1334 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1335 | if (direction != plchan->runtime_direction) |
| 1336 | dev_err(&pl08x->adev->dev, "%s DMA setup does not match " |
| 1337 | "the direction configured for the PrimeCell\n", |
| 1338 | __func__); |
| 1339 | |
| 1340 | /* |
| 1341 | * Set up addresses, the PrimeCell configured address |
| 1342 | * will take precedence since this may configure the |
| 1343 | * channel target address dynamically at runtime. |
| 1344 | */ |
| 1345 | txd->direction = direction; |
Russell King - ARM Linux | c7da9a5 | 2011-01-03 22:40:53 +0000 | [diff] [blame] | 1346 | |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1347 | if (direction == DMA_MEM_TO_DEV) { |
Russell King - ARM Linux | 121c847 | 2011-07-21 17:13:48 +0100 | [diff] [blame] | 1348 | txd->cctl = plchan->dst_cctl; |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1349 | slave_addr = plchan->dst_addr; |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1350 | } else if (direction == DMA_DEV_TO_MEM) { |
Russell King - ARM Linux | 121c847 | 2011-07-21 17:13:48 +0100 | [diff] [blame] | 1351 | txd->cctl = plchan->src_cctl; |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1352 | slave_addr = plchan->src_addr; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1353 | } else { |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1354 | pl08x_free_txd(pl08x, txd); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1355 | dev_err(&pl08x->adev->dev, |
| 1356 | "%s direction unsupported\n", __func__); |
| 1357 | return NULL; |
| 1358 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1359 | |
Viresh Kumar | 8c9f7aa | 2012-02-01 16:12:20 +0530 | [diff] [blame] | 1360 | if (plchan->device_fc) |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1361 | tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER_PER : |
Viresh Kumar | 0a23565 | 2011-08-05 15:32:42 +0530 | [diff] [blame] | 1362 | PL080_FLOW_PER2MEM_PER; |
| 1363 | else |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1364 | tmp = (direction == DMA_MEM_TO_DEV) ? PL080_FLOW_MEM2PER : |
Viresh Kumar | 0a23565 | 2011-08-05 15:32:42 +0530 | [diff] [blame] | 1365 | PL080_FLOW_PER2MEM; |
| 1366 | |
| 1367 | txd->ccfg |= tmp << PL080_CONFIG_FLOW_CONTROL_SHIFT; |
| 1368 | |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1369 | for_each_sg(sgl, sg, sg_len, tmp) { |
| 1370 | dsg = kzalloc(sizeof(struct pl08x_sg), GFP_NOWAIT); |
| 1371 | if (!dsg) { |
| 1372 | pl08x_free_txd(pl08x, txd); |
| 1373 | dev_err(&pl08x->adev->dev, "%s no mem for pl080 sg\n", |
| 1374 | __func__); |
| 1375 | return NULL; |
| 1376 | } |
| 1377 | list_add_tail(&dsg->node, &txd->dsg_list); |
| 1378 | |
| 1379 | dsg->len = sg_dma_len(sg); |
Vinod Koul | db8196d | 2011-10-13 22:34:23 +0530 | [diff] [blame] | 1380 | if (direction == DMA_MEM_TO_DEV) { |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1381 | dsg->src_addr = sg_phys(sg); |
| 1382 | dsg->dst_addr = slave_addr; |
| 1383 | } else { |
| 1384 | dsg->src_addr = slave_addr; |
| 1385 | dsg->dst_addr = sg_phys(sg); |
| 1386 | } |
| 1387 | } |
| 1388 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1389 | ret = pl08x_prep_channel_resources(plchan, txd); |
| 1390 | if (ret) |
| 1391 | return NULL; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1392 | |
| 1393 | return &txd->tx; |
| 1394 | } |
| 1395 | |
| 1396 | static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, |
| 1397 | unsigned long arg) |
| 1398 | { |
| 1399 | struct pl08x_dma_chan *plchan = to_pl08x_chan(chan); |
| 1400 | struct pl08x_driver_data *pl08x = plchan->host; |
| 1401 | unsigned long flags; |
| 1402 | int ret = 0; |
| 1403 | |
| 1404 | /* Controls applicable to inactive channels */ |
| 1405 | if (cmd == DMA_SLAVE_CONFIG) { |
Russell King - ARM Linux | f0fd944 | 2011-01-03 22:45:57 +0000 | [diff] [blame] | 1406 | return dma_set_runtime_config(chan, |
| 1407 | (struct dma_slave_config *)arg); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1408 | } |
| 1409 | |
| 1410 | /* |
| 1411 | * Anything succeeds on channels with no physical allocation and |
| 1412 | * no queued transfers. |
| 1413 | */ |
| 1414 | spin_lock_irqsave(&plchan->lock, flags); |
| 1415 | if (!plchan->phychan && !plchan->at) { |
| 1416 | spin_unlock_irqrestore(&plchan->lock, flags); |
| 1417 | return 0; |
| 1418 | } |
| 1419 | |
| 1420 | switch (cmd) { |
| 1421 | case DMA_TERMINATE_ALL: |
| 1422 | plchan->state = PL08X_CHAN_IDLE; |
| 1423 | |
| 1424 | if (plchan->phychan) { |
Russell King - ARM Linux | fb52621 | 2011-01-27 12:32:53 +0000 | [diff] [blame] | 1425 | pl08x_terminate_phy_chan(pl08x, plchan->phychan); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1426 | |
| 1427 | /* |
| 1428 | * Mark physical channel as free and free any slave |
| 1429 | * signal |
| 1430 | */ |
Russell King - ARM Linux | 8c8cc2b | 2011-01-03 22:36:09 +0000 | [diff] [blame] | 1431 | release_phy_channel(plchan); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1432 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1433 | /* Dequeue jobs and free LLIs */ |
| 1434 | if (plchan->at) { |
| 1435 | pl08x_free_txd(pl08x, plchan->at); |
| 1436 | plchan->at = NULL; |
| 1437 | } |
| 1438 | /* Dequeue jobs not yet fired as well */ |
| 1439 | pl08x_free_txd_list(pl08x, plchan); |
| 1440 | break; |
| 1441 | case DMA_PAUSE: |
| 1442 | pl08x_pause_phy_chan(plchan->phychan); |
| 1443 | plchan->state = PL08X_CHAN_PAUSED; |
| 1444 | break; |
| 1445 | case DMA_RESUME: |
| 1446 | pl08x_resume_phy_chan(plchan->phychan); |
| 1447 | plchan->state = PL08X_CHAN_RUNNING; |
| 1448 | break; |
| 1449 | default: |
| 1450 | /* Unknown command */ |
| 1451 | ret = -ENXIO; |
| 1452 | break; |
| 1453 | } |
| 1454 | |
| 1455 | spin_unlock_irqrestore(&plchan->lock, flags); |
| 1456 | |
| 1457 | return ret; |
| 1458 | } |
| 1459 | |
| 1460 | bool pl08x_filter_id(struct dma_chan *chan, void *chan_id) |
| 1461 | { |
Russell King - ARM Linux | 7703eac | 2011-08-31 09:34:35 +0100 | [diff] [blame] | 1462 | struct pl08x_dma_chan *plchan; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1463 | char *name = chan_id; |
| 1464 | |
Russell King - ARM Linux | 7703eac | 2011-08-31 09:34:35 +0100 | [diff] [blame] | 1465 | /* Reject channels for devices not bound to this driver */ |
| 1466 | if (chan->device->dev->driver != &pl08x_amba_driver.drv) |
| 1467 | return false; |
| 1468 | |
| 1469 | plchan = to_pl08x_chan(chan); |
| 1470 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1471 | /* Check that the channel is not taken! */ |
| 1472 | if (!strcmp(plchan->name, name)) |
| 1473 | return true; |
| 1474 | |
| 1475 | return false; |
| 1476 | } |
| 1477 | |
| 1478 | /* |
| 1479 | * Just check that the device is there and active |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 1480 | * TODO: turn this bit on/off depending on the number of physical channels |
| 1481 | * actually used, if it is zero... well shut it off. That will save some |
| 1482 | * power. Cut the clock at the same time. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1483 | */ |
| 1484 | static void pl08x_ensure_on(struct pl08x_driver_data *pl08x) |
| 1485 | { |
Viresh Kumar | 48a59ef | 2011-08-05 15:32:34 +0530 | [diff] [blame] | 1486 | writel(PL080_CONFIG_ENABLE, pl08x->base + PL080_CONFIG); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1487 | } |
| 1488 | |
Russell King - ARM Linux | 3d992e1 | 2011-01-03 22:44:16 +0000 | [diff] [blame] | 1489 | static void pl08x_unmap_buffers(struct pl08x_txd *txd) |
| 1490 | { |
| 1491 | struct device *dev = txd->tx.chan->device->dev; |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1492 | struct pl08x_sg *dsg; |
Russell King - ARM Linux | 3d992e1 | 2011-01-03 22:44:16 +0000 | [diff] [blame] | 1493 | |
| 1494 | if (!(txd->tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) { |
| 1495 | if (txd->tx.flags & DMA_COMPL_SRC_UNMAP_SINGLE) |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1496 | list_for_each_entry(dsg, &txd->dsg_list, node) |
| 1497 | dma_unmap_single(dev, dsg->src_addr, dsg->len, |
| 1498 | DMA_TO_DEVICE); |
| 1499 | else { |
| 1500 | list_for_each_entry(dsg, &txd->dsg_list, node) |
| 1501 | dma_unmap_page(dev, dsg->src_addr, dsg->len, |
| 1502 | DMA_TO_DEVICE); |
| 1503 | } |
Russell King - ARM Linux | 3d992e1 | 2011-01-03 22:44:16 +0000 | [diff] [blame] | 1504 | } |
| 1505 | if (!(txd->tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) { |
| 1506 | if (txd->tx.flags & DMA_COMPL_DEST_UNMAP_SINGLE) |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1507 | list_for_each_entry(dsg, &txd->dsg_list, node) |
| 1508 | dma_unmap_single(dev, dsg->dst_addr, dsg->len, |
| 1509 | DMA_FROM_DEVICE); |
Russell King - ARM Linux | 3d992e1 | 2011-01-03 22:44:16 +0000 | [diff] [blame] | 1510 | else |
Viresh Kumar | b7f69d9 | 2011-08-05 15:32:43 +0530 | [diff] [blame] | 1511 | list_for_each_entry(dsg, &txd->dsg_list, node) |
| 1512 | dma_unmap_page(dev, dsg->dst_addr, dsg->len, |
| 1513 | DMA_FROM_DEVICE); |
Russell King - ARM Linux | 3d992e1 | 2011-01-03 22:44:16 +0000 | [diff] [blame] | 1514 | } |
| 1515 | } |
| 1516 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1517 | static void pl08x_tasklet(unsigned long data) |
| 1518 | { |
| 1519 | struct pl08x_dma_chan *plchan = (struct pl08x_dma_chan *) data; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1520 | struct pl08x_driver_data *pl08x = plchan->host; |
Russell King - ARM Linux | 858c21c | 2011-01-03 22:41:34 +0000 | [diff] [blame] | 1521 | struct pl08x_txd *txd; |
Russell King - ARM Linux | bf072af | 2011-01-03 22:31:24 +0000 | [diff] [blame] | 1522 | unsigned long flags; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1523 | |
Russell King - ARM Linux | bf072af | 2011-01-03 22:31:24 +0000 | [diff] [blame] | 1524 | spin_lock_irqsave(&plchan->lock, flags); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1525 | |
Russell King - ARM Linux | 858c21c | 2011-01-03 22:41:34 +0000 | [diff] [blame] | 1526 | txd = plchan->at; |
| 1527 | plchan->at = NULL; |
| 1528 | |
| 1529 | if (txd) { |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 1530 | /* Update last completed */ |
Russell King - ARM Linux | f7fbce0 | 2012-03-06 22:35:07 +0000 | [diff] [blame] | 1531 | dma_cookie_complete(&txd->tx); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1532 | } |
Russell King - ARM Linux | 8087aac | 2011-01-03 22:45:17 +0000 | [diff] [blame] | 1533 | |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 1534 | /* If a new descriptor is queued, set it up plchan->at is NULL here */ |
Russell King - ARM Linux | 15c1723 | 2011-01-03 22:44:36 +0000 | [diff] [blame] | 1535 | if (!list_empty(&plchan->pend_list)) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1536 | struct pl08x_txd *next; |
| 1537 | |
Russell King - ARM Linux | 15c1723 | 2011-01-03 22:44:36 +0000 | [diff] [blame] | 1538 | next = list_first_entry(&plchan->pend_list, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1539 | struct pl08x_txd, |
| 1540 | node); |
| 1541 | list_del(&next->node); |
Russell King - ARM Linux | c885bee | 2011-01-03 22:38:52 +0000 | [diff] [blame] | 1542 | |
| 1543 | pl08x_start_txd(plchan, next); |
Russell King - ARM Linux | 8087aac | 2011-01-03 22:45:17 +0000 | [diff] [blame] | 1544 | } else if (plchan->phychan_hold) { |
| 1545 | /* |
| 1546 | * This channel is still in use - we have a new txd being |
| 1547 | * prepared and will soon be queued. Don't give up the |
| 1548 | * physical channel. |
| 1549 | */ |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1550 | } else { |
| 1551 | struct pl08x_dma_chan *waiting = NULL; |
| 1552 | |
| 1553 | /* |
| 1554 | * No more jobs, so free up the physical channel |
| 1555 | * Free any allocated signal on slave transfers too |
| 1556 | */ |
Russell King - ARM Linux | 8c8cc2b | 2011-01-03 22:36:09 +0000 | [diff] [blame] | 1557 | release_phy_channel(plchan); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1558 | plchan->state = PL08X_CHAN_IDLE; |
| 1559 | |
| 1560 | /* |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 1561 | * And NOW before anyone else can grab that free:d up |
| 1562 | * physical channel, see if there is some memcpy pending |
| 1563 | * that seriously needs to start because of being stacked |
| 1564 | * up while we were choking the physical channels with data. |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1565 | */ |
| 1566 | list_for_each_entry(waiting, &pl08x->memcpy.channels, |
| 1567 | chan.device_node) { |
Viresh Kumar | 3e27ee8 | 2011-08-05 15:32:27 +0530 | [diff] [blame] | 1568 | if (waiting->state == PL08X_CHAN_WAITING && |
| 1569 | waiting->waiting != NULL) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1570 | int ret; |
| 1571 | |
| 1572 | /* This should REALLY not fail now */ |
| 1573 | ret = prep_phy_channel(waiting, |
| 1574 | waiting->waiting); |
| 1575 | BUG_ON(ret); |
Russell King - ARM Linux | 8087aac | 2011-01-03 22:45:17 +0000 | [diff] [blame] | 1576 | waiting->phychan_hold--; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1577 | waiting->state = PL08X_CHAN_RUNNING; |
| 1578 | waiting->waiting = NULL; |
| 1579 | pl08x_issue_pending(&waiting->chan); |
| 1580 | break; |
| 1581 | } |
| 1582 | } |
| 1583 | } |
| 1584 | |
Russell King - ARM Linux | bf072af | 2011-01-03 22:31:24 +0000 | [diff] [blame] | 1585 | spin_unlock_irqrestore(&plchan->lock, flags); |
Russell King - ARM Linux | 858c21c | 2011-01-03 22:41:34 +0000 | [diff] [blame] | 1586 | |
Russell King - ARM Linux | 3d992e1 | 2011-01-03 22:44:16 +0000 | [diff] [blame] | 1587 | if (txd) { |
| 1588 | dma_async_tx_callback callback = txd->tx.callback; |
| 1589 | void *callback_param = txd->tx.callback_param; |
| 1590 | |
| 1591 | /* Don't try to unmap buffers on slave channels */ |
| 1592 | if (!plchan->slave) |
| 1593 | pl08x_unmap_buffers(txd); |
| 1594 | |
| 1595 | /* Free the descriptor */ |
| 1596 | spin_lock_irqsave(&plchan->lock, flags); |
| 1597 | pl08x_free_txd(pl08x, txd); |
| 1598 | spin_unlock_irqrestore(&plchan->lock, flags); |
| 1599 | |
| 1600 | /* Callback to signal completion */ |
| 1601 | if (callback) |
| 1602 | callback(callback_param); |
| 1603 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1604 | } |
| 1605 | |
| 1606 | static irqreturn_t pl08x_irq(int irq, void *dev) |
| 1607 | { |
| 1608 | struct pl08x_driver_data *pl08x = dev; |
Viresh Kumar | 28da283 | 2011-08-05 15:32:36 +0530 | [diff] [blame] | 1609 | u32 mask = 0, err, tc, i; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1610 | |
Viresh Kumar | 28da283 | 2011-08-05 15:32:36 +0530 | [diff] [blame] | 1611 | /* check & clear - ERR & TC interrupts */ |
| 1612 | err = readl(pl08x->base + PL080_ERR_STATUS); |
| 1613 | if (err) { |
| 1614 | dev_err(&pl08x->adev->dev, "%s error interrupt, register value 0x%08x\n", |
| 1615 | __func__, err); |
| 1616 | writel(err, pl08x->base + PL080_ERR_CLEAR); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1617 | } |
Viresh Kumar | 28da283 | 2011-08-05 15:32:36 +0530 | [diff] [blame] | 1618 | tc = readl(pl08x->base + PL080_INT_STATUS); |
| 1619 | if (tc) |
| 1620 | writel(tc, pl08x->base + PL080_TC_CLEAR); |
| 1621 | |
| 1622 | if (!err && !tc) |
| 1623 | return IRQ_NONE; |
| 1624 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1625 | for (i = 0; i < pl08x->vd->channels; i++) { |
Viresh Kumar | 28da283 | 2011-08-05 15:32:36 +0530 | [diff] [blame] | 1626 | if (((1 << i) & err) || ((1 << i) & tc)) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1627 | /* Locate physical channel */ |
| 1628 | struct pl08x_phy_chan *phychan = &pl08x->phy_chans[i]; |
| 1629 | struct pl08x_dma_chan *plchan = phychan->serving; |
| 1630 | |
Viresh Kumar | 28da283 | 2011-08-05 15:32:36 +0530 | [diff] [blame] | 1631 | if (!plchan) { |
| 1632 | dev_err(&pl08x->adev->dev, |
| 1633 | "%s Error TC interrupt on unused channel: 0x%08x\n", |
| 1634 | __func__, i); |
| 1635 | continue; |
| 1636 | } |
| 1637 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1638 | /* Schedule tasklet on this channel */ |
| 1639 | tasklet_schedule(&plchan->tasklet); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1640 | mask |= (1 << i); |
| 1641 | } |
| 1642 | } |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1643 | |
| 1644 | return mask ? IRQ_HANDLED : IRQ_NONE; |
| 1645 | } |
| 1646 | |
Russell King - ARM Linux | 121c847 | 2011-07-21 17:13:48 +0100 | [diff] [blame] | 1647 | static void pl08x_dma_slave_init(struct pl08x_dma_chan *chan) |
| 1648 | { |
| 1649 | u32 cctl = pl08x_cctl(chan->cd->cctl); |
| 1650 | |
| 1651 | chan->slave = true; |
| 1652 | chan->name = chan->cd->bus_id; |
| 1653 | chan->src_addr = chan->cd->addr; |
| 1654 | chan->dst_addr = chan->cd->addr; |
| 1655 | chan->src_cctl = cctl | PL080_CONTROL_DST_INCR | |
| 1656 | pl08x_select_bus(chan->cd->periph_buses, chan->host->mem_buses); |
| 1657 | chan->dst_cctl = cctl | PL080_CONTROL_SRC_INCR | |
| 1658 | pl08x_select_bus(chan->host->mem_buses, chan->cd->periph_buses); |
| 1659 | } |
| 1660 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1661 | /* |
| 1662 | * Initialise the DMAC memcpy/slave channels. |
| 1663 | * Make a local wrapper to hold required data |
| 1664 | */ |
| 1665 | static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x, |
Viresh Kumar | 3e27ee8 | 2011-08-05 15:32:27 +0530 | [diff] [blame] | 1666 | struct dma_device *dmadev, unsigned int channels, bool slave) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1667 | { |
| 1668 | struct pl08x_dma_chan *chan; |
| 1669 | int i; |
| 1670 | |
| 1671 | INIT_LIST_HEAD(&dmadev->channels); |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 1672 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1673 | /* |
| 1674 | * Register as many many memcpy as we have physical channels, |
| 1675 | * we won't always be able to use all but the code will have |
| 1676 | * to cope with that situation. |
| 1677 | */ |
| 1678 | for (i = 0; i < channels; i++) { |
Viresh Kumar | b201c11 | 2011-08-05 15:32:29 +0530 | [diff] [blame] | 1679 | chan = kzalloc(sizeof(*chan), GFP_KERNEL); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1680 | if (!chan) { |
| 1681 | dev_err(&pl08x->adev->dev, |
| 1682 | "%s no memory for channel\n", __func__); |
| 1683 | return -ENOMEM; |
| 1684 | } |
| 1685 | |
| 1686 | chan->host = pl08x; |
| 1687 | chan->state = PL08X_CHAN_IDLE; |
| 1688 | |
| 1689 | if (slave) { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1690 | chan->cd = &pl08x->pd->slave_channels[i]; |
Russell King - ARM Linux | 121c847 | 2011-07-21 17:13:48 +0100 | [diff] [blame] | 1691 | pl08x_dma_slave_init(chan); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1692 | } else { |
| 1693 | chan->cd = &pl08x->pd->memcpy_channel; |
| 1694 | chan->name = kasprintf(GFP_KERNEL, "memcpy%d", i); |
| 1695 | if (!chan->name) { |
| 1696 | kfree(chan); |
| 1697 | return -ENOMEM; |
| 1698 | } |
| 1699 | } |
Russell King - ARM Linux | b58b6b5 | 2011-01-03 22:34:48 +0000 | [diff] [blame] | 1700 | if (chan->cd->circular_buffer) { |
| 1701 | dev_err(&pl08x->adev->dev, |
| 1702 | "channel %s: circular buffers not supported\n", |
| 1703 | chan->name); |
| 1704 | kfree(chan); |
| 1705 | continue; |
| 1706 | } |
Viresh Kumar | 175a5e6 | 2011-08-05 15:32:32 +0530 | [diff] [blame] | 1707 | dev_dbg(&pl08x->adev->dev, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1708 | "initialize virtual channel \"%s\"\n", |
| 1709 | chan->name); |
| 1710 | |
| 1711 | chan->chan.device = dmadev; |
Russell King - ARM Linux | d3ee98cdc | 2012-03-06 22:35:47 +0000 | [diff] [blame] | 1712 | dma_cookie_init(&chan->chan); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1713 | |
| 1714 | spin_lock_init(&chan->lock); |
Russell King - ARM Linux | 15c1723 | 2011-01-03 22:44:36 +0000 | [diff] [blame] | 1715 | INIT_LIST_HEAD(&chan->pend_list); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1716 | tasklet_init(&chan->tasklet, pl08x_tasklet, |
| 1717 | (unsigned long) chan); |
| 1718 | |
| 1719 | list_add_tail(&chan->chan.device_node, &dmadev->channels); |
| 1720 | } |
| 1721 | dev_info(&pl08x->adev->dev, "initialized %d virtual %s channels\n", |
| 1722 | i, slave ? "slave" : "memcpy"); |
| 1723 | return i; |
| 1724 | } |
| 1725 | |
| 1726 | static void pl08x_free_virtual_channels(struct dma_device *dmadev) |
| 1727 | { |
| 1728 | struct pl08x_dma_chan *chan = NULL; |
| 1729 | struct pl08x_dma_chan *next; |
| 1730 | |
| 1731 | list_for_each_entry_safe(chan, |
| 1732 | next, &dmadev->channels, chan.device_node) { |
| 1733 | list_del(&chan->chan.device_node); |
| 1734 | kfree(chan); |
| 1735 | } |
| 1736 | } |
| 1737 | |
| 1738 | #ifdef CONFIG_DEBUG_FS |
| 1739 | static const char *pl08x_state_str(enum pl08x_dma_chan_state state) |
| 1740 | { |
| 1741 | switch (state) { |
| 1742 | case PL08X_CHAN_IDLE: |
| 1743 | return "idle"; |
| 1744 | case PL08X_CHAN_RUNNING: |
| 1745 | return "running"; |
| 1746 | case PL08X_CHAN_PAUSED: |
| 1747 | return "paused"; |
| 1748 | case PL08X_CHAN_WAITING: |
| 1749 | return "waiting"; |
| 1750 | default: |
| 1751 | break; |
| 1752 | } |
| 1753 | return "UNKNOWN STATE"; |
| 1754 | } |
| 1755 | |
| 1756 | static int pl08x_debugfs_show(struct seq_file *s, void *data) |
| 1757 | { |
| 1758 | struct pl08x_driver_data *pl08x = s->private; |
| 1759 | struct pl08x_dma_chan *chan; |
| 1760 | struct pl08x_phy_chan *ch; |
| 1761 | unsigned long flags; |
| 1762 | int i; |
| 1763 | |
| 1764 | seq_printf(s, "PL08x physical channels:\n"); |
| 1765 | seq_printf(s, "CHANNEL:\tUSER:\n"); |
| 1766 | seq_printf(s, "--------\t-----\n"); |
| 1767 | for (i = 0; i < pl08x->vd->channels; i++) { |
| 1768 | struct pl08x_dma_chan *virt_chan; |
| 1769 | |
| 1770 | ch = &pl08x->phy_chans[i]; |
| 1771 | |
| 1772 | spin_lock_irqsave(&ch->lock, flags); |
| 1773 | virt_chan = ch->serving; |
| 1774 | |
| 1775 | seq_printf(s, "%d\t\t%s\n", |
| 1776 | ch->id, virt_chan ? virt_chan->name : "(none)"); |
| 1777 | |
| 1778 | spin_unlock_irqrestore(&ch->lock, flags); |
| 1779 | } |
| 1780 | |
| 1781 | seq_printf(s, "\nPL08x virtual memcpy channels:\n"); |
| 1782 | seq_printf(s, "CHANNEL:\tSTATE:\n"); |
| 1783 | seq_printf(s, "--------\t------\n"); |
| 1784 | list_for_each_entry(chan, &pl08x->memcpy.channels, chan.device_node) { |
Russell King - ARM Linux | 3e2a037 | 2011-01-03 22:32:46 +0000 | [diff] [blame] | 1785 | seq_printf(s, "%s\t\t%s\n", chan->name, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1786 | pl08x_state_str(chan->state)); |
| 1787 | } |
| 1788 | |
| 1789 | seq_printf(s, "\nPL08x virtual slave channels:\n"); |
| 1790 | seq_printf(s, "CHANNEL:\tSTATE:\n"); |
| 1791 | seq_printf(s, "--------\t------\n"); |
| 1792 | list_for_each_entry(chan, &pl08x->slave.channels, chan.device_node) { |
Russell King - ARM Linux | 3e2a037 | 2011-01-03 22:32:46 +0000 | [diff] [blame] | 1793 | seq_printf(s, "%s\t\t%s\n", chan->name, |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1794 | pl08x_state_str(chan->state)); |
| 1795 | } |
| 1796 | |
| 1797 | return 0; |
| 1798 | } |
| 1799 | |
| 1800 | static int pl08x_debugfs_open(struct inode *inode, struct file *file) |
| 1801 | { |
| 1802 | return single_open(file, pl08x_debugfs_show, inode->i_private); |
| 1803 | } |
| 1804 | |
| 1805 | static const struct file_operations pl08x_debugfs_operations = { |
| 1806 | .open = pl08x_debugfs_open, |
| 1807 | .read = seq_read, |
| 1808 | .llseek = seq_lseek, |
| 1809 | .release = single_release, |
| 1810 | }; |
| 1811 | |
| 1812 | static void init_pl08x_debugfs(struct pl08x_driver_data *pl08x) |
| 1813 | { |
| 1814 | /* Expose a simple debugfs interface to view all clocks */ |
Viresh Kumar | 3e27ee8 | 2011-08-05 15:32:27 +0530 | [diff] [blame] | 1815 | (void) debugfs_create_file(dev_name(&pl08x->adev->dev), |
| 1816 | S_IFREG | S_IRUGO, NULL, pl08x, |
| 1817 | &pl08x_debugfs_operations); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1818 | } |
| 1819 | |
| 1820 | #else |
| 1821 | static inline void init_pl08x_debugfs(struct pl08x_driver_data *pl08x) |
| 1822 | { |
| 1823 | } |
| 1824 | #endif |
| 1825 | |
Russell King | aa25afa | 2011-02-19 15:55:00 +0000 | [diff] [blame] | 1826 | static int pl08x_probe(struct amba_device *adev, const struct amba_id *id) |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1827 | { |
| 1828 | struct pl08x_driver_data *pl08x; |
Russell King - ARM Linux | f96ca9ec | 2011-01-03 22:35:08 +0000 | [diff] [blame] | 1829 | const struct vendor_data *vd = id->data; |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1830 | int ret = 0; |
| 1831 | int i; |
| 1832 | |
| 1833 | ret = amba_request_regions(adev, NULL); |
| 1834 | if (ret) |
| 1835 | return ret; |
| 1836 | |
| 1837 | /* Create the driver state holder */ |
Viresh Kumar | b201c11 | 2011-08-05 15:32:29 +0530 | [diff] [blame] | 1838 | pl08x = kzalloc(sizeof(*pl08x), GFP_KERNEL); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1839 | if (!pl08x) { |
| 1840 | ret = -ENOMEM; |
| 1841 | goto out_no_pl08x; |
| 1842 | } |
| 1843 | |
Viresh Kumar | b7b6018 | 2011-08-05 15:32:33 +0530 | [diff] [blame] | 1844 | pm_runtime_set_active(&adev->dev); |
| 1845 | pm_runtime_enable(&adev->dev); |
| 1846 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1847 | /* Initialize memcpy engine */ |
| 1848 | dma_cap_set(DMA_MEMCPY, pl08x->memcpy.cap_mask); |
| 1849 | pl08x->memcpy.dev = &adev->dev; |
| 1850 | pl08x->memcpy.device_alloc_chan_resources = pl08x_alloc_chan_resources; |
| 1851 | pl08x->memcpy.device_free_chan_resources = pl08x_free_chan_resources; |
| 1852 | pl08x->memcpy.device_prep_dma_memcpy = pl08x_prep_dma_memcpy; |
| 1853 | pl08x->memcpy.device_prep_dma_interrupt = pl08x_prep_dma_interrupt; |
| 1854 | pl08x->memcpy.device_tx_status = pl08x_dma_tx_status; |
| 1855 | pl08x->memcpy.device_issue_pending = pl08x_issue_pending; |
| 1856 | pl08x->memcpy.device_control = pl08x_control; |
| 1857 | |
| 1858 | /* Initialize slave engine */ |
| 1859 | dma_cap_set(DMA_SLAVE, pl08x->slave.cap_mask); |
| 1860 | pl08x->slave.dev = &adev->dev; |
| 1861 | pl08x->slave.device_alloc_chan_resources = pl08x_alloc_chan_resources; |
| 1862 | pl08x->slave.device_free_chan_resources = pl08x_free_chan_resources; |
| 1863 | pl08x->slave.device_prep_dma_interrupt = pl08x_prep_dma_interrupt; |
| 1864 | pl08x->slave.device_tx_status = pl08x_dma_tx_status; |
| 1865 | pl08x->slave.device_issue_pending = pl08x_issue_pending; |
| 1866 | pl08x->slave.device_prep_slave_sg = pl08x_prep_slave_sg; |
| 1867 | pl08x->slave.device_control = pl08x_control; |
| 1868 | |
| 1869 | /* Get the platform data */ |
| 1870 | pl08x->pd = dev_get_platdata(&adev->dev); |
| 1871 | if (!pl08x->pd) { |
| 1872 | dev_err(&adev->dev, "no platform data supplied\n"); |
| 1873 | goto out_no_platdata; |
| 1874 | } |
| 1875 | |
| 1876 | /* Assign useful pointers to the driver state */ |
| 1877 | pl08x->adev = adev; |
| 1878 | pl08x->vd = vd; |
| 1879 | |
Russell King - ARM Linux | 30749cb | 2011-01-03 22:41:13 +0000 | [diff] [blame] | 1880 | /* By default, AHB1 only. If dualmaster, from platform */ |
| 1881 | pl08x->lli_buses = PL08X_AHB1; |
| 1882 | pl08x->mem_buses = PL08X_AHB1; |
| 1883 | if (pl08x->vd->dualmaster) { |
| 1884 | pl08x->lli_buses = pl08x->pd->lli_buses; |
| 1885 | pl08x->mem_buses = pl08x->pd->mem_buses; |
| 1886 | } |
| 1887 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1888 | /* A DMA memory pool for LLIs, align on 1-byte boundary */ |
| 1889 | pl08x->pool = dma_pool_create(DRIVER_NAME, &pl08x->adev->dev, |
| 1890 | PL08X_LLI_TSFR_SIZE, PL08X_ALIGN, 0); |
| 1891 | if (!pl08x->pool) { |
| 1892 | ret = -ENOMEM; |
| 1893 | goto out_no_lli_pool; |
| 1894 | } |
| 1895 | |
| 1896 | spin_lock_init(&pl08x->lock); |
| 1897 | |
| 1898 | pl08x->base = ioremap(adev->res.start, resource_size(&adev->res)); |
| 1899 | if (!pl08x->base) { |
| 1900 | ret = -ENOMEM; |
| 1901 | goto out_no_ioremap; |
| 1902 | } |
| 1903 | |
| 1904 | /* Turn on the PL08x */ |
| 1905 | pl08x_ensure_on(pl08x); |
| 1906 | |
Russell King - ARM Linux | 94ae852 | 2011-01-16 20:18:05 +0000 | [diff] [blame] | 1907 | /* Attach the interrupt handler */ |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1908 | writel(0x000000FF, pl08x->base + PL080_ERR_CLEAR); |
| 1909 | writel(0x000000FF, pl08x->base + PL080_TC_CLEAR); |
| 1910 | |
| 1911 | ret = request_irq(adev->irq[0], pl08x_irq, IRQF_DISABLED, |
Russell King - ARM Linux | b05cd8f | 2011-01-03 22:33:26 +0000 | [diff] [blame] | 1912 | DRIVER_NAME, pl08x); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1913 | if (ret) { |
| 1914 | dev_err(&adev->dev, "%s failed to request interrupt %d\n", |
| 1915 | __func__, adev->irq[0]); |
| 1916 | goto out_no_irq; |
| 1917 | } |
| 1918 | |
| 1919 | /* Initialize physical channels */ |
Viresh Kumar | b201c11 | 2011-08-05 15:32:29 +0530 | [diff] [blame] | 1920 | pl08x->phy_chans = kmalloc((vd->channels * sizeof(*pl08x->phy_chans)), |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1921 | GFP_KERNEL); |
| 1922 | if (!pl08x->phy_chans) { |
| 1923 | dev_err(&adev->dev, "%s failed to allocate " |
| 1924 | "physical channel holders\n", |
| 1925 | __func__); |
| 1926 | goto out_no_phychans; |
| 1927 | } |
| 1928 | |
| 1929 | for (i = 0; i < vd->channels; i++) { |
| 1930 | struct pl08x_phy_chan *ch = &pl08x->phy_chans[i]; |
| 1931 | |
| 1932 | ch->id = i; |
| 1933 | ch->base = pl08x->base + PL080_Cx_BASE(i); |
| 1934 | spin_lock_init(&ch->lock); |
| 1935 | ch->serving = NULL; |
| 1936 | ch->signal = -1; |
Viresh Kumar | 175a5e6 | 2011-08-05 15:32:32 +0530 | [diff] [blame] | 1937 | dev_dbg(&adev->dev, "physical channel %d is %s\n", |
| 1938 | i, pl08x_phy_channel_busy(ch) ? "BUSY" : "FREE"); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1939 | } |
| 1940 | |
| 1941 | /* Register as many memcpy channels as there are physical channels */ |
| 1942 | ret = pl08x_dma_init_virtual_channels(pl08x, &pl08x->memcpy, |
| 1943 | pl08x->vd->channels, false); |
| 1944 | if (ret <= 0) { |
| 1945 | dev_warn(&pl08x->adev->dev, |
| 1946 | "%s failed to enumerate memcpy channels - %d\n", |
| 1947 | __func__, ret); |
| 1948 | goto out_no_memcpy; |
| 1949 | } |
| 1950 | pl08x->memcpy.chancnt = ret; |
| 1951 | |
| 1952 | /* Register slave channels */ |
| 1953 | ret = pl08x_dma_init_virtual_channels(pl08x, &pl08x->slave, |
Viresh Kumar | 3e27ee8 | 2011-08-05 15:32:27 +0530 | [diff] [blame] | 1954 | pl08x->pd->num_slave_channels, true); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1955 | if (ret <= 0) { |
| 1956 | dev_warn(&pl08x->adev->dev, |
| 1957 | "%s failed to enumerate slave channels - %d\n", |
| 1958 | __func__, ret); |
| 1959 | goto out_no_slave; |
| 1960 | } |
| 1961 | pl08x->slave.chancnt = ret; |
| 1962 | |
| 1963 | ret = dma_async_device_register(&pl08x->memcpy); |
| 1964 | if (ret) { |
| 1965 | dev_warn(&pl08x->adev->dev, |
| 1966 | "%s failed to register memcpy as an async device - %d\n", |
| 1967 | __func__, ret); |
| 1968 | goto out_no_memcpy_reg; |
| 1969 | } |
| 1970 | |
| 1971 | ret = dma_async_device_register(&pl08x->slave); |
| 1972 | if (ret) { |
| 1973 | dev_warn(&pl08x->adev->dev, |
| 1974 | "%s failed to register slave as an async device - %d\n", |
| 1975 | __func__, ret); |
| 1976 | goto out_no_slave_reg; |
| 1977 | } |
| 1978 | |
| 1979 | amba_set_drvdata(adev, pl08x); |
| 1980 | init_pl08x_debugfs(pl08x); |
Russell King - ARM Linux | b05cd8f | 2011-01-03 22:33:26 +0000 | [diff] [blame] | 1981 | dev_info(&pl08x->adev->dev, "DMA: PL%03x rev%u at 0x%08llx irq %d\n", |
| 1982 | amba_part(adev), amba_rev(adev), |
| 1983 | (unsigned long long)adev->res.start, adev->irq[0]); |
Viresh Kumar | b7b6018 | 2011-08-05 15:32:33 +0530 | [diff] [blame] | 1984 | |
| 1985 | pm_runtime_put(&adev->dev); |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 1986 | return 0; |
| 1987 | |
| 1988 | out_no_slave_reg: |
| 1989 | dma_async_device_unregister(&pl08x->memcpy); |
| 1990 | out_no_memcpy_reg: |
| 1991 | pl08x_free_virtual_channels(&pl08x->slave); |
| 1992 | out_no_slave: |
| 1993 | pl08x_free_virtual_channels(&pl08x->memcpy); |
| 1994 | out_no_memcpy: |
| 1995 | kfree(pl08x->phy_chans); |
| 1996 | out_no_phychans: |
| 1997 | free_irq(adev->irq[0], pl08x); |
| 1998 | out_no_irq: |
| 1999 | iounmap(pl08x->base); |
| 2000 | out_no_ioremap: |
| 2001 | dma_pool_destroy(pl08x->pool); |
| 2002 | out_no_lli_pool: |
| 2003 | out_no_platdata: |
Viresh Kumar | b7b6018 | 2011-08-05 15:32:33 +0530 | [diff] [blame] | 2004 | pm_runtime_put(&adev->dev); |
| 2005 | pm_runtime_disable(&adev->dev); |
| 2006 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 2007 | kfree(pl08x); |
| 2008 | out_no_pl08x: |
| 2009 | amba_release_regions(adev); |
| 2010 | return ret; |
| 2011 | } |
| 2012 | |
| 2013 | /* PL080 has 8 channels and the PL080 have just 2 */ |
| 2014 | static struct vendor_data vendor_pl080 = { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 2015 | .channels = 8, |
| 2016 | .dualmaster = true, |
| 2017 | }; |
| 2018 | |
| 2019 | static struct vendor_data vendor_pl081 = { |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 2020 | .channels = 2, |
| 2021 | .dualmaster = false, |
| 2022 | }; |
| 2023 | |
| 2024 | static struct amba_id pl08x_ids[] = { |
| 2025 | /* PL080 */ |
| 2026 | { |
| 2027 | .id = 0x00041080, |
| 2028 | .mask = 0x000fffff, |
| 2029 | .data = &vendor_pl080, |
| 2030 | }, |
| 2031 | /* PL081 */ |
| 2032 | { |
| 2033 | .id = 0x00041081, |
| 2034 | .mask = 0x000fffff, |
| 2035 | .data = &vendor_pl081, |
| 2036 | }, |
| 2037 | /* Nomadik 8815 PL080 variant */ |
| 2038 | { |
| 2039 | .id = 0x00280880, |
| 2040 | .mask = 0x00ffffff, |
| 2041 | .data = &vendor_pl080, |
| 2042 | }, |
| 2043 | { 0, 0 }, |
| 2044 | }; |
| 2045 | |
Dave Martin | 037566d | 2011-10-05 15:15:20 +0100 | [diff] [blame] | 2046 | MODULE_DEVICE_TABLE(amba, pl08x_ids); |
| 2047 | |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 2048 | static struct amba_driver pl08x_amba_driver = { |
| 2049 | .drv.name = DRIVER_NAME, |
| 2050 | .id_table = pl08x_ids, |
| 2051 | .probe = pl08x_probe, |
| 2052 | }; |
| 2053 | |
| 2054 | static int __init pl08x_init(void) |
| 2055 | { |
| 2056 | int retval; |
| 2057 | retval = amba_driver_register(&pl08x_amba_driver); |
| 2058 | if (retval) |
| 2059 | printk(KERN_WARNING DRIVER_NAME |
Russell King - ARM Linux | e8b5e11 | 2011-01-03 22:30:24 +0000 | [diff] [blame] | 2060 | "failed to register as an AMBA device (%d)\n", |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 2061 | retval); |
| 2062 | return retval; |
| 2063 | } |
| 2064 | subsys_initcall(pl08x_init); |