Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2006 Dave Airlie <airlied@linux.ie> |
| 3 | * Copyright © 2006-2009 Intel Corporation |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * Jesse Barnes <jesse.barnes@intel.com> |
| 27 | */ |
| 28 | |
| 29 | #include <linux/i2c.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 30 | #include <linux/slab.h> |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 31 | #include <linux/delay.h> |
| 32 | #include "drmP.h" |
| 33 | #include "drm.h" |
| 34 | #include "drm_crtc.h" |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 35 | #include "drm_edid.h" |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 36 | #include "intel_drv.h" |
| 37 | #include "i915_drm.h" |
| 38 | #include "i915_drv.h" |
| 39 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 40 | struct intel_hdmi { |
| 41 | struct intel_encoder base; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 42 | u32 sdvox_reg; |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 43 | int ddc_bus; |
Chris Wilson | e953fd7 | 2011-02-21 22:23:52 +0000 | [diff] [blame] | 44 | uint32_t color_range; |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 45 | bool has_hdmi_sink; |
Zhenyu Wang | 2e3d600 | 2010-09-10 10:39:40 +0800 | [diff] [blame] | 46 | bool has_audio; |
Wu Fengguang | b1d7e4b | 2012-02-14 11:45:36 +0800 | [diff] [blame] | 47 | enum hdmi_force_audio force_audio; |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 48 | void (*write_infoframe)(struct drm_encoder *encoder, |
| 49 | struct dip_infoframe *frame); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 50 | }; |
| 51 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 52 | static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder) |
| 53 | { |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 54 | return container_of(encoder, struct intel_hdmi, base.base); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 55 | } |
| 56 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 57 | static struct intel_hdmi *intel_attached_hdmi(struct drm_connector *connector) |
| 58 | { |
| 59 | return container_of(intel_attached_encoder(connector), |
| 60 | struct intel_hdmi, base); |
| 61 | } |
| 62 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 63 | void intel_dip_infoframe_csum(struct dip_infoframe *frame) |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 64 | { |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 65 | uint8_t *data = (uint8_t *)frame; |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 66 | uint8_t sum = 0; |
| 67 | unsigned i; |
| 68 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 69 | frame->checksum = 0; |
| 70 | frame->ecc = 0; |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 71 | |
Jesse Barnes | 64a8fc0 | 2011-09-22 11:16:00 +0530 | [diff] [blame] | 72 | for (i = 0; i < frame->len + DIP_HEADER_SIZE; i++) |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 73 | sum += data[i]; |
| 74 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 75 | frame->checksum = 0x100 - sum; |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 76 | } |
| 77 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 78 | static u32 intel_infoframe_index(struct dip_infoframe *frame) |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 79 | { |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 80 | u32 flags = 0; |
| 81 | |
| 82 | switch (frame->type) { |
| 83 | case DIP_TYPE_AVI: |
| 84 | flags |= VIDEO_DIP_SELECT_AVI; |
| 85 | break; |
| 86 | case DIP_TYPE_SPD: |
| 87 | flags |= VIDEO_DIP_SELECT_SPD; |
| 88 | break; |
| 89 | default: |
| 90 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type); |
| 91 | break; |
| 92 | } |
| 93 | |
| 94 | return flags; |
| 95 | } |
| 96 | |
| 97 | static u32 intel_infoframe_flags(struct dip_infoframe *frame) |
| 98 | { |
| 99 | u32 flags = 0; |
| 100 | |
| 101 | switch (frame->type) { |
| 102 | case DIP_TYPE_AVI: |
| 103 | flags |= VIDEO_DIP_ENABLE_AVI | VIDEO_DIP_FREQ_VSYNC; |
| 104 | break; |
| 105 | case DIP_TYPE_SPD: |
Jesse Barnes | 64a8fc0 | 2011-09-22 11:16:00 +0530 | [diff] [blame] | 106 | flags |= VIDEO_DIP_ENABLE_SPD | VIDEO_DIP_FREQ_VSYNC; |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 107 | break; |
| 108 | default: |
| 109 | DRM_DEBUG_DRIVER("unknown info frame type %d\n", frame->type); |
| 110 | break; |
| 111 | } |
| 112 | |
| 113 | return flags; |
| 114 | } |
| 115 | |
| 116 | static void i9xx_write_infoframe(struct drm_encoder *encoder, |
| 117 | struct dip_infoframe *frame) |
| 118 | { |
| 119 | uint32_t *data = (uint32_t *)frame; |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 120 | struct drm_device *dev = encoder->dev; |
| 121 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 122 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 123 | u32 port, flags, val = I915_READ(VIDEO_DIP_CTL); |
| 124 | unsigned i, len = DIP_HEADER_SIZE + frame->len; |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 125 | |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 126 | |
| 127 | /* XXX first guess at handling video port, is this corrent? */ |
| 128 | if (intel_hdmi->sdvox_reg == SDVOB) |
| 129 | port = VIDEO_DIP_PORT_B; |
| 130 | else if (intel_hdmi->sdvox_reg == SDVOC) |
| 131 | port = VIDEO_DIP_PORT_C; |
| 132 | else |
| 133 | return; |
| 134 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 135 | flags = intel_infoframe_index(frame); |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 136 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 137 | val &= ~VIDEO_DIP_SELECT_MASK; |
| 138 | |
| 139 | I915_WRITE(VIDEO_DIP_CTL, val | port | flags); |
| 140 | |
| 141 | for (i = 0; i < len; i += 4) { |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 142 | I915_WRITE(VIDEO_DIP_DATA, *data); |
| 143 | data++; |
| 144 | } |
| 145 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 146 | flags |= intel_infoframe_flags(frame); |
| 147 | |
| 148 | I915_WRITE(VIDEO_DIP_CTL, VIDEO_DIP_ENABLE | val | port | flags); |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 149 | } |
| 150 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 151 | static void ironlake_write_infoframe(struct drm_encoder *encoder, |
| 152 | struct dip_infoframe *frame) |
| 153 | { |
| 154 | uint32_t *data = (uint32_t *)frame; |
| 155 | struct drm_device *dev = encoder->dev; |
| 156 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 157 | struct drm_crtc *crtc = encoder->crtc; |
| 158 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
| 159 | int reg = TVIDEO_DIP_CTL(intel_crtc->pipe); |
| 160 | unsigned i, len = DIP_HEADER_SIZE + frame->len; |
| 161 | u32 flags, val = I915_READ(reg); |
| 162 | |
| 163 | intel_wait_for_vblank(dev, intel_crtc->pipe); |
| 164 | |
| 165 | flags = intel_infoframe_index(frame); |
| 166 | |
Jesse Barnes | 64a8fc0 | 2011-09-22 11:16:00 +0530 | [diff] [blame] | 167 | val &= ~(VIDEO_DIP_SELECT_MASK | 0xf); /* clear DIP data offset */ |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 168 | |
Jesse Barnes | 64a8fc0 | 2011-09-22 11:16:00 +0530 | [diff] [blame] | 169 | I915_WRITE(reg, VIDEO_DIP_ENABLE | val | flags); |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 170 | |
| 171 | for (i = 0; i < len; i += 4) { |
| 172 | I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); |
| 173 | data++; |
| 174 | } |
| 175 | |
| 176 | flags |= intel_infoframe_flags(frame); |
| 177 | |
| 178 | I915_WRITE(reg, VIDEO_DIP_ENABLE | val | flags); |
| 179 | } |
| 180 | static void intel_set_infoframe(struct drm_encoder *encoder, |
| 181 | struct dip_infoframe *frame) |
| 182 | { |
| 183 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
| 184 | |
| 185 | if (!intel_hdmi->has_hdmi_sink) |
| 186 | return; |
| 187 | |
| 188 | intel_dip_infoframe_csum(frame); |
| 189 | intel_hdmi->write_infoframe(encoder, frame); |
| 190 | } |
| 191 | |
| 192 | static void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder) |
Jesse Barnes | b055c8f | 2011-07-08 11:31:57 -0700 | [diff] [blame] | 193 | { |
| 194 | struct dip_infoframe avi_if = { |
| 195 | .type = DIP_TYPE_AVI, |
| 196 | .ver = DIP_VERSION_AVI, |
| 197 | .len = DIP_LEN_AVI, |
| 198 | }; |
Jesse Barnes | b055c8f | 2011-07-08 11:31:57 -0700 | [diff] [blame] | 199 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 200 | intel_set_infoframe(encoder, &avi_if); |
Jesse Barnes | b055c8f | 2011-07-08 11:31:57 -0700 | [diff] [blame] | 201 | } |
| 202 | |
Jesse Barnes | c0864cb | 2011-08-03 09:22:56 -0700 | [diff] [blame] | 203 | static void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder) |
| 204 | { |
| 205 | struct dip_infoframe spd_if; |
| 206 | |
| 207 | memset(&spd_if, 0, sizeof(spd_if)); |
| 208 | spd_if.type = DIP_TYPE_SPD; |
| 209 | spd_if.ver = DIP_VERSION_SPD; |
| 210 | spd_if.len = DIP_LEN_SPD; |
| 211 | strcpy(spd_if.body.spd.vn, "Intel"); |
| 212 | strcpy(spd_if.body.spd.pd, "Integrated gfx"); |
| 213 | spd_if.body.spd.sdi = DIP_SPD_PC; |
| 214 | |
| 215 | intel_set_infoframe(encoder, &spd_if); |
| 216 | } |
| 217 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 218 | static void intel_hdmi_mode_set(struct drm_encoder *encoder, |
| 219 | struct drm_display_mode *mode, |
| 220 | struct drm_display_mode *adjusted_mode) |
| 221 | { |
| 222 | struct drm_device *dev = encoder->dev; |
| 223 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 224 | struct drm_crtc *crtc = encoder->crtc; |
| 225 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 226 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 227 | u32 sdvox; |
| 228 | |
Adam Jackson | b599c0b | 2010-07-16 14:46:31 -0400 | [diff] [blame] | 229 | sdvox = SDVO_ENCODING_HDMI | SDVO_BORDER_ENABLE; |
Jesse Barnes | 5d4fac9 | 2011-06-24 12:19:19 -0700 | [diff] [blame] | 230 | if (!HAS_PCH_SPLIT(dev)) |
| 231 | sdvox |= intel_hdmi->color_range; |
Adam Jackson | b599c0b | 2010-07-16 14:46:31 -0400 | [diff] [blame] | 232 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
| 233 | sdvox |= SDVO_VSYNC_ACTIVE_HIGH; |
| 234 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
| 235 | sdvox |= SDVO_HSYNC_ACTIVE_HIGH; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 236 | |
Jesse Barnes | 020f670 | 2011-06-24 12:19:25 -0700 | [diff] [blame] | 237 | if (intel_crtc->bpp > 24) |
| 238 | sdvox |= COLOR_FORMAT_12bpc; |
| 239 | else |
| 240 | sdvox |= COLOR_FORMAT_8bpc; |
| 241 | |
Zhenyu Wang | 2e3d600 | 2010-09-10 10:39:40 +0800 | [diff] [blame] | 242 | /* Required on CPT */ |
| 243 | if (intel_hdmi->has_hdmi_sink && HAS_PCH_CPT(dev)) |
| 244 | sdvox |= HDMI_MODE_SELECT; |
| 245 | |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 246 | if (intel_hdmi->has_audio) { |
Wu Fengguang | e0dac65 | 2011-09-05 14:25:34 +0800 | [diff] [blame] | 247 | DRM_DEBUG_DRIVER("Enabling HDMI audio on pipe %c\n", |
| 248 | pipe_name(intel_crtc->pipe)); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 249 | sdvox |= SDVO_AUDIO_ENABLE; |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 250 | sdvox |= SDVO_NULL_PACKETS_DURING_VSYNC; |
Wu Fengguang | e0dac65 | 2011-09-05 14:25:34 +0800 | [diff] [blame] | 251 | intel_write_eld(encoder, adjusted_mode); |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 252 | } |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 253 | |
Jesse Barnes | 7577056 | 2011-10-12 09:01:58 -0700 | [diff] [blame] | 254 | if (HAS_PCH_CPT(dev)) |
| 255 | sdvox |= PORT_TRANS_SEL_CPT(intel_crtc->pipe); |
| 256 | else if (intel_crtc->pipe == 1) |
| 257 | sdvox |= SDVO_PIPE_B_SELECT; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 258 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 259 | I915_WRITE(intel_hdmi->sdvox_reg, sdvox); |
| 260 | POSTING_READ(intel_hdmi->sdvox_reg); |
David Härdeman | 3c17fe4 | 2010-09-24 21:44:32 +0200 | [diff] [blame] | 261 | |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 262 | intel_hdmi_set_avi_infoframe(encoder); |
Jesse Barnes | c0864cb | 2011-08-03 09:22:56 -0700 | [diff] [blame] | 263 | intel_hdmi_set_spd_infoframe(encoder); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 264 | } |
| 265 | |
| 266 | static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) |
| 267 | { |
| 268 | struct drm_device *dev = encoder->dev; |
| 269 | struct drm_i915_private *dev_priv = dev->dev_private; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 270 | struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 271 | u32 temp; |
Wu Fengguang | 2deed76 | 2011-12-09 20:42:20 +0800 | [diff] [blame] | 272 | u32 enable_bits = SDVO_ENABLE; |
| 273 | |
| 274 | if (intel_hdmi->has_audio) |
| 275 | enable_bits |= SDVO_AUDIO_ENABLE; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 276 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 277 | temp = I915_READ(intel_hdmi->sdvox_reg); |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 278 | |
| 279 | /* HW workaround, need to toggle enable bit off and on for 12bpc, but |
| 280 | * we do this anyway which shows more stable in testing. |
| 281 | */ |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 282 | if (HAS_PCH_SPLIT(dev)) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 283 | I915_WRITE(intel_hdmi->sdvox_reg, temp & ~SDVO_ENABLE); |
| 284 | POSTING_READ(intel_hdmi->sdvox_reg); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 285 | } |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 286 | |
| 287 | if (mode != DRM_MODE_DPMS_ON) { |
Wu Fengguang | 2deed76 | 2011-12-09 20:42:20 +0800 | [diff] [blame] | 288 | temp &= ~enable_bits; |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 289 | } else { |
Wu Fengguang | 2deed76 | 2011-12-09 20:42:20 +0800 | [diff] [blame] | 290 | temp |= enable_bits; |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 291 | } |
| 292 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 293 | I915_WRITE(intel_hdmi->sdvox_reg, temp); |
| 294 | POSTING_READ(intel_hdmi->sdvox_reg); |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 295 | |
| 296 | /* HW workaround, need to write this twice for issue that may result |
| 297 | * in first write getting masked. |
| 298 | */ |
Eric Anholt | c619eed | 2010-01-28 16:45:52 -0800 | [diff] [blame] | 299 | if (HAS_PCH_SPLIT(dev)) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 300 | I915_WRITE(intel_hdmi->sdvox_reg, temp); |
| 301 | POSTING_READ(intel_hdmi->sdvox_reg); |
Zhenyu Wang | d8a2d0e | 2009-11-02 07:52:30 +0000 | [diff] [blame] | 302 | } |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 303 | } |
| 304 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 305 | static int intel_hdmi_mode_valid(struct drm_connector *connector, |
| 306 | struct drm_display_mode *mode) |
| 307 | { |
| 308 | if (mode->clock > 165000) |
| 309 | return MODE_CLOCK_HIGH; |
| 310 | if (mode->clock < 20000) |
Nicolas Kaiser | 5cbba41 | 2011-05-30 12:48:26 +0200 | [diff] [blame] | 311 | return MODE_CLOCK_LOW; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 312 | |
| 313 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
| 314 | return MODE_NO_DBLESCAN; |
| 315 | |
| 316 | return MODE_OK; |
| 317 | } |
| 318 | |
| 319 | static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder, |
| 320 | struct drm_display_mode *mode, |
| 321 | struct drm_display_mode *adjusted_mode) |
| 322 | { |
| 323 | return true; |
| 324 | } |
| 325 | |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 326 | static enum drm_connector_status |
Chris Wilson | 930a9e2 | 2010-09-14 11:07:23 +0100 | [diff] [blame] | 327 | intel_hdmi_detect(struct drm_connector *connector, bool force) |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 328 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 329 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 330 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
| 331 | struct edid *edid; |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 332 | enum drm_connector_status status = connector_status_disconnected; |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 333 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 334 | intel_hdmi->has_hdmi_sink = false; |
Zhenyu Wang | 2e3d600 | 2010-09-10 10:39:40 +0800 | [diff] [blame] | 335 | intel_hdmi->has_audio = false; |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 336 | edid = drm_get_edid(connector, |
| 337 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); |
ling.ma@intel.com | 2ded9e2 | 2009-07-16 17:23:09 +0800 | [diff] [blame] | 338 | |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 339 | if (edid) { |
Eric Anholt | be9f1c4 | 2009-06-21 22:14:55 -0700 | [diff] [blame] | 340 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 341 | status = connector_status_connected; |
Wu Fengguang | b1d7e4b | 2012-02-14 11:45:36 +0800 | [diff] [blame] | 342 | if (intel_hdmi->force_audio != HDMI_AUDIO_OFF_DVI) |
| 343 | intel_hdmi->has_hdmi_sink = |
| 344 | drm_detect_hdmi_monitor(edid); |
Zhenyu Wang | 2e3d600 | 2010-09-10 10:39:40 +0800 | [diff] [blame] | 345 | intel_hdmi->has_audio = drm_detect_monitor_audio(edid); |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 346 | } |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 347 | connector->display_info.raw_edid = NULL; |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 348 | kfree(edid); |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 349 | } |
ling.ma@intel.com | 2ded9e2 | 2009-07-16 17:23:09 +0800 | [diff] [blame] | 350 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 351 | if (status == connector_status_connected) { |
Wu Fengguang | b1d7e4b | 2012-02-14 11:45:36 +0800 | [diff] [blame] | 352 | if (intel_hdmi->force_audio != HDMI_AUDIO_AUTO) |
| 353 | intel_hdmi->has_audio = |
| 354 | (intel_hdmi->force_audio == HDMI_AUDIO_ON); |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 355 | } |
| 356 | |
Keith Packard | aa93d63 | 2009-05-05 09:52:46 -0700 | [diff] [blame] | 357 | return status; |
Ma Ling | 9dff6af | 2009-04-02 13:13:26 +0800 | [diff] [blame] | 358 | } |
| 359 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 360 | static int intel_hdmi_get_modes(struct drm_connector *connector) |
| 361 | { |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 362 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 363 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 364 | |
| 365 | /* We should parse the EDID data and find out if it's an HDMI sink so |
| 366 | * we can send audio to it. |
| 367 | */ |
| 368 | |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 369 | return intel_ddc_get_modes(connector, |
| 370 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 371 | } |
| 372 | |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 373 | static bool |
| 374 | intel_hdmi_detect_audio(struct drm_connector *connector) |
| 375 | { |
| 376 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
| 377 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
| 378 | struct edid *edid; |
| 379 | bool has_audio = false; |
| 380 | |
| 381 | edid = drm_get_edid(connector, |
| 382 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); |
| 383 | if (edid) { |
| 384 | if (edid->input & DRM_EDID_INPUT_DIGITAL) |
| 385 | has_audio = drm_detect_monitor_audio(edid); |
| 386 | |
| 387 | connector->display_info.raw_edid = NULL; |
| 388 | kfree(edid); |
| 389 | } |
| 390 | |
| 391 | return has_audio; |
| 392 | } |
| 393 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 394 | static int |
| 395 | intel_hdmi_set_property(struct drm_connector *connector, |
| 396 | struct drm_property *property, |
| 397 | uint64_t val) |
| 398 | { |
| 399 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); |
Chris Wilson | e953fd7 | 2011-02-21 22:23:52 +0000 | [diff] [blame] | 400 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 401 | int ret; |
| 402 | |
| 403 | ret = drm_connector_property_set_value(connector, property, val); |
| 404 | if (ret) |
| 405 | return ret; |
| 406 | |
Chris Wilson | 3f43c48 | 2011-05-12 22:17:24 +0100 | [diff] [blame] | 407 | if (property == dev_priv->force_audio_property) { |
Wu Fengguang | b1d7e4b | 2012-02-14 11:45:36 +0800 | [diff] [blame] | 408 | enum hdmi_force_audio i = val; |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 409 | bool has_audio; |
| 410 | |
| 411 | if (i == intel_hdmi->force_audio) |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 412 | return 0; |
| 413 | |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 414 | intel_hdmi->force_audio = i; |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 415 | |
Wu Fengguang | b1d7e4b | 2012-02-14 11:45:36 +0800 | [diff] [blame] | 416 | if (i == HDMI_AUDIO_AUTO) |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 417 | has_audio = intel_hdmi_detect_audio(connector); |
| 418 | else |
Wu Fengguang | b1d7e4b | 2012-02-14 11:45:36 +0800 | [diff] [blame] | 419 | has_audio = (i == HDMI_AUDIO_ON); |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 420 | |
Wu Fengguang | b1d7e4b | 2012-02-14 11:45:36 +0800 | [diff] [blame] | 421 | if (i == HDMI_AUDIO_OFF_DVI) |
| 422 | intel_hdmi->has_hdmi_sink = 0; |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 423 | |
Chris Wilson | 1aad7ac | 2011-02-09 18:46:58 +0000 | [diff] [blame] | 424 | intel_hdmi->has_audio = has_audio; |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 425 | goto done; |
| 426 | } |
| 427 | |
Chris Wilson | e953fd7 | 2011-02-21 22:23:52 +0000 | [diff] [blame] | 428 | if (property == dev_priv->broadcast_rgb_property) { |
| 429 | if (val == !!intel_hdmi->color_range) |
| 430 | return 0; |
| 431 | |
| 432 | intel_hdmi->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0; |
| 433 | goto done; |
| 434 | } |
| 435 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 436 | return -EINVAL; |
| 437 | |
| 438 | done: |
| 439 | if (intel_hdmi->base.base.crtc) { |
| 440 | struct drm_crtc *crtc = intel_hdmi->base.base.crtc; |
| 441 | drm_crtc_helper_set_mode(crtc, &crtc->mode, |
| 442 | crtc->x, crtc->y, |
| 443 | crtc->fb); |
| 444 | } |
| 445 | |
| 446 | return 0; |
| 447 | } |
| 448 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 449 | static void intel_hdmi_destroy(struct drm_connector *connector) |
| 450 | { |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 451 | drm_sysfs_connector_remove(connector); |
| 452 | drm_connector_cleanup(connector); |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 453 | kfree(connector); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 454 | } |
| 455 | |
| 456 | static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = { |
| 457 | .dpms = intel_hdmi_dpms, |
| 458 | .mode_fixup = intel_hdmi_mode_fixup, |
| 459 | .prepare = intel_encoder_prepare, |
| 460 | .mode_set = intel_hdmi_mode_set, |
| 461 | .commit = intel_encoder_commit, |
| 462 | }; |
| 463 | |
| 464 | static const struct drm_connector_funcs intel_hdmi_connector_funcs = { |
Keith Packard | c9fb15f | 2009-05-30 20:42:28 -0700 | [diff] [blame] | 465 | .dpms = drm_helper_connector_dpms, |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 466 | .detect = intel_hdmi_detect, |
| 467 | .fill_modes = drm_helper_probe_single_connector_modes, |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 468 | .set_property = intel_hdmi_set_property, |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 469 | .destroy = intel_hdmi_destroy, |
| 470 | }; |
| 471 | |
| 472 | static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = { |
| 473 | .get_modes = intel_hdmi_get_modes, |
| 474 | .mode_valid = intel_hdmi_mode_valid, |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 475 | .best_encoder = intel_best_encoder, |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 476 | }; |
| 477 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 478 | static const struct drm_encoder_funcs intel_hdmi_enc_funcs = { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 479 | .destroy = intel_encoder_destroy, |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 480 | }; |
| 481 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 482 | static void |
| 483 | intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector) |
| 484 | { |
Chris Wilson | 3f43c48 | 2011-05-12 22:17:24 +0100 | [diff] [blame] | 485 | intel_attach_force_audio_property(connector); |
Chris Wilson | e953fd7 | 2011-02-21 22:23:52 +0000 | [diff] [blame] | 486 | intel_attach_broadcast_rgb_property(connector); |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 487 | } |
| 488 | |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 489 | void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) |
| 490 | { |
| 491 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 492 | struct drm_connector *connector; |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 493 | struct intel_encoder *intel_encoder; |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 494 | struct intel_connector *intel_connector; |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 495 | struct intel_hdmi *intel_hdmi; |
Jesse Barnes | 64a8fc0 | 2011-09-22 11:16:00 +0530 | [diff] [blame] | 496 | int i; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 497 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 498 | intel_hdmi = kzalloc(sizeof(struct intel_hdmi), GFP_KERNEL); |
| 499 | if (!intel_hdmi) |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 500 | return; |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 501 | |
| 502 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
| 503 | if (!intel_connector) { |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 504 | kfree(intel_hdmi); |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 505 | return; |
| 506 | } |
| 507 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 508 | intel_encoder = &intel_hdmi->base; |
Chris Wilson | 373a3cf | 2010-09-15 12:03:59 +0100 | [diff] [blame] | 509 | drm_encoder_init(dev, &intel_encoder->base, &intel_hdmi_enc_funcs, |
| 510 | DRM_MODE_ENCODER_TMDS); |
| 511 | |
Zhenyu Wang | 674e2d0 | 2010-03-29 15:57:42 +0800 | [diff] [blame] | 512 | connector = &intel_connector->base; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 513 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, |
Adam Jackson | 8d91104 | 2009-09-23 15:08:29 -0400 | [diff] [blame] | 514 | DRM_MODE_CONNECTOR_HDMIA); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 515 | drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); |
| 516 | |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 517 | intel_encoder->type = INTEL_OUTPUT_HDMI; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 518 | |
Dave Airlie | eb1f8e4 | 2010-05-07 06:42:51 +0000 | [diff] [blame] | 519 | connector->polled = DRM_CONNECTOR_POLL_HPD; |
Peter Ross | c3febcc | 2012-01-28 14:49:26 +0100 | [diff] [blame] | 520 | connector->interlace_allowed = 1; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 521 | connector->doublescan_allowed = 0; |
Jesse Barnes | 27f8227 | 2011-09-02 12:54:37 -0700 | [diff] [blame] | 522 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 523 | |
| 524 | /* Set up the DDC bus. */ |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 525 | if (sdvox_reg == SDVOB) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 526 | intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 527 | intel_hdmi->ddc_bus = GMBUS_PORT_DPB; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 528 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 529 | } else if (sdvox_reg == SDVOC) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 530 | intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 531 | intel_hdmi->ddc_bus = GMBUS_PORT_DPC; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 532 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 533 | } else if (sdvox_reg == HDMIB) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 534 | intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 535 | intel_hdmi->ddc_bus = GMBUS_PORT_DPB; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 536 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 537 | } else if (sdvox_reg == HDMIC) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 538 | intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 539 | intel_hdmi->ddc_bus = GMBUS_PORT_DPC; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 540 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 541 | } else if (sdvox_reg == HDMID) { |
Eric Anholt | 21d40d3 | 2010-03-25 11:11:14 -0700 | [diff] [blame] | 542 | intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); |
Chris Wilson | f899fc6 | 2010-07-20 15:44:45 -0700 | [diff] [blame] | 543 | intel_hdmi->ddc_bus = GMBUS_PORT_DPD; |
Jesse Barnes | b01f2c3 | 2009-12-11 11:07:17 -0800 | [diff] [blame] | 544 | dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS; |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 545 | } |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 546 | |
Chris Wilson | ea5b213 | 2010-08-04 13:50:23 +0100 | [diff] [blame] | 547 | intel_hdmi->sdvox_reg = sdvox_reg; |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 548 | |
Jesse Barnes | 64a8fc0 | 2011-09-22 11:16:00 +0530 | [diff] [blame] | 549 | if (!HAS_PCH_SPLIT(dev)) { |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 550 | intel_hdmi->write_infoframe = i9xx_write_infoframe; |
Jesse Barnes | 64a8fc0 | 2011-09-22 11:16:00 +0530 | [diff] [blame] | 551 | I915_WRITE(VIDEO_DIP_CTL, 0); |
| 552 | } else { |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 553 | intel_hdmi->write_infoframe = ironlake_write_infoframe; |
Jesse Barnes | 64a8fc0 | 2011-09-22 11:16:00 +0530 | [diff] [blame] | 554 | for_each_pipe(i) |
| 555 | I915_WRITE(TVIDEO_DIP_CTL(i), 0); |
| 556 | } |
Jesse Barnes | 45187ac | 2011-08-03 09:22:55 -0700 | [diff] [blame] | 557 | |
Chris Wilson | 4ef69c7 | 2010-09-09 15:14:28 +0100 | [diff] [blame] | 558 | drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 559 | |
Chris Wilson | 55b7d6e8 | 2010-09-19 09:29:33 +0100 | [diff] [blame] | 560 | intel_hdmi_add_properties(intel_hdmi, connector); |
| 561 | |
Chris Wilson | df0e924 | 2010-09-09 16:20:55 +0100 | [diff] [blame] | 562 | intel_connector_attach_encoder(intel_connector, intel_encoder); |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 563 | drm_sysfs_connector_add(connector); |
| 564 | |
| 565 | /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written |
| 566 | * 0xd. Failure to do so will result in spurious interrupts being |
| 567 | * generated on the port when a cable is not attached. |
| 568 | */ |
| 569 | if (IS_G4X(dev) && !IS_GM45(dev)) { |
| 570 | u32 temp = I915_READ(PEG_BAND_GAP_DATA); |
| 571 | I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd); |
| 572 | } |
Eric Anholt | 7d57382 | 2009-01-02 13:33:00 -0800 | [diff] [blame] | 573 | } |