blob: baae9e47bffb21fa3249843bfe391a641ce0ce61 [file] [log] [blame]
Mark Brownd2bedfe2009-07-27 14:45:52 +01001/*
2 * wm831x-core.c -- Device access for Wolfson WM831x PMICs
3 *
4 * Copyright 2009 Wolfson Microelectronics PLC.
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/module.h>
Mark Brown7e9f9fd2009-07-27 14:45:54 +010017#include <linux/bcd.h>
18#include <linux/delay.h>
Mark Brownd2bedfe2009-07-27 14:45:52 +010019#include <linux/mfd/core.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090020#include <linux/slab.h>
Mark Brownd2bedfe2009-07-27 14:45:52 +010021
22#include <linux/mfd/wm831x/core.h>
23#include <linux/mfd/wm831x/pdata.h>
Mark Brown7d4d0a32009-07-27 14:45:53 +010024#include <linux/mfd/wm831x/irq.h>
Mark Brown7e9f9fd2009-07-27 14:45:54 +010025#include <linux/mfd/wm831x/auxadc.h>
Mark Brown6704e512009-07-27 14:45:56 +010026#include <linux/mfd/wm831x/otp.h>
Mark Brown698659d2009-07-27 14:45:57 +010027#include <linux/mfd/wm831x/regulator.h>
28
29/* Current settings - values are 2*2^(reg_val/4) microamps. These are
30 * exported since they are used by multiple drivers.
31 */
Mark Brown77169772009-11-30 13:24:18 +000032int wm831x_isinkv_values[WM831X_ISINK_MAX_ISEL + 1] = {
Mark Brown698659d2009-07-27 14:45:57 +010033 2,
34 2,
35 3,
36 3,
37 4,
38 5,
39 6,
40 7,
41 8,
42 10,
43 11,
44 13,
45 16,
46 19,
47 23,
48 27,
49 32,
50 38,
51 45,
52 54,
53 64,
54 76,
55 91,
56 108,
57 128,
58 152,
59 181,
60 215,
61 256,
62 304,
63 362,
64 431,
65 512,
66 609,
67 724,
68 861,
69 1024,
70 1218,
71 1448,
72 1722,
73 2048,
74 2435,
75 2896,
76 3444,
77 4096,
78 4871,
79 5793,
80 6889,
81 8192,
82 9742,
83 11585,
84 13777,
85 16384,
86 19484,
87 23170,
88 27554,
89};
90EXPORT_SYMBOL_GPL(wm831x_isinkv_values);
Mark Brownd2bedfe2009-07-27 14:45:52 +010091
Mark Brownd2bedfe2009-07-27 14:45:52 +010092static int wm831x_reg_locked(struct wm831x *wm831x, unsigned short reg)
93{
94 if (!wm831x->locked)
95 return 0;
96
97 switch (reg) {
98 case WM831X_WATCHDOG:
99 case WM831X_DC4_CONTROL:
100 case WM831X_ON_PIN_CONTROL:
101 case WM831X_BACKUP_CHARGER_CONTROL:
102 case WM831X_CHARGER_CONTROL_1:
103 case WM831X_CHARGER_CONTROL_2:
104 return 1;
105
106 default:
107 return 0;
108 }
109}
110
111/**
112 * wm831x_reg_unlock: Unlock user keyed registers
113 *
114 * The WM831x has a user key preventing writes to particularly
115 * critical registers. This function locks those registers,
116 * allowing writes to them.
117 */
118void wm831x_reg_lock(struct wm831x *wm831x)
119{
120 int ret;
121
122 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
123 if (ret == 0) {
124 dev_vdbg(wm831x->dev, "Registers locked\n");
125
126 mutex_lock(&wm831x->io_lock);
127 WARN_ON(wm831x->locked);
128 wm831x->locked = 1;
129 mutex_unlock(&wm831x->io_lock);
130 } else {
131 dev_err(wm831x->dev, "Failed to lock registers: %d\n", ret);
132 }
133
134}
135EXPORT_SYMBOL_GPL(wm831x_reg_lock);
136
137/**
138 * wm831x_reg_unlock: Unlock user keyed registers
139 *
140 * The WM831x has a user key preventing writes to particularly
141 * critical registers. This function locks those registers,
142 * preventing spurious writes.
143 */
144int wm831x_reg_unlock(struct wm831x *wm831x)
145{
146 int ret;
147
148 /* 0x9716 is the value required to unlock the registers */
149 ret = wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0x9716);
150 if (ret == 0) {
151 dev_vdbg(wm831x->dev, "Registers unlocked\n");
152
153 mutex_lock(&wm831x->io_lock);
154 WARN_ON(!wm831x->locked);
155 wm831x->locked = 0;
156 mutex_unlock(&wm831x->io_lock);
157 }
158
159 return ret;
160}
161EXPORT_SYMBOL_GPL(wm831x_reg_unlock);
162
163static int wm831x_read(struct wm831x *wm831x, unsigned short reg,
164 int bytes, void *dest)
165{
166 int ret, i;
167 u16 *buf = dest;
168
169 BUG_ON(bytes % 2);
170 BUG_ON(bytes <= 0);
171
172 ret = wm831x->read_dev(wm831x, reg, bytes, dest);
173 if (ret < 0)
174 return ret;
175
176 for (i = 0; i < bytes / 2; i++) {
177 buf[i] = be16_to_cpu(buf[i]);
178
179 dev_vdbg(wm831x->dev, "Read %04x from R%d(0x%x)\n",
180 buf[i], reg + i, reg + i);
181 }
182
183 return 0;
184}
185
186/**
187 * wm831x_reg_read: Read a single WM831x register.
188 *
189 * @wm831x: Device to read from.
190 * @reg: Register to read.
191 */
192int wm831x_reg_read(struct wm831x *wm831x, unsigned short reg)
193{
194 unsigned short val;
195 int ret;
196
197 mutex_lock(&wm831x->io_lock);
198
199 ret = wm831x_read(wm831x, reg, 2, &val);
200
201 mutex_unlock(&wm831x->io_lock);
202
203 if (ret < 0)
204 return ret;
205 else
206 return val;
207}
208EXPORT_SYMBOL_GPL(wm831x_reg_read);
209
210/**
211 * wm831x_bulk_read: Read multiple WM831x registers
212 *
213 * @wm831x: Device to read from
214 * @reg: First register
215 * @count: Number of registers
216 * @buf: Buffer to fill.
217 */
218int wm831x_bulk_read(struct wm831x *wm831x, unsigned short reg,
219 int count, u16 *buf)
220{
221 int ret;
222
223 mutex_lock(&wm831x->io_lock);
224
225 ret = wm831x_read(wm831x, reg, count * 2, buf);
226
227 mutex_unlock(&wm831x->io_lock);
228
229 return ret;
230}
231EXPORT_SYMBOL_GPL(wm831x_bulk_read);
232
233static int wm831x_write(struct wm831x *wm831x, unsigned short reg,
234 int bytes, void *src)
235{
236 u16 *buf = src;
237 int i;
238
239 BUG_ON(bytes % 2);
240 BUG_ON(bytes <= 0);
241
242 for (i = 0; i < bytes / 2; i++) {
243 if (wm831x_reg_locked(wm831x, reg))
244 return -EPERM;
245
246 dev_vdbg(wm831x->dev, "Write %04x to R%d(0x%x)\n",
247 buf[i], reg + i, reg + i);
248
249 buf[i] = cpu_to_be16(buf[i]);
250 }
251
252 return wm831x->write_dev(wm831x, reg, bytes, src);
253}
254
255/**
256 * wm831x_reg_write: Write a single WM831x register.
257 *
258 * @wm831x: Device to write to.
259 * @reg: Register to write to.
260 * @val: Value to write.
261 */
262int wm831x_reg_write(struct wm831x *wm831x, unsigned short reg,
263 unsigned short val)
264{
265 int ret;
266
267 mutex_lock(&wm831x->io_lock);
268
269 ret = wm831x_write(wm831x, reg, 2, &val);
270
271 mutex_unlock(&wm831x->io_lock);
272
273 return ret;
274}
275EXPORT_SYMBOL_GPL(wm831x_reg_write);
276
277/**
278 * wm831x_set_bits: Set the value of a bitfield in a WM831x register
279 *
280 * @wm831x: Device to write to.
281 * @reg: Register to write to.
282 * @mask: Mask of bits to set.
283 * @val: Value to set (unshifted)
284 */
285int wm831x_set_bits(struct wm831x *wm831x, unsigned short reg,
286 unsigned short mask, unsigned short val)
287{
288 int ret;
289 u16 r;
290
291 mutex_lock(&wm831x->io_lock);
292
293 ret = wm831x_read(wm831x, reg, 2, &r);
294 if (ret < 0)
295 goto out;
296
297 r &= ~mask;
Mark Brownb00cd682011-06-20 12:25:58 +0100298 r |= val & mask;
Mark Brownd2bedfe2009-07-27 14:45:52 +0100299
300 ret = wm831x_write(wm831x, reg, 2, &r);
301
302out:
303 mutex_unlock(&wm831x->io_lock);
304
305 return ret;
306}
307EXPORT_SYMBOL_GPL(wm831x_set_bits);
308
309static struct resource wm831x_dcdc1_resources[] = {
310 {
311 .start = WM831X_DC1_CONTROL_1,
312 .end = WM831X_DC1_DVS_CONTROL,
313 .flags = IORESOURCE_IO,
314 },
315 {
316 .name = "UV",
317 .start = WM831X_IRQ_UV_DC1,
318 .end = WM831X_IRQ_UV_DC1,
319 .flags = IORESOURCE_IRQ,
320 },
321 {
322 .name = "HC",
323 .start = WM831X_IRQ_HC_DC1,
324 .end = WM831X_IRQ_HC_DC1,
325 .flags = IORESOURCE_IRQ,
326 },
327};
328
329
330static struct resource wm831x_dcdc2_resources[] = {
331 {
332 .start = WM831X_DC2_CONTROL_1,
333 .end = WM831X_DC2_DVS_CONTROL,
334 .flags = IORESOURCE_IO,
335 },
336 {
337 .name = "UV",
338 .start = WM831X_IRQ_UV_DC2,
339 .end = WM831X_IRQ_UV_DC2,
340 .flags = IORESOURCE_IRQ,
341 },
342 {
343 .name = "HC",
344 .start = WM831X_IRQ_HC_DC2,
345 .end = WM831X_IRQ_HC_DC2,
346 .flags = IORESOURCE_IRQ,
347 },
348};
349
350static struct resource wm831x_dcdc3_resources[] = {
351 {
352 .start = WM831X_DC3_CONTROL_1,
353 .end = WM831X_DC3_SLEEP_CONTROL,
354 .flags = IORESOURCE_IO,
355 },
356 {
357 .name = "UV",
358 .start = WM831X_IRQ_UV_DC3,
359 .end = WM831X_IRQ_UV_DC3,
360 .flags = IORESOURCE_IRQ,
361 },
362};
363
364static struct resource wm831x_dcdc4_resources[] = {
365 {
366 .start = WM831X_DC4_CONTROL,
367 .end = WM831X_DC4_SLEEP_CONTROL,
368 .flags = IORESOURCE_IO,
369 },
370 {
371 .name = "UV",
372 .start = WM831X_IRQ_UV_DC4,
373 .end = WM831X_IRQ_UV_DC4,
374 .flags = IORESOURCE_IRQ,
375 },
376};
377
Mark Brownd4e0a892009-10-01 15:41:07 +0100378static struct resource wm8320_dcdc4_buck_resources[] = {
379 {
380 .start = WM831X_DC4_CONTROL,
381 .end = WM832X_DC4_SLEEP_CONTROL,
382 .flags = IORESOURCE_IO,
383 },
384 {
385 .name = "UV",
386 .start = WM831X_IRQ_UV_DC4,
387 .end = WM831X_IRQ_UV_DC4,
388 .flags = IORESOURCE_IRQ,
389 },
390};
391
Mark Brownd2bedfe2009-07-27 14:45:52 +0100392static struct resource wm831x_gpio_resources[] = {
393 {
394 .start = WM831X_IRQ_GPIO_1,
395 .end = WM831X_IRQ_GPIO_16,
396 .flags = IORESOURCE_IRQ,
397 },
398};
399
400static struct resource wm831x_isink1_resources[] = {
401 {
402 .start = WM831X_CURRENT_SINK_1,
403 .end = WM831X_CURRENT_SINK_1,
404 .flags = IORESOURCE_IO,
405 },
406 {
407 .start = WM831X_IRQ_CS1,
408 .end = WM831X_IRQ_CS1,
409 .flags = IORESOURCE_IRQ,
410 },
411};
412
413static struct resource wm831x_isink2_resources[] = {
414 {
415 .start = WM831X_CURRENT_SINK_2,
416 .end = WM831X_CURRENT_SINK_2,
417 .flags = IORESOURCE_IO,
418 },
419 {
420 .start = WM831X_IRQ_CS2,
421 .end = WM831X_IRQ_CS2,
422 .flags = IORESOURCE_IRQ,
423 },
424};
425
426static struct resource wm831x_ldo1_resources[] = {
427 {
428 .start = WM831X_LDO1_CONTROL,
429 .end = WM831X_LDO1_SLEEP_CONTROL,
430 .flags = IORESOURCE_IO,
431 },
432 {
433 .name = "UV",
434 .start = WM831X_IRQ_UV_LDO1,
435 .end = WM831X_IRQ_UV_LDO1,
436 .flags = IORESOURCE_IRQ,
437 },
438};
439
440static struct resource wm831x_ldo2_resources[] = {
441 {
442 .start = WM831X_LDO2_CONTROL,
443 .end = WM831X_LDO2_SLEEP_CONTROL,
444 .flags = IORESOURCE_IO,
445 },
446 {
447 .name = "UV",
448 .start = WM831X_IRQ_UV_LDO2,
449 .end = WM831X_IRQ_UV_LDO2,
450 .flags = IORESOURCE_IRQ,
451 },
452};
453
454static struct resource wm831x_ldo3_resources[] = {
455 {
456 .start = WM831X_LDO3_CONTROL,
457 .end = WM831X_LDO3_SLEEP_CONTROL,
458 .flags = IORESOURCE_IO,
459 },
460 {
461 .name = "UV",
462 .start = WM831X_IRQ_UV_LDO3,
463 .end = WM831X_IRQ_UV_LDO3,
464 .flags = IORESOURCE_IRQ,
465 },
466};
467
468static struct resource wm831x_ldo4_resources[] = {
469 {
470 .start = WM831X_LDO4_CONTROL,
471 .end = WM831X_LDO4_SLEEP_CONTROL,
472 .flags = IORESOURCE_IO,
473 },
474 {
475 .name = "UV",
476 .start = WM831X_IRQ_UV_LDO4,
477 .end = WM831X_IRQ_UV_LDO4,
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct resource wm831x_ldo5_resources[] = {
483 {
484 .start = WM831X_LDO5_CONTROL,
485 .end = WM831X_LDO5_SLEEP_CONTROL,
486 .flags = IORESOURCE_IO,
487 },
488 {
489 .name = "UV",
490 .start = WM831X_IRQ_UV_LDO5,
491 .end = WM831X_IRQ_UV_LDO5,
492 .flags = IORESOURCE_IRQ,
493 },
494};
495
496static struct resource wm831x_ldo6_resources[] = {
497 {
498 .start = WM831X_LDO6_CONTROL,
499 .end = WM831X_LDO6_SLEEP_CONTROL,
500 .flags = IORESOURCE_IO,
501 },
502 {
503 .name = "UV",
504 .start = WM831X_IRQ_UV_LDO6,
505 .end = WM831X_IRQ_UV_LDO6,
506 .flags = IORESOURCE_IRQ,
507 },
508};
509
510static struct resource wm831x_ldo7_resources[] = {
511 {
512 .start = WM831X_LDO7_CONTROL,
513 .end = WM831X_LDO7_SLEEP_CONTROL,
514 .flags = IORESOURCE_IO,
515 },
516 {
517 .name = "UV",
518 .start = WM831X_IRQ_UV_LDO7,
519 .end = WM831X_IRQ_UV_LDO7,
520 .flags = IORESOURCE_IRQ,
521 },
522};
523
524static struct resource wm831x_ldo8_resources[] = {
525 {
526 .start = WM831X_LDO8_CONTROL,
527 .end = WM831X_LDO8_SLEEP_CONTROL,
528 .flags = IORESOURCE_IO,
529 },
530 {
531 .name = "UV",
532 .start = WM831X_IRQ_UV_LDO8,
533 .end = WM831X_IRQ_UV_LDO8,
534 .flags = IORESOURCE_IRQ,
535 },
536};
537
538static struct resource wm831x_ldo9_resources[] = {
539 {
540 .start = WM831X_LDO9_CONTROL,
541 .end = WM831X_LDO9_SLEEP_CONTROL,
542 .flags = IORESOURCE_IO,
543 },
544 {
545 .name = "UV",
546 .start = WM831X_IRQ_UV_LDO9,
547 .end = WM831X_IRQ_UV_LDO9,
548 .flags = IORESOURCE_IRQ,
549 },
550};
551
552static struct resource wm831x_ldo10_resources[] = {
553 {
554 .start = WM831X_LDO10_CONTROL,
555 .end = WM831X_LDO10_SLEEP_CONTROL,
556 .flags = IORESOURCE_IO,
557 },
558 {
559 .name = "UV",
560 .start = WM831X_IRQ_UV_LDO10,
561 .end = WM831X_IRQ_UV_LDO10,
562 .flags = IORESOURCE_IRQ,
563 },
564};
565
566static struct resource wm831x_ldo11_resources[] = {
567 {
568 .start = WM831X_LDO11_ON_CONTROL,
569 .end = WM831X_LDO11_SLEEP_CONTROL,
570 .flags = IORESOURCE_IO,
571 },
572};
573
574static struct resource wm831x_on_resources[] = {
575 {
576 .start = WM831X_IRQ_ON,
577 .end = WM831X_IRQ_ON,
578 .flags = IORESOURCE_IRQ,
579 },
580};
581
582
583static struct resource wm831x_power_resources[] = {
584 {
585 .name = "SYSLO",
586 .start = WM831X_IRQ_PPM_SYSLO,
587 .end = WM831X_IRQ_PPM_SYSLO,
588 .flags = IORESOURCE_IRQ,
589 },
590 {
591 .name = "PWR SRC",
592 .start = WM831X_IRQ_PPM_PWR_SRC,
593 .end = WM831X_IRQ_PPM_PWR_SRC,
594 .flags = IORESOURCE_IRQ,
595 },
596 {
597 .name = "USB CURR",
598 .start = WM831X_IRQ_PPM_USB_CURR,
599 .end = WM831X_IRQ_PPM_USB_CURR,
600 .flags = IORESOURCE_IRQ,
601 },
602 {
603 .name = "BATT HOT",
604 .start = WM831X_IRQ_CHG_BATT_HOT,
605 .end = WM831X_IRQ_CHG_BATT_HOT,
606 .flags = IORESOURCE_IRQ,
607 },
608 {
609 .name = "BATT COLD",
610 .start = WM831X_IRQ_CHG_BATT_COLD,
611 .end = WM831X_IRQ_CHG_BATT_COLD,
612 .flags = IORESOURCE_IRQ,
613 },
614 {
615 .name = "BATT FAIL",
616 .start = WM831X_IRQ_CHG_BATT_FAIL,
617 .end = WM831X_IRQ_CHG_BATT_FAIL,
618 .flags = IORESOURCE_IRQ,
619 },
620 {
621 .name = "OV",
622 .start = WM831X_IRQ_CHG_OV,
623 .end = WM831X_IRQ_CHG_OV,
624 .flags = IORESOURCE_IRQ,
625 },
626 {
627 .name = "END",
628 .start = WM831X_IRQ_CHG_END,
629 .end = WM831X_IRQ_CHG_END,
630 .flags = IORESOURCE_IRQ,
631 },
632 {
633 .name = "TO",
634 .start = WM831X_IRQ_CHG_TO,
635 .end = WM831X_IRQ_CHG_TO,
636 .flags = IORESOURCE_IRQ,
637 },
638 {
639 .name = "MODE",
640 .start = WM831X_IRQ_CHG_MODE,
641 .end = WM831X_IRQ_CHG_MODE,
642 .flags = IORESOURCE_IRQ,
643 },
644 {
645 .name = "START",
646 .start = WM831X_IRQ_CHG_START,
647 .end = WM831X_IRQ_CHG_START,
648 .flags = IORESOURCE_IRQ,
649 },
650};
651
652static struct resource wm831x_rtc_resources[] = {
653 {
654 .name = "PER",
655 .start = WM831X_IRQ_RTC_PER,
656 .end = WM831X_IRQ_RTC_PER,
657 .flags = IORESOURCE_IRQ,
658 },
659 {
660 .name = "ALM",
661 .start = WM831X_IRQ_RTC_ALM,
662 .end = WM831X_IRQ_RTC_ALM,
663 .flags = IORESOURCE_IRQ,
664 },
665};
666
667static struct resource wm831x_status1_resources[] = {
668 {
669 .start = WM831X_STATUS_LED_1,
670 .end = WM831X_STATUS_LED_1,
671 .flags = IORESOURCE_IO,
672 },
673};
674
675static struct resource wm831x_status2_resources[] = {
676 {
677 .start = WM831X_STATUS_LED_2,
678 .end = WM831X_STATUS_LED_2,
679 .flags = IORESOURCE_IO,
680 },
681};
682
683static struct resource wm831x_touch_resources[] = {
684 {
685 .name = "TCHPD",
686 .start = WM831X_IRQ_TCHPD,
687 .end = WM831X_IRQ_TCHPD,
688 .flags = IORESOURCE_IRQ,
689 },
690 {
691 .name = "TCHDATA",
692 .start = WM831X_IRQ_TCHDATA,
693 .end = WM831X_IRQ_TCHDATA,
694 .flags = IORESOURCE_IRQ,
695 },
696};
697
698static struct resource wm831x_wdt_resources[] = {
699 {
700 .start = WM831X_IRQ_WDOG_TO,
701 .end = WM831X_IRQ_WDOG_TO,
702 .flags = IORESOURCE_IRQ,
703 },
704};
705
706static struct mfd_cell wm8310_devs[] = {
707 {
Mark Brownc26964e2009-10-01 15:41:06 +0100708 .name = "wm831x-backup",
709 },
710 {
Mark Brownd2bedfe2009-07-27 14:45:52 +0100711 .name = "wm831x-buckv",
712 .id = 1,
713 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
714 .resources = wm831x_dcdc1_resources,
715 },
716 {
717 .name = "wm831x-buckv",
718 .id = 2,
719 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
720 .resources = wm831x_dcdc2_resources,
721 },
722 {
723 .name = "wm831x-buckp",
724 .id = 3,
725 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
726 .resources = wm831x_dcdc3_resources,
727 },
728 {
729 .name = "wm831x-boostp",
730 .id = 4,
731 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
732 .resources = wm831x_dcdc4_resources,
733 },
734 {
735 .name = "wm831x-epe",
736 .id = 1,
737 },
738 {
739 .name = "wm831x-epe",
740 .id = 2,
741 },
742 {
743 .name = "wm831x-gpio",
744 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
745 .resources = wm831x_gpio_resources,
746 },
747 {
748 .name = "wm831x-hwmon",
749 },
750 {
751 .name = "wm831x-isink",
752 .id = 1,
753 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
754 .resources = wm831x_isink1_resources,
755 },
756 {
757 .name = "wm831x-isink",
758 .id = 2,
759 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
760 .resources = wm831x_isink2_resources,
761 },
762 {
763 .name = "wm831x-ldo",
764 .id = 1,
765 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
766 .resources = wm831x_ldo1_resources,
767 },
768 {
769 .name = "wm831x-ldo",
770 .id = 2,
771 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
772 .resources = wm831x_ldo2_resources,
773 },
774 {
775 .name = "wm831x-ldo",
776 .id = 3,
777 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
778 .resources = wm831x_ldo3_resources,
779 },
780 {
781 .name = "wm831x-ldo",
782 .id = 4,
783 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
784 .resources = wm831x_ldo4_resources,
785 },
786 {
787 .name = "wm831x-ldo",
788 .id = 5,
789 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
790 .resources = wm831x_ldo5_resources,
791 },
792 {
793 .name = "wm831x-ldo",
794 .id = 6,
795 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
796 .resources = wm831x_ldo6_resources,
797 },
798 {
799 .name = "wm831x-aldo",
800 .id = 7,
801 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
802 .resources = wm831x_ldo7_resources,
803 },
804 {
805 .name = "wm831x-aldo",
806 .id = 8,
807 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
808 .resources = wm831x_ldo8_resources,
809 },
810 {
811 .name = "wm831x-aldo",
812 .id = 9,
813 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
814 .resources = wm831x_ldo9_resources,
815 },
816 {
817 .name = "wm831x-aldo",
818 .id = 10,
819 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
820 .resources = wm831x_ldo10_resources,
821 },
822 {
823 .name = "wm831x-alive-ldo",
824 .id = 11,
825 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
826 .resources = wm831x_ldo11_resources,
827 },
828 {
829 .name = "wm831x-on",
830 .num_resources = ARRAY_SIZE(wm831x_on_resources),
831 .resources = wm831x_on_resources,
832 },
833 {
834 .name = "wm831x-power",
835 .num_resources = ARRAY_SIZE(wm831x_power_resources),
836 .resources = wm831x_power_resources,
837 },
838 {
Mark Brownd2bedfe2009-07-27 14:45:52 +0100839 .name = "wm831x-status",
840 .id = 1,
841 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
842 .resources = wm831x_status1_resources,
843 },
844 {
845 .name = "wm831x-status",
846 .id = 2,
847 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
848 .resources = wm831x_status2_resources,
849 },
850 {
851 .name = "wm831x-watchdog",
852 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
853 .resources = wm831x_wdt_resources,
854 },
855};
856
857static struct mfd_cell wm8311_devs[] = {
858 {
Mark Brownc26964e2009-10-01 15:41:06 +0100859 .name = "wm831x-backup",
860 },
861 {
Mark Brownd2bedfe2009-07-27 14:45:52 +0100862 .name = "wm831x-buckv",
863 .id = 1,
864 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
865 .resources = wm831x_dcdc1_resources,
866 },
867 {
868 .name = "wm831x-buckv",
869 .id = 2,
870 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
871 .resources = wm831x_dcdc2_resources,
872 },
873 {
874 .name = "wm831x-buckp",
875 .id = 3,
876 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
877 .resources = wm831x_dcdc3_resources,
878 },
879 {
880 .name = "wm831x-boostp",
881 .id = 4,
882 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
883 .resources = wm831x_dcdc4_resources,
884 },
885 {
886 .name = "wm831x-epe",
887 .id = 1,
888 },
889 {
890 .name = "wm831x-epe",
891 .id = 2,
892 },
893 {
894 .name = "wm831x-gpio",
895 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
896 .resources = wm831x_gpio_resources,
897 },
898 {
899 .name = "wm831x-hwmon",
900 },
901 {
902 .name = "wm831x-isink",
903 .id = 1,
904 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
905 .resources = wm831x_isink1_resources,
906 },
907 {
908 .name = "wm831x-isink",
909 .id = 2,
910 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
911 .resources = wm831x_isink2_resources,
912 },
913 {
914 .name = "wm831x-ldo",
915 .id = 1,
916 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
917 .resources = wm831x_ldo1_resources,
918 },
919 {
920 .name = "wm831x-ldo",
921 .id = 2,
922 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
923 .resources = wm831x_ldo2_resources,
924 },
925 {
926 .name = "wm831x-ldo",
927 .id = 3,
928 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
929 .resources = wm831x_ldo3_resources,
930 },
931 {
932 .name = "wm831x-ldo",
933 .id = 4,
934 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
935 .resources = wm831x_ldo4_resources,
936 },
937 {
938 .name = "wm831x-ldo",
939 .id = 5,
940 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
941 .resources = wm831x_ldo5_resources,
942 },
943 {
944 .name = "wm831x-aldo",
945 .id = 7,
946 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
947 .resources = wm831x_ldo7_resources,
948 },
949 {
950 .name = "wm831x-alive-ldo",
951 .id = 11,
952 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
953 .resources = wm831x_ldo11_resources,
954 },
955 {
956 .name = "wm831x-on",
957 .num_resources = ARRAY_SIZE(wm831x_on_resources),
958 .resources = wm831x_on_resources,
959 },
960 {
961 .name = "wm831x-power",
962 .num_resources = ARRAY_SIZE(wm831x_power_resources),
963 .resources = wm831x_power_resources,
964 },
965 {
Mark Brownd2bedfe2009-07-27 14:45:52 +0100966 .name = "wm831x-status",
967 .id = 1,
968 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
969 .resources = wm831x_status1_resources,
970 },
971 {
972 .name = "wm831x-status",
973 .id = 2,
974 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
975 .resources = wm831x_status2_resources,
976 },
977 {
Mark Brownd2bedfe2009-07-27 14:45:52 +0100978 .name = "wm831x-watchdog",
979 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
980 .resources = wm831x_wdt_resources,
981 },
982};
983
984static struct mfd_cell wm8312_devs[] = {
985 {
Mark Brownc26964e2009-10-01 15:41:06 +0100986 .name = "wm831x-backup",
987 },
988 {
Mark Brownd2bedfe2009-07-27 14:45:52 +0100989 .name = "wm831x-buckv",
990 .id = 1,
991 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
992 .resources = wm831x_dcdc1_resources,
993 },
994 {
995 .name = "wm831x-buckv",
996 .id = 2,
997 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
998 .resources = wm831x_dcdc2_resources,
999 },
1000 {
1001 .name = "wm831x-buckp",
1002 .id = 3,
1003 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1004 .resources = wm831x_dcdc3_resources,
1005 },
1006 {
1007 .name = "wm831x-boostp",
1008 .id = 4,
1009 .num_resources = ARRAY_SIZE(wm831x_dcdc4_resources),
1010 .resources = wm831x_dcdc4_resources,
1011 },
1012 {
1013 .name = "wm831x-epe",
1014 .id = 1,
1015 },
1016 {
1017 .name = "wm831x-epe",
1018 .id = 2,
1019 },
1020 {
1021 .name = "wm831x-gpio",
1022 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1023 .resources = wm831x_gpio_resources,
1024 },
1025 {
1026 .name = "wm831x-hwmon",
1027 },
1028 {
1029 .name = "wm831x-isink",
1030 .id = 1,
1031 .num_resources = ARRAY_SIZE(wm831x_isink1_resources),
1032 .resources = wm831x_isink1_resources,
1033 },
1034 {
1035 .name = "wm831x-isink",
1036 .id = 2,
1037 .num_resources = ARRAY_SIZE(wm831x_isink2_resources),
1038 .resources = wm831x_isink2_resources,
1039 },
1040 {
1041 .name = "wm831x-ldo",
1042 .id = 1,
1043 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1044 .resources = wm831x_ldo1_resources,
1045 },
1046 {
1047 .name = "wm831x-ldo",
1048 .id = 2,
1049 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1050 .resources = wm831x_ldo2_resources,
1051 },
1052 {
1053 .name = "wm831x-ldo",
1054 .id = 3,
1055 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1056 .resources = wm831x_ldo3_resources,
1057 },
1058 {
1059 .name = "wm831x-ldo",
1060 .id = 4,
1061 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1062 .resources = wm831x_ldo4_resources,
1063 },
1064 {
1065 .name = "wm831x-ldo",
1066 .id = 5,
1067 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1068 .resources = wm831x_ldo5_resources,
1069 },
1070 {
1071 .name = "wm831x-ldo",
1072 .id = 6,
1073 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1074 .resources = wm831x_ldo6_resources,
1075 },
1076 {
1077 .name = "wm831x-aldo",
1078 .id = 7,
1079 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1080 .resources = wm831x_ldo7_resources,
1081 },
1082 {
1083 .name = "wm831x-aldo",
1084 .id = 8,
1085 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1086 .resources = wm831x_ldo8_resources,
1087 },
1088 {
1089 .name = "wm831x-aldo",
1090 .id = 9,
1091 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1092 .resources = wm831x_ldo9_resources,
1093 },
1094 {
1095 .name = "wm831x-aldo",
1096 .id = 10,
1097 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1098 .resources = wm831x_ldo10_resources,
1099 },
1100 {
1101 .name = "wm831x-alive-ldo",
1102 .id = 11,
1103 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1104 .resources = wm831x_ldo11_resources,
1105 },
1106 {
1107 .name = "wm831x-on",
1108 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1109 .resources = wm831x_on_resources,
1110 },
1111 {
1112 .name = "wm831x-power",
1113 .num_resources = ARRAY_SIZE(wm831x_power_resources),
1114 .resources = wm831x_power_resources,
1115 },
1116 {
Mark Brownd2bedfe2009-07-27 14:45:52 +01001117 .name = "wm831x-status",
1118 .id = 1,
1119 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1120 .resources = wm831x_status1_resources,
1121 },
1122 {
1123 .name = "wm831x-status",
1124 .id = 2,
1125 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1126 .resources = wm831x_status2_resources,
1127 },
1128 {
Mark Brownd2bedfe2009-07-27 14:45:52 +01001129 .name = "wm831x-watchdog",
1130 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1131 .resources = wm831x_wdt_resources,
1132 },
1133};
1134
Mark Brownd4e0a892009-10-01 15:41:07 +01001135static struct mfd_cell wm8320_devs[] = {
1136 {
1137 .name = "wm831x-backup",
1138 },
1139 {
1140 .name = "wm831x-buckv",
1141 .id = 1,
1142 .num_resources = ARRAY_SIZE(wm831x_dcdc1_resources),
1143 .resources = wm831x_dcdc1_resources,
1144 },
1145 {
1146 .name = "wm831x-buckv",
1147 .id = 2,
1148 .num_resources = ARRAY_SIZE(wm831x_dcdc2_resources),
1149 .resources = wm831x_dcdc2_resources,
1150 },
1151 {
1152 .name = "wm831x-buckp",
1153 .id = 3,
1154 .num_resources = ARRAY_SIZE(wm831x_dcdc3_resources),
1155 .resources = wm831x_dcdc3_resources,
1156 },
1157 {
1158 .name = "wm831x-buckp",
1159 .id = 4,
1160 .num_resources = ARRAY_SIZE(wm8320_dcdc4_buck_resources),
1161 .resources = wm8320_dcdc4_buck_resources,
1162 },
1163 {
1164 .name = "wm831x-gpio",
1165 .num_resources = ARRAY_SIZE(wm831x_gpio_resources),
1166 .resources = wm831x_gpio_resources,
1167 },
1168 {
1169 .name = "wm831x-hwmon",
1170 },
1171 {
1172 .name = "wm831x-ldo",
1173 .id = 1,
1174 .num_resources = ARRAY_SIZE(wm831x_ldo1_resources),
1175 .resources = wm831x_ldo1_resources,
1176 },
1177 {
1178 .name = "wm831x-ldo",
1179 .id = 2,
1180 .num_resources = ARRAY_SIZE(wm831x_ldo2_resources),
1181 .resources = wm831x_ldo2_resources,
1182 },
1183 {
1184 .name = "wm831x-ldo",
1185 .id = 3,
1186 .num_resources = ARRAY_SIZE(wm831x_ldo3_resources),
1187 .resources = wm831x_ldo3_resources,
1188 },
1189 {
1190 .name = "wm831x-ldo",
1191 .id = 4,
1192 .num_resources = ARRAY_SIZE(wm831x_ldo4_resources),
1193 .resources = wm831x_ldo4_resources,
1194 },
1195 {
1196 .name = "wm831x-ldo",
1197 .id = 5,
1198 .num_resources = ARRAY_SIZE(wm831x_ldo5_resources),
1199 .resources = wm831x_ldo5_resources,
1200 },
1201 {
1202 .name = "wm831x-ldo",
1203 .id = 6,
1204 .num_resources = ARRAY_SIZE(wm831x_ldo6_resources),
1205 .resources = wm831x_ldo6_resources,
1206 },
1207 {
1208 .name = "wm831x-aldo",
1209 .id = 7,
1210 .num_resources = ARRAY_SIZE(wm831x_ldo7_resources),
1211 .resources = wm831x_ldo7_resources,
1212 },
1213 {
1214 .name = "wm831x-aldo",
1215 .id = 8,
1216 .num_resources = ARRAY_SIZE(wm831x_ldo8_resources),
1217 .resources = wm831x_ldo8_resources,
1218 },
1219 {
1220 .name = "wm831x-aldo",
1221 .id = 9,
1222 .num_resources = ARRAY_SIZE(wm831x_ldo9_resources),
1223 .resources = wm831x_ldo9_resources,
1224 },
1225 {
1226 .name = "wm831x-aldo",
1227 .id = 10,
1228 .num_resources = ARRAY_SIZE(wm831x_ldo10_resources),
1229 .resources = wm831x_ldo10_resources,
1230 },
1231 {
1232 .name = "wm831x-alive-ldo",
1233 .id = 11,
1234 .num_resources = ARRAY_SIZE(wm831x_ldo11_resources),
1235 .resources = wm831x_ldo11_resources,
1236 },
1237 {
1238 .name = "wm831x-on",
1239 .num_resources = ARRAY_SIZE(wm831x_on_resources),
1240 .resources = wm831x_on_resources,
1241 },
1242 {
Mark Brownd4e0a892009-10-01 15:41:07 +01001243 .name = "wm831x-status",
1244 .id = 1,
1245 .num_resources = ARRAY_SIZE(wm831x_status1_resources),
1246 .resources = wm831x_status1_resources,
1247 },
1248 {
1249 .name = "wm831x-status",
1250 .id = 2,
1251 .num_resources = ARRAY_SIZE(wm831x_status2_resources),
1252 .resources = wm831x_status2_resources,
1253 },
1254 {
1255 .name = "wm831x-watchdog",
1256 .num_resources = ARRAY_SIZE(wm831x_wdt_resources),
1257 .resources = wm831x_wdt_resources,
1258 },
1259};
1260
Mark Brown266a5e02011-06-02 19:18:49 +01001261static struct mfd_cell touch_devs[] = {
1262 {
1263 .name = "wm831x-touch",
1264 .num_resources = ARRAY_SIZE(wm831x_touch_resources),
1265 .resources = wm831x_touch_resources,
1266 },
1267};
1268
Mark Brownb9d03d92011-06-02 19:18:50 +01001269static struct mfd_cell rtc_devs[] = {
1270 {
1271 .name = "wm831x-rtc",
1272 .num_resources = ARRAY_SIZE(wm831x_rtc_resources),
1273 .resources = wm831x_rtc_resources,
1274 },
1275};
Mark Brown266a5e02011-06-02 19:18:49 +01001276
Mark Brown63aed852009-07-27 14:45:55 +01001277static struct mfd_cell backlight_devs[] = {
1278 {
1279 .name = "wm831x-backlight",
1280 },
1281};
1282
Mark Brownd2bedfe2009-07-27 14:45:52 +01001283/*
1284 * Instantiate the generic non-control parts of the device.
1285 */
Mark Browne5b48682010-10-19 23:57:56 +02001286int wm831x_device_init(struct wm831x *wm831x, unsigned long id, int irq)
Mark Brownd2bedfe2009-07-27 14:45:52 +01001287{
1288 struct wm831x_pdata *pdata = wm831x->dev->platform_data;
Mark Browneb503dc2011-06-02 19:18:48 +01001289 int rev, wm831x_num;
Mark Brownd2bedfe2009-07-27 14:45:52 +01001290 enum wm831x_parent parent;
Mark Brown0b14c222011-04-04 11:04:42 +09001291 int ret, i;
Mark Brownd2bedfe2009-07-27 14:45:52 +01001292
1293 mutex_init(&wm831x->io_lock);
1294 mutex_init(&wm831x->key_lock);
1295 dev_set_drvdata(wm831x->dev, wm831x);
1296
1297 ret = wm831x_reg_read(wm831x, WM831X_PARENT_ID);
1298 if (ret < 0) {
1299 dev_err(wm831x->dev, "Failed to read parent ID: %d\n", ret);
1300 goto err;
1301 }
Mark Brownb93cef52010-12-02 16:25:43 +00001302 switch (ret) {
1303 case 0x6204:
1304 case 0x6246:
1305 break;
1306 default:
Mark Brownd2bedfe2009-07-27 14:45:52 +01001307 dev_err(wm831x->dev, "Device is not a WM831x: ID %x\n", ret);
1308 ret = -EINVAL;
1309 goto err;
1310 }
1311
1312 ret = wm831x_reg_read(wm831x, WM831X_REVISION);
1313 if (ret < 0) {
1314 dev_err(wm831x->dev, "Failed to read revision: %d\n", ret);
1315 goto err;
1316 }
1317 rev = (ret & WM831X_PARENT_REV_MASK) >> WM831X_PARENT_REV_SHIFT;
1318
1319 ret = wm831x_reg_read(wm831x, WM831X_RESET_ID);
1320 if (ret < 0) {
1321 dev_err(wm831x->dev, "Failed to read device ID: %d\n", ret);
1322 goto err;
1323 }
1324
Mark Brown894362f2009-10-01 15:41:04 +01001325 /* Some engineering samples do not have the ID set, rely on
1326 * the device being registered correctly.
1327 */
1328 if (ret == 0) {
1329 dev_info(wm831x->dev, "Device is an engineering sample\n");
1330 ret = id;
1331 }
1332
Mark Brownd2bedfe2009-07-27 14:45:52 +01001333 switch (ret) {
Mark Brown894362f2009-10-01 15:41:04 +01001334 case WM8310:
Mark Brownd2bedfe2009-07-27 14:45:52 +01001335 parent = WM8310;
Mark Brown6f2ecaa2009-10-01 15:41:05 +01001336 wm831x->num_gpio = 16;
Mark Brownb03b4d7c2010-04-08 10:02:39 +02001337 wm831x->charger_irq_wake = 1;
Mark Brownf92e8f82010-02-17 18:45:25 +00001338 if (rev > 0) {
1339 wm831x->has_gpio_ena = 1;
1340 wm831x->has_cs_sts = 1;
1341 }
1342
Mark Brown894362f2009-10-01 15:41:04 +01001343 dev_info(wm831x->dev, "WM8310 revision %c\n", 'A' + rev);
Mark Brownd2bedfe2009-07-27 14:45:52 +01001344 break;
1345
Mark Brown894362f2009-10-01 15:41:04 +01001346 case WM8311:
Mark Brownd2bedfe2009-07-27 14:45:52 +01001347 parent = WM8311;
Mark Brown6f2ecaa2009-10-01 15:41:05 +01001348 wm831x->num_gpio = 16;
Mark Brownb03b4d7c2010-04-08 10:02:39 +02001349 wm831x->charger_irq_wake = 1;
Mark Brownf92e8f82010-02-17 18:45:25 +00001350 if (rev > 0) {
1351 wm831x->has_gpio_ena = 1;
1352 wm831x->has_cs_sts = 1;
1353 }
1354
Mark Brown894362f2009-10-01 15:41:04 +01001355 dev_info(wm831x->dev, "WM8311 revision %c\n", 'A' + rev);
Mark Brownd2bedfe2009-07-27 14:45:52 +01001356 break;
1357
Mark Brown894362f2009-10-01 15:41:04 +01001358 case WM8312:
Mark Brownd2bedfe2009-07-27 14:45:52 +01001359 parent = WM8312;
Mark Brown6f2ecaa2009-10-01 15:41:05 +01001360 wm831x->num_gpio = 16;
Mark Brownb03b4d7c2010-04-08 10:02:39 +02001361 wm831x->charger_irq_wake = 1;
Mark Brownf92e8f82010-02-17 18:45:25 +00001362 if (rev > 0) {
1363 wm831x->has_gpio_ena = 1;
1364 wm831x->has_cs_sts = 1;
1365 }
1366
Mark Brown894362f2009-10-01 15:41:04 +01001367 dev_info(wm831x->dev, "WM8312 revision %c\n", 'A' + rev);
Mark Brownd2bedfe2009-07-27 14:45:52 +01001368 break;
1369
Mark Brownd4e0a892009-10-01 15:41:07 +01001370 case WM8320:
1371 parent = WM8320;
1372 wm831x->num_gpio = 12;
1373 dev_info(wm831x->dev, "WM8320 revision %c\n", 'A' + rev);
1374 break;
1375
Mark Brown88913522010-07-21 14:23:37 +01001376 case WM8321:
1377 parent = WM8321;
1378 wm831x->num_gpio = 12;
1379 dev_info(wm831x->dev, "WM8321 revision %c\n", 'A' + rev);
1380 break;
1381
Mark Brown0b315882010-09-28 09:13:39 -07001382 case WM8325:
1383 parent = WM8325;
1384 wm831x->num_gpio = 12;
1385 dev_info(wm831x->dev, "WM8325 revision %c\n", 'A' + rev);
1386 break;
1387
Mark Brown412dc112010-11-24 18:01:41 +00001388 case WM8326:
1389 parent = WM8326;
1390 wm831x->num_gpio = 12;
1391 dev_info(wm831x->dev, "WM8326 revision %c\n", 'A' + rev);
1392 break;
1393
Mark Brownd2bedfe2009-07-27 14:45:52 +01001394 default:
1395 dev_err(wm831x->dev, "Unknown WM831x device %04x\n", ret);
1396 ret = -EINVAL;
1397 goto err;
1398 }
1399
1400 /* This will need revisiting in future but is OK for all
1401 * current parts.
1402 */
1403 if (parent != id)
Mark Brown894362f2009-10-01 15:41:04 +01001404 dev_warn(wm831x->dev, "Device was registered as a WM%lx\n",
Mark Brownd2bedfe2009-07-27 14:45:52 +01001405 id);
1406
1407 /* Bootstrap the user key */
1408 ret = wm831x_reg_read(wm831x, WM831X_SECURITY_KEY);
1409 if (ret < 0) {
1410 dev_err(wm831x->dev, "Failed to read security key: %d\n", ret);
1411 goto err;
1412 }
1413 if (ret != 0) {
1414 dev_warn(wm831x->dev, "Security key had non-zero value %x\n",
1415 ret);
1416 wm831x_reg_write(wm831x, WM831X_SECURITY_KEY, 0);
1417 }
1418 wm831x->locked = 1;
1419
1420 if (pdata && pdata->pre_init) {
1421 ret = pdata->pre_init(wm831x);
1422 if (ret != 0) {
1423 dev_err(wm831x->dev, "pre_init() failed: %d\n", ret);
1424 goto err;
1425 }
1426 }
1427
Mark Brown0b14c222011-04-04 11:04:42 +09001428 if (pdata) {
1429 for (i = 0; i < ARRAY_SIZE(pdata->gpio_defaults); i++) {
1430 if (!pdata->gpio_defaults[i])
1431 continue;
1432
1433 wm831x_reg_write(wm831x,
1434 WM831X_GPIO1_CONTROL + i,
1435 pdata->gpio_defaults[i] & 0xffff);
1436 }
1437 }
1438
Mark Browneb503dc2011-06-02 19:18:48 +01001439 /* Multiply by 10 as we have many subdevices of the same type */
1440 if (pdata && pdata->wm831x_num)
1441 wm831x_num = pdata->wm831x_num * 10;
1442 else
1443 wm831x_num = -1;
1444
Mark Brown7d4d0a32009-07-27 14:45:53 +01001445 ret = wm831x_irq_init(wm831x, irq);
1446 if (ret != 0)
1447 goto err;
1448
Mark Browne69b6de2011-06-02 19:18:53 +01001449 wm831x_auxadc_init(wm831x);
Mark Brown473fe732010-02-23 11:08:06 +00001450
Mark Brownd2bedfe2009-07-27 14:45:52 +01001451 /* The core device is up, instantiate the subdevices. */
1452 switch (parent) {
1453 case WM8310:
Mark Browneb503dc2011-06-02 19:18:48 +01001454 ret = mfd_add_devices(wm831x->dev, wm831x_num,
Mark Brownd2bedfe2009-07-27 14:45:52 +01001455 wm8310_devs, ARRAY_SIZE(wm8310_devs),
Mark Brown5fb4d382009-11-11 16:10:22 +00001456 NULL, wm831x->irq_base);
Mark Brownd2bedfe2009-07-27 14:45:52 +01001457 break;
1458
1459 case WM8311:
Mark Browneb503dc2011-06-02 19:18:48 +01001460 ret = mfd_add_devices(wm831x->dev, wm831x_num,
Mark Brownd2bedfe2009-07-27 14:45:52 +01001461 wm8311_devs, ARRAY_SIZE(wm8311_devs),
Mark Brown5fb4d382009-11-11 16:10:22 +00001462 NULL, wm831x->irq_base);
Mark Brown266a5e02011-06-02 19:18:49 +01001463 if (!pdata || !pdata->disable_touch)
1464 mfd_add_devices(wm831x->dev, wm831x_num,
1465 touch_devs, ARRAY_SIZE(touch_devs),
1466 NULL, wm831x->irq_base);
Mark Brownd2bedfe2009-07-27 14:45:52 +01001467 break;
1468
1469 case WM8312:
Mark Browneb503dc2011-06-02 19:18:48 +01001470 ret = mfd_add_devices(wm831x->dev, wm831x_num,
Mark Brownd2bedfe2009-07-27 14:45:52 +01001471 wm8312_devs, ARRAY_SIZE(wm8312_devs),
Mark Brown5fb4d382009-11-11 16:10:22 +00001472 NULL, wm831x->irq_base);
Mark Brown266a5e02011-06-02 19:18:49 +01001473 if (!pdata || !pdata->disable_touch)
1474 mfd_add_devices(wm831x->dev, wm831x_num,
1475 touch_devs, ARRAY_SIZE(touch_devs),
1476 NULL, wm831x->irq_base);
Mark Brownd2bedfe2009-07-27 14:45:52 +01001477 break;
1478
Mark Brownd4e0a892009-10-01 15:41:07 +01001479 case WM8320:
Mark Brown88913522010-07-21 14:23:37 +01001480 case WM8321:
Mark Brown0b315882010-09-28 09:13:39 -07001481 case WM8325:
Mark Brown412dc112010-11-24 18:01:41 +00001482 case WM8326:
Mark Browneb503dc2011-06-02 19:18:48 +01001483 ret = mfd_add_devices(wm831x->dev, wm831x_num,
Mark Brown0b315882010-09-28 09:13:39 -07001484 wm8320_devs, ARRAY_SIZE(wm8320_devs),
Mark Brownbd7c72e2010-11-24 18:01:39 +00001485 NULL, wm831x->irq_base);
Mark Brown0b315882010-09-28 09:13:39 -07001486 break;
1487
Mark Brownd2bedfe2009-07-27 14:45:52 +01001488 default:
1489 /* If this happens the bus probe function is buggy */
1490 BUG();
1491 }
1492
1493 if (ret != 0) {
1494 dev_err(wm831x->dev, "Failed to add children\n");
Mark Brown7d4d0a32009-07-27 14:45:53 +01001495 goto err_irq;
Mark Brownd2bedfe2009-07-27 14:45:52 +01001496 }
1497
Mark Brownb9d03d92011-06-02 19:18:50 +01001498 /* The RTC can only be used if the 32.768kHz crystal is
1499 * enabled; this can't be controlled by software at runtime.
1500 */
1501 ret = wm831x_reg_read(wm831x, WM831X_CLOCK_CONTROL_2);
1502 if (ret < 0) {
1503 dev_err(wm831x->dev, "Failed to read clock status: %d\n", ret);
1504 goto err_irq;
1505 }
1506
1507 if (ret & WM831X_XTAL_ENA) {
1508 ret = mfd_add_devices(wm831x->dev, wm831x_num,
1509 rtc_devs, ARRAY_SIZE(rtc_devs),
1510 NULL, wm831x->irq_base);
1511 if (ret != 0) {
1512 dev_err(wm831x->dev, "Failed to add RTC: %d\n", ret);
1513 goto err_irq;
1514 }
1515 } else {
1516 dev_info(wm831x->dev, "32.768kHz clock disabled, no RTC\n");
1517 }
1518
Mark Brown63aed852009-07-27 14:45:55 +01001519 if (pdata && pdata->backlight) {
1520 /* Treat errors as non-critical */
Mark Browneb503dc2011-06-02 19:18:48 +01001521 ret = mfd_add_devices(wm831x->dev, wm831x_num, backlight_devs,
Mark Brown5fb4d382009-11-11 16:10:22 +00001522 ARRAY_SIZE(backlight_devs), NULL,
1523 wm831x->irq_base);
Mark Brown63aed852009-07-27 14:45:55 +01001524 if (ret < 0)
1525 dev_err(wm831x->dev, "Failed to add backlight: %d\n",
1526 ret);
1527 }
1528
Mark Brown6704e512009-07-27 14:45:56 +01001529 wm831x_otp_init(wm831x);
1530
Mark Brownd2bedfe2009-07-27 14:45:52 +01001531 if (pdata && pdata->post_init) {
1532 ret = pdata->post_init(wm831x);
1533 if (ret != 0) {
1534 dev_err(wm831x->dev, "post_init() failed: %d\n", ret);
Mark Brown7d4d0a32009-07-27 14:45:53 +01001535 goto err_irq;
Mark Brownd2bedfe2009-07-27 14:45:52 +01001536 }
1537 }
1538
1539 return 0;
1540
Mark Brown7d4d0a32009-07-27 14:45:53 +01001541err_irq:
1542 wm831x_irq_exit(wm831x);
Mark Brownd2bedfe2009-07-27 14:45:52 +01001543err:
1544 mfd_remove_devices(wm831x->dev);
1545 kfree(wm831x);
1546 return ret;
1547}
1548
Mark Browne5b48682010-10-19 23:57:56 +02001549void wm831x_device_exit(struct wm831x *wm831x)
Mark Brownd2bedfe2009-07-27 14:45:52 +01001550{
Mark Brown6704e512009-07-27 14:45:56 +01001551 wm831x_otp_exit(wm831x);
Mark Brownd2bedfe2009-07-27 14:45:52 +01001552 mfd_remove_devices(wm831x->dev);
Mark Brown473fe732010-02-23 11:08:06 +00001553 if (wm831x->irq_base)
1554 free_irq(wm831x->irq_base + WM831X_IRQ_AUXADC_DATA, wm831x);
Mark Brown7d4d0a32009-07-27 14:45:53 +01001555 wm831x_irq_exit(wm831x);
Mark Brownd2bedfe2009-07-27 14:45:52 +01001556 kfree(wm831x);
1557}
1558
Mark Browne5b48682010-10-19 23:57:56 +02001559int wm831x_device_suspend(struct wm831x *wm831x)
Mark Brownb03b4d7c2010-04-08 10:02:39 +02001560{
1561 int reg, mask;
1562
1563 /* If the charger IRQs are a wake source then make sure we ack
1564 * them even if they're not actively being used (eg, no power
1565 * driver or no IRQ line wired up) then acknowledge the
1566 * interrupts otherwise suspend won't last very long.
1567 */
1568 if (wm831x->charger_irq_wake) {
1569 reg = wm831x_reg_read(wm831x, WM831X_INTERRUPT_STATUS_2_MASK);
1570
1571 mask = WM831X_CHG_BATT_HOT_EINT |
1572 WM831X_CHG_BATT_COLD_EINT |
1573 WM831X_CHG_BATT_FAIL_EINT |
1574 WM831X_CHG_OV_EINT | WM831X_CHG_END_EINT |
1575 WM831X_CHG_TO_EINT | WM831X_CHG_MODE_EINT |
1576 WM831X_CHG_START_EINT;
1577
1578 /* If any of the interrupts are masked read the statuses */
1579 if (reg & mask)
1580 reg = wm831x_reg_read(wm831x,
1581 WM831X_INTERRUPT_STATUS_2);
1582
1583 if (reg & mask) {
1584 dev_info(wm831x->dev,
1585 "Acknowledging masked charger IRQs: %x\n",
1586 reg & mask);
1587 wm831x_reg_write(wm831x, WM831X_INTERRUPT_STATUS_2,
1588 reg & mask);
1589 }
1590 }
1591
1592 return 0;
1593}
1594
Mark Browne5b48682010-10-19 23:57:56 +02001595MODULE_DESCRIPTION("Core support for the WM831X AudioPlus PMIC");
Mark Brownd2bedfe2009-07-27 14:45:52 +01001596MODULE_LICENSE("GPL");
1597MODULE_AUTHOR("Mark Brown");