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Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +08001/*
2 * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include <linux/slab.h>
22#include <linux/device.h>
23#include <linux/module.h>
Dong Aishengbaa64152012-09-05 10:57:15 +080024#include <linux/mfd/syscon.h>
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080025#include <linux/err.h>
26#include <linux/io.h>
27#include <linux/platform_device.h>
28#include <linux/of.h>
29#include <linux/of_address.h>
Dong Aishengbaa64152012-09-05 10:57:15 +080030#include <linux/regmap.h>
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080031#include <linux/regulator/driver.h>
32#include <linux/regulator/of_regulator.h>
33
Anson Huang9ee417c2013-01-31 11:23:53 -050034#define LDO_RAMP_UP_UNIT_IN_CYCLES 64 /* 64 cycles per step */
35#define LDO_RAMP_UP_FREQ_IN_MHZ 24 /* cycle based on 24M OSC */
36
Philipp Zabel605ebd32014-02-11 14:43:44 +010037#define LDO_POWER_GATE 0x00
Philipp Zabeld38018f2014-02-11 14:43:45 +010038#define LDO_FET_FULL_ON 0x1f
Philipp Zabel605ebd32014-02-11 14:43:44 +010039
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080040struct anatop_regulator {
41 const char *name;
42 u32 control_reg;
Dong Aishengbaa64152012-09-05 10:57:15 +080043 struct regmap *anatop;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080044 int vol_bit_shift;
45 int vol_bit_width;
Anson Huang9ee417c2013-01-31 11:23:53 -050046 u32 delay_reg;
47 int delay_bit_shift;
48 int delay_bit_width;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080049 int min_bit_val;
50 int min_voltage;
51 int max_voltage;
52 struct regulator_desc rdesc;
53 struct regulator_init_data *initdata;
Philipp Zabeld38018f2014-02-11 14:43:45 +010054 bool bypass;
Philipp Zabel605ebd32014-02-11 14:43:44 +010055 int sel;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +080056};
57
Anson Huang9ee417c2013-01-31 11:23:53 -050058static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
59 unsigned int old_sel,
60 unsigned int new_sel)
61{
62 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
63 u32 val;
64 int ret = 0;
65
66 /* check whether need to care about LDO ramp up speed */
67 if (anatop_reg->delay_bit_width && new_sel > old_sel) {
68 /*
69 * the delay for LDO ramp up time is
70 * based on the register setting, we need
71 * to calculate how many steps LDO need to
72 * ramp up, and how much delay needed. (us)
73 */
74 regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
75 val = (val >> anatop_reg->delay_bit_shift) &
76 ((1 << anatop_reg->delay_bit_width) - 1);
Shawn Guoff1ce052013-02-04 10:21:32 +080077 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
78 val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
Anson Huang9ee417c2013-01-31 11:23:53 -050079 }
80
81 return ret;
82}
83
Philipp Zabel605ebd32014-02-11 14:43:44 +010084static int anatop_regmap_enable(struct regulator_dev *reg)
85{
86 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
Philipp Zabeld38018f2014-02-11 14:43:45 +010087 int sel;
Philipp Zabel605ebd32014-02-11 14:43:44 +010088
Philipp Zabeld38018f2014-02-11 14:43:45 +010089 sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel;
90 return regulator_set_voltage_sel_regmap(reg, sel);
Philipp Zabel605ebd32014-02-11 14:43:44 +010091}
92
93static int anatop_regmap_disable(struct regulator_dev *reg)
94{
95 return regulator_set_voltage_sel_regmap(reg, LDO_POWER_GATE);
96}
97
98static int anatop_regmap_is_enabled(struct regulator_dev *reg)
99{
100 return regulator_get_voltage_sel_regmap(reg) != LDO_POWER_GATE;
101}
102
103static int anatop_regmap_core_set_voltage_sel(struct regulator_dev *reg,
104 unsigned selector)
105{
106 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
107 int ret;
108
Philipp Zabeld38018f2014-02-11 14:43:45 +0100109 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) {
Philipp Zabel605ebd32014-02-11 14:43:44 +0100110 anatop_reg->sel = selector;
111 return 0;
112 }
113
114 ret = regulator_set_voltage_sel_regmap(reg, selector);
115 if (!ret)
116 anatop_reg->sel = selector;
117 return ret;
118}
119
120static int anatop_regmap_core_get_voltage_sel(struct regulator_dev *reg)
121{
122 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
123
Philipp Zabeld38018f2014-02-11 14:43:45 +0100124 if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg))
Philipp Zabel605ebd32014-02-11 14:43:44 +0100125 return anatop_reg->sel;
126
127 return regulator_get_voltage_sel_regmap(reg);
128}
129
Philipp Zabeld38018f2014-02-11 14:43:45 +0100130static int anatop_regmap_get_bypass(struct regulator_dev *reg, bool *enable)
131{
132 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
133 int sel;
134
135 sel = regulator_get_voltage_sel_regmap(reg);
136 if (sel == LDO_FET_FULL_ON)
137 WARN_ON(!anatop_reg->bypass);
138 else if (sel != LDO_POWER_GATE)
139 WARN_ON(anatop_reg->bypass);
140
141 *enable = anatop_reg->bypass;
142 return 0;
143}
144
145static int anatop_regmap_set_bypass(struct regulator_dev *reg, bool enable)
146{
147 struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
148 int sel;
149
150 if (enable == anatop_reg->bypass)
151 return 0;
152
153 sel = enable ? LDO_FET_FULL_ON : anatop_reg->sel;
154 anatop_reg->bypass = enable;
155
156 return regulator_set_voltage_sel_regmap(reg, sel);
157}
158
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800159static struct regulator_ops anatop_rops = {
Axel Lin114c5742014-02-22 12:53:18 +0800160 .set_voltage_sel = regulator_set_voltage_sel_regmap,
161 .get_voltage_sel = regulator_get_voltage_sel_regmap,
Axel Lind01c3a12012-06-03 23:02:34 +0800162 .list_voltage = regulator_list_voltage_linear,
163 .map_voltage = regulator_map_voltage_linear,
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800164};
165
Philipp Zabel605ebd32014-02-11 14:43:44 +0100166static struct regulator_ops anatop_core_rops = {
167 .enable = anatop_regmap_enable,
168 .disable = anatop_regmap_disable,
169 .is_enabled = anatop_regmap_is_enabled,
170 .set_voltage_sel = anatop_regmap_core_set_voltage_sel,
171 .set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
172 .get_voltage_sel = anatop_regmap_core_get_voltage_sel,
173 .list_voltage = regulator_list_voltage_linear,
174 .map_voltage = regulator_map_voltage_linear,
Philipp Zabeld38018f2014-02-11 14:43:45 +0100175 .get_bypass = anatop_regmap_get_bypass,
176 .set_bypass = anatop_regmap_set_bypass,
Philipp Zabel605ebd32014-02-11 14:43:44 +0100177};
178
Bill Pembertona5023572012-11-19 13:22:22 -0500179static int anatop_regulator_probe(struct platform_device *pdev)
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800180{
181 struct device *dev = &pdev->dev;
182 struct device_node *np = dev->of_node;
Dong Aishengbaa64152012-09-05 10:57:15 +0800183 struct device_node *anatop_np;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800184 struct regulator_desc *rdesc;
185 struct regulator_dev *rdev;
186 struct anatop_regulator *sreg;
187 struct regulator_init_data *initdata;
Axel Lind914d812012-04-10 22:45:01 +0800188 struct regulator_config config = { };
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800189 int ret = 0;
Philipp Zabel605ebd32014-02-11 14:43:44 +0100190 u32 val;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800191
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800192 sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
193 if (!sreg)
194 return -ENOMEM;
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200195 sreg->name = of_get_property(np, "regulator-name", NULL);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800196 rdesc = &sreg->rdesc;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800197 rdesc->name = sreg->name;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800198 rdesc->type = REGULATOR_VOLTAGE;
199 rdesc->owner = THIS_MODULE;
Dong Aishengbaa64152012-09-05 10:57:15 +0800200
Javier Martinez Canillas072e78b2014-11-10 14:43:53 +0100201 initdata = of_get_regulator_init_data(dev, np, rdesc);
202 sreg->initdata = initdata;
203
Dong Aishengbaa64152012-09-05 10:57:15 +0800204 anatop_np = of_get_parent(np);
205 if (!anatop_np)
206 return -ENODEV;
207 sreg->anatop = syscon_node_to_regmap(anatop_np);
208 of_node_put(anatop_np);
209 if (IS_ERR(sreg->anatop))
210 return PTR_ERR(sreg->anatop);
211
Ying-Chun Liu (PaulLiu)2f2cc272012-03-27 15:54:01 +0800212 ret = of_property_read_u32(np, "anatop-reg-offset",
213 &sreg->control_reg);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800214 if (ret) {
Ying-Chun Liu (PaulLiu)2f2cc272012-03-27 15:54:01 +0800215 dev_err(dev, "no anatop-reg-offset property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200216 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800217 }
218 ret = of_property_read_u32(np, "anatop-vol-bit-width",
219 &sreg->vol_bit_width);
220 if (ret) {
221 dev_err(dev, "no anatop-vol-bit-width property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200222 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800223 }
224 ret = of_property_read_u32(np, "anatop-vol-bit-shift",
225 &sreg->vol_bit_shift);
226 if (ret) {
227 dev_err(dev, "no anatop-vol-bit-shift property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200228 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800229 }
230 ret = of_property_read_u32(np, "anatop-min-bit-val",
231 &sreg->min_bit_val);
232 if (ret) {
233 dev_err(dev, "no anatop-min-bit-val property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200234 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800235 }
236 ret = of_property_read_u32(np, "anatop-min-voltage",
237 &sreg->min_voltage);
238 if (ret) {
239 dev_err(dev, "no anatop-min-voltage property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200240 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800241 }
242 ret = of_property_read_u32(np, "anatop-max-voltage",
243 &sreg->max_voltage);
244 if (ret) {
245 dev_err(dev, "no anatop-max-voltage property set\n");
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200246 return ret;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800247 }
248
Anson Huang9ee417c2013-01-31 11:23:53 -0500249 /* read LDO ramp up setting, only for core reg */
250 of_property_read_u32(np, "anatop-delay-reg-offset",
251 &sreg->delay_reg);
252 of_property_read_u32(np, "anatop-delay-bit-width",
253 &sreg->delay_bit_width);
254 of_property_read_u32(np, "anatop-delay-bit-shift",
255 &sreg->delay_bit_shift);
256
Axel Lin985884d2012-12-09 08:05:45 +0800257 rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
258 + sreg->min_bit_val;
Axel Lin0713e6a2012-05-14 11:06:44 +0800259 rdesc->min_uV = sreg->min_voltage;
260 rdesc->uV_step = 25000;
Axel Lin985884d2012-12-09 08:05:45 +0800261 rdesc->linear_min_sel = sreg->min_bit_val;
Axel Line1b01442012-12-09 08:07:43 +0800262 rdesc->vsel_reg = sreg->control_reg;
263 rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
264 sreg->vol_bit_shift;
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800265
Axel Lind914d812012-04-10 22:45:01 +0800266 config.dev = &pdev->dev;
267 config.init_data = initdata;
268 config.driver_data = sreg;
269 config.of_node = pdev->dev.of_node;
Axel Line1b01442012-12-09 08:07:43 +0800270 config.regmap = sreg->anatop;
Axel Lind914d812012-04-10 22:45:01 +0800271
Philipp Zabel605ebd32014-02-11 14:43:44 +0100272 /* Only core regulators have the ramp up delay configuration. */
273 if (sreg->control_reg && sreg->delay_bit_width) {
274 rdesc->ops = &anatop_core_rops;
275
276 ret = regmap_read(config.regmap, rdesc->vsel_reg, &val);
277 if (ret) {
278 dev_err(dev, "failed to read initial state\n");
279 return ret;
280 }
281
282 sreg->sel = (val & rdesc->vsel_mask) >> sreg->vol_bit_shift;
Philipp Zabeld38018f2014-02-11 14:43:45 +0100283 if (sreg->sel == LDO_FET_FULL_ON) {
284 sreg->sel = 0;
285 sreg->bypass = true;
286 }
Markus Pargmannfe08be32014-10-06 21:33:36 +0200287
288 /*
289 * In case vddpu was disabled by the bootloader, we need to set
290 * a sane default until imx6-cpufreq was probed and changes the
291 * voltage to the correct value. In this case we set 1.25V.
292 */
293 if (!sreg->sel && !strcmp(sreg->name, "vddpu"))
294 sreg->sel = 22;
Markus Pargmannda0607c2014-10-06 21:33:37 +0200295
296 if (!sreg->sel) {
297 dev_err(&pdev->dev, "Failed to read a valid default voltage selector.\n");
298 return -EINVAL;
299 }
Philipp Zabel605ebd32014-02-11 14:43:44 +0100300 } else {
301 rdesc->ops = &anatop_rops;
302 }
303
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800304 /* register regulator */
Sachin Kamatbe1221e2013-09-04 12:00:57 +0530305 rdev = devm_regulator_register(dev, rdesc, &config);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800306 if (IS_ERR(rdev)) {
307 dev_err(dev, "failed to register %s\n",
308 rdesc->name);
Fabio Estevamf2b269b2014-01-06 10:13:15 -0200309 return PTR_ERR(rdev);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800310 }
311
312 platform_set_drvdata(pdev, rdev);
313
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800314 return 0;
315}
316
Jingoo Hana799baa2014-05-07 16:55:10 +0900317static const struct of_device_id of_anatop_regulator_match_tbl[] = {
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800318 { .compatible = "fsl,anatop-regulator", },
319 { /* end */ }
320};
321
Shawn Guoc0d78c22012-04-02 14:57:01 +0800322static struct platform_driver anatop_regulator_driver = {
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800323 .driver = {
324 .name = "anatop_regulator",
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800325 .of_match_table = of_anatop_regulator_match_tbl,
326 },
327 .probe = anatop_regulator_probe,
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800328};
329
330static int __init anatop_regulator_init(void)
331{
Shawn Guoc0d78c22012-04-02 14:57:01 +0800332 return platform_driver_register(&anatop_regulator_driver);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800333}
334postcore_initcall(anatop_regulator_init);
335
336static void __exit anatop_regulator_exit(void)
337{
Shawn Guoc0d78c22012-04-02 14:57:01 +0800338 platform_driver_unregister(&anatop_regulator_driver);
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800339}
340module_exit(anatop_regulator_exit);
341
Jingoo Han34f75682013-10-14 17:45:51 +0900342MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
343MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
Ying-Chun Liu (PaulLiu)e3e5aff2012-03-14 10:29:12 +0800344MODULE_DESCRIPTION("ANATOP Regulator driver");
345MODULE_LICENSE("GPL v2");
Fabio Estevam89705b92013-12-31 10:56:00 -0200346MODULE_ALIAS("platform:anatop_regulator");