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Andrew Lunn2a4bd9f2013-02-05 22:52:51 +01001/*
2 * kirkwood_freq.c: cpufreq driver for the Marvell kirkwood
3 *
4 * Copyright (C) 2013 Andrew Lunn <andrew@lunn.ch>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/clk.h>
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010015#include <linux/cpufreq.h>
Sudeep KarkadaNageshae768f352013-06-17 15:09:51 +010016#include <linux/of_device.h>
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010017#include <linux/platform_device.h>
18#include <linux/io.h>
19#include <asm/proc-fns.h>
20
21#define CPU_SW_INT_BLK BIT(28)
22
23static struct priv
24{
25 struct clk *cpu_clk;
26 struct clk *ddr_clk;
27 struct clk *powersave_clk;
28 struct device *dev;
29 void __iomem *base;
30} priv;
31
32#define STATE_CPU_FREQ 0x01
33#define STATE_DDR_FREQ 0x02
34
35/*
36 * Kirkwood can swap the clock to the CPU between two clocks:
37 *
38 * - cpu clk
39 * - ddr clk
40 *
Mike Turquette10529932014-08-18 17:30:29 +020041 * The frequencies are set at runtime before registering this table.
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010042 */
43static struct cpufreq_frequency_table kirkwood_freq_table[] = {
Viresh Kumar7f4b0462014-03-28 19:11:47 +053044 {0, STATE_CPU_FREQ, 0}, /* CPU uses cpuclk */
45 {0, STATE_DDR_FREQ, 0}, /* CPU uses ddrclk */
46 {0, 0, CPUFREQ_TABLE_END},
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010047};
48
49static unsigned int kirkwood_cpufreq_get_cpu_frequency(unsigned int cpu)
50{
Mike Turquette10529932014-08-18 17:30:29 +020051 return clk_get_rate(priv.powersave_clk) / 1000;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010052}
53
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +053054static int kirkwood_cpufreq_target(struct cpufreq_policy *policy,
55 unsigned int index)
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010056{
Viresh Kumar50701582013-03-30 16:25:15 +053057 unsigned int state = kirkwood_freq_table[index].driver_data;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010058 unsigned long reg;
59
Viresh Kumard4019f02013-08-14 19:38:24 +053060 local_irq_disable();
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010061
Viresh Kumard4019f02013-08-14 19:38:24 +053062 /* Disable interrupts to the CPU */
63 reg = readl_relaxed(priv.base);
64 reg |= CPU_SW_INT_BLK;
65 writel_relaxed(reg, priv.base);
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010066
Viresh Kumard4019f02013-08-14 19:38:24 +053067 switch (state) {
68 case STATE_CPU_FREQ:
Mike Turquette10529932014-08-18 17:30:29 +020069 clk_set_parent(priv.powersave_clk, priv.cpu_clk);
Viresh Kumard4019f02013-08-14 19:38:24 +053070 break;
71 case STATE_DDR_FREQ:
Mike Turquette10529932014-08-18 17:30:29 +020072 clk_set_parent(priv.powersave_clk, priv.ddr_clk);
Viresh Kumard4019f02013-08-14 19:38:24 +053073 break;
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010074 }
Viresh Kumard4019f02013-08-14 19:38:24 +053075
76 /* Wait-for-Interrupt, while the hardware changes frequency */
77 cpu_do_idle();
78
79 /* Enable interrupts to the CPU */
80 reg = readl_relaxed(priv.base);
81 reg &= ~CPU_SW_INT_BLK;
82 writel_relaxed(reg, priv.base);
83
84 local_irq_enable();
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010085
86 return 0;
87}
88
89/* Module init and exit code */
90static int kirkwood_cpufreq_cpu_init(struct cpufreq_policy *policy)
91{
Viresh Kumarfa6fa662013-10-03 20:29:15 +053092 return cpufreq_generic_init(policy, kirkwood_freq_table, 5000);
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010093}
94
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010095static struct cpufreq_driver kirkwood_cpufreq_driver = {
Viresh Kumarae6b4272013-12-03 11:20:45 +053096 .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +010097 .get = kirkwood_cpufreq_get_cpu_frequency,
Viresh Kumara86a41a2013-10-03 20:28:09 +053098 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +053099 .target_index = kirkwood_cpufreq_target,
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100100 .init = kirkwood_cpufreq_cpu_init,
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100101 .name = "kirkwood-cpufreq",
Viresh Kumara86a41a2013-10-03 20:28:09 +0530102 .attr = cpufreq_generic_attr,
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100103};
104
105static int kirkwood_cpufreq_probe(struct platform_device *pdev)
106{
107 struct device_node *np;
108 struct resource *res;
109 int err;
110
111 priv.dev = &pdev->dev;
112
113 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
Silviu-Mihai Popescucc721c42013-03-22 00:10:22 +0000114 priv.base = devm_ioremap_resource(&pdev->dev, res);
115 if (IS_ERR(priv.base))
116 return PTR_ERR(priv.base);
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100117
Sudeep KarkadaNageshae768f352013-06-17 15:09:51 +0100118 np = of_cpu_device_node_get(0);
119 if (!np) {
120 dev_err(&pdev->dev, "failed to get cpu device node\n");
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100121 return -ENODEV;
Sudeep KarkadaNageshae768f352013-06-17 15:09:51 +0100122 }
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100123
124 priv.cpu_clk = of_clk_get_by_name(np, "cpu_clk");
125 if (IS_ERR(priv.cpu_clk)) {
126 dev_err(priv.dev, "Unable to get cpuclk");
127 return PTR_ERR(priv.cpu_clk);
128 }
129
130 clk_prepare_enable(priv.cpu_clk);
131 kirkwood_freq_table[0].frequency = clk_get_rate(priv.cpu_clk) / 1000;
132
133 priv.ddr_clk = of_clk_get_by_name(np, "ddrclk");
134 if (IS_ERR(priv.ddr_clk)) {
135 dev_err(priv.dev, "Unable to get ddrclk");
136 err = PTR_ERR(priv.ddr_clk);
137 goto out_cpu;
138 }
139
140 clk_prepare_enable(priv.ddr_clk);
141 kirkwood_freq_table[1].frequency = clk_get_rate(priv.ddr_clk) / 1000;
142
143 priv.powersave_clk = of_clk_get_by_name(np, "powersave");
144 if (IS_ERR(priv.powersave_clk)) {
145 dev_err(priv.dev, "Unable to get powersave");
146 err = PTR_ERR(priv.powersave_clk);
147 goto out_ddr;
148 }
Mike Turquette10529932014-08-18 17:30:29 +0200149 clk_prepare_enable(priv.powersave_clk);
Andrew Lunn2a4bd9f2013-02-05 22:52:51 +0100150
151 of_node_put(np);
152 np = NULL;
153
154 err = cpufreq_register_driver(&kirkwood_cpufreq_driver);
155 if (!err)
156 return 0;
157
158 dev_err(priv.dev, "Failed to register cpufreq driver");
159
160 clk_disable_unprepare(priv.powersave_clk);
161out_ddr:
162 clk_disable_unprepare(priv.ddr_clk);
163out_cpu:
164 clk_disable_unprepare(priv.cpu_clk);
165 of_node_put(np);
166
167 return err;
168}
169
170static int kirkwood_cpufreq_remove(struct platform_device *pdev)
171{
172 cpufreq_unregister_driver(&kirkwood_cpufreq_driver);
173
174 clk_disable_unprepare(priv.powersave_clk);
175 clk_disable_unprepare(priv.ddr_clk);
176 clk_disable_unprepare(priv.cpu_clk);
177
178 return 0;
179}
180
181static struct platform_driver kirkwood_cpufreq_platform_driver = {
182 .probe = kirkwood_cpufreq_probe,
183 .remove = kirkwood_cpufreq_remove,
184 .driver = {
185 .name = "kirkwood-cpufreq",
186 .owner = THIS_MODULE,
187 },
188};
189
190module_platform_driver(kirkwood_cpufreq_platform_driver);
191
192MODULE_LICENSE("GPL v2");
193MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch");
194MODULE_DESCRIPTION("cpufreq driver for Marvell's kirkwood CPU");
195MODULE_ALIAS("platform:kirkwood-cpufreq");