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Eric W. Biederman3b7d1922006-10-04 02:16:59 -07001#ifndef LINUX_MSI_H
2#define LINUX_MSI_H
3
Neil Hormanb50cac52011-10-06 14:08:18 -04004#include <linux/kobject.h>
Michael Ellerman4aa9bc92007-04-05 17:19:10 +10005#include <linux/list.h>
6
Eric W. Biederman3b7d1922006-10-04 02:16:59 -07007struct msi_msg {
8 u32 address_lo; /* low 32 bits of msi message address */
9 u32 address_hi; /* high 32 bits of msi message address */
10 u32 data; /* 16 bits of msi message data */
11};
12
Yijing Wang38737d82014-10-27 10:44:36 +080013extern int pci_msi_ignore_mask;
Satoru Takeuchic54c1872007-01-18 13:50:05 +090014/* Helper functions */
Thomas Gleixner1c9db522010-09-28 16:46:51 +020015struct irq_data;
Thomas Gleixner39431ac2010-09-28 19:09:51 +020016struct msi_desc;
Jiang Liu25a98bd2015-07-09 16:00:45 +080017struct pci_dev;
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +010018struct platform_msi_priv_data;
Bjorn Helgaas2366d062013-04-18 10:55:46 -060019void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
Bjorn Helgaas2366d062013-04-18 10:55:46 -060020void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
Jiang Liu891d4a42014-11-09 23:10:33 +080021
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +010022typedef void (*irq_write_msi_msg_t)(struct msi_desc *desc,
23 struct msi_msg *msg);
24
25/**
26 * platform_msi_desc - Platform device specific msi descriptor data
27 * @msi_priv_data: Pointer to platform private data
28 * @msi_index: The index of the MSI descriptor for multi MSI
29 */
30struct platform_msi_desc {
31 struct platform_msi_priv_data *msi_priv_data;
32 u16 msi_index;
33};
34
Jiang Liufc884192015-07-09 16:00:46 +080035/**
J. German Rivera550308e2016-01-06 16:03:20 -060036 * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
37 * @msi_index: The index of the MSI descriptor
38 */
39struct fsl_mc_msi_desc {
40 u16 msi_index;
41};
42
43/**
Jiang Liufc884192015-07-09 16:00:46 +080044 * struct msi_desc - Descriptor structure for MSI based interrupts
45 * @list: List head for management
46 * @irq: The base interrupt number
47 * @nvec_used: The number of vectors used
48 * @dev: Pointer to the device which uses this descriptor
49 * @msg: The last set MSI message cached for reuse
Thomas Gleixner0972fa52016-07-04 17:39:26 +090050 * @affinity: Optional pointer to a cpu affinity mask for this descriptor
Jiang Liufc884192015-07-09 16:00:46 +080051 *
52 * @masked: [PCI MSI/X] Mask bits
53 * @is_msix: [PCI MSI/X] True if MSI-X
54 * @multiple: [PCI MSI/X] log2 num of messages allocated
55 * @multi_cap: [PCI MSI/X] log2 num of messages supported
56 * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
57 * @is_64: [PCI MSI/X] Address size: 0=32bit 1=64bit
58 * @entry_nr: [PCI MSI/X] Entry which is described by this descriptor
59 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
60 * @mask_pos: [PCI MSI] Mask register position
61 * @mask_base: [PCI MSI-X] Mask register base address
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +010062 * @platform: [platform] Platform device specific msi descriptor data
Jiang Liufc884192015-07-09 16:00:46 +080063 */
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070064struct msi_desc {
Jiang Liufc884192015-07-09 16:00:46 +080065 /* Shared device/bus type independent data */
66 struct list_head list;
67 unsigned int irq;
68 unsigned int nvec_used;
69 struct device *dev;
70 struct msi_msg msg;
Thomas Gleixner28f4b042016-09-14 16:18:47 +020071 struct cpumask *affinity;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070072
Matthew Wilcox264d9ca2009-03-17 08:54:08 -040073 union {
Jiang Liufc884192015-07-09 16:00:46 +080074 /* PCI MSI/X specific data */
75 struct {
76 u32 masked;
77 struct {
78 __u8 is_msix : 1;
79 __u8 multiple : 3;
80 __u8 multi_cap : 3;
81 __u8 maskbit : 1;
82 __u8 is_64 : 1;
83 __u16 entry_nr;
84 unsigned default_irq;
85 } msi_attrib;
86 union {
87 u8 mask_pos;
88 void __iomem *mask_base;
89 };
90 };
Eric W. Biederman3b7d1922006-10-04 02:16:59 -070091
Jiang Liufc884192015-07-09 16:00:46 +080092 /*
93 * Non PCI variants add their data structure here. New
94 * entries need to use a named structure. We want
95 * proper name spaces for this. The PCI part is
96 * anonymous for now as it would require an immediate
97 * tree wide cleanup.
98 */
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +010099 struct platform_msi_desc platform;
J. German Rivera550308e2016-01-06 16:03:20 -0600100 struct fsl_mc_msi_desc fsl_mc;
Jiang Liufc884192015-07-09 16:00:46 +0800101 };
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700102};
103
Jiang Liud31eb342014-11-15 22:24:03 +0800104/* Helpers to hide struct msi_desc implementation details */
Jiang Liu25a98bd2015-07-09 16:00:45 +0800105#define msi_desc_to_dev(desc) ((desc)->dev)
Jiang Liu4a7cc832015-07-09 16:00:44 +0800106#define dev_to_msi_list(dev) (&(dev)->msi_list)
Jiang Liud31eb342014-11-15 22:24:03 +0800107#define first_msi_entry(dev) \
108 list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list)
109#define for_each_msi_entry(desc, dev) \
110 list_for_each_entry((desc), dev_to_msi_list((dev)), list)
111
112#ifdef CONFIG_PCI_MSI
113#define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev)
114#define for_each_pci_msi_entry(desc, pdev) \
115 for_each_msi_entry((desc), &(pdev)->dev)
116
Jiang Liu25a98bd2015-07-09 16:00:45 +0800117struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc);
Jiang Liuc179c9b2015-07-09 16:00:36 +0800118void *msi_desc_to_pci_sysdata(struct msi_desc *desc);
119#else /* CONFIG_PCI_MSI */
120static inline void *msi_desc_to_pci_sysdata(struct msi_desc *desc)
121{
122 return NULL;
123}
Jiang Liud31eb342014-11-15 22:24:03 +0800124#endif /* CONFIG_PCI_MSI */
125
Thomas Gleixner28f4b042016-09-14 16:18:47 +0200126struct msi_desc *alloc_msi_entry(struct device *dev, int nvec,
127 const struct cpumask *affinity);
Jiang Liuaa48b6f2015-07-09 16:00:47 +0800128void free_msi_entry(struct msi_desc *entry);
Jiang Liu891d4a42014-11-09 23:10:33 +0800129void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
Jiang Liu83a18912014-11-09 23:10:34 +0800130void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
131void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg);
132
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100133u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag);
134u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
135void pci_msi_mask_irq(struct irq_data *data);
136void pci_msi_unmask_irq(struct irq_data *data);
137
Jiang Liu83a18912014-11-09 23:10:34 +0800138/* Conversion helpers. Should be removed after merging */
139static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
140{
141 __pci_write_msi_msg(entry, msg);
142}
143static inline void write_msi_msg(int irq, struct msi_msg *msg)
144{
145 pci_write_msi_msg(irq, msg);
146}
Thomas Gleixner23ed8d52014-11-23 11:55:58 +0100147static inline void mask_msi_irq(struct irq_data *data)
148{
149 pci_msi_mask_irq(data);
150}
151static inline void unmask_msi_irq(struct irq_data *data)
152{
153 pci_msi_unmask_irq(data);
154}
Jiang Liu891d4a42014-11-09 23:10:33 +0800155
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700156/*
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200157 * The arch hooks to setup up msi irqs. Those functions are
158 * implemented as weak symbols so that they /can/ be overriden by
159 * architecture specific code if needed.
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700160 */
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700161int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700162void arch_teardown_msi_irq(unsigned int irq);
Bjorn Helgaas2366d062013-04-18 10:55:46 -0600163int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
164void arch_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800165void arch_restore_msi_irqs(struct pci_dev *dev);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200166
167void default_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800168void default_restore_msi_irqs(struct pci_dev *dev);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700169
Yijing Wangc2791b82014-11-11 17:45:45 -0700170struct msi_controller {
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200171 struct module *owner;
172 struct device *dev;
Thomas Petazzoni0d5a6db2013-08-09 22:27:09 +0200173 struct device_node *of_node;
174 struct list_head list;
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200175
Yijing Wangc2791b82014-11-11 17:45:45 -0700176 int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev,
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200177 struct msi_desc *desc);
Lucas Stach339e5b42015-09-18 13:58:34 -0500178 int (*setup_irqs)(struct msi_controller *chip, struct pci_dev *dev,
179 int nvec, int type);
Yijing Wangc2791b82014-11-11 17:45:45 -0700180 void (*teardown_irq)(struct msi_controller *chip, unsigned int irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200181};
182
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100183#ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
Jiang Liud9109692014-11-15 22:24:04 +0800184
Jiang Liuaeeb5962014-11-15 22:24:05 +0800185#include <linux/irqhandler.h>
Jiang Liud9109692014-11-15 22:24:04 +0800186#include <asm/msi.h>
187
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100188struct irq_domain;
Marc Zyngier552c4942015-11-23 08:26:07 +0000189struct irq_domain_ops;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100190struct irq_chip;
191struct device_node;
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100192struct fwnode_handle;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100193struct msi_domain_info;
194
195/**
196 * struct msi_domain_ops - MSI interrupt domain callbacks
197 * @get_hwirq: Retrieve the resulting hw irq number
198 * @msi_init: Domain specific init function for MSI interrupts
199 * @msi_free: Domain specific function to free a MSI interrupts
Jiang Liud9109692014-11-15 22:24:04 +0800200 * @msi_check: Callback for verification of the domain/info/dev data
201 * @msi_prepare: Prepare the allocation of the interrupts in the domain
Thomas Petazzoni1d1e8cd2015-12-21 14:13:08 +0100202 * @msi_finish: Optional callback to finalize the allocation
Jiang Liud9109692014-11-15 22:24:04 +0800203 * @set_desc: Set the msi descriptor for an interrupt
204 * @handle_error: Optional error handler if the allocation fails
205 *
206 * @get_hwirq, @msi_init and @msi_free are callbacks used by
207 * msi_create_irq_domain() and related interfaces
208 *
209 * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error
Thomas Petazzoni1d1e8cd2015-12-21 14:13:08 +0100210 * are callbacks used by msi_domain_alloc_irqs() and related
Jiang Liud9109692014-11-15 22:24:04 +0800211 * interfaces which are based on msi_desc.
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100212 */
213struct msi_domain_ops {
Jiang Liuaeeb5962014-11-15 22:24:05 +0800214 irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info,
215 msi_alloc_info_t *arg);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100216 int (*msi_init)(struct irq_domain *domain,
217 struct msi_domain_info *info,
218 unsigned int virq, irq_hw_number_t hwirq,
Jiang Liuaeeb5962014-11-15 22:24:05 +0800219 msi_alloc_info_t *arg);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100220 void (*msi_free)(struct irq_domain *domain,
221 struct msi_domain_info *info,
222 unsigned int virq);
Jiang Liud9109692014-11-15 22:24:04 +0800223 int (*msi_check)(struct irq_domain *domain,
224 struct msi_domain_info *info,
225 struct device *dev);
226 int (*msi_prepare)(struct irq_domain *domain,
227 struct device *dev, int nvec,
228 msi_alloc_info_t *arg);
229 void (*msi_finish)(msi_alloc_info_t *arg, int retval);
230 void (*set_desc)(msi_alloc_info_t *arg,
231 struct msi_desc *desc);
232 int (*handle_error)(struct irq_domain *domain,
233 struct msi_desc *desc, int error);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100234};
235
236/**
237 * struct msi_domain_info - MSI interrupt domain data
Jiang Liuaeeb5962014-11-15 22:24:05 +0800238 * @flags: Flags to decribe features and capabilities
239 * @ops: The callback data structure
240 * @chip: Optional: associated interrupt chip
241 * @chip_data: Optional: associated interrupt chip data
242 * @handler: Optional: associated interrupt flow handler
243 * @handler_data: Optional: associated interrupt flow handler data
244 * @handler_name: Optional: associated interrupt flow handler name
245 * @data: Optional: domain specific data
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100246 */
247struct msi_domain_info {
Jiang Liuaeeb5962014-11-15 22:24:05 +0800248 u32 flags;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100249 struct msi_domain_ops *ops;
250 struct irq_chip *chip;
Jiang Liuaeeb5962014-11-15 22:24:05 +0800251 void *chip_data;
252 irq_flow_handler_t handler;
253 void *handler_data;
254 const char *handler_name;
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100255 void *data;
256};
257
Jiang Liuaeeb5962014-11-15 22:24:05 +0800258/* Flags for msi_domain_info */
259enum {
260 /*
261 * Init non implemented ops callbacks with default MSI domain
262 * callbacks.
263 */
264 MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0),
265 /*
266 * Init non implemented chip callbacks with default MSI chip
267 * callbacks.
268 */
269 MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1),
Jiang Liuaeeb5962014-11-15 22:24:05 +0800270 /* Support multiple PCI MSI interrupts */
Thomas Gleixnerb6140912016-07-04 17:39:22 +0900271 MSI_FLAG_MULTI_PCI_MSI = (1 << 2),
Jiang Liuaeeb5962014-11-15 22:24:05 +0800272 /* Support PCI MSIX interrupts */
Thomas Gleixnerb6140912016-07-04 17:39:22 +0900273 MSI_FLAG_PCI_MSIX = (1 << 3),
Marc Zyngierf3b09462016-07-13 17:18:33 +0100274 /* Needs early activate, required for PCI */
275 MSI_FLAG_ACTIVATE_EARLY = (1 << 4),
Jiang Liuaeeb5962014-11-15 22:24:05 +0800276};
277
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100278int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask,
279 bool force);
280
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100281struct irq_domain *msi_create_irq_domain(struct fwnode_handle *fwnode,
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100282 struct msi_domain_info *info,
283 struct irq_domain *parent);
Jiang Liud9109692014-11-15 22:24:04 +0800284int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
285 int nvec);
286void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100287struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain);
288
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100289struct irq_domain *platform_msi_create_irq_domain(struct fwnode_handle *fwnode,
Marc Zyngierc09fcc4b2015-07-28 14:46:16 +0100290 struct msi_domain_info *info,
291 struct irq_domain *parent);
292int platform_msi_domain_alloc_irqs(struct device *dev, unsigned int nvec,
293 irq_write_msi_msg_t write_msi_msg);
294void platform_msi_domain_free_irqs(struct device *dev);
Marc Zyngierb2eba392015-11-23 08:26:05 +0000295
296/* When an MSI domain is used as an intermediate domain */
297int msi_domain_prepare_irqs(struct irq_domain *domain, struct device *dev,
298 int nvec, msi_alloc_info_t *args);
Marc Zyngier2145ac92015-11-23 08:26:06 +0000299int msi_domain_populate_irqs(struct irq_domain *domain, struct device *dev,
300 int virq, int nvec, msi_alloc_info_t *args);
Marc Zyngier552c4942015-11-23 08:26:07 +0000301struct irq_domain *
302platform_msi_create_device_domain(struct device *dev,
303 unsigned int nvec,
304 irq_write_msi_msg_t write_msi_msg,
305 const struct irq_domain_ops *ops,
306 void *host_data);
307int platform_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
308 unsigned int nr_irqs);
309void platform_msi_domain_free(struct irq_domain *domain, unsigned int virq,
310 unsigned int nvec);
311void *platform_msi_get_host_data(struct irq_domain *domain);
Jiang Liuf3cf8bb2014-11-12 11:39:03 +0100312#endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */
313
Jiang Liu3878eae2014-11-11 21:02:18 +0800314#ifdef CONFIG_PCI_MSI_IRQ_DOMAIN
315void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg);
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100316struct irq_domain *pci_msi_create_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu3878eae2014-11-11 21:02:18 +0800317 struct msi_domain_info *info,
318 struct irq_domain *parent);
319int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev,
320 int nvec, int type);
321void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev);
Marc Zyngierbe5436c2015-10-13 12:51:44 +0100322struct irq_domain *pci_msi_create_default_irq_domain(struct fwnode_handle *fwnode,
Jiang Liu8e047ad2014-11-15 22:24:07 +0800323 struct msi_domain_info *info, struct irq_domain *parent);
324
Jiang Liu3878eae2014-11-11 21:02:18 +0800325irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev,
326 struct msi_desc *desc);
327int pci_msi_domain_check_cap(struct irq_domain *domain,
328 struct msi_domain_info *info, struct device *dev);
David Daneyb6eec9b2015-10-08 15:10:49 -0700329u32 pci_msi_domain_get_msi_rid(struct irq_domain *domain, struct pci_dev *pdev);
Marc Zyngier54fa97e2015-10-02 14:43:06 +0100330struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev);
331#else
332static inline struct irq_domain *pci_msi_get_device_domain(struct pci_dev *pdev)
333{
334 return NULL;
335}
Jiang Liu3878eae2014-11-11 21:02:18 +0800336#endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */
337
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700338#endif /* LINUX_MSI_H */