blob: 3638887476f610a933d57b29cae7f84c4d6f229f [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * sata_promise.c - Promise SATA
3 *
Tejun Heo8c3d3d42013-05-14 11:09:50 -07004 * Maintained by: Tejun Heo <tj@kernel.org>
Mikael Pettersson743a7ec2013-09-25 22:21:55 +02005 * Mikael Pettersson
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * Please ALWAYS copy linux-ide@vger.kernel.org
7 * on emails.
8 *
9 * Copyright 2003-2004 Red Hat, Inc.
10 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -040012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware information only available under NDA.
Linus Torvalds1da177e2005-04-16 15:20:36 -070031 *
32 */
33
34#include <linux/kernel.h>
35#include <linux/module.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090036#include <linux/gfp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070037#include <linux/pci.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070038#include <linux/blkdev.h>
39#include <linux/delay.h>
40#include <linux/interrupt.h>
Jeff Garzika9524a72005-10-30 14:39:11 -050041#include <linux/device.h>
Mikael Pettersson95006182007-01-09 10:51:46 +010042#include <scsi/scsi.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070043#include <scsi/scsi_host.h>
Jeff Garzik193515d2005-11-07 00:59:37 -050044#include <scsi/scsi_cmnd.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070045#include <linux/libata.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#include "sata_promise.h"
47
48#define DRV_NAME "sata_promise"
Mikael Petterssonc07a9c42008-03-23 18:41:01 +010049#define DRV_VERSION "2.12"
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
51enum {
Tejun Heoeca25dc2007-04-17 23:44:07 +090052 PDC_MAX_PORTS = 4,
Tejun Heo0d5ff562007-02-01 15:06:36 +090053 PDC_MMIO_BAR = 3,
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +010054 PDC_MAX_PRD = LIBATA_MAX_PRD - 1, /* -1 for ASIC PRD bug workaround */
Tejun Heo0d5ff562007-02-01 15:06:36 +090055
Mikael Pettersson821d22c2008-05-17 18:48:15 +020056 /* host register offsets (from host->iomap[PDC_MMIO_BAR]) */
57 PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */
58 PDC_FLASH_CTL = 0x44, /* Flash control register */
Mikael Petterssonff7cddf2009-09-15 15:08:47 +020059 PDC_PCI_CTL = 0x48, /* PCI control/status reg */
Mikael Pettersson821d22c2008-05-17 18:48:15 +020060 PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */
61 PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */
62 PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */
63 PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */
64
65 /* per-port ATA register offsets (from ap->ioaddr.cmd_addr) */
Mikael Pettersson95006182007-01-09 10:51:46 +010066 PDC_FEATURE = 0x04, /* Feature/Error reg (per port) */
67 PDC_SECTOR_COUNT = 0x08, /* Sector count reg (per port) */
68 PDC_SECTOR_NUMBER = 0x0C, /* Sector number reg (per port) */
69 PDC_CYLINDER_LOW = 0x10, /* Cylinder low reg (per port) */
70 PDC_CYLINDER_HIGH = 0x14, /* Cylinder high reg (per port) */
71 PDC_DEVICE = 0x18, /* Device/Head reg (per port) */
72 PDC_COMMAND = 0x1C, /* Command/status reg (per port) */
Mikael Pettersson73fd4562007-01-10 09:32:34 +010073 PDC_ALTSTATUS = 0x38, /* Alternate-status/device-control reg (per port) */
Linus Torvalds1da177e2005-04-16 15:20:36 -070074 PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */
Linus Torvalds1da177e2005-04-16 15:20:36 -070075 PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */
76 PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */
Mikael Pettersson821d22c2008-05-17 18:48:15 +020077
78 /* per-port SATA register offsets (from ap->ioaddr.scr_addr) */
Mikael Petterssonff7cddf2009-09-15 15:08:47 +020079 PDC_SATA_ERROR = 0x04,
Mikael Pettersson821d22c2008-05-17 18:48:15 +020080 PDC_PHYMODE4 = 0x14,
Mikael Petterssonff7cddf2009-09-15 15:08:47 +020081 PDC_LINK_LAYER_ERRORS = 0x6C,
82 PDC_FPDMA_CTLSTAT = 0xD8,
83 PDC_INTERNAL_DEBUG_1 = 0xF8, /* also used for PATA */
84 PDC_INTERNAL_DEBUG_2 = 0xFC, /* also used for PATA */
85
86 /* PDC_FPDMA_CTLSTAT bit definitions */
87 PDC_FPDMA_CTLSTAT_RESET = 1 << 3,
88 PDC_FPDMA_CTLSTAT_DMASETUP_INT_FLAG = 1 << 10,
89 PDC_FPDMA_CTLSTAT_SETDB_INT_FLAG = 1 << 11,
Linus Torvalds1da177e2005-04-16 15:20:36 -070090
Mikael Pettersson176efb02007-03-14 09:51:35 +010091 /* PDC_GLOBAL_CTL bit definitions */
92 PDC_PH_ERR = (1 << 8), /* PCI error while loading packet */
93 PDC_SH_ERR = (1 << 9), /* PCI error while loading S/G table */
94 PDC_DH_ERR = (1 << 10), /* PCI error while loading data */
95 PDC2_HTO_ERR = (1 << 12), /* host bus timeout */
96 PDC2_ATA_HBA_ERR = (1 << 13), /* error during SATA DATA FIS transmission */
97 PDC2_ATA_DMA_CNT_ERR = (1 << 14), /* DMA DATA FIS size differs from S/G count */
98 PDC_OVERRUN_ERR = (1 << 19), /* S/G byte count larger than HD requires */
99 PDC_UNDERRUN_ERR = (1 << 20), /* S/G byte count less than HD requires */
100 PDC_DRIVE_ERR = (1 << 21), /* drive error */
101 PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */
102 PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */
103 PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR,
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400104 PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR |
105 PDC2_ATA_DMA_CNT_ERR,
106 PDC_ERR_MASK = PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR |
107 PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR |
108 PDC_DRIVE_ERR | PDC_PCI_SYS_ERR |
109 PDC1_ERR_MASK | PDC2_ERR_MASK,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700110
111 board_2037x = 0, /* FastTrak S150 TX2plus */
Tejun Heoeca25dc2007-04-17 23:44:07 +0900112 board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */
113 board_20319 = 2, /* FastTrak S150 TX4 */
114 board_20619 = 3, /* FastTrak TX4000 */
115 board_2057x = 4, /* SATAII150 Tx2plus */
Mikael Petterssond0e58032007-06-19 21:53:30 +0200116 board_2057x_pata = 5, /* SATAII150 Tx2plus PATA port */
Tejun Heoeca25dc2007-04-17 23:44:07 +0900117 board_40518 = 6, /* SATAII150 Tx4 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700118
Luke Kosewski6340f012006-01-28 12:39:29 -0500119 PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700120
Mikael Pettersson95006182007-01-09 10:51:46 +0100121 /* Sequence counter control registers bit definitions */
122 PDC_SEQCNTRL_INT_MASK = (1 << 5), /* Sequence Interrupt Mask */
123
124 /* Feature register values */
125 PDC_FEATURE_ATAPI_PIO = 0x00, /* ATAPI data xfer by PIO */
126 PDC_FEATURE_ATAPI_DMA = 0x01, /* ATAPI data xfer by DMA */
127
128 /* Device/Head register values */
129 PDC_DEVICE_SATA = 0xE0, /* Device/Head value for SATA devices */
130
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100131 /* PDC_CTLSTAT bit definitions */
132 PDC_DMA_ENABLE = (1 << 7),
133 PDC_IRQ_DISABLE = (1 << 10),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 PDC_RESET = (1 << 11), /* HDMA reset */
Jeff Garzik50630192005-12-13 02:29:45 -0500135
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300136 PDC_COMMON_FLAGS = ATA_FLAG_PIO_POLLING,
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100137
Tejun Heoeca25dc2007-04-17 23:44:07 +0900138 /* ap->flags bits */
139 PDC_FLAG_GEN_II = (1 << 24),
140 PDC_FLAG_SATA_PATA = (1 << 25), /* supports SATA + PATA */
141 PDC_FLAG_4_PORTS = (1 << 26), /* 4 ports */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142};
143
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144struct pdc_port_priv {
145 u8 *pkt;
146 dma_addr_t pkt_dma;
147};
148
Mikael Pettersson3100d492012-09-16 20:53:43 +0200149struct pdc_host_priv {
150 spinlock_t hard_reset_lock;
151};
152
Tejun Heo82ef04f2008-07-31 17:02:40 +0900153static int pdc_sata_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
154static int pdc_sata_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200155static int pdc_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
Tejun Heoeca25dc2007-04-17 23:44:07 +0900156static int pdc_common_port_start(struct ata_port *ap);
157static int pdc_sata_port_start(struct ata_port *ap);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158static void pdc_qc_prep(struct ata_queued_cmd *qc);
Jeff Garzik057ace52005-10-22 14:27:05 -0400159static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
160static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf);
Mikael Pettersson95006182007-01-09 10:51:46 +0100161static int pdc_check_atapi_dma(struct ata_queued_cmd *qc);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100162static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163static void pdc_irq_clear(struct ata_port *ap);
Tejun Heo9363c382008-04-07 22:47:16 +0900164static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100165static void pdc_freeze(struct ata_port *ap);
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100166static void pdc_sata_freeze(struct ata_port *ap);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100167static void pdc_thaw(struct ata_port *ap);
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100168static void pdc_sata_thaw(struct ata_port *ap);
Mikael Petterssoncadef672008-10-31 08:03:55 +0100169static int pdc_pata_softreset(struct ata_link *link, unsigned int *class,
170 unsigned long deadline);
171static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class,
172 unsigned long deadline);
Tejun Heoa1efdab2008-03-25 12:22:50 +0900173static void pdc_error_handler(struct ata_port *ap);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100174static void pdc_post_internal_cmd(struct ata_queued_cmd *qc);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100175static int pdc_pata_cable_detect(struct ata_port *ap);
176static int pdc_sata_cable_detect(struct ata_port *ap);
Jeff Garzik374b1872005-08-30 05:42:52 -0400177
Jeff Garzik193515d2005-11-07 00:59:37 -0500178static struct scsi_host_template pdc_ata_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900179 ATA_BASE_SHT(DRV_NAME),
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100180 .sg_tablesize = PDC_MAX_PRD,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181 .dma_boundary = ATA_DMA_BOUNDARY,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182};
183
Tejun Heo029cfd62008-03-25 12:22:49 +0900184static const struct ata_port_operations pdc_common_ops = {
185 .inherits = &ata_sff_port_ops,
Mikael Pettersson95006182007-01-09 10:51:46 +0100186
Tejun Heo5682ed32008-04-07 22:47:16 +0900187 .sff_tf_load = pdc_tf_load_mmio,
188 .sff_exec_command = pdc_exec_command_mmio,
Tejun Heo029cfd62008-03-25 12:22:49 +0900189 .check_atapi_dma = pdc_check_atapi_dma,
Mikael Pettersson95006182007-01-09 10:51:46 +0100190 .qc_prep = pdc_qc_prep,
Tejun Heo9363c382008-04-07 22:47:16 +0900191 .qc_issue = pdc_qc_issue,
Alan Coxc96f1732009-03-24 10:23:46 +0000192
Tejun Heo5682ed32008-04-07 22:47:16 +0900193 .sff_irq_clear = pdc_irq_clear,
Alan Coxc96f1732009-03-24 10:23:46 +0000194 .lost_interrupt = ATA_OP_NULL,
Tejun Heo029cfd62008-03-25 12:22:49 +0900195
196 .post_internal_cmd = pdc_post_internal_cmd,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900197 .error_handler = pdc_error_handler,
Tejun Heo029cfd62008-03-25 12:22:49 +0900198};
199
200static struct ata_port_operations pdc_sata_ops = {
201 .inherits = &pdc_common_ops,
202 .cable_detect = pdc_sata_cable_detect,
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100203 .freeze = pdc_sata_freeze,
204 .thaw = pdc_sata_thaw,
Mikael Pettersson95006182007-01-09 10:51:46 +0100205 .scr_read = pdc_sata_scr_read,
206 .scr_write = pdc_sata_scr_write,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900207 .port_start = pdc_sata_port_start,
Mikael Petterssoncadef672008-10-31 08:03:55 +0100208 .hardreset = pdc_sata_hardreset,
Mikael Pettersson95006182007-01-09 10:51:46 +0100209};
210
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200211/* First-generation chips need a more restrictive ->check_atapi_dma op,
212 and ->freeze/thaw that ignore the hotplug controls. */
Tejun Heo029cfd62008-03-25 12:22:49 +0900213static struct ata_port_operations pdc_old_sata_ops = {
214 .inherits = &pdc_sata_ops,
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200215 .freeze = pdc_freeze,
216 .thaw = pdc_thaw,
Mikael Pettersson724114a2007-03-11 21:20:43 +0100217 .check_atapi_dma = pdc_old_sata_check_atapi_dma,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218};
219
Tejun Heo029cfd62008-03-25 12:22:49 +0900220static struct ata_port_operations pdc_pata_ops = {
221 .inherits = &pdc_common_ops,
222 .cable_detect = pdc_pata_cable_detect,
Mikael Pettersson53873732007-02-11 23:19:53 +0100223 .freeze = pdc_freeze,
224 .thaw = pdc_thaw,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900225 .port_start = pdc_common_port_start,
Mikael Petterssoncadef672008-10-31 08:03:55 +0100226 .softreset = pdc_pata_softreset,
Jeff Garzik2cba5822005-08-29 05:12:30 -0400227};
228
Arjan van de Ven98ac62d2005-11-28 10:06:23 +0100229static const struct ata_port_info pdc_port_info[] = {
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100230 [board_2037x] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700231 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900232 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
233 PDC_FLAG_SATA_PATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100234 .pio_mask = ATA_PIO4,
235 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400236 .udma_mask = ATA_UDMA6,
Mikael Pettersson95006182007-01-09 10:51:46 +0100237 .port_ops = &pdc_old_sata_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700238 },
239
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100240 [board_2037x_pata] =
Tejun Heoeca25dc2007-04-17 23:44:07 +0900241 {
242 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100243 .pio_mask = ATA_PIO4,
244 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400245 .udma_mask = ATA_UDMA6,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900246 .port_ops = &pdc_pata_ops,
247 },
248
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100249 [board_20319] =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700250 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900251 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
252 PDC_FLAG_4_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100253 .pio_mask = ATA_PIO4,
254 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400255 .udma_mask = ATA_UDMA6,
Mikael Pettersson95006182007-01-09 10:51:46 +0100256 .port_ops = &pdc_old_sata_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257 },
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400258
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100259 [board_20619] =
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400260 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900261 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS |
262 PDC_FLAG_4_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100263 .pio_mask = ATA_PIO4,
264 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400265 .udma_mask = ATA_UDMA6,
Jeff Garzik2cba5822005-08-29 05:12:30 -0400266 .port_ops = &pdc_pata_ops,
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400267 },
Yusuf Iskenderoglu5a46fe82006-01-17 08:06:21 -0500268
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100269 [board_2057x] =
Luke Kosewski6340f012006-01-28 12:39:29 -0500270 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900271 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
272 PDC_FLAG_GEN_II | PDC_FLAG_SATA_PATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100273 .pio_mask = ATA_PIO4,
274 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400275 .udma_mask = ATA_UDMA6,
Luke Kosewski6340f012006-01-28 12:39:29 -0500276 .port_ops = &pdc_sata_ops,
277 },
278
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100279 [board_2057x_pata] =
Tejun Heoeca25dc2007-04-17 23:44:07 +0900280 {
Jeff Garzikbb312232007-05-24 23:35:59 -0400281 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS |
Tejun Heoeca25dc2007-04-17 23:44:07 +0900282 PDC_FLAG_GEN_II,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100283 .pio_mask = ATA_PIO4,
284 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400285 .udma_mask = ATA_UDMA6,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900286 .port_ops = &pdc_pata_ops,
287 },
288
Mikael Pettersson5595ddf2007-10-30 14:21:55 +0100289 [board_40518] =
Luke Kosewski6340f012006-01-28 12:39:29 -0500290 {
Tejun Heoeca25dc2007-04-17 23:44:07 +0900291 .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA |
292 PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100293 .pio_mask = ATA_PIO4,
294 .mwdma_mask = ATA_MWDMA2,
Jeff Garzik469248a2007-07-08 01:13:16 -0400295 .udma_mask = ATA_UDMA6,
Luke Kosewski6340f012006-01-28 12:39:29 -0500296 .port_ops = &pdc_sata_ops,
297 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700298};
299
Jeff Garzik3b7d6972005-11-10 11:04:11 -0500300static const struct pci_device_id pdc_ata_pci_tbl[] = {
Jeff Garzik54bb3a942006-09-27 22:20:11 -0400301 { PCI_VDEVICE(PROMISE, 0x3371), board_2037x },
Jeff Garzik54bb3a942006-09-27 22:20:11 -0400302 { PCI_VDEVICE(PROMISE, 0x3373), board_2037x },
303 { PCI_VDEVICE(PROMISE, 0x3375), board_2037x },
304 { PCI_VDEVICE(PROMISE, 0x3376), board_2037x },
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100305 { PCI_VDEVICE(PROMISE, 0x3570), board_2057x },
306 { PCI_VDEVICE(PROMISE, 0x3571), board_2057x },
Jeff Garzik54bb3a942006-09-27 22:20:11 -0400307 { PCI_VDEVICE(PROMISE, 0x3574), board_2057x },
Mikael Petterssond324d4622006-12-06 09:55:43 +0100308 { PCI_VDEVICE(PROMISE, 0x3577), board_2057x },
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100309 { PCI_VDEVICE(PROMISE, 0x3d73), board_2057x },
Jeff Garzik54bb3a942006-09-27 22:20:11 -0400310 { PCI_VDEVICE(PROMISE, 0x3d75), board_2057x },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700311
Jeff Garzik54bb3a942006-09-27 22:20:11 -0400312 { PCI_VDEVICE(PROMISE, 0x3318), board_20319 },
313 { PCI_VDEVICE(PROMISE, 0x3319), board_20319 },
Mikael Pettersson7f9992a2007-08-29 10:25:37 +0200314 { PCI_VDEVICE(PROMISE, 0x3515), board_40518 },
315 { PCI_VDEVICE(PROMISE, 0x3519), board_40518 },
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +0100316 { PCI_VDEVICE(PROMISE, 0x3d17), board_40518 },
Jeff Garzik54bb3a942006-09-27 22:20:11 -0400317 { PCI_VDEVICE(PROMISE, 0x3d18), board_40518 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318
Jeff Garzik54bb3a942006-09-27 22:20:11 -0400319 { PCI_VDEVICE(PROMISE, 0x6629), board_20619 },
Tobias Lorenzf497ba72005-05-12 15:51:01 -0400320
Linus Torvalds1da177e2005-04-16 15:20:36 -0700321 { } /* terminate list */
322};
323
Linus Torvalds1da177e2005-04-16 15:20:36 -0700324static struct pci_driver pdc_ata_pci_driver = {
325 .name = DRV_NAME,
326 .id_table = pdc_ata_pci_tbl,
327 .probe = pdc_ata_init_one,
328 .remove = ata_pci_remove_one,
329};
330
Mikael Pettersson724114a2007-03-11 21:20:43 +0100331static int pdc_common_port_start(struct ata_port *ap)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332{
Jeff Garzikcca39742006-08-24 03:19:22 -0400333 struct device *dev = ap->host->dev;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700334 struct pdc_port_priv *pp;
335 int rc;
336
Tejun Heoc7087652010-05-10 21:41:34 +0200337 /* we use the same prd table as bmdma, allocate it */
338 rc = ata_bmdma_port_start(ap);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700339 if (rc)
340 return rc;
341
Tejun Heo24dc5f32007-01-20 16:00:28 +0900342 pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL);
343 if (!pp)
344 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700345
Tejun Heo24dc5f32007-01-20 16:00:28 +0900346 pp->pkt = dmam_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL);
347 if (!pp->pkt)
348 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700349
350 ap->private_data = pp;
351
Mikael Pettersson724114a2007-03-11 21:20:43 +0100352 return 0;
353}
354
355static int pdc_sata_port_start(struct ata_port *ap)
356{
Mikael Pettersson724114a2007-03-11 21:20:43 +0100357 int rc;
358
359 rc = pdc_common_port_start(ap);
360 if (rc)
361 return rc;
362
Mikael Pettersson599b7202006-12-01 10:55:58 +0100363 /* fix up PHYMODE4 align timing */
Tejun Heoeca25dc2007-04-17 23:44:07 +0900364 if (ap->flags & PDC_FLAG_GEN_II) {
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200365 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
Mikael Pettersson599b7202006-12-01 10:55:58 +0100366 unsigned int tmp;
367
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200368 tmp = readl(sata_mmio + PDC_PHYMODE4);
Mikael Pettersson599b7202006-12-01 10:55:58 +0100369 tmp = (tmp & ~3) | 1; /* set bits 1:0 = 0:1 */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200370 writel(tmp, sata_mmio + PDC_PHYMODE4);
Mikael Pettersson599b7202006-12-01 10:55:58 +0100371 }
372
Linus Torvalds1da177e2005-04-16 15:20:36 -0700373 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700374}
375
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200376static void pdc_fpdma_clear_interrupt_flag(struct ata_port *ap)
377{
378 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
379 u32 tmp;
380
381 tmp = readl(sata_mmio + PDC_FPDMA_CTLSTAT);
382 tmp |= PDC_FPDMA_CTLSTAT_DMASETUP_INT_FLAG;
383 tmp |= PDC_FPDMA_CTLSTAT_SETDB_INT_FLAG;
384
385 /* It's not allowed to write to the entire FPDMA_CTLSTAT register
386 when NCQ is running. So do a byte-sized write to bits 10 and 11. */
387 writeb(tmp >> 8, sata_mmio + PDC_FPDMA_CTLSTAT + 1);
388 readb(sata_mmio + PDC_FPDMA_CTLSTAT + 1); /* flush */
389}
390
391static void pdc_fpdma_reset(struct ata_port *ap)
392{
393 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
394 u8 tmp;
395
396 tmp = (u8)readl(sata_mmio + PDC_FPDMA_CTLSTAT);
397 tmp &= 0x7F;
398 tmp |= PDC_FPDMA_CTLSTAT_RESET;
399 writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT);
400 readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */
401 udelay(100);
402 tmp &= ~PDC_FPDMA_CTLSTAT_RESET;
403 writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT);
404 readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */
405
406 pdc_fpdma_clear_interrupt_flag(ap);
407}
408
409static void pdc_not_at_command_packet_phase(struct ata_port *ap)
410{
411 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
412 unsigned int i;
413 u32 tmp;
414
415 /* check not at ASIC packet command phase */
416 for (i = 0; i < 100; ++i) {
417 writel(0, sata_mmio + PDC_INTERNAL_DEBUG_1);
418 tmp = readl(sata_mmio + PDC_INTERNAL_DEBUG_2);
419 if ((tmp & 0xF) != 1)
420 break;
421 udelay(100);
422 }
423}
424
425static void pdc_clear_internal_debug_record_error_register(struct ata_port *ap)
426{
427 void __iomem *sata_mmio = ap->ioaddr.scr_addr;
428
429 writel(0xffffffff, sata_mmio + PDC_SATA_ERROR);
430 writel(0xffff0000, sata_mmio + PDC_LINK_LAYER_ERRORS);
431}
432
Linus Torvalds1da177e2005-04-16 15:20:36 -0700433static void pdc_reset_port(struct ata_port *ap)
434{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200435 void __iomem *ata_ctlstat_mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700436 unsigned int i;
437 u32 tmp;
438
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200439 if (ap->flags & PDC_FLAG_GEN_II)
440 pdc_not_at_command_packet_phase(ap);
441
442 tmp = readl(ata_ctlstat_mmio);
443 tmp |= PDC_RESET;
444 writel(tmp, ata_ctlstat_mmio);
445
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446 for (i = 11; i > 0; i--) {
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200447 tmp = readl(ata_ctlstat_mmio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700448 if (tmp & PDC_RESET)
449 break;
450
451 udelay(100);
452
453 tmp |= PDC_RESET;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200454 writel(tmp, ata_ctlstat_mmio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455 }
456
457 tmp &= ~PDC_RESET;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200458 writel(tmp, ata_ctlstat_mmio);
459 readl(ata_ctlstat_mmio); /* flush */
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200460
461 if (sata_scr_valid(&ap->link) && (ap->flags & PDC_FLAG_GEN_II)) {
462 pdc_fpdma_reset(ap);
463 pdc_clear_internal_debug_record_error_register(ap);
464 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700465}
466
Mikael Pettersson724114a2007-03-11 21:20:43 +0100467static int pdc_pata_cable_detect(struct ata_port *ap)
Jeff Garzikd3fb4e82006-05-24 01:43:25 -0400468{
469 u8 tmp;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200470 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Jeff Garzikd3fb4e82006-05-24 01:43:25 -0400471
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200472 tmp = readb(ata_mmio + PDC_CTLSTAT + 3);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100473 if (tmp & 0x01)
474 return ATA_CBL_PATA40;
475 return ATA_CBL_PATA80;
476}
477
478static int pdc_sata_cable_detect(struct ata_port *ap)
479{
Alan Coxe2a97522007-03-08 23:06:47 +0000480 return ATA_CBL_SATA;
Jeff Garzikd3fb4e82006-05-24 01:43:25 -0400481}
482
Tejun Heo82ef04f2008-07-31 17:02:40 +0900483static int pdc_sata_scr_read(struct ata_link *link,
484 unsigned int sc_reg, u32 *val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700485{
Mikael Pettersson724114a2007-03-11 21:20:43 +0100486 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900487 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900488 *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900489 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700490}
491
Tejun Heo82ef04f2008-07-31 17:02:40 +0900492static int pdc_sata_scr_write(struct ata_link *link,
493 unsigned int sc_reg, u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494{
Mikael Pettersson724114a2007-03-11 21:20:43 +0100495 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900496 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900497 writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900498 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700499}
500
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100501static void pdc_atapi_pkt(struct ata_queued_cmd *qc)
Mikael Pettersson95006182007-01-09 10:51:46 +0100502{
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100503 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +0200504 dma_addr_t sg_table = ap->bmdma_prd_dma;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100505 unsigned int cdb_len = qc->dev->cdb_len;
506 u8 *cdb = qc->cdb;
507 struct pdc_port_priv *pp = ap->private_data;
508 u8 *buf = pp->pkt;
Al Viro826cd152008-03-25 05:18:11 +0000509 __le32 *buf32 = (__le32 *) buf;
Tejun Heo46a67142007-12-04 13:33:30 +0900510 unsigned int dev_sel, feature;
Mikael Pettersson95006182007-01-09 10:51:46 +0100511
512 /* set control bits (byte 0), zero delay seq id (byte 3),
513 * and seq id (byte 2)
514 */
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100515 switch (qc->tf.protocol) {
Tejun Heo0dc36882007-12-18 16:34:43 -0500516 case ATAPI_PROT_DMA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100517 if (!(qc->tf.flags & ATA_TFLAG_WRITE))
518 buf32[0] = cpu_to_le32(PDC_PKT_READ);
519 else
520 buf32[0] = 0;
521 break;
Tejun Heo0dc36882007-12-18 16:34:43 -0500522 case ATAPI_PROT_NODATA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100523 buf32[0] = cpu_to_le32(PDC_PKT_NODATA);
524 break;
525 default:
526 BUG();
527 break;
528 }
Mikael Pettersson95006182007-01-09 10:51:46 +0100529 buf32[1] = cpu_to_le32(sg_table); /* S/G table addr */
530 buf32[2] = 0; /* no next-packet */
531
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100532 /* select drive */
Tejun Heo46a67142007-12-04 13:33:30 +0900533 if (sata_scr_valid(&ap->link))
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100534 dev_sel = PDC_DEVICE_SATA;
Tejun Heo46a67142007-12-04 13:33:30 +0900535 else
536 dev_sel = qc->tf.device;
537
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100538 buf[12] = (1 << 5) | ATA_REG_DEVICE;
539 buf[13] = dev_sel;
540 buf[14] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_CLEAR_BSY;
541 buf[15] = dev_sel; /* once more, waiting for BSY to clear */
542
543 buf[16] = (1 << 5) | ATA_REG_NSECT;
Tejun Heo46a67142007-12-04 13:33:30 +0900544 buf[17] = qc->tf.nsect;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100545 buf[18] = (1 << 5) | ATA_REG_LBAL;
Tejun Heo46a67142007-12-04 13:33:30 +0900546 buf[19] = qc->tf.lbal;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100547
548 /* set feature and byte counter registers */
Tejun Heo0dc36882007-12-18 16:34:43 -0500549 if (qc->tf.protocol != ATAPI_PROT_DMA)
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100550 feature = PDC_FEATURE_ATAPI_PIO;
Tejun Heo46a67142007-12-04 13:33:30 +0900551 else
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100552 feature = PDC_FEATURE_ATAPI_DMA;
Tejun Heo46a67142007-12-04 13:33:30 +0900553
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100554 buf[20] = (1 << 5) | ATA_REG_FEATURE;
555 buf[21] = feature;
556 buf[22] = (1 << 5) | ATA_REG_BYTEL;
Tejun Heo46a67142007-12-04 13:33:30 +0900557 buf[23] = qc->tf.lbam;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100558 buf[24] = (1 << 5) | ATA_REG_BYTEH;
Tejun Heo46a67142007-12-04 13:33:30 +0900559 buf[25] = qc->tf.lbah;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100560
561 /* send ATAPI packet command 0xA0 */
562 buf[26] = (1 << 5) | ATA_REG_CMD;
Tejun Heo46a67142007-12-04 13:33:30 +0900563 buf[27] = qc->tf.command;
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100564
565 /* select drive and check DRQ */
566 buf[28] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_WAIT_DRDY;
567 buf[29] = dev_sel;
568
Mikael Pettersson95006182007-01-09 10:51:46 +0100569 /* we can represent cdb lengths 2/4/6/8/10/12/14/16 */
570 BUG_ON(cdb_len & ~0x1E);
571
Mikael Pettersson4113bb62007-01-13 21:31:05 +0100572 /* append the CDB as the final part */
573 buf[30] = (((cdb_len >> 1) & 7) << 5) | ATA_REG_DATA | PDC_LAST_REG;
574 memcpy(buf+31, cdb, cdb_len);
Mikael Pettersson95006182007-01-09 10:51:46 +0100575}
576
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100577/**
578 * pdc_fill_sg - Fill PCI IDE PRD table
579 * @qc: Metadata associated with taskfile to be transferred
580 *
581 * Fill PCI IDE PRD (scatter-gather) table with segments
582 * associated with the current disk command.
583 * Make sure hardware does not choke on it.
584 *
585 * LOCKING:
586 * spin_lock_irqsave(host lock)
587 *
588 */
589static void pdc_fill_sg(struct ata_queued_cmd *qc)
590{
591 struct ata_port *ap = qc->ap;
Tejun Heof60d7012010-05-10 21:41:41 +0200592 struct ata_bmdma_prd *prd = ap->bmdma_prd;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100593 struct scatterlist *sg;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100594 const u32 SG_COUNT_ASIC_BUG = 41*4;
Tejun Heoff2aeb12007-12-05 16:43:11 +0900595 unsigned int si, idx;
596 u32 len;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100597
598 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
599 return;
600
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100601 idx = 0;
Tejun Heoff2aeb12007-12-05 16:43:11 +0900602 for_each_sg(qc->sg, sg, qc->n_elem, si) {
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100603 u32 addr, offset;
Harvey Harrison6903c0f2008-02-13 21:14:08 -0800604 u32 sg_len;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100605
606 /* determine if physical DMA addr spans 64K boundary.
607 * Note h/w doesn't support 64-bit, so we unconditionally
608 * truncate dma_addr_t to u32.
609 */
610 addr = (u32) sg_dma_address(sg);
611 sg_len = sg_dma_len(sg);
612
613 while (sg_len) {
614 offset = addr & 0xffff;
615 len = sg_len;
616 if ((offset + sg_len) > 0x10000)
617 len = 0x10000 - offset;
618
Tejun Heof60d7012010-05-10 21:41:41 +0200619 prd[idx].addr = cpu_to_le32(addr);
620 prd[idx].flags_len = cpu_to_le32(len & 0xffff);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100621 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
622
623 idx++;
624 sg_len -= len;
625 addr += len;
626 }
627 }
628
Tejun Heof60d7012010-05-10 21:41:41 +0200629 len = le32_to_cpu(prd[idx - 1].flags_len);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100630
Tejun Heoff2aeb12007-12-05 16:43:11 +0900631 if (len > SG_COUNT_ASIC_BUG) {
632 u32 addr;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100633
Tejun Heoff2aeb12007-12-05 16:43:11 +0900634 VPRINTK("Splitting last PRD.\n");
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100635
Tejun Heof60d7012010-05-10 21:41:41 +0200636 addr = le32_to_cpu(prd[idx - 1].addr);
637 prd[idx - 1].flags_len = cpu_to_le32(len - SG_COUNT_ASIC_BUG);
Tejun Heoff2aeb12007-12-05 16:43:11 +0900638 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx - 1, addr, SG_COUNT_ASIC_BUG);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100639
Tejun Heoff2aeb12007-12-05 16:43:11 +0900640 addr = addr + len - SG_COUNT_ASIC_BUG;
641 len = SG_COUNT_ASIC_BUG;
Tejun Heof60d7012010-05-10 21:41:41 +0200642 prd[idx].addr = cpu_to_le32(addr);
643 prd[idx].flags_len = cpu_to_le32(len);
Tejun Heoff2aeb12007-12-05 16:43:11 +0900644 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100645
Tejun Heoff2aeb12007-12-05 16:43:11 +0900646 idx++;
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100647 }
Tejun Heoff2aeb12007-12-05 16:43:11 +0900648
Tejun Heof60d7012010-05-10 21:41:41 +0200649 prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100650}
651
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652static void pdc_qc_prep(struct ata_queued_cmd *qc)
653{
654 struct pdc_port_priv *pp = qc->ap->private_data;
655 unsigned int i;
656
657 VPRINTK("ENTER\n");
658
659 switch (qc->tf.protocol) {
660 case ATA_PROT_DMA:
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100661 pdc_fill_sg(qc);
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200662 /*FALLTHROUGH*/
Linus Torvalds1da177e2005-04-16 15:20:36 -0700663 case ATA_PROT_NODATA:
Tejun Heof60d7012010-05-10 21:41:41 +0200664 i = pdc_pkt_header(&qc->tf, qc->ap->bmdma_prd_dma,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700665 qc->dev->devno, pp->pkt);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700666 if (qc->tf.flags & ATA_TFLAG_LBA48)
667 i = pdc_prep_lba48(&qc->tf, pp->pkt, i);
668 else
669 i = pdc_prep_lba28(&qc->tf, pp->pkt, i);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700670 pdc_pkt_footer(&qc->tf, pp->pkt, i);
671 break;
Tejun Heo0dc36882007-12-18 16:34:43 -0500672 case ATAPI_PROT_PIO:
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100673 pdc_fill_sg(qc);
Mikael Pettersson95006182007-01-09 10:51:46 +0100674 break;
Tejun Heo0dc36882007-12-18 16:34:43 -0500675 case ATAPI_PROT_DMA:
Mikael Petterssonb9ccd4a2007-10-30 14:20:49 +0100676 pdc_fill_sg(qc);
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100677 /*FALLTHROUGH*/
Tejun Heo0dc36882007-12-18 16:34:43 -0500678 case ATAPI_PROT_NODATA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +0100679 pdc_atapi_pkt(qc);
Mikael Pettersson95006182007-01-09 10:51:46 +0100680 break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700681 default:
682 break;
683 }
684}
685
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100686static int pdc_is_sataii_tx4(unsigned long flags)
687{
688 const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS;
689 return (flags & mask) == mask;
690}
691
692static unsigned int pdc_port_no_to_ata_no(unsigned int port_no,
693 int is_sataii_tx4)
694{
695 static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2};
696 return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no;
697}
698
699static unsigned int pdc_sata_nr_ports(const struct ata_port *ap)
700{
701 return (ap->flags & PDC_FLAG_4_PORTS) ? 4 : 2;
702}
703
704static unsigned int pdc_sata_ata_port_to_ata_no(const struct ata_port *ap)
705{
706 const struct ata_host *host = ap->host;
707 unsigned int nr_ports = pdc_sata_nr_ports(ap);
708 unsigned int i;
709
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200710 for (i = 0; i < nr_ports && host->ports[i] != ap; ++i)
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100711 ;
712 BUG_ON(i >= nr_ports);
713 return pdc_port_no_to_ata_no(i, pdc_is_sataii_tx4(ap->flags));
714}
715
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100716static void pdc_freeze(struct ata_port *ap)
717{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200718 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100719 u32 tmp;
720
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200721 tmp = readl(ata_mmio + PDC_CTLSTAT);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100722 tmp |= PDC_IRQ_DISABLE;
723 tmp &= ~PDC_DMA_ENABLE;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200724 writel(tmp, ata_mmio + PDC_CTLSTAT);
725 readl(ata_mmio + PDC_CTLSTAT); /* flush */
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100726}
727
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100728static void pdc_sata_freeze(struct ata_port *ap)
729{
730 struct ata_host *host = ap->host;
731 void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR];
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200732 unsigned int hotplug_offset = PDC2_SATA_PLUG_CSR;
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100733 unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap);
734 u32 hotplug_status;
735
736 /* Disable hotplug events on this port.
737 *
738 * Locking:
739 * 1) hotplug register accesses must be serialised via host->lock
740 * 2) ap->lock == &ap->host->lock
741 * 3) ->freeze() and ->thaw() are called with ap->lock held
742 */
743 hotplug_status = readl(host_mmio + hotplug_offset);
744 hotplug_status |= 0x11 << (ata_no + 16);
745 writel(hotplug_status, host_mmio + hotplug_offset);
746 readl(host_mmio + hotplug_offset); /* flush */
747
748 pdc_freeze(ap);
749}
750
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100751static void pdc_thaw(struct ata_port *ap)
752{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200753 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100754 u32 tmp;
755
756 /* clear IRQ */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200757 readl(ata_mmio + PDC_COMMAND);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100758
759 /* turn IRQ back on */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200760 tmp = readl(ata_mmio + PDC_CTLSTAT);
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100761 tmp &= ~PDC_IRQ_DISABLE;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200762 writel(tmp, ata_mmio + PDC_CTLSTAT);
763 readl(ata_mmio + PDC_CTLSTAT); /* flush */
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100764}
765
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100766static void pdc_sata_thaw(struct ata_port *ap)
767{
768 struct ata_host *host = ap->host;
769 void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR];
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200770 unsigned int hotplug_offset = PDC2_SATA_PLUG_CSR;
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100771 unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap);
772 u32 hotplug_status;
773
774 pdc_thaw(ap);
775
776 /* Enable hotplug events on this port.
777 * Locking: see pdc_sata_freeze().
778 */
779 hotplug_status = readl(host_mmio + hotplug_offset);
780 hotplug_status |= 0x11 << ata_no;
781 hotplug_status &= ~(0x11 << (ata_no + 16));
782 writel(hotplug_status, host_mmio + hotplug_offset);
783 readl(host_mmio + hotplug_offset); /* flush */
784}
785
Mikael Petterssoncadef672008-10-31 08:03:55 +0100786static int pdc_pata_softreset(struct ata_link *link, unsigned int *class,
787 unsigned long deadline)
788{
789 pdc_reset_port(link->ap);
790 return ata_sff_softreset(link, class, deadline);
791}
792
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200793static unsigned int pdc_ata_port_to_ata_no(const struct ata_port *ap)
794{
795 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
796 void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR];
797
798 /* ata_mmio == host_mmio + 0x200 + ata_no * 0x80 */
799 return (ata_mmio - host_mmio - 0x200) / 0x80;
800}
801
802static void pdc_hard_reset_port(struct ata_port *ap)
803{
804 void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR];
805 void __iomem *pcictl_b1_mmio = host_mmio + PDC_PCI_CTL + 1;
806 unsigned int ata_no = pdc_ata_port_to_ata_no(ap);
Mikael Pettersson3100d492012-09-16 20:53:43 +0200807 struct pdc_host_priv *hpriv = ap->host->private_data;
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200808 u8 tmp;
809
Mikael Pettersson3100d492012-09-16 20:53:43 +0200810 spin_lock(&hpriv->hard_reset_lock);
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200811
812 tmp = readb(pcictl_b1_mmio);
813 tmp &= ~(0x10 << ata_no);
814 writeb(tmp, pcictl_b1_mmio);
815 readb(pcictl_b1_mmio); /* flush */
816 udelay(100);
817 tmp |= (0x10 << ata_no);
818 writeb(tmp, pcictl_b1_mmio);
819 readb(pcictl_b1_mmio); /* flush */
820
Mikael Pettersson3100d492012-09-16 20:53:43 +0200821 spin_unlock(&hpriv->hard_reset_lock);
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200822}
823
Mikael Petterssoncadef672008-10-31 08:03:55 +0100824static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class,
825 unsigned long deadline)
826{
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200827 if (link->ap->flags & PDC_FLAG_GEN_II)
828 pdc_not_at_command_packet_phase(link->ap);
829 /* hotplug IRQs should have been masked by pdc_sata_freeze() */
830 pdc_hard_reset_port(link->ap);
Mikael Petterssoncadef672008-10-31 08:03:55 +0100831 pdc_reset_port(link->ap);
Mikael Petterssonff7cddf2009-09-15 15:08:47 +0200832
833 /* sata_promise can't reliably acquire the first D2H Reg FIS
834 * after hardreset. Do non-waiting hardreset and request
835 * follow-up SRST.
836 */
837 return sata_std_hardreset(link, class, deadline);
Mikael Petterssoncadef672008-10-31 08:03:55 +0100838}
839
Tejun Heoa1efdab2008-03-25 12:22:50 +0900840static void pdc_error_handler(struct ata_port *ap)
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100841{
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100842 if (!(ap->pflags & ATA_PFLAG_FROZEN))
843 pdc_reset_port(ap);
844
Tejun Heofe06e5f2010-05-10 21:41:39 +0200845 ata_sff_error_handler(ap);
Mikael Pettersson724114a2007-03-11 21:20:43 +0100846}
847
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100848static void pdc_post_internal_cmd(struct ata_queued_cmd *qc)
849{
850 struct ata_port *ap = qc->ap;
851
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100852 /* make DMA engine forget about the failed command */
Tejun Heoa51d6442007-03-20 15:24:11 +0900853 if (qc->flags & ATA_QCFLAG_FAILED)
Mikael Pettersson25b93d82006-12-07 00:06:51 +0100854 pdc_reset_port(ap);
855}
856
Mikael Pettersson176efb02007-03-14 09:51:35 +0100857static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc,
858 u32 port_status, u32 err_mask)
859{
Tejun Heo9af5c9c2007-08-06 18:36:22 +0900860 struct ata_eh_info *ehi = &ap->link.eh_info;
Mikael Pettersson176efb02007-03-14 09:51:35 +0100861 unsigned int ac_err_mask = 0;
862
863 ata_ehi_clear_desc(ehi);
864 ata_ehi_push_desc(ehi, "port_status 0x%08x", port_status);
865 port_status &= err_mask;
866
867 if (port_status & PDC_DRIVE_ERR)
868 ac_err_mask |= AC_ERR_DEV;
869 if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR))
Mikael Petterssona2342f42010-01-09 23:32:06 +0100870 ac_err_mask |= AC_ERR_OTHER;
Mikael Pettersson176efb02007-03-14 09:51:35 +0100871 if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR))
872 ac_err_mask |= AC_ERR_ATA_BUS;
873 if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR
874 | PDC_PCI_SYS_ERR | PDC1_PCI_PARITY_ERR))
875 ac_err_mask |= AC_ERR_HOST_BUS;
876
Tejun Heo936fd732007-08-06 18:36:23 +0900877 if (sata_scr_valid(&ap->link)) {
Tejun Heoda3dbb12007-07-16 14:29:40 +0900878 u32 serror;
879
Tejun Heo82ef04f2008-07-31 17:02:40 +0900880 pdc_sata_scr_read(&ap->link, SCR_ERROR, &serror);
Tejun Heoda3dbb12007-07-16 14:29:40 +0900881 ehi->serror |= serror;
882 }
Mikael Petterssonce2d3ab2007-04-07 14:29:51 +0200883
Mikael Pettersson176efb02007-03-14 09:51:35 +0100884 qc->err_mask |= ac_err_mask;
Mikael Petterssonce2d3ab2007-04-07 14:29:51 +0200885
886 pdc_reset_port(ap);
Mikael Pettersson8ffcfd92007-05-06 22:12:31 +0200887
888 ata_port_abort(ap);
Mikael Pettersson176efb02007-03-14 09:51:35 +0100889}
890
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200891static unsigned int pdc_host_intr(struct ata_port *ap,
892 struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700893{
Albert Leea22e2eb2005-12-05 15:38:02 +0800894 unsigned int handled = 0;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200895 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Mikael Pettersson176efb02007-03-14 09:51:35 +0100896 u32 port_status, err_mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700897
Mikael Pettersson176efb02007-03-14 09:51:35 +0100898 err_mask = PDC_ERR_MASK;
Tejun Heoeca25dc2007-04-17 23:44:07 +0900899 if (ap->flags & PDC_FLAG_GEN_II)
Mikael Pettersson176efb02007-03-14 09:51:35 +0100900 err_mask &= ~PDC1_ERR_MASK;
901 else
902 err_mask &= ~PDC2_ERR_MASK;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200903 port_status = readl(ata_mmio + PDC_GLOBAL_CTL);
Mikael Pettersson176efb02007-03-14 09:51:35 +0100904 if (unlikely(port_status & err_mask)) {
905 pdc_error_intr(ap, qc, port_status, err_mask);
906 return 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700907 }
908
909 switch (qc->tf.protocol) {
910 case ATA_PROT_DMA:
911 case ATA_PROT_NODATA:
Tejun Heo0dc36882007-12-18 16:34:43 -0500912 case ATAPI_PROT_DMA:
913 case ATAPI_PROT_NODATA:
Albert Leea22e2eb2005-12-05 15:38:02 +0800914 qc->err_mask |= ac_err_mask(ata_wait_idle(ap));
915 ata_qc_complete(qc);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700916 handled = 1;
917 break;
Mikael Petterssond0e58032007-06-19 21:53:30 +0200918 default:
Albert Leeee500aa2005-09-27 17:34:38 +0800919 ap->stats.idle_irq++;
920 break;
Mikael Petterssond0e58032007-06-19 21:53:30 +0200921 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700922
Albert Leeee500aa2005-09-27 17:34:38 +0800923 return handled;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700924}
925
926static void pdc_irq_clear(struct ata_port *ap)
927{
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200928 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700929
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200930 readl(ata_mmio + PDC_COMMAND);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700931}
932
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400933static irqreturn_t pdc_interrupt(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700934{
Jeff Garzikcca39742006-08-24 03:19:22 -0400935 struct ata_host *host = dev_instance;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700936 struct ata_port *ap;
937 u32 mask = 0;
938 unsigned int i, tmp;
939 unsigned int handled = 0;
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200940 void __iomem *host_mmio;
Mikael Petterssona77720a2007-07-03 01:09:05 +0200941 unsigned int hotplug_offset, ata_no;
942 u32 hotplug_status;
943 int is_sataii_tx4;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700944
945 VPRINTK("ENTER\n");
946
Tejun Heo0d5ff562007-02-01 15:06:36 +0900947 if (!host || !host->iomap[PDC_MMIO_BAR]) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700948 VPRINTK("QUICK EXIT\n");
949 return IRQ_NONE;
950 }
951
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200952 host_mmio = host->iomap[PDC_MMIO_BAR];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700953
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100954 spin_lock(&host->lock);
955
Mikael Petterssona77720a2007-07-03 01:09:05 +0200956 /* read and clear hotplug flags for all ports */
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200957 if (host->ports[0]->flags & PDC_FLAG_GEN_II) {
Mikael Petterssona77720a2007-07-03 01:09:05 +0200958 hotplug_offset = PDC2_SATA_PLUG_CSR;
Mikael Pettersson0ae66542009-09-15 15:07:32 +0200959 hotplug_status = readl(host_mmio + hotplug_offset);
960 if (hotplug_status & 0xff)
961 writel(hotplug_status | 0xff, host_mmio + hotplug_offset);
962 hotplug_status &= 0xff; /* clear uninteresting bits */
963 } else
964 hotplug_status = 0;
Mikael Petterssona77720a2007-07-03 01:09:05 +0200965
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 /* reading should also clear interrupts */
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200967 mask = readl(host_mmio + PDC_INT_SEQMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700968
Mikael Petterssona77720a2007-07-03 01:09:05 +0200969 if (mask == 0xffffffff && hotplug_status == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700970 VPRINTK("QUICK EXIT 2\n");
Mikael Petterssonc07a9c42008-03-23 18:41:01 +0100971 goto done_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700972 }
Luke Kosewski6340f012006-01-28 12:39:29 -0500973
Mikael Pettersson7715a6f2008-05-17 18:49:09 +0200974 mask &= 0xffff; /* only 16 SEQIDs possible */
Mikael Petterssona77720a2007-07-03 01:09:05 +0200975 if (mask == 0 && hotplug_status == 0) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700976 VPRINTK("QUICK EXIT 3\n");
Luke Kosewski6340f012006-01-28 12:39:29 -0500977 goto done_irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700978 }
979
Mikael Pettersson821d22c2008-05-17 18:48:15 +0200980 writel(mask, host_mmio + PDC_INT_SEQMASK);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700981
Mikael Petterssona77720a2007-07-03 01:09:05 +0200982 is_sataii_tx4 = pdc_is_sataii_tx4(host->ports[0]->flags);
983
Jeff Garzikcca39742006-08-24 03:19:22 -0400984 for (i = 0; i < host->n_ports; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700985 VPRINTK("port %u\n", i);
Jeff Garzikcca39742006-08-24 03:19:22 -0400986 ap = host->ports[i];
Mikael Petterssona77720a2007-07-03 01:09:05 +0200987
988 /* check for a plug or unplug event */
989 ata_no = pdc_port_no_to_ata_no(i, is_sataii_tx4);
990 tmp = hotplug_status & (0x11 << ata_no);
Tejun Heo3e4ec342010-05-10 21:41:30 +0200991 if (tmp) {
Tejun Heo9af5c9c2007-08-06 18:36:22 +0900992 struct ata_eh_info *ehi = &ap->link.eh_info;
Mikael Petterssona77720a2007-07-03 01:09:05 +0200993 ata_ehi_clear_desc(ehi);
994 ata_ehi_hotplugged(ehi);
995 ata_ehi_push_desc(ehi, "hotplug_status %#x", tmp);
996 ata_port_freeze(ap);
997 ++handled;
998 continue;
999 }
1000
1001 /* check for a packet interrupt */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001002 tmp = mask & (1 << (i + 1));
Tejun Heo3e4ec342010-05-10 21:41:30 +02001003 if (tmp) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001004 struct ata_queued_cmd *qc;
1005
Tejun Heo9af5c9c2007-08-06 18:36:22 +09001006 qc = ata_qc_from_tag(ap, ap->link.active_tag);
Albert Leee50362e2005-09-27 17:39:50 +08001007 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001008 handled += pdc_host_intr(ap, qc);
1009 }
1010 }
1011
Linus Torvalds1da177e2005-04-16 15:20:36 -07001012 VPRINTK("EXIT\n");
1013
Luke Kosewski6340f012006-01-28 12:39:29 -05001014done_irq:
Jeff Garzikcca39742006-08-24 03:19:22 -04001015 spin_unlock(&host->lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001016 return IRQ_RETVAL(handled);
1017}
1018
Mikael Pettersson7715a6f2008-05-17 18:49:09 +02001019static void pdc_packet_start(struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001020{
1021 struct ata_port *ap = qc->ap;
1022 struct pdc_port_priv *pp = ap->private_data;
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001023 void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR];
1024 void __iomem *ata_mmio = ap->ioaddr.cmd_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001025 unsigned int port_no = ap->port_no;
1026 u8 seq = (u8) (port_no + 1);
1027
1028 VPRINTK("ENTER, ap %p\n", ap);
1029
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001030 writel(0x00000001, host_mmio + (seq * 4));
1031 readl(host_mmio + (seq * 4)); /* flush */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001032
1033 pp->pkt[2] = seq;
1034 wmb(); /* flush PRD, pkt writes */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001035 writel(pp->pkt_dma, ata_mmio + PDC_PKT_SUBMIT);
1036 readl(ata_mmio + PDC_PKT_SUBMIT); /* flush */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001037}
1038
Tejun Heo9363c382008-04-07 22:47:16 +09001039static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001040{
1041 switch (qc->tf.protocol) {
Tejun Heo0dc36882007-12-18 16:34:43 -05001042 case ATAPI_PROT_NODATA:
Mikael Petterssonfba6edb2007-01-13 21:32:30 +01001043 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
1044 break;
1045 /*FALLTHROUGH*/
Tejun Heo51b94d22007-06-08 13:46:55 -07001046 case ATA_PROT_NODATA:
1047 if (qc->tf.flags & ATA_TFLAG_POLLING)
1048 break;
1049 /*FALLTHROUGH*/
Tejun Heo0dc36882007-12-18 16:34:43 -05001050 case ATAPI_PROT_DMA:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001051 case ATA_PROT_DMA:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001052 pdc_packet_start(qc);
1053 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001054 default:
1055 break;
1056 }
Tejun Heo9363c382008-04-07 22:47:16 +09001057 return ata_sff_qc_issue(qc);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001058}
1059
Jeff Garzik057ace52005-10-22 14:27:05 -04001060static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001061{
Tejun Heo0dc36882007-12-18 16:34:43 -05001062 WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA);
Tejun Heo9363c382008-04-07 22:47:16 +09001063 ata_sff_tf_load(ap, tf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001064}
1065
Jeff Garzik5796d1c2007-10-26 00:03:37 -04001066static void pdc_exec_command_mmio(struct ata_port *ap,
1067 const struct ata_taskfile *tf)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001068{
Tejun Heo0dc36882007-12-18 16:34:43 -05001069 WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA);
Tejun Heo9363c382008-04-07 22:47:16 +09001070 ata_sff_exec_command(ap, tf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001071}
1072
Mikael Pettersson95006182007-01-09 10:51:46 +01001073static int pdc_check_atapi_dma(struct ata_queued_cmd *qc)
1074{
1075 u8 *scsicmd = qc->scsicmd->cmnd;
1076 int pio = 1; /* atapi dma off by default */
1077
1078 /* Whitelist commands that may use DMA. */
1079 switch (scsicmd[0]) {
1080 case WRITE_12:
1081 case WRITE_10:
1082 case WRITE_6:
1083 case READ_12:
1084 case READ_10:
1085 case READ_6:
1086 case 0xad: /* READ_DVD_STRUCTURE */
1087 case 0xbe: /* READ_CD */
1088 pio = 0;
1089 }
1090 /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */
1091 if (scsicmd[0] == WRITE_10) {
Jeff Garzik5796d1c2007-10-26 00:03:37 -04001092 unsigned int lba =
1093 (scsicmd[2] << 24) |
1094 (scsicmd[3] << 16) |
1095 (scsicmd[4] << 8) |
1096 scsicmd[5];
Mikael Pettersson95006182007-01-09 10:51:46 +01001097 if (lba >= 0xFFFF4FA2)
1098 pio = 1;
1099 }
1100 return pio;
1101}
1102
Mikael Pettersson724114a2007-03-11 21:20:43 +01001103static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc)
Mikael Pettersson95006182007-01-09 10:51:46 +01001104{
Mikael Pettersson95006182007-01-09 10:51:46 +01001105 /* First generation chips cannot use ATAPI DMA on SATA ports */
Mikael Pettersson724114a2007-03-11 21:20:43 +01001106 return 1;
Mikael Pettersson95006182007-01-09 10:51:46 +01001107}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001108
Tejun Heoeca25dc2007-04-17 23:44:07 +09001109static void pdc_ata_setup_port(struct ata_port *ap,
1110 void __iomem *base, void __iomem *scr_addr)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001111{
Tejun Heoeca25dc2007-04-17 23:44:07 +09001112 ap->ioaddr.cmd_addr = base;
1113 ap->ioaddr.data_addr = base;
1114 ap->ioaddr.feature_addr =
1115 ap->ioaddr.error_addr = base + 0x4;
1116 ap->ioaddr.nsect_addr = base + 0x8;
1117 ap->ioaddr.lbal_addr = base + 0xc;
1118 ap->ioaddr.lbam_addr = base + 0x10;
1119 ap->ioaddr.lbah_addr = base + 0x14;
1120 ap->ioaddr.device_addr = base + 0x18;
1121 ap->ioaddr.command_addr =
1122 ap->ioaddr.status_addr = base + 0x1c;
1123 ap->ioaddr.altstatus_addr =
1124 ap->ioaddr.ctl_addr = base + 0x38;
1125 ap->ioaddr.scr_addr = scr_addr;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001126}
1127
Tejun Heoeca25dc2007-04-17 23:44:07 +09001128static void pdc_host_init(struct ata_host *host)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001129{
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001130 void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR];
Tejun Heoeca25dc2007-04-17 23:44:07 +09001131 int is_gen2 = host->ports[0]->flags & PDC_FLAG_GEN_II;
Mikael Petterssond324d4622006-12-06 09:55:43 +01001132 int hotplug_offset;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001133 u32 tmp;
1134
Tejun Heoeca25dc2007-04-17 23:44:07 +09001135 if (is_gen2)
Mikael Petterssond324d4622006-12-06 09:55:43 +01001136 hotplug_offset = PDC2_SATA_PLUG_CSR;
1137 else
1138 hotplug_offset = PDC_SATA_PLUG_CSR;
1139
Linus Torvalds1da177e2005-04-16 15:20:36 -07001140 /*
1141 * Except for the hotplug stuff, this is voodoo from the
1142 * Promise driver. Label this entire section
1143 * "TODO: figure out why we do this"
1144 */
1145
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001146 /* enable BMR_BURST, maybe change FIFO_SHD to 8 dwords */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001147 tmp = readl(host_mmio + PDC_FLASH_CTL);
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001148 tmp |= 0x02000; /* bit 13 (enable bmr burst) */
Tejun Heoeca25dc2007-04-17 23:44:07 +09001149 if (!is_gen2)
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001150 tmp |= 0x10000; /* bit 16 (fifo threshold at 8 dw) */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001151 writel(tmp, host_mmio + PDC_FLASH_CTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001152
1153 /* clear plug/unplug flags for all ports */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001154 tmp = readl(host_mmio + hotplug_offset);
1155 writel(tmp | 0xff, host_mmio + hotplug_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001156
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001157 tmp = readl(host_mmio + hotplug_offset);
Mikael Pettersson0ae66542009-09-15 15:07:32 +02001158 if (is_gen2) /* unmask plug/unplug ints */
1159 writel(tmp & ~0xff0000, host_mmio + hotplug_offset);
1160 else /* mask plug/unplug ints */
1161 writel(tmp | 0xff0000, host_mmio + hotplug_offset);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001162
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001163 /* don't initialise TBG or SLEW on 2nd generation chips */
Tejun Heoeca25dc2007-04-17 23:44:07 +09001164 if (is_gen2)
Mikael Petterssonb2d1eee2006-11-22 22:00:15 +01001165 return;
1166
Linus Torvalds1da177e2005-04-16 15:20:36 -07001167 /* reduce TBG clock to 133 Mhz. */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001168 tmp = readl(host_mmio + PDC_TBG_MODE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001169 tmp &= ~0x30000; /* clear bit 17, 16*/
1170 tmp |= 0x10000; /* set bit 17:16 = 0:1 */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001171 writel(tmp, host_mmio + PDC_TBG_MODE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001172
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001173 readl(host_mmio + PDC_TBG_MODE); /* flush */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001174 msleep(10);
1175
1176 /* adjust slew rate control register. */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001177 tmp = readl(host_mmio + PDC_SLEW_CTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001178 tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */
1179 tmp |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001180 writel(tmp, host_mmio + PDC_SLEW_CTL);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001181}
1182
Jeff Garzik5796d1c2007-10-26 00:03:37 -04001183static int pdc_ata_init_one(struct pci_dev *pdev,
1184 const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001185{
Tejun Heoeca25dc2007-04-17 23:44:07 +09001186 const struct ata_port_info *pi = &pdc_port_info[ent->driver_data];
1187 const struct ata_port_info *ppi[PDC_MAX_PORTS];
1188 struct ata_host *host;
Mikael Pettersson3100d492012-09-16 20:53:43 +02001189 struct pdc_host_priv *hpriv;
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001190 void __iomem *host_mmio;
Tejun Heoeca25dc2007-04-17 23:44:07 +09001191 int n_ports, i, rc;
Mikael Pettersson5ac2fe52007-05-06 22:14:01 +02001192 int is_sataii_tx4;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001193
Joe Perches06296a12011-04-15 15:52:00 -07001194 ata_print_version_once(&pdev->dev, DRV_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001195
Tejun Heoeca25dc2007-04-17 23:44:07 +09001196 /* enable and acquire resources */
Tejun Heo24dc5f32007-01-20 16:00:28 +09001197 rc = pcim_enable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001198 if (rc)
1199 return rc;
1200
Tejun Heo0d5ff562007-02-01 15:06:36 +09001201 rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME);
1202 if (rc == -EBUSY)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001203 pcim_pin_device(pdev);
Tejun Heo0d5ff562007-02-01 15:06:36 +09001204 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001205 return rc;
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001206 host_mmio = pcim_iomap_table(pdev)[PDC_MMIO_BAR];
Tejun Heoeca25dc2007-04-17 23:44:07 +09001207
1208 /* determine port configuration and setup host */
1209 n_ports = 2;
1210 if (pi->flags & PDC_FLAG_4_PORTS)
1211 n_ports = 4;
1212 for (i = 0; i < n_ports; i++)
1213 ppi[i] = pi;
1214
1215 if (pi->flags & PDC_FLAG_SATA_PATA) {
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001216 u8 tmp = readb(host_mmio + PDC_FLASH_CTL + 1);
Mikael Petterssond0e58032007-06-19 21:53:30 +02001217 if (!(tmp & 0x80))
Tejun Heoeca25dc2007-04-17 23:44:07 +09001218 ppi[n_ports++] = pi + 1;
Tejun Heoeca25dc2007-04-17 23:44:07 +09001219 }
1220
1221 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
1222 if (!host) {
Joe Perchesa44fec12011-04-15 15:51:58 -07001223 dev_err(&pdev->dev, "failed to allocate host\n");
Tejun Heoeca25dc2007-04-17 23:44:07 +09001224 return -ENOMEM;
1225 }
Mikael Pettersson3100d492012-09-16 20:53:43 +02001226 hpriv = devm_kzalloc(&pdev->dev, sizeof *hpriv, GFP_KERNEL);
1227 if (!hpriv)
1228 return -ENOMEM;
1229 spin_lock_init(&hpriv->hard_reset_lock);
1230 host->private_data = hpriv;
Tejun Heoeca25dc2007-04-17 23:44:07 +09001231 host->iomap = pcim_iomap_table(pdev);
1232
Mikael Petterssond0e58032007-06-19 21:53:30 +02001233 is_sataii_tx4 = pdc_is_sataii_tx4(pi->flags);
Mikael Pettersson5ac2fe52007-05-06 22:14:01 +02001234 for (i = 0; i < host->n_ports; i++) {
Tejun Heocbcdd872007-08-18 13:14:55 +09001235 struct ata_port *ap = host->ports[i];
Mikael Petterssond0e58032007-06-19 21:53:30 +02001236 unsigned int ata_no = pdc_port_no_to_ata_no(i, is_sataii_tx4);
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001237 unsigned int ata_offset = 0x200 + ata_no * 0x80;
Tejun Heocbcdd872007-08-18 13:14:55 +09001238 unsigned int scr_offset = 0x400 + ata_no * 0x100;
1239
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001240 pdc_ata_setup_port(ap, host_mmio + ata_offset, host_mmio + scr_offset);
Tejun Heocbcdd872007-08-18 13:14:55 +09001241
1242 ata_port_pbar_desc(ap, PDC_MMIO_BAR, -1, "mmio");
Mikael Pettersson821d22c2008-05-17 18:48:15 +02001243 ata_port_pbar_desc(ap, PDC_MMIO_BAR, ata_offset, "ata");
Mikael Pettersson5ac2fe52007-05-06 22:14:01 +02001244 }
Tejun Heoeca25dc2007-04-17 23:44:07 +09001245
1246 /* initialize adapter */
1247 pdc_host_init(host);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001248
1249 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
1250 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001251 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001252 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
1253 if (rc)
Tejun Heo24dc5f32007-01-20 16:00:28 +09001254 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001255
Tejun Heoeca25dc2007-04-17 23:44:07 +09001256 /* start host, request IRQ and attach */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001257 pci_set_master(pdev);
Tejun Heoeca25dc2007-04-17 23:44:07 +09001258 return ata_host_activate(host, pdev->irq, pdc_interrupt, IRQF_SHARED,
1259 &pdc_ata_sht);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001260}
1261
Axel Lin2fc75da2012-04-19 13:43:05 +08001262module_pci_driver(pdc_ata_pci_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001263
Linus Torvalds1da177e2005-04-16 15:20:36 -07001264MODULE_AUTHOR("Jeff Garzik");
Tobias Lorenzf497ba72005-05-12 15:51:01 -04001265MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver");
Linus Torvalds1da177e2005-04-16 15:20:36 -07001266MODULE_LICENSE("GPL");
1267MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl);
1268MODULE_VERSION(DRV_VERSION);