Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr> |
| 3 | * Copyright 2012 Armadeus Systems <support@armadeus.com> |
| 4 | * |
| 5 | * Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix |
| 6 | * |
| 7 | * The code contained herein is licensed under the GNU General Public |
| 8 | * License. You may obtain a copy of the GNU General Public License |
| 9 | * Version 2 or later at the following locations: |
| 10 | * |
| 11 | * http://www.opensource.org/licenses/gpl-license.html |
| 12 | * http://www.gnu.org/copyleft/gpl.html |
| 13 | */ |
| 14 | |
| 15 | /dts-v1/; |
Shawn Guo | 36dffd8 | 2013-04-07 10:49:34 +0800 | [diff] [blame] | 16 | #include "imx27.dtsi" |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 17 | |
| 18 | / { |
| 19 | model = "Armadeus Systems APF27 module"; |
| 20 | compatible = "armadeus,imx27-apf27", "fsl,imx27"; |
| 21 | |
| 22 | memory { |
| 23 | reg = <0xa0000000 0x04000000>; |
| 24 | }; |
| 25 | |
| 26 | clocks { |
| 27 | #address-cells = <1>; |
| 28 | #size-cells = <0>; |
| 29 | |
| 30 | osc26m { |
| 31 | compatible = "fsl,imx-osc26m", "fixed-clock"; |
| 32 | clock-frequency = <0>; |
| 33 | }; |
| 34 | }; |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 35 | }; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 36 | |
Gwenhael Goavec-Merou | 7672d8e | 2013-11-28 08:19:31 +0100 | [diff] [blame] | 37 | &iomuxc { |
| 38 | imx27-apf27 { |
| 39 | pinctrl_fec1: fec1grp { |
| 40 | fsl,pins = < |
| 41 | MX27_PAD_SD3_CMD__FEC_TXD0 0x0 |
| 42 | MX27_PAD_SD3_CLK__FEC_TXD1 0x0 |
| 43 | MX27_PAD_ATA_DATA0__FEC_TXD2 0x0 |
| 44 | MX27_PAD_ATA_DATA1__FEC_TXD3 0x0 |
| 45 | MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0 |
| 46 | MX27_PAD_ATA_DATA3__FEC_RXD1 0x0 |
| 47 | MX27_PAD_ATA_DATA4__FEC_RXD2 0x0 |
| 48 | MX27_PAD_ATA_DATA5__FEC_RXD3 0x0 |
| 49 | MX27_PAD_ATA_DATA6__FEC_MDIO 0x0 |
| 50 | MX27_PAD_ATA_DATA7__FEC_MDC 0x0 |
| 51 | MX27_PAD_ATA_DATA8__FEC_CRS 0x0 |
| 52 | MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0 |
| 53 | MX27_PAD_ATA_DATA10__FEC_RXD0 0x0 |
| 54 | MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0 |
| 55 | MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0 |
| 56 | MX27_PAD_ATA_DATA13__FEC_COL 0x0 |
| 57 | MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0 |
| 58 | MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0 |
| 59 | >; |
| 60 | }; |
| 61 | |
| 62 | pinctrl_uart1: uart1grp { |
| 63 | fsl,pins = < |
| 64 | MX27_PAD_UART1_TXD__UART1_TXD 0x0 |
| 65 | MX27_PAD_UART1_RXD__UART1_RXD 0x0 |
| 66 | >; |
| 67 | }; |
| 68 | }; |
| 69 | }; |
| 70 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 71 | &uart1 { |
Gwenhael Goavec-Merou | 7672d8e | 2013-11-28 08:19:31 +0100 | [diff] [blame] | 72 | pinctrl-names = "default"; |
| 73 | pinctrl-0 = <&pinctrl_uart1>; |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 74 | status = "okay"; |
| 75 | }; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 76 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 77 | &fec { |
Gwenhael Goavec-Merou | 7672d8e | 2013-11-28 08:19:31 +0100 | [diff] [blame] | 78 | pinctrl-names = "default"; |
| 79 | pinctrl-0 = <&pinctrl_fec1>; |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 80 | status = "okay"; |
| 81 | }; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 82 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 83 | &nfc { |
| 84 | status = "okay"; |
| 85 | nand-bus-width = <16>; |
| 86 | nand-ecc-mode = "hw"; |
| 87 | nand-on-flash-bbt; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 88 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 89 | partition@0 { |
| 90 | label = "u-boot"; |
| 91 | reg = <0x0 0x100000>; |
| 92 | }; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 93 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 94 | partition@100000 { |
| 95 | label = "env"; |
| 96 | reg = <0x100000 0x80000>; |
| 97 | }; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 98 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 99 | partition@180000 { |
| 100 | label = "env2"; |
| 101 | reg = <0x180000 0x80000>; |
| 102 | }; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 103 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 104 | partition@200000 { |
| 105 | label = "firmware"; |
| 106 | reg = <0x200000 0x80000>; |
| 107 | }; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 108 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 109 | partition@280000 { |
| 110 | label = "dtb"; |
| 111 | reg = <0x280000 0x80000>; |
| 112 | }; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 113 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 114 | partition@300000 { |
| 115 | label = "kernel"; |
| 116 | reg = <0x300000 0x500000>; |
| 117 | }; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 118 | |
Shawn Guo | be4ccfc | 2012-12-31 11:32:48 +0800 | [diff] [blame] | 119 | partition@800000 { |
| 120 | label = "rootfs"; |
| 121 | reg = <0x800000 0xf800000>; |
Philippe Reynes | 632506a | 2012-11-12 21:28:33 +0100 | [diff] [blame] | 122 | }; |
| 123 | }; |