blob: 4b6bf19c39c004d4b2277f11e68ac2ea59a4b753 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 Madge Ambassador ATM Adapter driver.
3 Copyright (C) 1995-1999 Madge Networks Ltd.
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18
19 The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
20 system and in the file COPYING in the Linux kernel source.
21*/
22
23/* * dedicated to the memory of Graham Gordon 1971-1998 * */
24
25#include <linux/module.h>
26#include <linux/types.h>
27#include <linux/pci.h>
28#include <linux/kernel.h>
29#include <linux/init.h>
30#include <linux/ioport.h>
31#include <linux/atmdev.h>
32#include <linux/delay.h>
33#include <linux/interrupt.h>
34
35#include <asm/atomic.h>
36#include <asm/io.h>
37#include <asm/byteorder.h>
38
39#include "ambassador.h"
40
41#define maintainer_string "Giuliano Procida at Madge Networks <gprocida@madge.com>"
42#define description_string "Madge ATM Ambassador driver"
43#define version_string "1.2.4"
44
45static inline void __init show_version (void) {
46 printk ("%s version %s\n", description_string, version_string);
47}
48
49/*
50
51 Theory of Operation
52
53 I Hardware, detection, initialisation and shutdown.
54
55 1. Supported Hardware
56
57 This driver is for the PCI ATMizer-based Ambassador card (except
58 very early versions). It is not suitable for the similar EISA "TR7"
59 card. Commercially, both cards are known as Collage Server ATM
60 adapters.
61
62 The loader supports image transfer to the card, image start and few
63 other miscellaneous commands.
64
65 Only AAL5 is supported with vpi = 0 and vci in the range 0 to 1023.
66
67 The cards are big-endian.
68
69 2. Detection
70
71 Standard PCI stuff, the early cards are detected and rejected.
72
73 3. Initialisation
74
75 The cards are reset and the self-test results are checked. The
76 microcode image is then transferred and started. This waits for a
77 pointer to a descriptor containing details of the host-based queues
78 and buffers and various parameters etc. Once they are processed
79 normal operations may begin. The BIA is read using a microcode
80 command.
81
82 4. Shutdown
83
84 This may be accomplished either by a card reset or via the microcode
85 shutdown command. Further investigation required.
86
87 5. Persistent state
88
89 The card reset does not affect PCI configuration (good) or the
90 contents of several other "shared run-time registers" (bad) which
91 include doorbell and interrupt control as well as EEPROM and PCI
92 control. The driver must be careful when modifying these registers
93 not to touch bits it does not use and to undo any changes at exit.
94
95 II Driver software
96
97 0. Generalities
98
99 The adapter is quite intelligent (fast) and has a simple interface
100 (few features). VPI is always zero, 1024 VCIs are supported. There
101 is limited cell rate support. UBR channels can be capped and ABR
102 (explicit rate, but not EFCI) is supported. There is no CBR or VBR
103 support.
104
105 1. Driver <-> Adapter Communication
106
107 Apart from the basic loader commands, the driver communicates
108 through three entities: the command queue (CQ), the transmit queue
109 pair (TXQ) and the receive queue pairs (RXQ). These three entities
110 are set up by the host and passed to the microcode just after it has
111 been started.
112
113 All queues are host-based circular queues. They are contiguous and
114 (due to hardware limitations) have some restrictions as to their
115 locations in (bus) memory. They are of the "full means the same as
116 empty so don't do that" variety since the adapter uses pointers
117 internally.
118
119 The queue pairs work as follows: one queue is for supply to the
120 adapter, items in it are pending and are owned by the adapter; the
121 other is the queue for return from the adapter, items in it have
122 been dealt with by the adapter. The host adds items to the supply
123 (TX descriptors and free RX buffer descriptors) and removes items
124 from the return (TX and RX completions). The adapter deals with out
125 of order completions.
126
127 Interrupts (card to host) and the doorbell (host to card) are used
128 for signalling.
129
130 1. CQ
131
132 This is to communicate "open VC", "close VC", "get stats" etc. to
133 the adapter. At most one command is retired every millisecond by the
134 card. There is no out of order completion or notification. The
135 driver needs to check the return code of the command, waiting as
136 appropriate.
137
138 2. TXQ
139
140 TX supply items are of variable length (scatter gather support) and
141 so the queue items are (more or less) pointers to the real thing.
142 Each TX supply item contains a unique, host-supplied handle (the skb
143 bus address seems most sensible as this works for Alphas as well,
144 there is no need to do any endian conversions on the handles).
145
146 TX return items consist of just the handles above.
147
148 3. RXQ (up to 4 of these with different lengths and buffer sizes)
149
150 RX supply items consist of a unique, host-supplied handle (the skb
151 bus address again) and a pointer to the buffer data area.
152
153 RX return items consist of the handle above, the VC, length and a
154 status word. This just screams "oh so easy" doesn't it?
155
156 Note on RX pool sizes:
157
158 Each pool should have enough buffers to handle a back-to-back stream
159 of minimum sized frames on a single VC. For example:
160
161 frame spacing = 3us (about right)
162
163 delay = IRQ lat + RX handling + RX buffer replenish = 20 (us) (a guess)
164
165 min number of buffers for one VC = 1 + delay/spacing (buffers)
166
167 delay/spacing = latency = (20+2)/3 = 7 (buffers) (rounding up)
168
169 The 20us delay assumes that there is no need to sleep; if we need to
170 sleep to get buffers we are going to drop frames anyway.
171
172 In fact, each pool should have enough buffers to support the
173 simultaneous reassembly of a separate frame on each VC and cope with
174 the case in which frames complete in round robin cell fashion on
175 each VC.
176
177 Only one frame can complete at each cell arrival, so if "n" VCs are
178 open, the worst case is to have them all complete frames together
179 followed by all starting new frames together.
180
181 desired number of buffers = n + delay/spacing
182
183 These are the extreme requirements, however, they are "n+k" for some
184 "k" so we have only the constant to choose. This is the argument
185 rx_lats which current defaults to 7.
186
187 Actually, "n ? n+k : 0" is better and this is what is implemented,
188 subject to the limit given by the pool size.
189
190 4. Driver locking
191
192 Simple spinlocks are used around the TX and RX queue mechanisms.
193 Anyone with a faster, working method is welcome to implement it.
194
195 The adapter command queue is protected with a spinlock. We always
196 wait for commands to complete.
197
198 A more complex form of locking is used around parts of the VC open
199 and close functions. There are three reasons for a lock: 1. we need
200 to do atomic rate reservation and release (not used yet), 2. Opening
201 sometimes involves two adapter commands which must not be separated
202 by another command on the same VC, 3. the changes to RX pool size
203 must be atomic. The lock needs to work over context switches, so we
204 use a semaphore.
205
206 III Hardware Features and Microcode Bugs
207
208 1. Byte Ordering
209
210 *%^"$&%^$*&^"$(%^$#&^%$(&#%$*(&^#%!"!"!*!
211
212 2. Memory access
213
214 All structures that are not accessed using DMA must be 4-byte
215 aligned (not a problem) and must not cross 4MB boundaries.
216
217 There is a DMA memory hole at E0000000-E00000FF (groan).
218
219 TX fragments (DMA read) must not cross 4MB boundaries (would be 16MB
220 but for a hardware bug).
221
222 RX buffers (DMA write) must not cross 16MB boundaries and must
223 include spare trailing bytes up to the next 4-byte boundary; they
224 will be written with rubbish.
225
226 The PLX likes to prefetch; if reading up to 4 u32 past the end of
227 each TX fragment is not a problem, then TX can be made to go a
228 little faster by passing a flag at init that disables a prefetch
229 workaround. We do not pass this flag. (new microcode only)
230
231 Now we:
232 . Note that alloc_skb rounds up size to a 16byte boundary.
233 . Ensure all areas do not traverse 4MB boundaries.
234 . Ensure all areas do not start at a E00000xx bus address.
235 (I cannot be certain, but this may always hold with Linux)
236 . Make all failures cause a loud message.
237 . Discard non-conforming SKBs (causes TX failure or RX fill delay).
238 . Discard non-conforming TX fragment descriptors (the TX fails).
239 In the future we could:
240 . Allow RX areas that traverse 4MB (but not 16MB) boundaries.
241 . Segment TX areas into some/more fragments, when necessary.
242 . Relax checks for non-DMA items (ignore hole).
243 . Give scatter-gather (iovec) requirements using ???. (?)
244
245 3. VC close is broken (only for new microcode)
246
247 The VC close adapter microcode command fails to do anything if any
248 frames have been received on the VC but none have been transmitted.
249 Frames continue to be reassembled and passed (with IRQ) to the
250 driver.
251
252 IV To Do List
253
254 . Fix bugs!
255
256 . Timer code may be broken.
257
258 . Deal with buggy VC close (somehow) in microcode 12.
259
260 . Handle interrupted and/or non-blocking writes - is this a job for
261 the protocol layer?
262
263 . Add code to break up TX fragments when they span 4MB boundaries.
264
265 . Add SUNI phy layer (need to know where SUNI lives on card).
266
267 . Implement a tx_alloc fn to (a) satisfy TX alignment etc. and (b)
268 leave extra headroom space for Ambassador TX descriptors.
269
270 . Understand these elements of struct atm_vcc: recvq (proto?),
271 sleep, callback, listenq, backlog_quota, reply and user_back.
272
273 . Adjust TX/RX skb allocation to favour IP with LANE/CLIP (configurable).
274
275 . Impose a TX-pending limit (2?) on each VC, help avoid TX q overflow.
276
277 . Decide whether RX buffer recycling is or can be made completely safe;
278 turn it back on. It looks like Werner is going to axe this.
279
280 . Implement QoS changes on open VCs (involves extracting parts of VC open
281 and close into separate functions and using them to make changes).
282
283 . Hack on command queue so that someone can issue multiple commands and wait
284 on the last one (OR only "no-op" or "wait" commands are waited for).
285
286 . Eliminate need for while-schedule around do_command.
287
288*/
289
290/********** microcode **********/
291
292#ifdef AMB_NEW_MICROCODE
293#define UCODE(x) UCODE2(atmsar12.x)
294#else
295#define UCODE(x) UCODE2(atmsar11.x)
296#endif
297#define UCODE2(x) #x
298
299static u32 __devinitdata ucode_start =
300#include UCODE(start)
301;
302
303static region __devinitdata ucode_regions[] = {
304#include UCODE(regions)
305 { 0, 0 }
306};
307
308static u32 __devinitdata ucode_data[] = {
309#include UCODE(data)
310 0xdeadbeef
311};
312
313static void do_housekeeping (unsigned long arg);
314/********** globals **********/
315
316static unsigned short debug = 0;
317static unsigned int cmds = 8;
318static unsigned int txs = 32;
319static unsigned int rxs[NUM_RX_POOLS] = { 64, 64, 64, 64 };
320static unsigned int rxs_bs[NUM_RX_POOLS] = { 4080, 12240, 36720, 65535 };
321static unsigned int rx_lats = 7;
322static unsigned char pci_lat = 0;
323
324static const unsigned long onegigmask = -1 << 30;
325
326/********** access to adapter **********/
327
328static inline void wr_plain (const amb_dev * dev, size_t addr, u32 data) {
329 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x", addr, data);
330#ifdef AMB_MMIO
331 dev->membase[addr / sizeof(u32)] = data;
332#else
333 outl (data, dev->iobase + addr);
334#endif
335}
336
337static inline u32 rd_plain (const amb_dev * dev, size_t addr) {
338#ifdef AMB_MMIO
339 u32 data = dev->membase[addr / sizeof(u32)];
340#else
341 u32 data = inl (dev->iobase + addr);
342#endif
343 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x", addr, data);
344 return data;
345}
346
347static inline void wr_mem (const amb_dev * dev, size_t addr, u32 data) {
348 __be32 be = cpu_to_be32 (data);
349 PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x b[%08x]", addr, data, be);
350#ifdef AMB_MMIO
351 dev->membase[addr / sizeof(u32)] = be;
352#else
353 outl (be, dev->iobase + addr);
354#endif
355}
356
357static inline u32 rd_mem (const amb_dev * dev, size_t addr) {
358#ifdef AMB_MMIO
359 __be32 be = dev->membase[addr / sizeof(u32)];
360#else
361 __be32 be = inl (dev->iobase + addr);
362#endif
363 u32 data = be32_to_cpu (be);
364 PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x b[%08x]", addr, data, be);
365 return data;
366}
367
368/********** dump routines **********/
369
370static inline void dump_registers (const amb_dev * dev) {
371#ifdef DEBUG_AMBASSADOR
372 if (debug & DBG_REGS) {
373 size_t i;
374 PRINTD (DBG_REGS, "reading PLX control: ");
375 for (i = 0x00; i < 0x30; i += sizeof(u32))
376 rd_mem (dev, i);
377 PRINTD (DBG_REGS, "reading mailboxes: ");
378 for (i = 0x40; i < 0x60; i += sizeof(u32))
379 rd_mem (dev, i);
380 PRINTD (DBG_REGS, "reading doorb irqev irqen reset:");
381 for (i = 0x60; i < 0x70; i += sizeof(u32))
382 rd_mem (dev, i);
383 }
384#else
385 (void) dev;
386#endif
387 return;
388}
389
390static inline void dump_loader_block (volatile loader_block * lb) {
391#ifdef DEBUG_AMBASSADOR
392 unsigned int i;
393 PRINTDB (DBG_LOAD, "lb @ %p; res: %d, cmd: %d, pay:",
394 lb, be32_to_cpu (lb->result), be32_to_cpu (lb->command));
395 for (i = 0; i < MAX_COMMAND_DATA; ++i)
396 PRINTDM (DBG_LOAD, " %08x", be32_to_cpu (lb->payload.data[i]));
397 PRINTDE (DBG_LOAD, ", vld: %08x", be32_to_cpu (lb->valid));
398#else
399 (void) lb;
400#endif
401 return;
402}
403
404static inline void dump_command (command * cmd) {
405#ifdef DEBUG_AMBASSADOR
406 unsigned int i;
407 PRINTDB (DBG_CMD, "cmd @ %p, req: %08x, pars:",
408 cmd, /*be32_to_cpu*/ (cmd->request));
409 for (i = 0; i < 3; ++i)
410 PRINTDM (DBG_CMD, " %08x", /*be32_to_cpu*/ (cmd->args.par[i]));
411 PRINTDE (DBG_CMD, "");
412#else
413 (void) cmd;
414#endif
415 return;
416}
417
418static inline void dump_skb (char * prefix, unsigned int vc, struct sk_buff * skb) {
419#ifdef DEBUG_AMBASSADOR
420 unsigned int i;
421 unsigned char * data = skb->data;
422 PRINTDB (DBG_DATA, "%s(%u) ", prefix, vc);
423 for (i=0; i<skb->len && i < 256;i++)
424 PRINTDM (DBG_DATA, "%02x ", data[i]);
425 PRINTDE (DBG_DATA,"");
426#else
427 (void) prefix;
428 (void) vc;
429 (void) skb;
430#endif
431 return;
432}
433
434/********** check memory areas for use by Ambassador **********/
435
436/* see limitations under Hardware Features */
437
438static inline int check_area (void * start, size_t length) {
439 // assumes length > 0
440 const u32 fourmegmask = -1 << 22;
441 const u32 twofivesixmask = -1 << 8;
442 const u32 starthole = 0xE0000000;
443 u32 startaddress = virt_to_bus (start);
444 u32 lastaddress = startaddress+length-1;
445 if ((startaddress ^ lastaddress) & fourmegmask ||
446 (startaddress & twofivesixmask) == starthole) {
447 PRINTK (KERN_ERR, "check_area failure: [%x,%x] - mail maintainer!",
448 startaddress, lastaddress);
449 return -1;
450 } else {
451 return 0;
452 }
453}
454
455/********** free an skb (as per ATM device driver documentation) **********/
456
457static inline void amb_kfree_skb (struct sk_buff * skb) {
458 if (ATM_SKB(skb)->vcc->pop) {
459 ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
460 } else {
461 dev_kfree_skb_any (skb);
462 }
463}
464
465/********** TX completion **********/
466
467static inline void tx_complete (amb_dev * dev, tx_out * tx) {
468 tx_simple * tx_descr = bus_to_virt (tx->handle);
469 struct sk_buff * skb = tx_descr->skb;
470
471 PRINTD (DBG_FLOW|DBG_TX, "tx_complete %p %p", dev, tx);
472
473 // VC layer stats
474 atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
475
476 // free the descriptor
477 kfree (tx_descr);
478
479 // free the skb
480 amb_kfree_skb (skb);
481
482 dev->stats.tx_ok++;
483 return;
484}
485
486/********** RX completion **********/
487
488static void rx_complete (amb_dev * dev, rx_out * rx) {
489 struct sk_buff * skb = bus_to_virt (rx->handle);
490 u16 vc = be16_to_cpu (rx->vc);
491 // unused: u16 lec_id = be16_to_cpu (rx->lec_id);
492 u16 status = be16_to_cpu (rx->status);
493 u16 rx_len = be16_to_cpu (rx->length);
494
495 PRINTD (DBG_FLOW|DBG_RX, "rx_complete %p %p (len=%hu)", dev, rx, rx_len);
496
497 // XXX move this in and add to VC stats ???
498 if (!status) {
499 struct atm_vcc * atm_vcc = dev->rxer[vc];
500 dev->stats.rx.ok++;
501
502 if (atm_vcc) {
503
504 if (rx_len <= atm_vcc->qos.rxtp.max_sdu) {
505
506 if (atm_charge (atm_vcc, skb->truesize)) {
507
508 // prepare socket buffer
509 ATM_SKB(skb)->vcc = atm_vcc;
510 skb_put (skb, rx_len);
511
512 dump_skb ("<<<", vc, skb);
513
514 // VC layer stats
515 atomic_inc(&atm_vcc->stats->rx);
Patrick McHardya61bbcf2005-08-14 17:24:31 -0700516 __net_timestamp(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517 // end of our responsability
518 atm_vcc->push (atm_vcc, skb);
519 return;
520
521 } else {
522 // someone fix this (message), please!
523 PRINTD (DBG_INFO|DBG_RX, "dropped thanks to atm_charge (vc %hu, truesize %u)", vc, skb->truesize);
524 // drop stats incremented in atm_charge
525 }
526
527 } else {
528 PRINTK (KERN_INFO, "dropped over-size frame");
529 // should we count this?
530 atomic_inc(&atm_vcc->stats->rx_drop);
531 }
532
533 } else {
534 PRINTD (DBG_WARN|DBG_RX, "got frame but RX closed for channel %hu", vc);
535 // this is an adapter bug, only in new version of microcode
536 }
537
538 } else {
539 dev->stats.rx.error++;
540 if (status & CRC_ERR)
541 dev->stats.rx.badcrc++;
542 if (status & LEN_ERR)
543 dev->stats.rx.toolong++;
544 if (status & ABORT_ERR)
545 dev->stats.rx.aborted++;
546 if (status & UNUSED_ERR)
547 dev->stats.rx.unused++;
548 }
549
550 dev_kfree_skb_any (skb);
551 return;
552}
553
554/*
555
556 Note on queue handling.
557
558 Here "give" and "take" refer to queue entries and a queue (pair)
559 rather than frames to or from the host or adapter. Empty frame
560 buffers are given to the RX queue pair and returned unused or
561 containing RX frames. TX frames (well, pointers to TX fragment
562 lists) are given to the TX queue pair, completions are returned.
563
564*/
565
566/********** command queue **********/
567
568// I really don't like this, but it's the best I can do at the moment
569
570// also, the callers are responsible for byte order as the microcode
571// sometimes does 16-bit accesses (yuk yuk yuk)
572
573static int command_do (amb_dev * dev, command * cmd) {
574 amb_cq * cq = &dev->cq;
575 volatile amb_cq_ptrs * ptrs = &cq->ptrs;
576 command * my_slot;
577
578 PRINTD (DBG_FLOW|DBG_CMD, "command_do %p", dev);
579
580 if (test_bit (dead, &dev->flags))
581 return 0;
582
583 spin_lock (&cq->lock);
584
585 // if not full...
586 if (cq->pending < cq->maximum) {
587 // remember my slot for later
588 my_slot = ptrs->in;
589 PRINTD (DBG_CMD, "command in slot %p", my_slot);
590
591 dump_command (cmd);
592
593 // copy command in
594 *ptrs->in = *cmd;
595 cq->pending++;
596 ptrs->in = NEXTQ (ptrs->in, ptrs->start, ptrs->limit);
597
598 // mail the command
599 wr_mem (dev, offsetof(amb_mem, mb.adapter.cmd_address), virt_to_bus (ptrs->in));
600
601 if (cq->pending > cq->high)
602 cq->high = cq->pending;
603 spin_unlock (&cq->lock);
604
605 // these comments were in a while-loop before, msleep removes the loop
606 // go to sleep
607 // PRINTD (DBG_CMD, "wait: sleeping %lu for command", timeout);
608 msleep(cq->pending);
609
610 // wait for my slot to be reached (all waiters are here or above, until...)
611 while (ptrs->out != my_slot) {
612 PRINTD (DBG_CMD, "wait: command slot (now at %p)", ptrs->out);
613 set_current_state(TASK_UNINTERRUPTIBLE);
614 schedule();
615 }
616
617 // wait on my slot (... one gets to its slot, and... )
618 while (ptrs->out->request != cpu_to_be32 (SRB_COMPLETE)) {
619 PRINTD (DBG_CMD, "wait: command slot completion");
620 set_current_state(TASK_UNINTERRUPTIBLE);
621 schedule();
622 }
623
624 PRINTD (DBG_CMD, "command complete");
625 // update queue (... moves the queue along to the next slot)
626 spin_lock (&cq->lock);
627 cq->pending--;
628 // copy command out
629 *cmd = *ptrs->out;
630 ptrs->out = NEXTQ (ptrs->out, ptrs->start, ptrs->limit);
631 spin_unlock (&cq->lock);
632
633 return 0;
634 } else {
635 cq->filled++;
636 spin_unlock (&cq->lock);
637 return -EAGAIN;
638 }
639
640}
641
642/********** TX queue pair **********/
643
644static inline int tx_give (amb_dev * dev, tx_in * tx) {
645 amb_txq * txq = &dev->txq;
646 unsigned long flags;
647
648 PRINTD (DBG_FLOW|DBG_TX, "tx_give %p", dev);
649
650 if (test_bit (dead, &dev->flags))
651 return 0;
652
653 spin_lock_irqsave (&txq->lock, flags);
654
655 if (txq->pending < txq->maximum) {
656 PRINTD (DBG_TX, "TX in slot %p", txq->in.ptr);
657
658 *txq->in.ptr = *tx;
659 txq->pending++;
660 txq->in.ptr = NEXTQ (txq->in.ptr, txq->in.start, txq->in.limit);
661 // hand over the TX and ring the bell
662 wr_mem (dev, offsetof(amb_mem, mb.adapter.tx_address), virt_to_bus (txq->in.ptr));
663 wr_mem (dev, offsetof(amb_mem, doorbell), TX_FRAME);
664
665 if (txq->pending > txq->high)
666 txq->high = txq->pending;
667 spin_unlock_irqrestore (&txq->lock, flags);
668 return 0;
669 } else {
670 txq->filled++;
671 spin_unlock_irqrestore (&txq->lock, flags);
672 return -EAGAIN;
673 }
674}
675
676static inline int tx_take (amb_dev * dev) {
677 amb_txq * txq = &dev->txq;
678 unsigned long flags;
679
680 PRINTD (DBG_FLOW|DBG_TX, "tx_take %p", dev);
681
682 spin_lock_irqsave (&txq->lock, flags);
683
684 if (txq->pending && txq->out.ptr->handle) {
685 // deal with TX completion
686 tx_complete (dev, txq->out.ptr);
687 // mark unused again
688 txq->out.ptr->handle = 0;
689 // remove item
690 txq->pending--;
691 txq->out.ptr = NEXTQ (txq->out.ptr, txq->out.start, txq->out.limit);
692
693 spin_unlock_irqrestore (&txq->lock, flags);
694 return 0;
695 } else {
696
697 spin_unlock_irqrestore (&txq->lock, flags);
698 return -1;
699 }
700}
701
702/********** RX queue pairs **********/
703
704static inline int rx_give (amb_dev * dev, rx_in * rx, unsigned char pool) {
705 amb_rxq * rxq = &dev->rxq[pool];
706 unsigned long flags;
707
708 PRINTD (DBG_FLOW|DBG_RX, "rx_give %p[%hu]", dev, pool);
709
710 spin_lock_irqsave (&rxq->lock, flags);
711
712 if (rxq->pending < rxq->maximum) {
713 PRINTD (DBG_RX, "RX in slot %p", rxq->in.ptr);
714
715 *rxq->in.ptr = *rx;
716 rxq->pending++;
717 rxq->in.ptr = NEXTQ (rxq->in.ptr, rxq->in.start, rxq->in.limit);
718 // hand over the RX buffer
719 wr_mem (dev, offsetof(amb_mem, mb.adapter.rx_address[pool]), virt_to_bus (rxq->in.ptr));
720
721 spin_unlock_irqrestore (&rxq->lock, flags);
722 return 0;
723 } else {
724 spin_unlock_irqrestore (&rxq->lock, flags);
725 return -1;
726 }
727}
728
729static inline int rx_take (amb_dev * dev, unsigned char pool) {
730 amb_rxq * rxq = &dev->rxq[pool];
731 unsigned long flags;
732
733 PRINTD (DBG_FLOW|DBG_RX, "rx_take %p[%hu]", dev, pool);
734
735 spin_lock_irqsave (&rxq->lock, flags);
736
737 if (rxq->pending && (rxq->out.ptr->status || rxq->out.ptr->length)) {
738 // deal with RX completion
739 rx_complete (dev, rxq->out.ptr);
740 // mark unused again
741 rxq->out.ptr->status = 0;
742 rxq->out.ptr->length = 0;
743 // remove item
744 rxq->pending--;
745 rxq->out.ptr = NEXTQ (rxq->out.ptr, rxq->out.start, rxq->out.limit);
746
747 if (rxq->pending < rxq->low)
748 rxq->low = rxq->pending;
749 spin_unlock_irqrestore (&rxq->lock, flags);
750 return 0;
751 } else {
752 if (!rxq->pending && rxq->buffers_wanted)
753 rxq->emptied++;
754 spin_unlock_irqrestore (&rxq->lock, flags);
755 return -1;
756 }
757}
758
759/********** RX Pool handling **********/
760
761/* pre: buffers_wanted = 0, post: pending = 0 */
762static inline void drain_rx_pool (amb_dev * dev, unsigned char pool) {
763 amb_rxq * rxq = &dev->rxq[pool];
764
765 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pool %p %hu", dev, pool);
766
767 if (test_bit (dead, &dev->flags))
768 return;
769
770 /* we are not quite like the fill pool routines as we cannot just
771 remove one buffer, we have to remove all of them, but we might as
772 well pretend... */
773 if (rxq->pending > rxq->buffers_wanted) {
774 command cmd;
775 cmd.request = cpu_to_be32 (SRB_FLUSH_BUFFER_Q);
776 cmd.args.flush.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
777 while (command_do (dev, &cmd))
778 schedule();
779 /* the pool may also be emptied via the interrupt handler */
780 while (rxq->pending > rxq->buffers_wanted)
781 if (rx_take (dev, pool))
782 schedule();
783 }
784
785 return;
786}
787
788static void drain_rx_pools (amb_dev * dev) {
789 unsigned char pool;
790
791 PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pools %p", dev);
792
793 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
794 drain_rx_pool (dev, pool);
795}
796
Victor Fusco5938a7b2005-07-19 13:56:29 -0700797static inline void fill_rx_pool (amb_dev * dev, unsigned char pool,
Al Virodd0fc662005-10-07 07:46:04 +0100798 gfp_t priority)
Victor Fusco5938a7b2005-07-19 13:56:29 -0700799{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700800 rx_in rx;
801 amb_rxq * rxq;
802
803 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pool %p %hu %x", dev, pool, priority);
804
805 if (test_bit (dead, &dev->flags))
806 return;
807
808 rxq = &dev->rxq[pool];
809 while (rxq->pending < rxq->maximum && rxq->pending < rxq->buffers_wanted) {
810
811 struct sk_buff * skb = alloc_skb (rxq->buffer_size, priority);
812 if (!skb) {
813 PRINTD (DBG_SKB|DBG_POOL, "failed to allocate skb for RX pool %hu", pool);
814 return;
815 }
816 if (check_area (skb->data, skb->truesize)) {
817 dev_kfree_skb_any (skb);
818 return;
819 }
820 // cast needed as there is no %? for pointer differences
821 PRINTD (DBG_SKB, "allocated skb at %p, head %p, area %li",
822 skb, skb->head, (long) (skb->end - skb->head));
823 rx.handle = virt_to_bus (skb);
824 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
825 if (rx_give (dev, &rx, pool))
826 dev_kfree_skb_any (skb);
827
828 }
829
830 return;
831}
832
833// top up all RX pools (can also be called as a bottom half)
834static void fill_rx_pools (amb_dev * dev) {
835 unsigned char pool;
836
837 PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pools %p", dev);
838
839 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
840 fill_rx_pool (dev, pool, GFP_ATOMIC);
841
842 return;
843}
844
845/********** enable host interrupts **********/
846
847static inline void interrupts_on (amb_dev * dev) {
848 wr_plain (dev, offsetof(amb_mem, interrupt_control),
849 rd_plain (dev, offsetof(amb_mem, interrupt_control))
850 | AMB_INTERRUPT_BITS);
851}
852
853/********** disable host interrupts **********/
854
855static inline void interrupts_off (amb_dev * dev) {
856 wr_plain (dev, offsetof(amb_mem, interrupt_control),
857 rd_plain (dev, offsetof(amb_mem, interrupt_control))
858 &~ AMB_INTERRUPT_BITS);
859}
860
861/********** interrupt handling **********/
862
863static irqreturn_t interrupt_handler(int irq, void *dev_id,
864 struct pt_regs *pt_regs) {
865 amb_dev * dev = (amb_dev *) dev_id;
866 (void) pt_regs;
867
868 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler: %p", dev_id);
869
870 if (!dev_id) {
871 PRINTD (DBG_IRQ|DBG_ERR, "irq with NULL dev_id: %d", irq);
872 return IRQ_NONE;
873 }
874
875 {
876 u32 interrupt = rd_plain (dev, offsetof(amb_mem, interrupt));
877
878 // for us or someone else sharing the same interrupt
879 if (!interrupt) {
880 PRINTD (DBG_IRQ, "irq not for me: %d", irq);
881 return IRQ_NONE;
882 }
883
884 // definitely for us
885 PRINTD (DBG_IRQ, "FYI: interrupt was %08x", interrupt);
886 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
887 }
888
889 {
890 unsigned int irq_work = 0;
891 unsigned char pool;
892 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
893 while (!rx_take (dev, pool))
894 ++irq_work;
895 while (!tx_take (dev))
896 ++irq_work;
897
898 if (irq_work) {
899#ifdef FILL_RX_POOLS_IN_BH
900 schedule_work (&dev->bh);
901#else
902 fill_rx_pools (dev);
903#endif
904
905 PRINTD (DBG_IRQ, "work done: %u", irq_work);
906 } else {
907 PRINTD (DBG_IRQ|DBG_WARN, "no work done");
908 }
909 }
910
911 PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler done: %p", dev_id);
912 return IRQ_HANDLED;
913}
914
915/********** make rate (not quite as much fun as Horizon) **********/
916
917static unsigned int make_rate (unsigned int rate, rounding r,
918 u16 * bits, unsigned int * actual) {
919 unsigned char exp = -1; // hush gcc
920 unsigned int man = -1; // hush gcc
921
922 PRINTD (DBG_FLOW|DBG_QOS, "make_rate %u", rate);
923
924 // rates in cells per second, ITU format (nasty 16-bit floating-point)
925 // given 5-bit e and 9-bit m:
926 // rate = EITHER (1+m/2^9)*2^e OR 0
927 // bits = EITHER 1<<14 | e<<9 | m OR 0
928 // (bit 15 is "reserved", bit 14 "non-zero")
929 // smallest rate is 0 (special representation)
930 // largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
931 // smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
932 // simple algorithm:
933 // find position of top bit, this gives e
934 // remove top bit and shift (rounding if feeling clever) by 9-e
935
936 // ucode bug: please don't set bit 14! so 0 rate not representable
937
938 if (rate > 0xffc00000U) {
939 // larger than largest representable rate
940
941 if (r == round_up) {
942 return -EINVAL;
943 } else {
944 exp = 31;
945 man = 511;
946 }
947
948 } else if (rate) {
949 // representable rate
950
951 exp = 31;
952 man = rate;
953
954 // invariant: rate = man*2^(exp-31)
955 while (!(man & (1<<31))) {
956 exp = exp - 1;
957 man = man<<1;
958 }
959
960 // man has top bit set
961 // rate = (2^31+(man-2^31))*2^(exp-31)
962 // rate = (1+(man-2^31)/2^31)*2^exp
963 man = man<<1;
964 man &= 0xffffffffU; // a nop on 32-bit systems
965 // rate = (1+man/2^32)*2^exp
966
967 // exp is in the range 0 to 31, man is in the range 0 to 2^32-1
968 // time to lose significance... we want m in the range 0 to 2^9-1
969 // rounding presents a minor problem... we first decide which way
970 // we are rounding (based on given rounding direction and possibly
971 // the bits of the mantissa that are to be discarded).
972
973 switch (r) {
974 case round_down: {
975 // just truncate
976 man = man>>(32-9);
977 break;
978 }
979 case round_up: {
980 // check all bits that we are discarding
981 if (man & (-1>>9)) {
982 man = (man>>(32-9)) + 1;
983 if (man == (1<<9)) {
984 // no need to check for round up outside of range
985 man = 0;
986 exp += 1;
987 }
988 } else {
989 man = (man>>(32-9));
990 }
991 break;
992 }
993 case round_nearest: {
994 // check msb that we are discarding
995 if (man & (1<<(32-9-1))) {
996 man = (man>>(32-9)) + 1;
997 if (man == (1<<9)) {
998 // no need to check for round up outside of range
999 man = 0;
1000 exp += 1;
1001 }
1002 } else {
1003 man = (man>>(32-9));
1004 }
1005 break;
1006 }
1007 }
1008
1009 } else {
1010 // zero rate - not representable
1011
1012 if (r == round_down) {
1013 return -EINVAL;
1014 } else {
1015 exp = 0;
1016 man = 0;
1017 }
1018
1019 }
1020
1021 PRINTD (DBG_QOS, "rate: man=%u, exp=%hu", man, exp);
1022
1023 if (bits)
1024 *bits = /* (1<<14) | */ (exp<<9) | man;
1025
1026 if (actual)
1027 *actual = (exp >= 9)
1028 ? (1 << exp) + (man << (exp-9))
1029 : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
1030
1031 return 0;
1032}
1033
1034/********** Linux ATM Operations **********/
1035
1036// some are not yet implemented while others do not make sense for
1037// this device
1038
1039/********** Open a VC **********/
1040
1041static int amb_open (struct atm_vcc * atm_vcc)
1042{
1043 int error;
1044
1045 struct atm_qos * qos;
1046 struct atm_trafprm * txtp;
1047 struct atm_trafprm * rxtp;
1048 u16 tx_rate_bits;
1049 u16 tx_vc_bits = -1; // hush gcc
1050 u16 tx_frame_bits = -1; // hush gcc
1051
1052 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1053 amb_vcc * vcc;
1054 unsigned char pool = -1; // hush gcc
1055 short vpi = atm_vcc->vpi;
1056 int vci = atm_vcc->vci;
1057
1058 PRINTD (DBG_FLOW|DBG_VCC, "amb_open %x %x", vpi, vci);
1059
1060#ifdef ATM_VPI_UNSPEC
1061 // UNSPEC is deprecated, remove this code eventually
1062 if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC) {
1063 PRINTK (KERN_WARNING, "rejecting open with unspecified VPI/VCI (deprecated)");
1064 return -EINVAL;
1065 }
1066#endif
1067
1068 if (!(0 <= vpi && vpi < (1<<NUM_VPI_BITS) &&
1069 0 <= vci && vci < (1<<NUM_VCI_BITS))) {
1070 PRINTD (DBG_WARN|DBG_VCC, "VPI/VCI out of range: %hd/%d", vpi, vci);
1071 return -EINVAL;
1072 }
1073
1074 qos = &atm_vcc->qos;
1075
1076 if (qos->aal != ATM_AAL5) {
1077 PRINTD (DBG_QOS, "AAL not supported");
1078 return -EINVAL;
1079 }
1080
1081 // traffic parameters
1082
1083 PRINTD (DBG_QOS, "TX:");
1084 txtp = &qos->txtp;
1085 if (txtp->traffic_class != ATM_NONE) {
1086 switch (txtp->traffic_class) {
1087 case ATM_UBR: {
1088 // we take "the PCR" as a rate-cap
1089 int pcr = atm_pcr_goal (txtp);
1090 if (!pcr) {
1091 // no rate cap
1092 tx_rate_bits = 0;
1093 tx_vc_bits = TX_UBR;
1094 tx_frame_bits = TX_FRAME_NOTCAP;
1095 } else {
1096 rounding r;
1097 if (pcr < 0) {
1098 r = round_down;
1099 pcr = -pcr;
1100 } else {
1101 r = round_up;
1102 }
1103 error = make_rate (pcr, r, &tx_rate_bits, NULL);
1104 tx_vc_bits = TX_UBR_CAPPED;
1105 tx_frame_bits = TX_FRAME_CAPPED;
1106 }
1107 break;
1108 }
1109#if 0
1110 case ATM_ABR: {
1111 pcr = atm_pcr_goal (txtp);
1112 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1113 break;
1114 }
1115#endif
1116 default: {
1117 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1118 PRINTD (DBG_QOS, "request for non-UBR denied");
1119 return -EINVAL;
1120 }
1121 }
1122 PRINTD (DBG_QOS, "tx_rate_bits=%hx, tx_vc_bits=%hx",
1123 tx_rate_bits, tx_vc_bits);
1124 }
1125
1126 PRINTD (DBG_QOS, "RX:");
1127 rxtp = &qos->rxtp;
1128 if (rxtp->traffic_class == ATM_NONE) {
1129 // do nothing
1130 } else {
1131 // choose an RX pool (arranged in increasing size)
1132 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1133 if ((unsigned int) rxtp->max_sdu <= dev->rxq[pool].buffer_size) {
1134 PRINTD (DBG_VCC|DBG_QOS|DBG_POOL, "chose pool %hu (max_sdu %u <= %u)",
1135 pool, rxtp->max_sdu, dev->rxq[pool].buffer_size);
1136 break;
1137 }
1138 if (pool == NUM_RX_POOLS) {
1139 PRINTD (DBG_WARN|DBG_VCC|DBG_QOS|DBG_POOL,
1140 "no pool suitable for VC (RX max_sdu %d is too large)",
1141 rxtp->max_sdu);
1142 return -EINVAL;
1143 }
1144
1145 switch (rxtp->traffic_class) {
1146 case ATM_UBR: {
1147 break;
1148 }
1149#if 0
1150 case ATM_ABR: {
1151 pcr = atm_pcr_goal (rxtp);
1152 PRINTD (DBG_QOS, "pcr goal = %d", pcr);
1153 break;
1154 }
1155#endif
1156 default: {
1157 // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
1158 PRINTD (DBG_QOS, "request for non-UBR denied");
1159 return -EINVAL;
1160 }
1161 }
1162 }
1163
1164 // get space for our vcc stuff
1165 vcc = kmalloc (sizeof(amb_vcc), GFP_KERNEL);
1166 if (!vcc) {
1167 PRINTK (KERN_ERR, "out of memory!");
1168 return -ENOMEM;
1169 }
1170 atm_vcc->dev_data = (void *) vcc;
1171
1172 // no failures beyond this point
1173
1174 // we are not really "immediately before allocating the connection
1175 // identifier in hardware", but it will just have to do!
1176 set_bit(ATM_VF_ADDR,&atm_vcc->flags);
1177
1178 if (txtp->traffic_class != ATM_NONE) {
1179 command cmd;
1180
1181 vcc->tx_frame_bits = tx_frame_bits;
1182
1183 down (&dev->vcc_sf);
1184 if (dev->rxer[vci]) {
1185 // RXer on the channel already, just modify rate...
1186 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1187 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1188 cmd.args.modify_rate.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1189 while (command_do (dev, &cmd))
1190 schedule();
1191 // ... and TX flags, preserving the RX pool
1192 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1193 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1194 cmd.args.modify_flags.flags = cpu_to_be32
1195 ( (AMB_VCC(dev->rxer[vci])->rx_info.pool << SRB_POOL_SHIFT)
1196 | (tx_vc_bits << SRB_FLAGS_SHIFT) );
1197 while (command_do (dev, &cmd))
1198 schedule();
1199 } else {
1200 // no RXer on the channel, just open (with pool zero)
1201 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1202 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1203 cmd.args.open.flags = cpu_to_be32 (tx_vc_bits << SRB_FLAGS_SHIFT);
1204 cmd.args.open.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
1205 while (command_do (dev, &cmd))
1206 schedule();
1207 }
1208 dev->txer[vci].tx_present = 1;
1209 up (&dev->vcc_sf);
1210 }
1211
1212 if (rxtp->traffic_class != ATM_NONE) {
1213 command cmd;
1214
1215 vcc->rx_info.pool = pool;
1216
1217 down (&dev->vcc_sf);
1218 /* grow RX buffer pool */
1219 if (!dev->rxq[pool].buffers_wanted)
1220 dev->rxq[pool].buffers_wanted = rx_lats;
1221 dev->rxq[pool].buffers_wanted += 1;
1222 fill_rx_pool (dev, pool, GFP_KERNEL);
1223
1224 if (dev->txer[vci].tx_present) {
1225 // TXer on the channel already
1226 // switch (from pool zero) to this pool, preserving the TX bits
1227 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1228 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1229 cmd.args.modify_flags.flags = cpu_to_be32
1230 ( (pool << SRB_POOL_SHIFT)
1231 | (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT) );
1232 } else {
1233 // no TXer on the channel, open the VC (with no rate info)
1234 cmd.request = cpu_to_be32 (SRB_OPEN_VC);
1235 cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
1236 cmd.args.open.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
1237 cmd.args.open.rate = cpu_to_be32 (0);
1238 }
1239 while (command_do (dev, &cmd))
1240 schedule();
1241 // this link allows RX frames through
1242 dev->rxer[vci] = atm_vcc;
1243 up (&dev->vcc_sf);
1244 }
1245
1246 // indicate readiness
1247 set_bit(ATM_VF_READY,&atm_vcc->flags);
1248
1249 return 0;
1250}
1251
1252/********** Close a VC **********/
1253
1254static void amb_close (struct atm_vcc * atm_vcc) {
1255 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1256 amb_vcc * vcc = AMB_VCC (atm_vcc);
1257 u16 vci = atm_vcc->vci;
1258
1259 PRINTD (DBG_VCC|DBG_FLOW, "amb_close");
1260
1261 // indicate unreadiness
1262 clear_bit(ATM_VF_READY,&atm_vcc->flags);
1263
1264 // disable TXing
1265 if (atm_vcc->qos.txtp.traffic_class != ATM_NONE) {
1266 command cmd;
1267
1268 down (&dev->vcc_sf);
1269 if (dev->rxer[vci]) {
1270 // RXer still on the channel, just modify rate... XXX not really needed
1271 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
1272 cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
1273 cmd.args.modify_rate.rate = cpu_to_be32 (0);
1274 // ... and clear TX rate flags (XXX to stop RM cell output?), preserving RX pool
1275 } else {
1276 // no RXer on the channel, close channel
1277 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1278 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1279 }
1280 dev->txer[vci].tx_present = 0;
1281 while (command_do (dev, &cmd))
1282 schedule();
1283 up (&dev->vcc_sf);
1284 }
1285
1286 // disable RXing
1287 if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) {
1288 command cmd;
1289
1290 // this is (the?) one reason why we need the amb_vcc struct
1291 unsigned char pool = vcc->rx_info.pool;
1292
1293 down (&dev->vcc_sf);
1294 if (dev->txer[vci].tx_present) {
1295 // TXer still on the channel, just go to pool zero XXX not really needed
1296 cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
1297 cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
1298 cmd.args.modify_flags.flags = cpu_to_be32
1299 (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT);
1300 } else {
1301 // no TXer on the channel, close the VC
1302 cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
1303 cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
1304 }
1305 // forget the rxer - no more skbs will be pushed
1306 if (atm_vcc != dev->rxer[vci])
1307 PRINTK (KERN_ERR, "%s vcc=%p rxer[vci]=%p",
1308 "arghhh! we're going to die!",
1309 vcc, dev->rxer[vci]);
1310 dev->rxer[vci] = NULL;
1311 while (command_do (dev, &cmd))
1312 schedule();
1313
1314 /* shrink RX buffer pool */
1315 dev->rxq[pool].buffers_wanted -= 1;
1316 if (dev->rxq[pool].buffers_wanted == rx_lats) {
1317 dev->rxq[pool].buffers_wanted = 0;
1318 drain_rx_pool (dev, pool);
1319 }
1320 up (&dev->vcc_sf);
1321 }
1322
1323 // free our structure
1324 kfree (vcc);
1325
1326 // say the VPI/VCI is free again
1327 clear_bit(ATM_VF_ADDR,&atm_vcc->flags);
1328
1329 return;
1330}
1331
1332/********** Set socket options for a VC **********/
1333
1334// int amb_getsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1335
1336/********** Set socket options for a VC **********/
1337
1338// int amb_setsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
1339
1340/********** Send **********/
1341
1342static int amb_send (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1343 amb_dev * dev = AMB_DEV(atm_vcc->dev);
1344 amb_vcc * vcc = AMB_VCC(atm_vcc);
1345 u16 vc = atm_vcc->vci;
1346 unsigned int tx_len = skb->len;
1347 unsigned char * tx_data = skb->data;
1348 tx_simple * tx_descr;
1349 tx_in tx;
1350
1351 if (test_bit (dead, &dev->flags))
1352 return -EIO;
1353
1354 PRINTD (DBG_FLOW|DBG_TX, "amb_send vc %x data %p len %u",
1355 vc, tx_data, tx_len);
1356
1357 dump_skb (">>>", vc, skb);
1358
1359 if (!dev->txer[vc].tx_present) {
1360 PRINTK (KERN_ERR, "attempt to send on RX-only VC %x", vc);
1361 return -EBADFD;
1362 }
1363
1364 // this is a driver private field so we have to set it ourselves,
1365 // despite the fact that we are _required_ to use it to check for a
1366 // pop function
1367 ATM_SKB(skb)->vcc = atm_vcc;
1368
1369 if (skb->len > (size_t) atm_vcc->qos.txtp.max_sdu) {
1370 PRINTK (KERN_ERR, "sk_buff length greater than agreed max_sdu, dropping...");
1371 return -EIO;
1372 }
1373
1374 if (check_area (skb->data, skb->len)) {
1375 atomic_inc(&atm_vcc->stats->tx_err);
1376 return -ENOMEM; // ?
1377 }
1378
1379 // allocate memory for fragments
1380 tx_descr = kmalloc (sizeof(tx_simple), GFP_KERNEL);
1381 if (!tx_descr) {
1382 PRINTK (KERN_ERR, "could not allocate TX descriptor");
1383 return -ENOMEM;
1384 }
1385 if (check_area (tx_descr, sizeof(tx_simple))) {
1386 kfree (tx_descr);
1387 return -ENOMEM;
1388 }
1389 PRINTD (DBG_TX, "fragment list allocated at %p", tx_descr);
1390
1391 tx_descr->skb = skb;
1392
1393 tx_descr->tx_frag.bytes = cpu_to_be32 (tx_len);
1394 tx_descr->tx_frag.address = cpu_to_be32 (virt_to_bus (tx_data));
1395
1396 tx_descr->tx_frag_end.handle = virt_to_bus (tx_descr);
1397 tx_descr->tx_frag_end.vc = 0;
1398 tx_descr->tx_frag_end.next_descriptor_length = 0;
1399 tx_descr->tx_frag_end.next_descriptor = 0;
1400#ifdef AMB_NEW_MICROCODE
1401 tx_descr->tx_frag_end.cpcs_uu = 0;
1402 tx_descr->tx_frag_end.cpi = 0;
1403 tx_descr->tx_frag_end.pad = 0;
1404#endif
1405
1406 tx.vc = cpu_to_be16 (vcc->tx_frame_bits | vc);
1407 tx.tx_descr_length = cpu_to_be16 (sizeof(tx_frag)+sizeof(tx_frag_end));
1408 tx.tx_descr_addr = cpu_to_be32 (virt_to_bus (&tx_descr->tx_frag));
1409
1410 while (tx_give (dev, &tx))
1411 schedule();
1412 return 0;
1413}
1414
1415/********** Change QoS on a VC **********/
1416
1417// int amb_change_qos (struct atm_vcc * atm_vcc, struct atm_qos * qos, int flags);
1418
1419/********** Free RX Socket Buffer **********/
1420
1421#if 0
1422static void amb_free_rx_skb (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
1423 amb_dev * dev = AMB_DEV (atm_vcc->dev);
1424 amb_vcc * vcc = AMB_VCC (atm_vcc);
1425 unsigned char pool = vcc->rx_info.pool;
1426 rx_in rx;
1427
1428 // This may be unsafe for various reasons that I cannot really guess
1429 // at. However, I note that the ATM layer calls kfree_skb rather
1430 // than dev_kfree_skb at this point so we are least covered as far
1431 // as buffer locking goes. There may be bugs if pcap clones RX skbs.
1432
1433 PRINTD (DBG_FLOW|DBG_SKB, "amb_rx_free skb %p (atm_vcc %p, vcc %p)",
1434 skb, atm_vcc, vcc);
1435
1436 rx.handle = virt_to_bus (skb);
1437 rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
1438
1439 skb->data = skb->head;
1440 skb->tail = skb->head;
1441 skb->len = 0;
1442
1443 if (!rx_give (dev, &rx, pool)) {
1444 // success
1445 PRINTD (DBG_SKB|DBG_POOL, "recycled skb for pool %hu", pool);
1446 return;
1447 }
1448
1449 // just do what the ATM layer would have done
1450 dev_kfree_skb_any (skb);
1451
1452 return;
1453}
1454#endif
1455
1456/********** Proc File Output **********/
1457
1458static int amb_proc_read (struct atm_dev * atm_dev, loff_t * pos, char * page) {
1459 amb_dev * dev = AMB_DEV (atm_dev);
1460 int left = *pos;
1461 unsigned char pool;
1462
1463 PRINTD (DBG_FLOW, "amb_proc_read");
1464
1465 /* more diagnostics here? */
1466
1467 if (!left--) {
1468 amb_stats * s = &dev->stats;
1469 return sprintf (page,
1470 "frames: TX OK %lu, RX OK %lu, RX bad %lu "
1471 "(CRC %lu, long %lu, aborted %lu, unused %lu).\n",
1472 s->tx_ok, s->rx.ok, s->rx.error,
1473 s->rx.badcrc, s->rx.toolong,
1474 s->rx.aborted, s->rx.unused);
1475 }
1476
1477 if (!left--) {
1478 amb_cq * c = &dev->cq;
1479 return sprintf (page, "cmd queue [cur/hi/max]: %u/%u/%u. ",
1480 c->pending, c->high, c->maximum);
1481 }
1482
1483 if (!left--) {
1484 amb_txq * t = &dev->txq;
1485 return sprintf (page, "TX queue [cur/max high full]: %u/%u %u %u.\n",
1486 t->pending, t->maximum, t->high, t->filled);
1487 }
1488
1489 if (!left--) {
1490 unsigned int count = sprintf (page, "RX queues [cur/max/req low empty]:");
1491 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1492 amb_rxq * r = &dev->rxq[pool];
1493 count += sprintf (page+count, " %u/%u/%u %u %u",
1494 r->pending, r->maximum, r->buffers_wanted, r->low, r->emptied);
1495 }
1496 count += sprintf (page+count, ".\n");
1497 return count;
1498 }
1499
1500 if (!left--) {
1501 unsigned int count = sprintf (page, "RX buffer sizes:");
1502 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1503 amb_rxq * r = &dev->rxq[pool];
1504 count += sprintf (page+count, " %u", r->buffer_size);
1505 }
1506 count += sprintf (page+count, ".\n");
1507 return count;
1508 }
1509
1510#if 0
1511 if (!left--) {
1512 // suni block etc?
1513 }
1514#endif
1515
1516 return 0;
1517}
1518
1519/********** Operation Structure **********/
1520
1521static const struct atmdev_ops amb_ops = {
1522 .open = amb_open,
1523 .close = amb_close,
1524 .send = amb_send,
1525 .proc_read = amb_proc_read,
1526 .owner = THIS_MODULE,
1527};
1528
1529/********** housekeeping **********/
1530static void do_housekeeping (unsigned long arg) {
1531 amb_dev * dev = (amb_dev *) arg;
1532
1533 // could collect device-specific (not driver/atm-linux) stats here
1534
1535 // last resort refill once every ten seconds
1536 fill_rx_pools (dev);
1537 mod_timer(&dev->housekeeping, jiffies + 10*HZ);
1538
1539 return;
1540}
1541
1542/********** creation of communication queues **********/
1543
1544static int __devinit create_queues (amb_dev * dev, unsigned int cmds,
1545 unsigned int txs, unsigned int * rxs,
1546 unsigned int * rx_buffer_sizes) {
1547 unsigned char pool;
1548 size_t total = 0;
1549 void * memory;
1550 void * limit;
1551
1552 PRINTD (DBG_FLOW, "create_queues %p", dev);
1553
1554 total += cmds * sizeof(command);
1555
1556 total += txs * (sizeof(tx_in) + sizeof(tx_out));
1557
1558 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
1559 total += rxs[pool] * (sizeof(rx_in) + sizeof(rx_out));
1560
1561 memory = kmalloc (total, GFP_KERNEL);
1562 if (!memory) {
1563 PRINTK (KERN_ERR, "could not allocate queues");
1564 return -ENOMEM;
1565 }
1566 if (check_area (memory, total)) {
1567 PRINTK (KERN_ERR, "queues allocated in nasty area");
1568 kfree (memory);
1569 return -ENOMEM;
1570 }
1571
1572 limit = memory + total;
1573 PRINTD (DBG_INIT, "queues from %p to %p", memory, limit);
1574
1575 PRINTD (DBG_CMD, "command queue at %p", memory);
1576
1577 {
1578 command * cmd = memory;
1579 amb_cq * cq = &dev->cq;
1580
1581 cq->pending = 0;
1582 cq->high = 0;
1583 cq->maximum = cmds - 1;
1584
1585 cq->ptrs.start = cmd;
1586 cq->ptrs.in = cmd;
1587 cq->ptrs.out = cmd;
1588 cq->ptrs.limit = cmd + cmds;
1589
1590 memory = cq->ptrs.limit;
1591 }
1592
1593 PRINTD (DBG_TX, "TX queue pair at %p", memory);
1594
1595 {
1596 tx_in * in = memory;
1597 tx_out * out;
1598 amb_txq * txq = &dev->txq;
1599
1600 txq->pending = 0;
1601 txq->high = 0;
1602 txq->filled = 0;
1603 txq->maximum = txs - 1;
1604
1605 txq->in.start = in;
1606 txq->in.ptr = in;
1607 txq->in.limit = in + txs;
1608
1609 memory = txq->in.limit;
1610 out = memory;
1611
1612 txq->out.start = out;
1613 txq->out.ptr = out;
1614 txq->out.limit = out + txs;
1615
1616 memory = txq->out.limit;
1617 }
1618
1619 PRINTD (DBG_RX, "RX queue pairs at %p", memory);
1620
1621 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
1622 rx_in * in = memory;
1623 rx_out * out;
1624 amb_rxq * rxq = &dev->rxq[pool];
1625
1626 rxq->buffer_size = rx_buffer_sizes[pool];
1627 rxq->buffers_wanted = 0;
1628
1629 rxq->pending = 0;
1630 rxq->low = rxs[pool] - 1;
1631 rxq->emptied = 0;
1632 rxq->maximum = rxs[pool] - 1;
1633
1634 rxq->in.start = in;
1635 rxq->in.ptr = in;
1636 rxq->in.limit = in + rxs[pool];
1637
1638 memory = rxq->in.limit;
1639 out = memory;
1640
1641 rxq->out.start = out;
1642 rxq->out.ptr = out;
1643 rxq->out.limit = out + rxs[pool];
1644
1645 memory = rxq->out.limit;
1646 }
1647
1648 if (memory == limit) {
1649 return 0;
1650 } else {
1651 PRINTK (KERN_ERR, "bad queue alloc %p != %p (tell maintainer)", memory, limit);
1652 kfree (limit - total);
1653 return -ENOMEM;
1654 }
1655
1656}
1657
1658/********** destruction of communication queues **********/
1659
1660static void destroy_queues (amb_dev * dev) {
1661 // all queues assumed empty
1662 void * memory = dev->cq.ptrs.start;
1663 // includes txq.in, txq.out, rxq[].in and rxq[].out
1664
1665 PRINTD (DBG_FLOW, "destroy_queues %p", dev);
1666
1667 PRINTD (DBG_INIT, "freeing queues at %p", memory);
1668 kfree (memory);
1669
1670 return;
1671}
1672
1673/********** basic loader commands and error handling **********/
1674// centisecond timeouts - guessing away here
1675static unsigned int command_timeouts [] = {
1676 [host_memory_test] = 15,
1677 [read_adapter_memory] = 2,
1678 [write_adapter_memory] = 2,
1679 [adapter_start] = 50,
1680 [get_version_number] = 10,
1681 [interrupt_host] = 1,
1682 [flash_erase_sector] = 1,
1683 [adap_download_block] = 1,
1684 [adap_erase_flash] = 1,
1685 [adap_run_in_iram] = 1,
1686 [adap_end_download] = 1
1687};
1688
1689
1690static unsigned int command_successes [] = {
1691 [host_memory_test] = COMMAND_PASSED_TEST,
1692 [read_adapter_memory] = COMMAND_READ_DATA_OK,
1693 [write_adapter_memory] = COMMAND_WRITE_DATA_OK,
1694 [adapter_start] = COMMAND_COMPLETE,
1695 [get_version_number] = COMMAND_COMPLETE,
1696 [interrupt_host] = COMMAND_COMPLETE,
1697 [flash_erase_sector] = COMMAND_COMPLETE,
1698 [adap_download_block] = COMMAND_COMPLETE,
1699 [adap_erase_flash] = COMMAND_COMPLETE,
1700 [adap_run_in_iram] = COMMAND_COMPLETE,
1701 [adap_end_download] = COMMAND_COMPLETE
1702};
1703
1704static int decode_loader_result (loader_command cmd, u32 result)
1705{
1706 int res;
1707 const char *msg;
1708
1709 if (result == command_successes[cmd])
1710 return 0;
1711
1712 switch (result) {
1713 case BAD_COMMAND:
1714 res = -EINVAL;
1715 msg = "bad command";
1716 break;
1717 case COMMAND_IN_PROGRESS:
1718 res = -ETIMEDOUT;
1719 msg = "command in progress";
1720 break;
1721 case COMMAND_PASSED_TEST:
1722 res = 0;
1723 msg = "command passed test";
1724 break;
1725 case COMMAND_FAILED_TEST:
1726 res = -EIO;
1727 msg = "command failed test";
1728 break;
1729 case COMMAND_READ_DATA_OK:
1730 res = 0;
1731 msg = "command read data ok";
1732 break;
1733 case COMMAND_READ_BAD_ADDRESS:
1734 res = -EINVAL;
1735 msg = "command read bad address";
1736 break;
1737 case COMMAND_WRITE_DATA_OK:
1738 res = 0;
1739 msg = "command write data ok";
1740 break;
1741 case COMMAND_WRITE_BAD_ADDRESS:
1742 res = -EINVAL;
1743 msg = "command write bad address";
1744 break;
1745 case COMMAND_WRITE_FLASH_FAILURE:
1746 res = -EIO;
1747 msg = "command write flash failure";
1748 break;
1749 case COMMAND_COMPLETE:
1750 res = 0;
1751 msg = "command complete";
1752 break;
1753 case COMMAND_FLASH_ERASE_FAILURE:
1754 res = -EIO;
1755 msg = "command flash erase failure";
1756 break;
1757 case COMMAND_WRITE_BAD_DATA:
1758 res = -EINVAL;
1759 msg = "command write bad data";
1760 break;
1761 default:
1762 res = -EINVAL;
1763 msg = "unknown error";
1764 PRINTD (DBG_LOAD|DBG_ERR,
1765 "decode_loader_result got %d=%x !",
1766 result, result);
1767 break;
1768 }
1769
1770 PRINTK (KERN_ERR, "%s", msg);
1771 return res;
1772}
1773
1774static int __devinit do_loader_command (volatile loader_block * lb,
1775 const amb_dev * dev, loader_command cmd) {
1776
1777 unsigned long timeout;
1778
1779 PRINTD (DBG_FLOW|DBG_LOAD, "do_loader_command");
1780
1781 /* do a command
1782
1783 Set the return value to zero, set the command type and set the
1784 valid entry to the right magic value. The payload is already
1785 correctly byte-ordered so we leave it alone. Hit the doorbell
1786 with the bus address of this structure.
1787
1788 */
1789
1790 lb->result = 0;
1791 lb->command = cpu_to_be32 (cmd);
1792 lb->valid = cpu_to_be32 (DMA_VALID);
1793 // dump_registers (dev);
1794 // dump_loader_block (lb);
1795 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (lb) & ~onegigmask);
1796
1797 timeout = command_timeouts[cmd] * 10;
1798
1799 while (!lb->result || lb->result == cpu_to_be32 (COMMAND_IN_PROGRESS))
1800 if (timeout) {
1801 timeout = msleep_interruptible(timeout);
1802 } else {
1803 PRINTD (DBG_LOAD|DBG_ERR, "command %d timed out", cmd);
1804 dump_registers (dev);
1805 dump_loader_block (lb);
1806 return -ETIMEDOUT;
1807 }
1808
1809 if (cmd == adapter_start) {
1810 // wait for start command to acknowledge...
1811 timeout = 100;
1812 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
1813 if (timeout) {
1814 timeout = msleep_interruptible(timeout);
1815 } else {
1816 PRINTD (DBG_LOAD|DBG_ERR, "start command did not clear doorbell, res=%08x",
1817 be32_to_cpu (lb->result));
1818 dump_registers (dev);
1819 return -ETIMEDOUT;
1820 }
1821 return 0;
1822 } else {
1823 return decode_loader_result (cmd, be32_to_cpu (lb->result));
1824 }
1825
1826}
1827
1828/* loader: determine loader version */
1829
1830static int __devinit get_loader_version (loader_block * lb,
1831 const amb_dev * dev, u32 * version) {
1832 int res;
1833
1834 PRINTD (DBG_FLOW|DBG_LOAD, "get_loader_version");
1835
1836 res = do_loader_command (lb, dev, get_version_number);
1837 if (res)
1838 return res;
1839 if (version)
1840 *version = be32_to_cpu (lb->payload.version);
1841 return 0;
1842}
1843
1844/* loader: write memory data blocks */
1845
1846static int __devinit loader_write (loader_block * lb,
1847 const amb_dev * dev, const u32 * data,
1848 u32 address, unsigned int count) {
1849 unsigned int i;
1850 transfer_block * tb = &lb->payload.transfer;
1851
1852 PRINTD (DBG_FLOW|DBG_LOAD, "loader_write");
1853
1854 if (count > MAX_TRANSFER_DATA)
1855 return -EINVAL;
1856 tb->address = cpu_to_be32 (address);
1857 tb->count = cpu_to_be32 (count);
1858 for (i = 0; i < count; ++i)
1859 tb->data[i] = cpu_to_be32 (data[i]);
1860 return do_loader_command (lb, dev, write_adapter_memory);
1861}
1862
1863/* loader: verify memory data blocks */
1864
1865static int __devinit loader_verify (loader_block * lb,
1866 const amb_dev * dev, const u32 * data,
1867 u32 address, unsigned int count) {
1868 unsigned int i;
1869 transfer_block * tb = &lb->payload.transfer;
1870 int res;
1871
1872 PRINTD (DBG_FLOW|DBG_LOAD, "loader_verify");
1873
1874 if (count > MAX_TRANSFER_DATA)
1875 return -EINVAL;
1876 tb->address = cpu_to_be32 (address);
1877 tb->count = cpu_to_be32 (count);
1878 res = do_loader_command (lb, dev, read_adapter_memory);
1879 if (!res)
1880 for (i = 0; i < count; ++i)
1881 if (tb->data[i] != cpu_to_be32 (data[i])) {
1882 res = -EINVAL;
1883 break;
1884 }
1885 return res;
1886}
1887
1888/* loader: start microcode */
1889
1890static int __devinit loader_start (loader_block * lb,
1891 const amb_dev * dev, u32 address) {
1892 PRINTD (DBG_FLOW|DBG_LOAD, "loader_start");
1893
1894 lb->payload.start = cpu_to_be32 (address);
1895 return do_loader_command (lb, dev, adapter_start);
1896}
1897
1898/********** reset card **********/
1899
1900static inline void sf (const char * msg)
1901{
1902 PRINTK (KERN_ERR, "self-test failed: %s", msg);
1903}
1904
1905static int amb_reset (amb_dev * dev, int diags) {
1906 u32 word;
1907
1908 PRINTD (DBG_FLOW|DBG_LOAD, "amb_reset");
1909
1910 word = rd_plain (dev, offsetof(amb_mem, reset_control));
1911 // put card into reset state
1912 wr_plain (dev, offsetof(amb_mem, reset_control), word | AMB_RESET_BITS);
1913 // wait a short while
1914 udelay (10);
1915#if 1
1916 // put card into known good state
1917 wr_plain (dev, offsetof(amb_mem, interrupt_control), AMB_DOORBELL_BITS);
1918 // clear all interrupts just in case
1919 wr_plain (dev, offsetof(amb_mem, interrupt), -1);
1920#endif
1921 // clear self-test done flag
1922 wr_plain (dev, offsetof(amb_mem, mb.loader.ready), 0);
1923 // take card out of reset state
1924 wr_plain (dev, offsetof(amb_mem, reset_control), word &~ AMB_RESET_BITS);
1925
1926 if (diags) {
1927 unsigned long timeout;
1928 // 4.2 second wait
1929 msleep(4200);
1930 // half second time-out
1931 timeout = 500;
1932 while (!rd_plain (dev, offsetof(amb_mem, mb.loader.ready)))
1933 if (timeout) {
1934 timeout = msleep_interruptible(timeout);
1935 } else {
1936 PRINTD (DBG_LOAD|DBG_ERR, "reset timed out");
1937 return -ETIMEDOUT;
1938 }
1939
1940 // get results of self-test
1941 // XXX double check byte-order
1942 word = rd_mem (dev, offsetof(amb_mem, mb.loader.result));
1943 if (word & SELF_TEST_FAILURE) {
1944 if (word & GPINT_TST_FAILURE)
1945 sf ("interrupt");
1946 if (word & SUNI_DATA_PATTERN_FAILURE)
1947 sf ("SUNI data pattern");
1948 if (word & SUNI_DATA_BITS_FAILURE)
1949 sf ("SUNI data bits");
1950 if (word & SUNI_UTOPIA_FAILURE)
1951 sf ("SUNI UTOPIA interface");
1952 if (word & SUNI_FIFO_FAILURE)
1953 sf ("SUNI cell buffer FIFO");
1954 if (word & SRAM_FAILURE)
1955 sf ("bad SRAM");
1956 // better return value?
1957 return -EIO;
1958 }
1959
1960 }
1961 return 0;
1962}
1963
1964/********** transfer and start the microcode **********/
1965
1966static int __devinit ucode_init (loader_block * lb, amb_dev * dev) {
1967 unsigned int i = 0;
1968 unsigned int total = 0;
1969 const u32 * pointer = ucode_data;
1970 u32 address;
1971 unsigned int count;
1972 int res;
1973
1974 PRINTD (DBG_FLOW|DBG_LOAD, "ucode_init");
1975
1976 while (address = ucode_regions[i].start,
1977 count = ucode_regions[i].count) {
1978 PRINTD (DBG_LOAD, "starting region (%x, %u)", address, count);
1979 while (count) {
1980 unsigned int words;
1981 if (count <= MAX_TRANSFER_DATA)
1982 words = count;
1983 else
1984 words = MAX_TRANSFER_DATA;
1985 total += words;
1986 res = loader_write (lb, dev, pointer, address, words);
1987 if (res)
1988 return res;
1989 res = loader_verify (lb, dev, pointer, address, words);
1990 if (res)
1991 return res;
1992 count -= words;
1993 address += sizeof(u32) * words;
1994 pointer += words;
1995 }
1996 i += 1;
1997 }
1998 if (*pointer == 0xdeadbeef) {
1999 return loader_start (lb, dev, ucode_start);
2000 } else {
2001 // cast needed as there is no %? for pointer differnces
2002 PRINTD (DBG_LOAD|DBG_ERR,
2003 "offset=%li, *pointer=%x, address=%x, total=%u",
2004 (long) (pointer - ucode_data), *pointer, address, total);
2005 PRINTK (KERN_ERR, "incorrect microcode data");
2006 return -ENOMEM;
2007 }
2008}
2009
2010/********** give adapter parameters **********/
2011
2012static inline __be32 bus_addr(void * addr) {
2013 return cpu_to_be32 (virt_to_bus (addr));
2014}
2015
2016static int __devinit amb_talk (amb_dev * dev) {
2017 adap_talk_block a;
2018 unsigned char pool;
2019 unsigned long timeout;
2020
2021 PRINTD (DBG_FLOW, "amb_talk %p", dev);
2022
2023 a.command_start = bus_addr (dev->cq.ptrs.start);
2024 a.command_end = bus_addr (dev->cq.ptrs.limit);
2025 a.tx_start = bus_addr (dev->txq.in.start);
2026 a.tx_end = bus_addr (dev->txq.in.limit);
2027 a.txcom_start = bus_addr (dev->txq.out.start);
2028 a.txcom_end = bus_addr (dev->txq.out.limit);
2029
2030 for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
2031 // the other "a" items are set up by the adapter
2032 a.rec_struct[pool].buffer_start = bus_addr (dev->rxq[pool].in.start);
2033 a.rec_struct[pool].buffer_end = bus_addr (dev->rxq[pool].in.limit);
2034 a.rec_struct[pool].rx_start = bus_addr (dev->rxq[pool].out.start);
2035 a.rec_struct[pool].rx_end = bus_addr (dev->rxq[pool].out.limit);
2036 a.rec_struct[pool].buffer_size = cpu_to_be32 (dev->rxq[pool].buffer_size);
2037 }
2038
2039#ifdef AMB_NEW_MICROCODE
2040 // disable fast PLX prefetching
2041 a.init_flags = 0;
2042#endif
2043
2044 // pass the structure
2045 wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (&a));
2046
2047 // 2.2 second wait (must not touch doorbell during 2 second DMA test)
2048 msleep(2200);
2049 // give the adapter another half second?
2050 timeout = 500;
2051 while (rd_plain (dev, offsetof(amb_mem, doorbell)))
2052 if (timeout) {
2053 timeout = msleep_interruptible(timeout);
2054 } else {
2055 PRINTD (DBG_INIT|DBG_ERR, "adapter init timed out");
2056 return -ETIMEDOUT;
2057 }
2058
2059 return 0;
2060}
2061
2062// get microcode version
2063static void __devinit amb_ucode_version (amb_dev * dev) {
2064 u32 major;
2065 u32 minor;
2066 command cmd;
2067 cmd.request = cpu_to_be32 (SRB_GET_VERSION);
2068 while (command_do (dev, &cmd)) {
2069 set_current_state(TASK_UNINTERRUPTIBLE);
2070 schedule();
2071 }
2072 major = be32_to_cpu (cmd.args.version.major);
2073 minor = be32_to_cpu (cmd.args.version.minor);
2074 PRINTK (KERN_INFO, "microcode version is %u.%u", major, minor);
2075}
2076
2077// swap bits within byte to get Ethernet ordering
2078static u8 bit_swap (u8 byte)
2079{
2080 const u8 swap[] = {
2081 0x0, 0x8, 0x4, 0xc,
2082 0x2, 0xa, 0x6, 0xe,
2083 0x1, 0x9, 0x5, 0xd,
2084 0x3, 0xb, 0x7, 0xf
2085 };
2086 return ((swap[byte & 0xf]<<4) | swap[byte>>4]);
2087}
2088
2089// get end station address
2090static void __devinit amb_esi (amb_dev * dev, u8 * esi) {
2091 u32 lower4;
2092 u16 upper2;
2093 command cmd;
2094
2095 cmd.request = cpu_to_be32 (SRB_GET_BIA);
2096 while (command_do (dev, &cmd)) {
2097 set_current_state(TASK_UNINTERRUPTIBLE);
2098 schedule();
2099 }
2100 lower4 = be32_to_cpu (cmd.args.bia.lower4);
2101 upper2 = be32_to_cpu (cmd.args.bia.upper2);
2102 PRINTD (DBG_LOAD, "BIA: lower4: %08x, upper2 %04x", lower4, upper2);
2103
2104 if (esi) {
2105 unsigned int i;
2106
2107 PRINTDB (DBG_INIT, "ESI:");
2108 for (i = 0; i < ESI_LEN; ++i) {
2109 if (i < 4)
2110 esi[i] = bit_swap (lower4>>(8*i));
2111 else
2112 esi[i] = bit_swap (upper2>>(8*(i-4)));
2113 PRINTDM (DBG_INIT, " %02x", esi[i]);
2114 }
2115
2116 PRINTDE (DBG_INIT, "");
2117 }
2118
2119 return;
2120}
2121
2122static void fixup_plx_window (amb_dev *dev, loader_block *lb)
2123{
2124 // fix up the PLX-mapped window base address to match the block
2125 unsigned long blb;
2126 u32 mapreg;
2127 blb = virt_to_bus(lb);
2128 // the kernel stack had better not ever cross a 1Gb boundary!
2129 mapreg = rd_plain (dev, offsetof(amb_mem, stuff[10]));
2130 mapreg &= ~onegigmask;
2131 mapreg |= blb & onegigmask;
2132 wr_plain (dev, offsetof(amb_mem, stuff[10]), mapreg);
2133 return;
2134}
2135
2136static int __devinit amb_init (amb_dev * dev)
2137{
2138 loader_block lb;
2139
2140 u32 version;
2141
2142 if (amb_reset (dev, 1)) {
2143 PRINTK (KERN_ERR, "card reset failed!");
2144 } else {
2145 fixup_plx_window (dev, &lb);
2146
2147 if (get_loader_version (&lb, dev, &version)) {
2148 PRINTK (KERN_INFO, "failed to get loader version");
2149 } else {
2150 PRINTK (KERN_INFO, "loader version is %08x", version);
2151
2152 if (ucode_init (&lb, dev)) {
2153 PRINTK (KERN_ERR, "microcode failure");
2154 } else if (create_queues (dev, cmds, txs, rxs, rxs_bs)) {
2155 PRINTK (KERN_ERR, "failed to get memory for queues");
2156 } else {
2157
2158 if (amb_talk (dev)) {
2159 PRINTK (KERN_ERR, "adapter did not accept queues");
2160 } else {
2161
2162 amb_ucode_version (dev);
2163 return 0;
2164
2165 } /* amb_talk */
2166
2167 destroy_queues (dev);
2168 } /* create_queues, ucode_init */
2169
2170 amb_reset (dev, 0);
2171 } /* get_loader_version */
2172
2173 } /* amb_reset */
2174
2175 return -EINVAL;
2176}
2177
2178static void setup_dev(amb_dev *dev, struct pci_dev *pci_dev)
2179{
2180 unsigned char pool;
2181 memset (dev, 0, sizeof(amb_dev));
2182
2183 // set up known dev items straight away
2184 dev->pci_dev = pci_dev;
2185 pci_set_drvdata(pci_dev, dev);
2186
2187 dev->iobase = pci_resource_start (pci_dev, 1);
2188 dev->irq = pci_dev->irq;
2189 dev->membase = bus_to_virt(pci_resource_start(pci_dev, 0));
2190
2191 // flags (currently only dead)
2192 dev->flags = 0;
2193
2194 // Allocate cell rates (fibre)
2195 // ATM_OC3_PCR = 1555200000/8/270*260/53 - 29/53
2196 // to be really pedantic, this should be ATM_OC3c_PCR
2197 dev->tx_avail = ATM_OC3_PCR;
2198 dev->rx_avail = ATM_OC3_PCR;
2199
2200#ifdef FILL_RX_POOLS_IN_BH
2201 // initialise bottom half
2202 INIT_WORK(&dev->bh, (void (*)(void *)) fill_rx_pools, dev);
2203#endif
2204
2205 // semaphore for txer/rxer modifications - we cannot use a
2206 // spinlock as the critical region needs to switch processes
2207 init_MUTEX (&dev->vcc_sf);
2208 // queue manipulation spinlocks; we want atomic reads and
2209 // writes to the queue descriptors (handles IRQ and SMP)
2210 // consider replacing "int pending" -> "atomic_t available"
2211 // => problem related to who gets to move queue pointers
2212 spin_lock_init (&dev->cq.lock);
2213 spin_lock_init (&dev->txq.lock);
2214 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2215 spin_lock_init (&dev->rxq[pool].lock);
2216}
2217
2218static void setup_pci_dev(struct pci_dev *pci_dev)
2219{
2220 unsigned char lat;
2221
2222 // enable bus master accesses
2223 pci_set_master(pci_dev);
2224
2225 // frobnicate latency (upwards, usually)
2226 pci_read_config_byte (pci_dev, PCI_LATENCY_TIMER, &lat);
2227
2228 if (!pci_lat)
2229 pci_lat = (lat < MIN_PCI_LATENCY) ? MIN_PCI_LATENCY : lat;
2230
2231 if (lat != pci_lat) {
2232 PRINTK (KERN_INFO, "Changing PCI latency timer from %hu to %hu",
2233 lat, pci_lat);
2234 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, pci_lat);
2235 }
2236}
2237
2238static int __devinit amb_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
2239{
2240 amb_dev * dev;
2241 int err;
2242 unsigned int irq;
2243
2244 err = pci_enable_device(pci_dev);
2245 if (err < 0) {
2246 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
2247 goto out;
2248 }
2249
2250 // read resources from PCI configuration space
2251 irq = pci_dev->irq;
2252
2253 if (pci_dev->device == PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD) {
2254 PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
2255 err = -EINVAL;
2256 goto out_disable;
2257 }
2258
2259 PRINTD (DBG_INFO, "found Madge ATM adapter (amb) at"
2260 " IO %lx, IRQ %u, MEM %p", pci_resource_start(pci_dev, 1),
2261 irq, bus_to_virt(pci_resource_start(pci_dev, 0)));
2262
2263 // check IO region
2264 err = pci_request_region(pci_dev, 1, DEV_LABEL);
2265 if (err < 0) {
2266 PRINTK (KERN_ERR, "IO range already in use!");
2267 goto out_disable;
2268 }
2269
2270 dev = kmalloc (sizeof(amb_dev), GFP_KERNEL);
2271 if (!dev) {
2272 PRINTK (KERN_ERR, "out of memory!");
2273 err = -ENOMEM;
2274 goto out_release;
2275 }
2276
2277 setup_dev(dev, pci_dev);
2278
2279 err = amb_init(dev);
2280 if (err < 0) {
2281 PRINTK (KERN_ERR, "adapter initialisation failure");
2282 goto out_free;
2283 }
2284
2285 setup_pci_dev(pci_dev);
2286
2287 // grab (but share) IRQ and install handler
2288 err = request_irq(irq, interrupt_handler, SA_SHIRQ, DEV_LABEL, dev);
2289 if (err < 0) {
2290 PRINTK (KERN_ERR, "request IRQ failed!");
2291 goto out_reset;
2292 }
2293
2294 dev->atm_dev = atm_dev_register (DEV_LABEL, &amb_ops, -1, NULL);
2295 if (!dev->atm_dev) {
2296 PRINTD (DBG_ERR, "failed to register Madge ATM adapter");
2297 err = -EINVAL;
2298 goto out_free_irq;
2299 }
2300
2301 PRINTD (DBG_INFO, "registered Madge ATM adapter (no. %d) (%p) at %p",
2302 dev->atm_dev->number, dev, dev->atm_dev);
2303 dev->atm_dev->dev_data = (void *) dev;
2304
2305 // register our address
2306 amb_esi (dev, dev->atm_dev->esi);
2307
2308 // 0 bits for vpi, 10 bits for vci
2309 dev->atm_dev->ci_range.vpi_bits = NUM_VPI_BITS;
2310 dev->atm_dev->ci_range.vci_bits = NUM_VCI_BITS;
2311
2312 init_timer(&dev->housekeeping);
2313 dev->housekeeping.function = do_housekeeping;
2314 dev->housekeeping.data = (unsigned long) dev;
2315 mod_timer(&dev->housekeeping, jiffies);
2316
2317 // enable host interrupts
2318 interrupts_on (dev);
2319
2320out:
2321 return err;
2322
2323out_free_irq:
2324 free_irq(irq, dev);
2325out_reset:
2326 amb_reset(dev, 0);
2327out_free:
2328 kfree(dev);
2329out_release:
2330 pci_release_region(pci_dev, 1);
2331out_disable:
2332 pci_disable_device(pci_dev);
2333 goto out;
2334}
2335
2336
2337static void __devexit amb_remove_one(struct pci_dev *pci_dev)
2338{
2339 struct amb_dev *dev;
2340
2341 dev = pci_get_drvdata(pci_dev);
2342
2343 PRINTD(DBG_INFO|DBG_INIT, "closing %p (atm_dev = %p)", dev, dev->atm_dev);
2344 del_timer_sync(&dev->housekeeping);
2345 // the drain should not be necessary
2346 drain_rx_pools(dev);
2347 interrupts_off(dev);
2348 amb_reset(dev, 0);
2349 free_irq(dev->irq, dev);
2350 pci_disable_device(pci_dev);
2351 destroy_queues(dev);
2352 atm_dev_deregister(dev->atm_dev);
2353 kfree(dev);
2354 pci_release_region(pci_dev, 1);
2355}
2356
2357static void __init amb_check_args (void) {
2358 unsigned char pool;
2359 unsigned int max_rx_size;
2360
2361#ifdef DEBUG_AMBASSADOR
2362 PRINTK (KERN_NOTICE, "debug bitmap is %hx", debug &= DBG_MASK);
2363#else
2364 if (debug)
2365 PRINTK (KERN_NOTICE, "no debugging support");
2366#endif
2367
2368 if (cmds < MIN_QUEUE_SIZE)
2369 PRINTK (KERN_NOTICE, "cmds has been raised to %u",
2370 cmds = MIN_QUEUE_SIZE);
2371
2372 if (txs < MIN_QUEUE_SIZE)
2373 PRINTK (KERN_NOTICE, "txs has been raised to %u",
2374 txs = MIN_QUEUE_SIZE);
2375
2376 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2377 if (rxs[pool] < MIN_QUEUE_SIZE)
2378 PRINTK (KERN_NOTICE, "rxs[%hu] has been raised to %u",
2379 pool, rxs[pool] = MIN_QUEUE_SIZE);
2380
2381 // buffers sizes should be greater than zero and strictly increasing
2382 max_rx_size = 0;
2383 for (pool = 0; pool < NUM_RX_POOLS; ++pool)
2384 if (rxs_bs[pool] <= max_rx_size)
2385 PRINTK (KERN_NOTICE, "useless pool (rxs_bs[%hu] = %u)",
2386 pool, rxs_bs[pool]);
2387 else
2388 max_rx_size = rxs_bs[pool];
2389
2390 if (rx_lats < MIN_RX_BUFFERS)
2391 PRINTK (KERN_NOTICE, "rx_lats has been raised to %u",
2392 rx_lats = MIN_RX_BUFFERS);
2393
2394 return;
2395}
2396
2397/********** module stuff **********/
2398
2399MODULE_AUTHOR(maintainer_string);
2400MODULE_DESCRIPTION(description_string);
2401MODULE_LICENSE("GPL");
2402module_param(debug, ushort, 0644);
2403module_param(cmds, uint, 0);
2404module_param(txs, uint, 0);
2405module_param_array(rxs, uint, NULL, 0);
2406module_param_array(rxs_bs, uint, NULL, 0);
2407module_param(rx_lats, uint, 0);
2408module_param(pci_lat, byte, 0);
2409MODULE_PARM_DESC(debug, "debug bitmap, see .h file");
2410MODULE_PARM_DESC(cmds, "number of command queue entries");
2411MODULE_PARM_DESC(txs, "number of TX queue entries");
2412MODULE_PARM_DESC(rxs, "number of RX queue entries [" __MODULE_STRING(NUM_RX_POOLS) "]");
2413MODULE_PARM_DESC(rxs_bs, "size of RX buffers [" __MODULE_STRING(NUM_RX_POOLS) "]");
2414MODULE_PARM_DESC(rx_lats, "number of extra buffers to cope with RX latencies");
2415MODULE_PARM_DESC(pci_lat, "PCI latency in bus cycles");
2416
2417/********** module entry **********/
2418
2419static struct pci_device_id amb_pci_tbl[] = {
2420 { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR, PCI_ANY_ID, PCI_ANY_ID,
2421 0, 0, 0 },
2422 { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD, PCI_ANY_ID, PCI_ANY_ID,
2423 0, 0, 0 },
2424 { 0, }
2425};
2426
2427MODULE_DEVICE_TABLE(pci, amb_pci_tbl);
2428
2429static struct pci_driver amb_driver = {
2430 .name = "amb",
2431 .probe = amb_probe,
2432 .remove = __devexit_p(amb_remove_one),
2433 .id_table = amb_pci_tbl,
2434};
2435
2436static int __init amb_module_init (void)
2437{
2438 PRINTD (DBG_FLOW|DBG_INIT, "init_module");
2439
2440 // sanity check - cast needed as printk does not support %Zu
2441 if (sizeof(amb_mem) != 4*16 + 4*12) {
2442 PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).",
2443 (unsigned long) sizeof(amb_mem));
2444 return -ENOMEM;
2445 }
2446
2447 show_version();
2448
2449 amb_check_args();
2450
2451 // get the juice
2452 return pci_register_driver(&amb_driver);
2453}
2454
2455/********** module exit **********/
2456
2457static void __exit amb_module_exit (void)
2458{
2459 PRINTD (DBG_FLOW|DBG_INIT, "cleanup_module");
2460
2461 return pci_unregister_driver(&amb_driver);
2462}
2463
2464module_init(amb_module_init);
2465module_exit(amb_module_exit);