blob: d7e1d3693a20acdadf7f61f448adf3033df8a061 [file] [log] [blame]
Wei Song792d3762010-10-28 20:31:44 +02001/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA.
19 *
20 * Supports following chips:
21 *
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/slab.h>
31#include <linux/i2c.h>
32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h>
34#include <linux/err.h>
35#include <linux/mutex.h>
36#include <linux/delay.h>
37
38/* Addresses to scan */
39static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END };
40
Wei Song792d3762010-10-28 20:31:44 +020041
42static int reset;
43module_param(reset, bool, 0);
44MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
45
46
47#define W83795_REG_BANKSEL 0x00
48#define W83795_REG_VENDORID 0xfd
49#define W83795_REG_CHIPID 0xfe
50#define W83795_REG_DEVICEID 0xfb
51
52#define W83795_REG_I2C_ADDR 0xfc
53#define W83795_REG_CONFIG 0x01
54#define W83795_REG_CONFIG_CONFIG48 0x04
55
56/* Multi-Function Pin Ctrl Registers */
57#define W83795_REG_VOLT_CTRL1 0x02
58#define W83795_REG_VOLT_CTRL2 0x03
59#define W83795_REG_TEMP_CTRL1 0x04
60#define W83795_REG_TEMP_CTRL2 0x05
61#define W83795_REG_FANIN_CTRL1 0x06
62#define W83795_REG_FANIN_CTRL2 0x07
63#define W83795_REG_VMIGB_CTRL 0x08
64
65#define TEMP_CTRL_DISABLE 0
66#define TEMP_CTRL_TD 1
67#define TEMP_CTRL_VSEN 2
68#define TEMP_CTRL_TR 3
69#define TEMP_CTRL_SHIFT 4
70#define TEMP_CTRL_HASIN_SHIFT 5
71/* temp mode may effect VSEN17-12 (in20-15) */
72static u16 W83795_REG_TEMP_CTRL[][6] = {
73 /* Disable, TD, VSEN, TR, register shift value, has_in shift num */
74 {0x00, 0x01, 0x02, 0x03, 0, 17}, /* TR1 */
75 {0x00, 0x04, 0x08, 0x0C, 2, 18}, /* TR2 */
76 {0x00, 0x10, 0x20, 0x30, 4, 19}, /* TR3 */
77 {0x00, 0x40, 0x80, 0xC0, 6, 20}, /* TR4 */
78 {0x00, 0x00, 0x02, 0x03, 0, 15}, /* TR5 */
79 {0x00, 0x00, 0x08, 0x0C, 2, 16}, /* TR6 */
80};
81
82#define TEMP_READ 0
83#define TEMP_CRIT 1
84#define TEMP_CRIT_HYST 2
85#define TEMP_WARN 3
86#define TEMP_WARN_HYST 4
87/* only crit and crit_hyst affect real-time alarm status
88 * current crit crit_hyst warn warn_hyst */
89static u16 W83795_REG_TEMP[][5] = {
90 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
91 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
92 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
93 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
94 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
95 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
96};
97
98#define IN_READ 0
99#define IN_MAX 1
100#define IN_LOW 2
101static const u16 W83795_REG_IN[][3] = {
102 /* Current, HL, LL */
103 {0x10, 0x70, 0x71}, /* VSEN1 */
104 {0x11, 0x72, 0x73}, /* VSEN2 */
105 {0x12, 0x74, 0x75}, /* VSEN3 */
106 {0x13, 0x76, 0x77}, /* VSEN4 */
107 {0x14, 0x78, 0x79}, /* VSEN5 */
108 {0x15, 0x7a, 0x7b}, /* VSEN6 */
109 {0x16, 0x7c, 0x7d}, /* VSEN7 */
110 {0x17, 0x7e, 0x7f}, /* VSEN8 */
111 {0x18, 0x80, 0x81}, /* VSEN9 */
112 {0x19, 0x82, 0x83}, /* VSEN10 */
113 {0x1A, 0x84, 0x85}, /* VSEN11 */
114 {0x1B, 0x86, 0x87}, /* VTT */
115 {0x1C, 0x88, 0x89}, /* 3VDD */
116 {0x1D, 0x8a, 0x8b}, /* 3VSB */
117 {0x1E, 0x8c, 0x8d}, /* VBAT */
118 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
119 {0x20, 0xaa, 0xab}, /* VSEN13 */
120 {0x21, 0x96, 0x97}, /* VSEN14 */
121 {0x22, 0x9a, 0x9b}, /* VSEN15 */
122 {0x23, 0x9e, 0x9f}, /* VSEN16 */
123 {0x24, 0xa2, 0xa3}, /* VSEN17 */
124};
125#define W83795_REG_VRLSB 0x3C
126#define VRLSB_SHIFT 6
127
128static const u8 W83795_REG_IN_HL_LSB[] = {
129 0x8e, /* VSEN1-4 */
130 0x90, /* VSEN5-8 */
131 0x92, /* VSEN9-11 */
132 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
133 0xa8, /* VSEN12 */
134 0xac, /* VSEN13 */
135 0x98, /* VSEN14 */
136 0x9c, /* VSEN15 */
137 0xa0, /* VSEN16 */
138 0xa4, /* VSEN17 */
139};
140
141#define IN_LSB_REG(index, type) \
142 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
143 : (W83795_REG_IN_HL_LSB[(index)] + 1))
144
145#define IN_LSB_REG_NUM 10
146
147#define IN_LSB_SHIFT 0
148#define IN_LSB_IDX 1
149static const u8 IN_LSB_SHIFT_IDX[][2] = {
150 /* High/Low LSB shift, LSB No. */
151 {0x00, 0x00}, /* VSEN1 */
152 {0x02, 0x00}, /* VSEN2 */
153 {0x04, 0x00}, /* VSEN3 */
154 {0x06, 0x00}, /* VSEN4 */
155 {0x00, 0x01}, /* VSEN5 */
156 {0x02, 0x01}, /* VSEN6 */
157 {0x04, 0x01}, /* VSEN7 */
158 {0x06, 0x01}, /* VSEN8 */
159 {0x00, 0x02}, /* VSEN9 */
160 {0x02, 0x02}, /* VSEN10 */
161 {0x04, 0x02}, /* VSEN11 */
162 {0x00, 0x03}, /* VTT */
163 {0x02, 0x03}, /* 3VDD */
164 {0x04, 0x03}, /* 3VSB */
165 {0x06, 0x03}, /* VBAT */
166 {0x06, 0x04}, /* VSEN12 */
167 {0x06, 0x05}, /* VSEN13 */
168 {0x06, 0x06}, /* VSEN14 */
169 {0x06, 0x07}, /* VSEN15 */
170 {0x06, 0x08}, /* VSEN16 */
171 {0x06, 0x09}, /* VSEN17 */
172};
173
174
175/* 3VDD, 3VSB, VBAT * 0.006 */
176#define REST_VLT_BEGIN 12 /* the 13th volt to 15th */
177#define REST_VLT_END 14 /* the 13th volt to 15th */
178
179#define W83795_REG_FAN(index) (0x2E + (index))
180#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
181#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
182#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
183 (((index) % 1) ? 4 : 0)
Wei Song792d3762010-10-28 20:31:44 +0200184
185#define W83795_REG_VID_CTRL 0x6A
186
187#define ALARM_BEEP_REG_NUM 6
188#define W83795_REG_ALARM(index) (0x41 + (index))
189#define W83795_REG_BEEP(index) (0x50 + (index))
190
191#define W83795_REG_CLR_CHASSIS 0x4D
192
193
194#define W83795_REG_TEMP_NUM 6
195#define W83795_REG_FCMS1 0x201
196#define W83795_REG_FCMS2 0x208
197#define W83795_REG_TFMR(index) (0x202 + (index))
198#define W83795_REG_FOMC 0x20F
199#define W83795_REG_FOPFP(index) (0x218 + (index))
200
201#define W83795_REG_TSS(index) (0x209 + (index))
202
203#define PWM_OUTPUT 0
204#define PWM_START 1
205#define PWM_NONSTOP 2
206#define PWM_STOP_TIME 3
207#define PWM_DIV 4
208#define W83795_REG_PWM(index, nr) \
209 (((nr) == 0 ? 0x210 : \
210 (nr) == 1 ? 0x220 : \
211 (nr) == 2 ? 0x228 : \
212 (nr) == 3 ? 0x230 : 0x218) + (index))
213
214#define W83795_REG_FOPFP_DIV(index) \
215 (((index) < 8) ? ((index) + 1) : \
216 ((index) == 8) ? 12 : \
217 (16 << ((index) - 9)))
218
219#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
220#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
221#define W83795_REG_TFTS 0x250
222
223#define TEMP_PWM_TTTI 0
224#define TEMP_PWM_CTFS 1
225#define TEMP_PWM_HCT 2
226#define TEMP_PWM_HOT 3
227#define W83795_REG_TTTI(index) (0x260 + (index))
228#define W83795_REG_CTFS(index) (0x268 + (index))
229#define W83795_REG_HT(index) (0x270 + (index))
230
231#define SF4_TEMP 0
232#define SF4_PWM 1
233#define W83795_REG_SF4_TEMP(temp_num, index) \
234 (0x280 + 0x10 * (temp_num) + (index))
235#define W83795_REG_SF4_PWM(temp_num, index) \
236 (0x288 + 0x10 * (temp_num) + (index))
237
238#define W83795_REG_DTSC 0x301
239#define W83795_REG_DTSE 0x302
240#define W83795_REG_DTS(index) (0x26 + (index))
241
242#define DTS_CRIT 0
243#define DTS_CRIT_HYST 1
244#define DTS_WARN 2
245#define DTS_WARN_HYST 3
246#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
247
248#define SETUP_PWM_DEFAULT 0
249#define SETUP_PWM_UPTIME 1
250#define SETUP_PWM_DOWNTIME 2
251#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
252
253static inline u16 in_from_reg(u8 index, u16 val)
254{
255 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
256 return val * 6;
257 else
258 return val * 2;
259}
260
261static inline u16 in_to_reg(u8 index, u16 val)
262{
263 if ((index >= REST_VLT_BEGIN) && (index <= REST_VLT_END))
264 return val / 6;
265 else
266 return val / 2;
267}
268
269static inline unsigned long fan_from_reg(u16 val)
270{
271 if ((val >= 0xff0) || (val == 0))
272 return 0;
273 return 1350000UL / val;
274}
275
276static inline u16 fan_to_reg(long rpm)
277{
278 if (rpm <= 0)
279 return 0x0fff;
280 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
281}
282
283static inline unsigned long time_from_reg(u8 reg)
284{
285 return reg * 100;
286}
287
288static inline u8 time_to_reg(unsigned long val)
289{
290 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
291}
292
293static inline long temp_from_reg(s8 reg)
294{
295 return reg * 1000;
296}
297
298static inline s8 temp_to_reg(long val, s8 min, s8 max)
299{
300 return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max);
301}
302
303
304enum chip_types {w83795g, w83795adg};
305
306struct w83795_data {
307 struct device *hwmon_dev;
308 struct mutex update_lock;
309 unsigned long last_updated; /* In jiffies */
310 enum chip_types chip_type;
311
312 u8 bank;
313
314 u32 has_in; /* Enable monitor VIN or not */
315 u16 in[21][3]; /* Register value, read/high/low */
316 u8 in_lsb[10][3]; /* LSB Register value, high/low */
317 u8 has_gain; /* has gain: in17-20 * 8 */
318
319 u16 has_fan; /* Enable fan14-1 or not */
320 u16 fan[14]; /* Register value combine */
321 u16 fan_min[14]; /* Register value combine */
322
323 u8 has_temp; /* Enable monitor temp6-1 or not */
324 u8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
325 u8 temp_read_vrlsb[6];
326 u8 temp_mode; /* bit 0: TR mode, bit 1: TD mode */
327 u8 temp_src[3]; /* Register value */
328
329 u8 enable_dts; /* Enable PECI and SB-TSI,
330 * bit 0: =1 enable, =0 disable,
331 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
332 u8 has_dts; /* Enable monitor DTS temp */
333 u8 dts[8]; /* Register value */
334 u8 dts_read_vrlsb[8]; /* Register value */
335 u8 dts_ext[4]; /* Register value */
336
337 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
338 * no config register, only affected by chip
339 * type */
340 u8 pwm[8][5]; /* Register value, output, start, non stop, stop
341 * time, div */
342 u8 pwm_fcms[2]; /* Register value */
343 u8 pwm_tfmr[6]; /* Register value */
344 u8 pwm_fomc; /* Register value */
345
346 u16 target_speed[8]; /* Register value, target speed for speed
347 * cruise */
348 u8 tol_speed; /* tolerance of target speed */
349 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
350 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
351
352 u8 setup_pwm[3]; /* Register value */
353
354 u8 alarms[6]; /* Register value */
355 u8 beeps[6]; /* Register value */
356 u8 beep_enable;
357
358 char valid;
359};
360
361/*
362 * Hardware access
363 */
364
365/* Ignore the possibility that somebody change bank outside the driver
366 * Must be called with data->update_lock held, except during initialization */
367static u8 w83795_read(struct i2c_client *client, u16 reg)
368{
369 struct w83795_data *data = i2c_get_clientdata(client);
370 u8 res = 0xff;
371 u8 new_bank = reg >> 8;
372
373 new_bank |= data->bank & 0xfc;
374 if (data->bank != new_bank) {
375 if (i2c_smbus_write_byte_data
376 (client, W83795_REG_BANKSEL, new_bank) >= 0)
377 data->bank = new_bank;
378 else {
379 dev_err(&client->dev,
380 "set bank to %d failed, fall back "
381 "to bank %d, read reg 0x%x error\n",
382 new_bank, data->bank, reg);
383 res = 0x0; /* read 0x0 from the chip */
384 goto END;
385 }
386 }
387 res = i2c_smbus_read_byte_data(client, reg & 0xff);
388END:
389 return res;
390}
391
392/* Must be called with data->update_lock held, except during initialization */
393static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
394{
395 struct w83795_data *data = i2c_get_clientdata(client);
396 int res;
397 u8 new_bank = reg >> 8;
398
399 new_bank |= data->bank & 0xfc;
400 if (data->bank != new_bank) {
401 res = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
402 new_bank);
403 if (res >= 0)
404 data->bank = new_bank;
405 else {
406 dev_err(&client->dev,
407 "set bank to %d failed, fall back "
408 "to bank %d, write reg 0x%x error\n",
409 new_bank, data->bank, reg);
410 goto END;
411 }
412 }
413
414 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
415END:
416 return res;
417}
418
419static struct w83795_data *w83795_update_device(struct device *dev)
420{
421 struct i2c_client *client = to_i2c_client(dev);
422 struct w83795_data *data = i2c_get_clientdata(client);
423 u16 tmp;
424 int i;
425
426 mutex_lock(&data->update_lock);
427
428 if (!(time_after(jiffies, data->last_updated + HZ * 2)
429 || !data->valid))
430 goto END;
431
432 /* Update the voltages value */
433 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
434 if (!(data->has_in & (1 << i)))
435 continue;
436 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
437 tmp |= (w83795_read(client, W83795_REG_VRLSB)
438 >> VRLSB_SHIFT) & 0x03;
439 data->in[i][IN_READ] = tmp;
440 }
441
442 /* Update fan */
443 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
444 if (!(data->has_fan & (1 << i)))
445 continue;
446 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
447 data->fan[i] |=
448 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
449 }
450
451 /* Update temperature */
452 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
453 /* even stop monitor, register still keep value, just read out
454 * it */
455 if (!(data->has_temp & (1 << i))) {
456 data->temp[i][TEMP_READ] = 0;
457 data->temp_read_vrlsb[i] = 0;
458 continue;
459 }
460 data->temp[i][TEMP_READ] =
461 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
462 data->temp_read_vrlsb[i] =
463 w83795_read(client, W83795_REG_VRLSB);
464 }
465
466 /* Update dts temperature */
467 if (data->enable_dts != 0) {
468 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
469 if (!(data->has_dts & (1 << i)))
470 continue;
471 data->dts[i] =
472 w83795_read(client, W83795_REG_DTS(i));
473 data->dts_read_vrlsb[i] =
474 w83795_read(client, W83795_REG_VRLSB);
475 }
476 }
477
478 /* Update pwm output */
479 for (i = 0; i < data->has_pwm; i++) {
480 data->pwm[i][PWM_OUTPUT] =
481 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
482 }
483
484 /* update alarm */
485 for (i = 0; i < ALARM_BEEP_REG_NUM; i++)
486 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
487
488 data->last_updated = jiffies;
489 data->valid = 1;
490
491END:
492 mutex_unlock(&data->update_lock);
493 return data;
494}
495
496/*
497 * Sysfs attributes
498 */
499
500#define ALARM_STATUS 0
501#define BEEP_ENABLE 1
502static ssize_t
503show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
504{
505 struct w83795_data *data = w83795_update_device(dev);
506 struct sensor_device_attribute_2 *sensor_attr =
507 to_sensor_dev_attr_2(attr);
508 int nr = sensor_attr->nr;
509 int index = sensor_attr->index >> 3;
510 int bit = sensor_attr->index & 0x07;
511 u8 val;
512
513 if (ALARM_STATUS == nr) {
514 val = (data->alarms[index] >> (bit)) & 1;
515 } else { /* BEEP_ENABLE */
516 val = (data->beeps[index] >> (bit)) & 1;
517 }
518
519 return sprintf(buf, "%u\n", val);
520}
521
522static ssize_t
523store_beep(struct device *dev, struct device_attribute *attr,
524 const char *buf, size_t count)
525{
526 struct i2c_client *client = to_i2c_client(dev);
527 struct w83795_data *data = i2c_get_clientdata(client);
528 struct sensor_device_attribute_2 *sensor_attr =
529 to_sensor_dev_attr_2(attr);
530 int index = sensor_attr->index >> 3;
531 int shift = sensor_attr->index & 0x07;
532 u8 beep_bit = 1 << shift;
533 unsigned long val;
534
535 if (strict_strtoul(buf, 10, &val) < 0)
536 return -EINVAL;
537 if (val != 0 && val != 1)
538 return -EINVAL;
539
540 mutex_lock(&data->update_lock);
541 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
542 data->beeps[index] &= ~beep_bit;
543 data->beeps[index] |= val << shift;
544 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
545 mutex_unlock(&data->update_lock);
546
547 return count;
548}
549
550static ssize_t
551show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
552{
553 struct i2c_client *client = to_i2c_client(dev);
554 struct w83795_data *data = i2c_get_clientdata(client);
555 return sprintf(buf, "%u\n", data->beep_enable);
556}
557
558static ssize_t
559store_beep_enable(struct device *dev, struct device_attribute *attr,
560 const char *buf, size_t count)
561{
562 struct i2c_client *client = to_i2c_client(dev);
563 struct w83795_data *data = i2c_get_clientdata(client);
564 unsigned long val;
565 u8 tmp;
566
567 if (strict_strtoul(buf, 10, &val) < 0)
568 return -EINVAL;
569 if (val != 0 && val != 1)
570 return -EINVAL;
571
572 mutex_lock(&data->update_lock);
573 data->beep_enable = val;
574 tmp = w83795_read(client, W83795_REG_BEEP(5));
575 tmp &= 0x7f;
576 tmp |= val << 7;
577 w83795_write(client, W83795_REG_BEEP(5), tmp);
578 mutex_unlock(&data->update_lock);
579
580 return count;
581}
582
583/* Write any value to clear chassis alarm */
584static ssize_t
585store_chassis_clear(struct device *dev,
586 struct device_attribute *attr, const char *buf,
587 size_t count)
588{
589 struct i2c_client *client = to_i2c_client(dev);
590 struct w83795_data *data = i2c_get_clientdata(client);
591 u8 val;
592
593 mutex_lock(&data->update_lock);
594 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
595 val |= 0x80;
596 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
597 mutex_unlock(&data->update_lock);
598 return count;
599}
600
601#define FAN_INPUT 0
602#define FAN_MIN 1
603static ssize_t
604show_fan(struct device *dev, struct device_attribute *attr, char *buf)
605{
606 struct sensor_device_attribute_2 *sensor_attr =
607 to_sensor_dev_attr_2(attr);
608 int nr = sensor_attr->nr;
609 int index = sensor_attr->index;
610 struct w83795_data *data = w83795_update_device(dev);
611 u16 val;
612
613 if (FAN_INPUT == nr)
614 val = data->fan[index] & 0x0fff;
615 else
616 val = data->fan_min[index] & 0x0fff;
617
618 return sprintf(buf, "%lu\n", fan_from_reg(val));
619}
620
621static ssize_t
622store_fan_min(struct device *dev, struct device_attribute *attr,
623 const char *buf, size_t count)
624{
625 struct sensor_device_attribute_2 *sensor_attr =
626 to_sensor_dev_attr_2(attr);
627 int index = sensor_attr->index;
628 struct i2c_client *client = to_i2c_client(dev);
629 struct w83795_data *data = i2c_get_clientdata(client);
630 unsigned long val;
631
632 if (strict_strtoul(buf, 10, &val))
633 return -EINVAL;
634 val = fan_to_reg(val);
635
636 mutex_lock(&data->update_lock);
637 data->fan_min[index] = val;
638 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
639 val &= 0x0f;
640 if (index % 1) {
641 val <<= 4;
642 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
643 & 0x0f;
644 } else {
645 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
646 & 0xf0;
647 }
648 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
649 mutex_unlock(&data->update_lock);
650
651 return count;
652}
653
654static ssize_t
655show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
656{
657 struct w83795_data *data = w83795_update_device(dev);
658 struct sensor_device_attribute_2 *sensor_attr =
659 to_sensor_dev_attr_2(attr);
660 int nr = sensor_attr->nr;
661 int index = sensor_attr->index;
662 u16 val;
663
664 switch (nr) {
665 case PWM_STOP_TIME:
666 val = time_from_reg(data->pwm[index][nr]);
667 break;
668 case PWM_DIV:
669 val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f);
670 break;
671 default:
672 val = data->pwm[index][nr];
673 break;
674 }
675
676 return sprintf(buf, "%u\n", val);
677}
678
679static ssize_t
680store_pwm(struct device *dev, struct device_attribute *attr,
681 const char *buf, size_t count)
682{
683 struct i2c_client *client = to_i2c_client(dev);
684 struct w83795_data *data = i2c_get_clientdata(client);
685 struct sensor_device_attribute_2 *sensor_attr =
686 to_sensor_dev_attr_2(attr);
687 int nr = sensor_attr->nr;
688 int index = sensor_attr->index;
689 unsigned long val;
690 int i;
691
692 if (strict_strtoul(buf, 10, &val) < 0)
693 return -EINVAL;
694
695 mutex_lock(&data->update_lock);
696 switch (nr) {
697 case PWM_STOP_TIME:
698 val = time_to_reg(val);
699 break;
700 case PWM_DIV:
701 for (i = 0; i < 16; i++) {
702 if (W83795_REG_FOPFP_DIV(i) == val) {
703 val = i;
704 break;
705 }
706 }
707 if (i >= 16)
708 goto err_end;
709 val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80;
710 break;
711 default:
712 val = SENSORS_LIMIT(val, 0, 0xff);
713 break;
714 }
715 w83795_write(client, W83795_REG_PWM(index, nr), val);
716 data->pwm[index][nr] = val & 0xff;
717 mutex_unlock(&data->update_lock);
718 return count;
719err_end:
720 mutex_unlock(&data->update_lock);
721 return -EINVAL;
722}
723
724static ssize_t
725show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
726{
727 struct sensor_device_attribute_2 *sensor_attr =
728 to_sensor_dev_attr_2(attr);
729 struct i2c_client *client = to_i2c_client(dev);
730 struct w83795_data *data = i2c_get_clientdata(client);
731 int index = sensor_attr->index;
732 u8 tmp;
733
734 if (1 == (data->pwm_fcms[0] & (1 << index))) {
735 tmp = 2;
736 goto out;
737 }
738 for (tmp = 0; tmp < 6; tmp++) {
739 if (data->pwm_tfmr[tmp] & (1 << index)) {
740 tmp = 3;
741 goto out;
742 }
743 }
744 if (data->pwm_fomc & (1 << index))
745 tmp = 0;
746 else
747 tmp = 1;
748
749out:
750 return sprintf(buf, "%u\n", tmp);
751}
752
753static ssize_t
754store_pwm_enable(struct device *dev, struct device_attribute *attr,
755 const char *buf, size_t count)
756{
757 struct i2c_client *client = to_i2c_client(dev);
758 struct w83795_data *data = i2c_get_clientdata(client);
759 struct sensor_device_attribute_2 *sensor_attr =
760 to_sensor_dev_attr_2(attr);
761 int index = sensor_attr->index;
762 unsigned long val;
763 int i;
764
765 if (strict_strtoul(buf, 10, &val) < 0)
766 return -EINVAL;
767 if (val > 2)
768 return -EINVAL;
769
770 mutex_lock(&data->update_lock);
771 switch (val) {
772 case 0:
773 case 1:
774 data->pwm_fcms[0] &= ~(1 << index);
775 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
776 for (i = 0; i < 6; i++) {
777 data->pwm_tfmr[i] &= ~(1 << index);
778 w83795_write(client, W83795_REG_TFMR(i),
779 data->pwm_tfmr[i]);
780 }
781 data->pwm_fomc |= 1 << index;
782 data->pwm_fomc ^= val << index;
783 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
784 break;
785 case 2:
786 data->pwm_fcms[0] |= (1 << index);
787 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
788 break;
789 }
790 mutex_unlock(&data->update_lock);
791 return count;
Wei Song792d3762010-10-28 20:31:44 +0200792}
793
794static ssize_t
795show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
796{
797 struct sensor_device_attribute_2 *sensor_attr =
798 to_sensor_dev_attr_2(attr);
799 struct i2c_client *client = to_i2c_client(dev);
800 struct w83795_data *data = i2c_get_clientdata(client);
801 int index = sensor_attr->index;
802 u8 val = index / 2;
803 u8 tmp = data->temp_src[val];
804
805 if (index % 1)
806 val = 4;
807 else
808 val = 0;
809 tmp >>= val;
810 tmp &= 0x0f;
811
812 return sprintf(buf, "%u\n", tmp);
813}
814
815static ssize_t
816store_temp_src(struct device *dev, struct device_attribute *attr,
817 const char *buf, size_t count)
818{
819 struct i2c_client *client = to_i2c_client(dev);
820 struct w83795_data *data = i2c_get_clientdata(client);
821 struct sensor_device_attribute_2 *sensor_attr =
822 to_sensor_dev_attr_2(attr);
823 int index = sensor_attr->index;
824 unsigned long tmp;
825 u8 val = index / 2;
826
827 if (strict_strtoul(buf, 10, &tmp) < 0)
828 return -EINVAL;
829 tmp = SENSORS_LIMIT(tmp, 0, 15);
830
831 mutex_lock(&data->update_lock);
832 if (index % 1) {
833 tmp <<= 4;
834 data->temp_src[val] &= 0x0f;
835 } else {
836 data->temp_src[val] &= 0xf0;
837 }
838 data->temp_src[val] |= tmp;
839 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
840 mutex_unlock(&data->update_lock);
841
842 return count;
843}
844
845#define TEMP_PWM_ENABLE 0
846#define TEMP_PWM_FAN_MAP 1
847static ssize_t
848show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
849 char *buf)
850{
851 struct i2c_client *client = to_i2c_client(dev);
852 struct w83795_data *data = i2c_get_clientdata(client);
853 struct sensor_device_attribute_2 *sensor_attr =
854 to_sensor_dev_attr_2(attr);
855 int nr = sensor_attr->nr;
856 int index = sensor_attr->index;
857 u8 tmp = 0xff;
858
859 switch (nr) {
860 case TEMP_PWM_ENABLE:
861 tmp = (data->pwm_fcms[1] >> index) & 1;
862 if (tmp)
863 tmp = 4;
864 else
865 tmp = 3;
866 break;
867 case TEMP_PWM_FAN_MAP:
868 tmp = data->pwm_tfmr[index];
869 break;
870 }
871
872 return sprintf(buf, "%u\n", tmp);
873}
874
875static ssize_t
876store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
877 const char *buf, size_t count)
878{
879 struct i2c_client *client = to_i2c_client(dev);
880 struct w83795_data *data = i2c_get_clientdata(client);
881 struct sensor_device_attribute_2 *sensor_attr =
882 to_sensor_dev_attr_2(attr);
883 int nr = sensor_attr->nr;
884 int index = sensor_attr->index;
885 unsigned long tmp;
886
887 if (strict_strtoul(buf, 10, &tmp) < 0)
888 return -EINVAL;
889
890 switch (nr) {
891 case TEMP_PWM_ENABLE:
892 if ((tmp != 3) && (tmp != 4))
893 return -EINVAL;
894 tmp -= 3;
895 mutex_lock(&data->update_lock);
896 data->pwm_fcms[1] &= ~(1 << index);
897 data->pwm_fcms[1] |= tmp << index;
898 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
899 mutex_unlock(&data->update_lock);
900 break;
901 case TEMP_PWM_FAN_MAP:
902 mutex_lock(&data->update_lock);
903 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
904 w83795_write(client, W83795_REG_TFMR(index), tmp);
905 data->pwm_tfmr[index] = tmp;
906 mutex_unlock(&data->update_lock);
907 break;
908 }
909 return count;
910}
911
912#define FANIN_TARGET 0
913#define FANIN_TOL 1
914static ssize_t
915show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
916{
917 struct i2c_client *client = to_i2c_client(dev);
918 struct w83795_data *data = i2c_get_clientdata(client);
919 struct sensor_device_attribute_2 *sensor_attr =
920 to_sensor_dev_attr_2(attr);
921 int nr = sensor_attr->nr;
922 int index = sensor_attr->index;
923 u16 tmp = 0;
924
925 switch (nr) {
926 case FANIN_TARGET:
927 tmp = fan_from_reg(data->target_speed[index]);
928 break;
929 case FANIN_TOL:
930 tmp = data->tol_speed;
931 break;
932 }
933
934 return sprintf(buf, "%u\n", tmp);
935}
936
937static ssize_t
938store_fanin(struct device *dev, struct device_attribute *attr,
939 const char *buf, size_t count)
940{
941 struct i2c_client *client = to_i2c_client(dev);
942 struct w83795_data *data = i2c_get_clientdata(client);
943 struct sensor_device_attribute_2 *sensor_attr =
944 to_sensor_dev_attr_2(attr);
945 int nr = sensor_attr->nr;
946 int index = sensor_attr->index;
947 unsigned long val;
948
949 if (strict_strtoul(buf, 10, &val) < 0)
950 return -EINVAL;
951
952 mutex_lock(&data->update_lock);
953 switch (nr) {
954 case FANIN_TARGET:
955 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
956 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
957 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
958 data->target_speed[index] = val;
959 break;
960 case FANIN_TOL:
961 val = SENSORS_LIMIT(val, 0, 0x3f);
962 w83795_write(client, W83795_REG_TFTS, val);
963 data->tol_speed = val;
964 break;
965 }
966 mutex_unlock(&data->update_lock);
967
968 return count;
969}
970
971
972static ssize_t
973show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
974{
975 struct i2c_client *client = to_i2c_client(dev);
976 struct w83795_data *data = i2c_get_clientdata(client);
977 struct sensor_device_attribute_2 *sensor_attr =
978 to_sensor_dev_attr_2(attr);
979 int nr = sensor_attr->nr;
980 int index = sensor_attr->index;
981 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
982
983 return sprintf(buf, "%ld\n", tmp);
984}
985
986static ssize_t
987store_temp_pwm(struct device *dev, struct device_attribute *attr,
988 const char *buf, size_t count)
989{
990 struct i2c_client *client = to_i2c_client(dev);
991 struct w83795_data *data = i2c_get_clientdata(client);
992 struct sensor_device_attribute_2 *sensor_attr =
993 to_sensor_dev_attr_2(attr);
994 int nr = sensor_attr->nr;
995 int index = sensor_attr->index;
996 unsigned long val;
997 u8 tmp;
998
999 if (strict_strtoul(buf, 10, &val) < 0)
1000 return -EINVAL;
1001 val /= 1000;
1002
1003 mutex_lock(&data->update_lock);
1004 switch (nr) {
1005 case TEMP_PWM_TTTI:
1006 val = SENSORS_LIMIT(val, 0, 0x7f);
1007 w83795_write(client, W83795_REG_TTTI(index), val);
1008 break;
1009 case TEMP_PWM_CTFS:
1010 val = SENSORS_LIMIT(val, 0, 0x7f);
1011 w83795_write(client, W83795_REG_CTFS(index), val);
1012 break;
1013 case TEMP_PWM_HCT:
1014 val = SENSORS_LIMIT(val, 0, 0x0f);
1015 tmp = w83795_read(client, W83795_REG_HT(index));
1016 tmp &= 0x0f;
1017 tmp |= (val << 4) & 0xf0;
1018 w83795_write(client, W83795_REG_HT(index), tmp);
1019 break;
1020 case TEMP_PWM_HOT:
1021 val = SENSORS_LIMIT(val, 0, 0x0f);
1022 tmp = w83795_read(client, W83795_REG_HT(index));
1023 tmp &= 0xf0;
1024 tmp |= val & 0x0f;
1025 w83795_write(client, W83795_REG_HT(index), tmp);
1026 break;
1027 }
1028 data->pwm_temp[index][nr] = val;
1029 mutex_unlock(&data->update_lock);
1030
1031 return count;
1032}
1033
1034static ssize_t
1035show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1036{
1037 struct i2c_client *client = to_i2c_client(dev);
1038 struct w83795_data *data = i2c_get_clientdata(client);
1039 struct sensor_device_attribute_2 *sensor_attr =
1040 to_sensor_dev_attr_2(attr);
1041 int nr = sensor_attr->nr;
1042 int index = sensor_attr->index;
1043
1044 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1045}
1046
1047static ssize_t
1048store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1049 const char *buf, size_t count)
1050{
1051 struct i2c_client *client = to_i2c_client(dev);
1052 struct w83795_data *data = i2c_get_clientdata(client);
1053 struct sensor_device_attribute_2 *sensor_attr =
1054 to_sensor_dev_attr_2(attr);
1055 int nr = sensor_attr->nr;
1056 int index = sensor_attr->index;
1057 unsigned long val;
1058
1059 if (strict_strtoul(buf, 10, &val) < 0)
1060 return -EINVAL;
1061
1062 mutex_lock(&data->update_lock);
1063 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1064 data->sf4_reg[index][SF4_PWM][nr] = val;
1065 mutex_unlock(&data->update_lock);
1066
1067 return count;
1068}
1069
1070static ssize_t
1071show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1072{
1073 struct i2c_client *client = to_i2c_client(dev);
1074 struct w83795_data *data = i2c_get_clientdata(client);
1075 struct sensor_device_attribute_2 *sensor_attr =
1076 to_sensor_dev_attr_2(attr);
1077 int nr = sensor_attr->nr;
1078 int index = sensor_attr->index;
1079
1080 return sprintf(buf, "%u\n",
1081 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1082}
1083
1084static ssize_t
1085store_sf4_temp(struct device *dev, struct device_attribute *attr,
1086 const char *buf, size_t count)
1087{
1088 struct i2c_client *client = to_i2c_client(dev);
1089 struct w83795_data *data = i2c_get_clientdata(client);
1090 struct sensor_device_attribute_2 *sensor_attr =
1091 to_sensor_dev_attr_2(attr);
1092 int nr = sensor_attr->nr;
1093 int index = sensor_attr->index;
1094 unsigned long val;
1095
1096 if (strict_strtoul(buf, 10, &val) < 0)
1097 return -EINVAL;
1098 val /= 1000;
1099
1100 mutex_lock(&data->update_lock);
1101 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1102 data->sf4_reg[index][SF4_TEMP][nr] = val;
1103 mutex_unlock(&data->update_lock);
1104
1105 return count;
1106}
1107
1108
1109static ssize_t
1110show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1111{
1112 struct sensor_device_attribute_2 *sensor_attr =
1113 to_sensor_dev_attr_2(attr);
1114 int nr = sensor_attr->nr;
1115 int index = sensor_attr->index;
1116 struct w83795_data *data = w83795_update_device(dev);
1117 long temp = temp_from_reg(data->temp[index][nr] & 0x7f);
1118
1119 if (TEMP_READ == nr)
1120 temp += ((data->temp_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03)
1121 * 250;
1122 if (data->temp[index][nr] & 0x80)
1123 temp = -temp;
1124 return sprintf(buf, "%ld\n", temp);
1125}
1126
1127static ssize_t
1128store_temp(struct device *dev, struct device_attribute *attr,
1129 const char *buf, size_t count)
1130{
1131 struct sensor_device_attribute_2 *sensor_attr =
1132 to_sensor_dev_attr_2(attr);
1133 int nr = sensor_attr->nr;
1134 int index = sensor_attr->index;
1135 struct i2c_client *client = to_i2c_client(dev);
1136 struct w83795_data *data = i2c_get_clientdata(client);
1137 long tmp;
1138
1139 if (strict_strtol(buf, 10, &tmp) < 0)
1140 return -EINVAL;
1141
1142 mutex_lock(&data->update_lock);
1143 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1144 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1145 mutex_unlock(&data->update_lock);
1146 return count;
1147}
1148
1149
1150static ssize_t
1151show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1152{
1153 struct i2c_client *client = to_i2c_client(dev);
1154 struct w83795_data *data = i2c_get_clientdata(client);
1155 struct sensor_device_attribute_2 *sensor_attr =
1156 to_sensor_dev_attr_2(attr);
1157 int index = sensor_attr->index;
1158 u8 tmp;
1159
1160 if (data->enable_dts == 0)
1161 return sprintf(buf, "%d\n", 0);
1162
1163 if ((data->has_dts >> index) & 0x01) {
1164 if (data->enable_dts & 2)
1165 tmp = 5;
1166 else
1167 tmp = 6;
1168 } else {
1169 tmp = 0;
1170 }
1171
1172 return sprintf(buf, "%d\n", tmp);
1173}
1174
1175static ssize_t
1176show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1177{
1178 struct sensor_device_attribute_2 *sensor_attr =
1179 to_sensor_dev_attr_2(attr);
1180 int index = sensor_attr->index;
1181 struct w83795_data *data = w83795_update_device(dev);
1182 long temp = temp_from_reg(data->dts[index] & 0x7f);
1183
1184 temp += ((data->dts_read_vrlsb[index] >> VRLSB_SHIFT) & 0x03) * 250;
1185 if (data->dts[index] & 0x80)
1186 temp = -temp;
1187 return sprintf(buf, "%ld\n", temp);
1188}
1189
1190static ssize_t
1191show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1192{
1193 struct sensor_device_attribute_2 *sensor_attr =
1194 to_sensor_dev_attr_2(attr);
1195 int nr = sensor_attr->nr;
1196 struct i2c_client *client = to_i2c_client(dev);
1197 struct w83795_data *data = i2c_get_clientdata(client);
1198 long temp = temp_from_reg(data->dts_ext[nr] & 0x7f);
1199
1200 if (data->dts_ext[nr] & 0x80)
1201 temp = -temp;
1202 return sprintf(buf, "%ld\n", temp);
1203}
1204
1205static ssize_t
1206store_dts_ext(struct device *dev, struct device_attribute *attr,
1207 const char *buf, size_t count)
1208{
1209 struct sensor_device_attribute_2 *sensor_attr =
1210 to_sensor_dev_attr_2(attr);
1211 int nr = sensor_attr->nr;
1212 struct i2c_client *client = to_i2c_client(dev);
1213 struct w83795_data *data = i2c_get_clientdata(client);
1214 long tmp;
1215
1216 if (strict_strtol(buf, 10, &tmp) < 0)
1217 return -EINVAL;
1218
1219 mutex_lock(&data->update_lock);
1220 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1221 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1222 mutex_unlock(&data->update_lock);
1223 return count;
1224}
1225
1226
1227/*
1228 Type 3: Thermal diode
1229 Type 4: Thermistor
1230
1231 Temp5-6, default TR
1232 Temp1-4, default TD
1233*/
1234
1235static ssize_t
1236show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1237{
1238 struct i2c_client *client = to_i2c_client(dev);
1239 struct w83795_data *data = i2c_get_clientdata(client);
1240 struct sensor_device_attribute_2 *sensor_attr =
1241 to_sensor_dev_attr_2(attr);
1242 int index = sensor_attr->index;
1243 u8 tmp;
1244
1245 if (data->has_temp >> index & 0x01) {
1246 if (data->temp_mode >> index & 0x01)
1247 tmp = 3;
1248 else
1249 tmp = 4;
1250 } else {
1251 tmp = 0;
1252 }
1253
1254 return sprintf(buf, "%d\n", tmp);
1255}
1256
1257static ssize_t
1258store_temp_mode(struct device *dev, struct device_attribute *attr,
1259 const char *buf, size_t count)
1260{
1261 struct i2c_client *client = to_i2c_client(dev);
1262 struct w83795_data *data = i2c_get_clientdata(client);
1263 struct sensor_device_attribute_2 *sensor_attr =
1264 to_sensor_dev_attr_2(attr);
1265 int index = sensor_attr->index;
1266 unsigned long val;
1267 u8 tmp;
1268 u32 mask;
1269
1270 if (strict_strtoul(buf, 10, &val) < 0)
1271 return -EINVAL;
1272 if ((val != 4) && (val != 3))
1273 return -EINVAL;
1274 if ((index > 3) && (val == 3))
1275 return -EINVAL;
1276
1277 mutex_lock(&data->update_lock);
1278 if (val == 3) {
1279 val = TEMP_CTRL_TD;
1280 data->has_temp |= 1 << index;
1281 data->temp_mode |= 1 << index;
1282 } else if (val == 4) {
1283 val = TEMP_CTRL_TR;
1284 data->has_temp |= 1 << index;
1285 tmp = 1 << index;
1286 data->temp_mode &= ~tmp;
1287 }
1288
1289 if (index > 3)
1290 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1291 else
1292 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1293
1294 mask = 0x03 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_SHIFT];
1295 tmp &= ~mask;
1296 tmp |= W83795_REG_TEMP_CTRL[index][val];
1297
1298 mask = 1 << W83795_REG_TEMP_CTRL[index][TEMP_CTRL_HASIN_SHIFT];
1299 data->has_in &= ~mask;
1300
1301 if (index > 3)
1302 w83795_write(client, W83795_REG_TEMP_CTRL1, tmp);
1303 else
1304 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
1305
1306 mutex_unlock(&data->update_lock);
1307 return count;
1308}
1309
1310
1311/* show/store VIN */
1312static ssize_t
1313show_in(struct device *dev, struct device_attribute *attr, char *buf)
1314{
1315 struct sensor_device_attribute_2 *sensor_attr =
1316 to_sensor_dev_attr_2(attr);
1317 int nr = sensor_attr->nr;
1318 int index = sensor_attr->index;
1319 struct w83795_data *data = w83795_update_device(dev);
1320 u16 val = data->in[index][nr];
1321 u8 lsb_idx;
1322
1323 switch (nr) {
1324 case IN_READ:
1325 /* calculate this value again by sensors as sensors3.conf */
1326 if ((index >= 17) &&
1327 ((data->has_gain >> (index - 17)) & 1))
1328 val *= 8;
1329 break;
1330 case IN_MAX:
1331 case IN_LOW:
1332 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1333 val <<= 2;
1334 val |= (data->in_lsb[lsb_idx][nr] >>
1335 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1336 if ((index >= 17) &&
1337 ((data->has_gain >> (index - 17)) & 1))
1338 val *= 8;
1339 break;
1340 }
1341 val = in_from_reg(index, val);
1342
1343 return sprintf(buf, "%d\n", val);
1344}
1345
1346static ssize_t
1347store_in(struct device *dev, struct device_attribute *attr,
1348 const char *buf, size_t count)
1349{
1350 struct sensor_device_attribute_2 *sensor_attr =
1351 to_sensor_dev_attr_2(attr);
1352 int nr = sensor_attr->nr;
1353 int index = sensor_attr->index;
1354 struct i2c_client *client = to_i2c_client(dev);
1355 struct w83795_data *data = i2c_get_clientdata(client);
1356 unsigned long val;
1357 u8 tmp;
1358 u8 lsb_idx;
1359
1360 if (strict_strtoul(buf, 10, &val) < 0)
1361 return -EINVAL;
1362 val = in_to_reg(index, val);
1363
1364 if ((index >= 17) &&
1365 ((data->has_gain >> (index - 17)) & 1))
1366 val /= 8;
1367 val = SENSORS_LIMIT(val, 0, 0x3FF);
1368 mutex_lock(&data->update_lock);
1369
1370 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1371 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1372 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1373 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1374 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1375 data->in_lsb[lsb_idx][nr] = tmp;
1376
1377 tmp = (val >> 2) & 0xff;
1378 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1379 data->in[index][nr] = tmp;
1380
1381 mutex_unlock(&data->update_lock);
1382 return count;
1383}
1384
1385
1386static ssize_t
1387show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1388{
1389 struct sensor_device_attribute_2 *sensor_attr =
1390 to_sensor_dev_attr_2(attr);
1391 int nr = sensor_attr->nr;
1392 struct i2c_client *client = to_i2c_client(dev);
1393 struct w83795_data *data = i2c_get_clientdata(client);
1394 u16 val = data->setup_pwm[nr];
1395
1396 switch (nr) {
1397 case SETUP_PWM_UPTIME:
1398 case SETUP_PWM_DOWNTIME:
1399 val = time_from_reg(val);
1400 break;
1401 }
1402
1403 return sprintf(buf, "%d\n", val);
1404}
1405
1406static ssize_t
1407store_sf_setup(struct device *dev, struct device_attribute *attr,
1408 const char *buf, size_t count)
1409{
1410 struct sensor_device_attribute_2 *sensor_attr =
1411 to_sensor_dev_attr_2(attr);
1412 int nr = sensor_attr->nr;
1413 struct i2c_client *client = to_i2c_client(dev);
1414 struct w83795_data *data = i2c_get_clientdata(client);
1415 unsigned long val;
1416
1417 if (strict_strtoul(buf, 10, &val) < 0)
1418 return -EINVAL;
1419
1420 switch (nr) {
1421 case SETUP_PWM_DEFAULT:
1422 val = SENSORS_LIMIT(val, 0, 0xff);
1423 break;
1424 case SETUP_PWM_UPTIME:
1425 case SETUP_PWM_DOWNTIME:
1426 val = time_to_reg(val);
1427 if (val == 0)
1428 return -EINVAL;
1429 break;
1430 }
1431
1432 mutex_lock(&data->update_lock);
1433 data->setup_pwm[nr] = val;
1434 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1435 mutex_unlock(&data->update_lock);
1436 return count;
1437}
1438
1439
1440#define NOT_USED -1
1441
1442#define SENSOR_ATTR_IN(index) \
1443 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1444 IN_READ, index), \
1445 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1446 store_in, IN_MAX, index), \
1447 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1448 store_in, IN_LOW, index), \
1449 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1450 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1451 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1452 show_alarm_beep, store_beep, BEEP_ENABLE, \
1453 index + ((index > 14) ? 1 : 0))
1454
1455#define SENSOR_ATTR_FAN(index) \
1456 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1457 NULL, FAN_INPUT, index - 1), \
1458 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1459 show_fan, store_fan_min, FAN_MIN, index - 1), \
1460 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1461 NULL, ALARM_STATUS, index + 31), \
1462 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
1463 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31)
1464
1465#define SENSOR_ATTR_PWM(index) \
1466 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1467 store_pwm, PWM_OUTPUT, index - 1), \
1468 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1469 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1470 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1471 show_pwm, store_pwm, PWM_START, index - 1), \
1472 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1473 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
1474 SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \
1475 show_pwm, store_pwm, PWM_DIV, index - 1), \
1476 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
1477 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1)
1478
1479#define SENSOR_ATTR_FANIN_TARGET(index) \
1480 SENSOR_ATTR_2(speed_cruise##index##_target, S_IWUSR | S_IRUGO, \
1481 show_fanin, store_fanin, FANIN_TARGET, index - 1)
1482
1483#define SENSOR_ATTR_DTS(index) \
1484 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1485 show_dts_mode, NULL, NOT_USED, index - 7), \
1486 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1487 NULL, NOT_USED, index - 7), \
1488 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
1489 store_dts_ext, DTS_CRIT, NOT_USED), \
1490 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1491 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
1492 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_dts_ext, \
1493 store_dts_ext, DTS_WARN, NOT_USED), \
1494 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1495 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1496 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1497 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1498 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1499 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17)
1500
1501#define SENSOR_ATTR_TEMP(index) \
1502 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
1503 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1504 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1505 NULL, TEMP_READ, index - 1), \
1506 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
1507 store_temp, TEMP_CRIT, index - 1), \
1508 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
1509 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
1510 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
1511 store_temp, TEMP_WARN, index - 1), \
1512 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
1513 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1514 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1515 show_alarm_beep, NULL, ALARM_STATUS, \
1516 index + (index > 4 ? 11 : 17)), \
1517 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1518 show_alarm_beep, store_beep, BEEP_ENABLE, \
1519 index + (index > 4 ? 11 : 17)), \
1520 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1521 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1522 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1523 show_temp_pwm_enable, store_temp_pwm_enable, \
1524 TEMP_PWM_ENABLE, index - 1), \
1525 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1526 show_temp_pwm_enable, store_temp_pwm_enable, \
1527 TEMP_PWM_FAN_MAP, index - 1), \
1528 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1529 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
1530 SENSOR_ATTR_2(temp##index##_crit, S_IWUSR | S_IRUGO, \
1531 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
1532 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IWUSR | S_IRUGO, \
1533 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1534 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1535 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1536 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1537 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1538 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1539 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1540 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1541 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1542 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1543 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1544 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1545 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1546 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1547 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1548 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1549 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1550 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1551 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1552 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1553 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1554 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1555 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1556 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1557 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1558 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1559 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1560 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1561 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1562 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
1563 show_sf4_temp, store_sf4_temp, 6, index - 1)
1564
1565
1566static struct sensor_device_attribute_2 w83795_in[] = {
1567 SENSOR_ATTR_IN(0),
1568 SENSOR_ATTR_IN(1),
1569 SENSOR_ATTR_IN(2),
1570 SENSOR_ATTR_IN(3),
1571 SENSOR_ATTR_IN(4),
1572 SENSOR_ATTR_IN(5),
1573 SENSOR_ATTR_IN(6),
1574 SENSOR_ATTR_IN(7),
1575 SENSOR_ATTR_IN(8),
1576 SENSOR_ATTR_IN(9),
1577 SENSOR_ATTR_IN(10),
1578 SENSOR_ATTR_IN(11),
1579 SENSOR_ATTR_IN(12),
1580 SENSOR_ATTR_IN(13),
1581 SENSOR_ATTR_IN(14),
1582 SENSOR_ATTR_IN(15),
1583 SENSOR_ATTR_IN(16),
1584 SENSOR_ATTR_IN(17),
1585 SENSOR_ATTR_IN(18),
1586 SENSOR_ATTR_IN(19),
1587 SENSOR_ATTR_IN(20),
1588};
1589
1590static struct sensor_device_attribute_2 w83795_fan[] = {
1591 SENSOR_ATTR_FAN(1),
1592 SENSOR_ATTR_FAN(2),
1593 SENSOR_ATTR_FAN(3),
1594 SENSOR_ATTR_FAN(4),
1595 SENSOR_ATTR_FAN(5),
1596 SENSOR_ATTR_FAN(6),
1597 SENSOR_ATTR_FAN(7),
1598 SENSOR_ATTR_FAN(8),
1599 SENSOR_ATTR_FAN(9),
1600 SENSOR_ATTR_FAN(10),
1601 SENSOR_ATTR_FAN(11),
1602 SENSOR_ATTR_FAN(12),
1603 SENSOR_ATTR_FAN(13),
1604 SENSOR_ATTR_FAN(14),
1605};
1606
1607static struct sensor_device_attribute_2 w83795_temp[] = {
1608 SENSOR_ATTR_TEMP(1),
1609 SENSOR_ATTR_TEMP(2),
1610 SENSOR_ATTR_TEMP(3),
1611 SENSOR_ATTR_TEMP(4),
1612 SENSOR_ATTR_TEMP(5),
1613 SENSOR_ATTR_TEMP(6),
1614};
1615
1616static struct sensor_device_attribute_2 w83795_dts[] = {
1617 SENSOR_ATTR_DTS(7),
1618 SENSOR_ATTR_DTS(8),
1619 SENSOR_ATTR_DTS(9),
1620 SENSOR_ATTR_DTS(10),
1621 SENSOR_ATTR_DTS(11),
1622 SENSOR_ATTR_DTS(12),
1623 SENSOR_ATTR_DTS(13),
1624 SENSOR_ATTR_DTS(14),
1625};
1626
1627static struct sensor_device_attribute_2 w83795_static[] = {
1628 SENSOR_ATTR_FANIN_TARGET(1),
1629 SENSOR_ATTR_FANIN_TARGET(2),
1630 SENSOR_ATTR_FANIN_TARGET(3),
1631 SENSOR_ATTR_FANIN_TARGET(4),
1632 SENSOR_ATTR_FANIN_TARGET(5),
1633 SENSOR_ATTR_FANIN_TARGET(6),
1634 SENSOR_ATTR_FANIN_TARGET(7),
1635 SENSOR_ATTR_FANIN_TARGET(8),
1636 SENSOR_ATTR_PWM(1),
1637 SENSOR_ATTR_PWM(2),
1638};
1639
1640/* all registers existed in 795g than 795adg,
1641 * like PWM3 - PWM8 */
1642static struct sensor_device_attribute_2 w83795_left_reg[] = {
1643 SENSOR_ATTR_PWM(3),
1644 SENSOR_ATTR_PWM(4),
1645 SENSOR_ATTR_PWM(5),
1646 SENSOR_ATTR_PWM(6),
1647 SENSOR_ATTR_PWM(7),
1648 SENSOR_ATTR_PWM(8),
1649};
1650
1651static struct sensor_device_attribute_2 sda_single_files[] = {
1652 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1653 store_chassis_clear, ALARM_STATUS, 46),
1654 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1655 store_beep_enable, NOT_USED, NOT_USED),
1656 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1657 store_fanin, FANIN_TOL, NOT_USED),
1658 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1659 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1660 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1661 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1662 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1663 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1664};
1665
1666/*
1667 * Driver interface
1668 */
1669
1670static void w83795_init_client(struct i2c_client *client)
1671{
1672 if (reset)
1673 w83795_write(client, W83795_REG_CONFIG, 0x80);
1674
1675 /* Start monitoring */
1676 w83795_write(client, W83795_REG_CONFIG,
1677 w83795_read(client, W83795_REG_CONFIG) | 0x01);
1678}
1679
1680/* Return 0 if detection is successful, -ENODEV otherwise */
1681static int w83795_detect(struct i2c_client *client,
1682 struct i2c_board_info *info)
1683{
1684 u8 tmp, bank;
1685 struct i2c_adapter *adapter = client->adapter;
1686 unsigned short address = client->addr;
Jean Delvare093d1a42010-10-28 20:31:45 +02001687 const char *chip_name;
Wei Song792d3762010-10-28 20:31:44 +02001688
1689 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1690 return -ENODEV;
1691 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1692
1693 tmp = bank & 0x80 ? 0x5c : 0xa3;
1694 /* Check Nuvoton vendor ID */
1695 if (tmp != i2c_smbus_read_byte_data(client,
1696 W83795_REG_VENDORID)) {
1697 pr_debug("w83795: Detection failed at check "
1698 "vendor id\n");
1699 return -ENODEV;
1700 }
1701
1702 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1703 should match */
1704 if ((bank & 0x07) == 0
1705 && (i2c_smbus_read_byte_data(client, W83795_REG_I2C_ADDR) & 0x7f) !=
1706 address) {
1707 pr_debug("w83795: Detection failed at check "
1708 "i2c addr\n");
1709 return -ENODEV;
1710 }
1711
1712 /* Determine the chip type now */
1713 if (0x79 != i2c_smbus_read_byte_data(client,
1714 W83795_REG_CHIPID)) {
1715 pr_debug("w83795: Detection failed at check "
1716 "chip id\n");
1717 return -ENODEV;
1718 }
1719
Jean Delvare093d1a42010-10-28 20:31:45 +02001720 /* Check 795 chip type: 795G or 795ADG
1721 Usually we don't write to chips during detection, but here we don't
1722 quite have the choice; hopefully it's OK, we are about to return
1723 success anyway */
1724 if ((bank & 0x07) != 0)
1725 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1726 bank & ~0x07);
Wei Song792d3762010-10-28 20:31:44 +02001727 if (W83795_REG_CONFIG_CONFIG48 &
Jean Delvare093d1a42010-10-28 20:31:45 +02001728 i2c_smbus_read_byte_data(client, W83795_REG_CONFIG)) {
1729 chip_name = "w83795adg";
Wei Song792d3762010-10-28 20:31:44 +02001730 } else {
Jean Delvare093d1a42010-10-28 20:31:45 +02001731 chip_name = "w83795g";
Wei Song792d3762010-10-28 20:31:44 +02001732 }
Wei Song792d3762010-10-28 20:31:44 +02001733
Jean Delvare093d1a42010-10-28 20:31:45 +02001734 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
Wei Song792d3762010-10-28 20:31:44 +02001735
1736 return 0;
1737}
1738
1739static int w83795_probe(struct i2c_client *client,
1740 const struct i2c_device_id *id)
1741{
1742 int i;
1743 u8 tmp;
1744 struct device *dev = &client->dev;
1745 struct w83795_data *data;
1746 int err = 0;
1747
1748 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1749 if (!data) {
1750 err = -ENOMEM;
1751 goto exit;
1752 }
1753
1754 i2c_set_clientdata(client, data);
Jean Delvare093d1a42010-10-28 20:31:45 +02001755 data->chip_type = id->driver_data;
Wei Song792d3762010-10-28 20:31:44 +02001756 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1757 mutex_init(&data->update_lock);
1758
1759 /* Initialize the chip */
1760 w83795_init_client(client);
1761
Wei Song792d3762010-10-28 20:31:44 +02001762 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1);
1763 data->has_in |= w83795_read(client, W83795_REG_VOLT_CTRL2) << 8;
1764 /* VSEN11-9 not for 795adg */
1765 if (data->chip_type == w83795adg)
1766 data->has_in &= 0xf8ff;
1767 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1);
1768 data->has_fan |= w83795_read(client, W83795_REG_FANIN_CTRL2) << 8;
1769
1770 /* VDSEN12-17 and TR1-6, TD1-4 use same register */
1771 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1772 if (tmp & 0x20)
1773 data->enable_dts = 1;
1774 else
1775 data->enable_dts = 0;
1776 data->has_temp = 0;
1777 data->temp_mode = 0;
1778 if (tmp & 0x08) {
1779 if (tmp & 0x04)
1780 data->has_temp |= 0x20;
1781 else
1782 data->has_in |= 0x10000;
1783 }
1784 if (tmp & 0x02) {
1785 if (tmp & 0x01)
1786 data->has_temp |= 0x10;
1787 else
1788 data->has_in |= 0x8000;
1789 }
1790 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1791 if (tmp & 0x40) {
1792 data->has_temp |= 0x08;
1793 if (!(tmp & 0x80))
1794 data->temp_mode |= 0x08;
1795 } else if (tmp & 0x80) {
1796 data->has_in |= 0x100000;
1797 }
1798 if (tmp & 0x10) {
1799 data->has_temp |= 0x04;
1800 if (!(tmp & 0x20))
1801 data->temp_mode |= 0x04;
1802 } else if (tmp & 0x20) {
1803 data->has_in |= 0x80000;
1804 }
1805 if (tmp & 0x04) {
1806 data->has_temp |= 0x02;
1807 if (!(tmp & 0x08))
1808 data->temp_mode |= 0x02;
1809 } else if (tmp & 0x08) {
1810 data->has_in |= 0x40000;
1811 }
1812 if (tmp & 0x01) {
1813 data->has_temp |= 0x01;
1814 if (!(tmp & 0x02))
1815 data->temp_mode |= 0x01;
1816 } else if (tmp & 0x02) {
1817 data->has_in |= 0x20000;
1818 }
1819
1820 /* Check DTS enable status */
1821 if (data->enable_dts == 0) {
1822 data->has_dts = 0;
1823 } else {
1824 if (1 & w83795_read(client, W83795_REG_DTSC))
1825 data->enable_dts |= 2;
1826 data->has_dts = w83795_read(client, W83795_REG_DTSE);
1827 }
1828
1829 /* First update the voltages measured value and limits */
1830 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
1831 if (!(data->has_in & (1 << i)))
1832 continue;
1833 data->in[i][IN_MAX] =
1834 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
1835 data->in[i][IN_LOW] =
1836 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
1837 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
1838 tmp |= (w83795_read(client, W83795_REG_VRLSB)
1839 >> VRLSB_SHIFT) & 0x03;
1840 data->in[i][IN_READ] = tmp;
1841 }
1842 for (i = 0; i < IN_LSB_REG_NUM; i++) {
1843 data->in_lsb[i][IN_MAX] =
1844 w83795_read(client, IN_LSB_REG(i, IN_MAX));
1845 data->in_lsb[i][IN_LOW] =
1846 w83795_read(client, IN_LSB_REG(i, IN_LOW));
1847 }
1848 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
1849
1850 /* First update fan and limits */
1851 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
1852 if (!(data->has_fan & (1 << i)))
1853 continue;
1854 data->fan_min[i] =
1855 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
1856 data->fan_min[i] |=
1857 (w83795_read(client, W83795_REG_FAN_MIN_LSB(i) >>
1858 W83795_REG_FAN_MIN_LSB_SHIFT(i))) & 0x0F;
1859 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
1860 data->fan[i] |=
1861 (w83795_read(client, W83795_REG_VRLSB >> 4)) & 0x0F;
1862 }
1863
1864 /* temperature and limits */
1865 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
1866 if (!(data->has_temp & (1 << i)))
1867 continue;
1868 data->temp[i][TEMP_CRIT] =
1869 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
1870 data->temp[i][TEMP_CRIT_HYST] =
1871 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
1872 data->temp[i][TEMP_WARN] =
1873 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
1874 data->temp[i][TEMP_WARN_HYST] =
1875 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
1876 data->temp[i][TEMP_READ] =
1877 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
1878 data->temp_read_vrlsb[i] =
1879 w83795_read(client, W83795_REG_VRLSB);
1880 }
1881
1882 /* dts temperature and limits */
1883 if (data->enable_dts != 0) {
1884 data->dts_ext[DTS_CRIT] =
1885 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
1886 data->dts_ext[DTS_CRIT_HYST] =
1887 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
1888 data->dts_ext[DTS_WARN] =
1889 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
1890 data->dts_ext[DTS_WARN_HYST] =
1891 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
1892 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
1893 if (!(data->has_dts & (1 << i)))
1894 continue;
1895 data->dts[i] = w83795_read(client, W83795_REG_DTS(i));
1896 data->dts_read_vrlsb[i] =
1897 w83795_read(client, W83795_REG_VRLSB);
1898 }
1899 }
1900
1901 /* First update temp source selction */
1902 for (i = 0; i < 3; i++)
1903 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
1904
1905 /* pwm and smart fan */
1906 if (data->chip_type == w83795g)
1907 data->has_pwm = 8;
1908 else
1909 data->has_pwm = 2;
1910 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
1911 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
1912 /* w83795adg only support pwm2-0 */
1913 for (i = 0; i < W83795_REG_TEMP_NUM; i++)
1914 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
1915 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
1916 for (i = 0; i < data->has_pwm; i++) {
1917 for (tmp = 0; tmp < 5; tmp++) {
1918 data->pwm[i][tmp] =
1919 w83795_read(client, W83795_REG_PWM(i, tmp));
1920 }
1921 }
1922 for (i = 0; i < 8; i++) {
1923 data->target_speed[i] =
1924 w83795_read(client, W83795_REG_FTSH(i)) << 4;
1925 data->target_speed[i] |=
1926 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
1927 }
1928 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
1929
1930 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
1931 data->pwm_temp[i][TEMP_PWM_TTTI] =
1932 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
1933 data->pwm_temp[i][TEMP_PWM_CTFS] =
1934 w83795_read(client, W83795_REG_CTFS(i));
1935 tmp = w83795_read(client, W83795_REG_HT(i));
1936 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
1937 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
1938 }
1939 for (i = 0; i < W83795_REG_TEMP_NUM; i++) {
1940 for (tmp = 0; tmp < 7; tmp++) {
1941 data->sf4_reg[i][SF4_TEMP][tmp] =
1942 w83795_read(client,
1943 W83795_REG_SF4_TEMP(i, tmp));
1944 data->sf4_reg[i][SF4_PWM][tmp] =
1945 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
1946 }
1947 }
1948
1949 /* Setup PWM Register */
1950 for (i = 0; i < 3; i++) {
1951 data->setup_pwm[i] =
1952 w83795_read(client, W83795_REG_SETUP_PWM(i));
1953 }
1954
1955 /* alarm and beep */
1956 for (i = 0; i < ALARM_BEEP_REG_NUM; i++) {
1957 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
1958 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
1959 }
1960 data->beep_enable =
1961 (w83795_read(client, W83795_REG_BEEP(5)) >> 7) & 0x01;
1962
1963 /* Register sysfs hooks */
1964 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
1965 if (!(data->has_in & (1 << (i / 6))))
1966 continue;
1967 err = device_create_file(dev, &w83795_in[i].dev_attr);
1968 if (err)
1969 goto exit_remove;
1970 }
1971
1972 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
1973 if (!(data->has_fan & (1 << (i / 5))))
1974 continue;
1975 err = device_create_file(dev, &w83795_fan[i].dev_attr);
1976 if (err)
1977 goto exit_remove;
1978 }
1979
1980 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1981 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1982 if (err)
1983 goto exit_remove;
1984 }
1985
1986 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
1987 if (!(data->has_temp & (1 << (i / 29))))
1988 continue;
1989 err = device_create_file(dev, &w83795_temp[i].dev_attr);
1990 if (err)
1991 goto exit_remove;
1992 }
1993
1994 if (data->enable_dts != 0) {
1995 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
1996 if (!(data->has_dts & (1 << (i / 8))))
1997 continue;
1998 err = device_create_file(dev, &w83795_dts[i].dev_attr);
1999 if (err)
2000 goto exit_remove;
2001 }
2002 }
2003
2004 if (data->chip_type == w83795g) {
2005 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++) {
2006 err = device_create_file(dev,
2007 &w83795_left_reg[i].dev_attr);
2008 if (err)
2009 goto exit_remove;
2010 }
2011 }
2012
2013 for (i = 0; i < ARRAY_SIZE(w83795_static); i++) {
2014 err = device_create_file(dev, &w83795_static[i].dev_attr);
2015 if (err)
2016 goto exit_remove;
2017 }
2018
2019 data->hwmon_dev = hwmon_device_register(dev);
2020 if (IS_ERR(data->hwmon_dev)) {
2021 err = PTR_ERR(data->hwmon_dev);
2022 goto exit_remove;
2023 }
2024
2025 return 0;
2026
2027 /* Unregister sysfs hooks */
2028exit_remove:
2029 for (i = 0; i < ARRAY_SIZE(w83795_in); i++)
2030 device_remove_file(dev, &w83795_in[i].dev_attr);
2031
2032 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++)
2033 device_remove_file(dev, &w83795_fan[i].dev_attr);
2034
2035 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
2036 device_remove_file(dev, &sda_single_files[i].dev_attr);
2037
2038 if (data->chip_type == w83795g) {
2039 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++)
2040 device_remove_file(dev, &w83795_left_reg[i].dev_attr);
2041 }
2042
2043 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++)
2044 device_remove_file(dev, &w83795_temp[i].dev_attr);
2045
2046 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++)
2047 device_remove_file(dev, &w83795_dts[i].dev_attr);
2048
2049 for (i = 0; i < ARRAY_SIZE(w83795_static); i++)
2050 device_remove_file(dev, &w83795_static[i].dev_attr);
2051
2052 kfree(data);
2053exit:
2054 return err;
2055}
2056
2057static int w83795_remove(struct i2c_client *client)
2058{
2059 struct w83795_data *data = i2c_get_clientdata(client);
2060 struct device *dev = &client->dev;
2061 int i;
2062
2063 hwmon_device_unregister(data->hwmon_dev);
2064
2065 for (i = 0; i < ARRAY_SIZE(w83795_in); i++)
2066 device_remove_file(dev, &w83795_in[i].dev_attr);
2067
2068 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++)
2069 device_remove_file(dev, &w83795_fan[i].dev_attr);
2070
2071 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
2072 device_remove_file(dev, &sda_single_files[i].dev_attr);
2073
2074 if (data->chip_type == w83795g) {
2075 for (i = 0; i < ARRAY_SIZE(w83795_left_reg); i++)
2076 device_remove_file(dev, &w83795_left_reg[i].dev_attr);
2077 }
2078
2079 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++)
2080 device_remove_file(dev, &w83795_temp[i].dev_attr);
2081
2082 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++)
2083 device_remove_file(dev, &w83795_dts[i].dev_attr);
2084
2085 for (i = 0; i < ARRAY_SIZE(w83795_static); i++)
2086 device_remove_file(dev, &w83795_static[i].dev_attr);
2087
2088 kfree(data);
2089
2090 return 0;
2091}
2092
2093
2094static const struct i2c_device_id w83795_id[] = {
Jean Delvare093d1a42010-10-28 20:31:45 +02002095 { "w83795g", w83795g },
2096 { "w83795adg", w83795adg },
Wei Song792d3762010-10-28 20:31:44 +02002097 { }
2098};
2099MODULE_DEVICE_TABLE(i2c, w83795_id);
2100
2101static struct i2c_driver w83795_driver = {
2102 .driver = {
2103 .name = "w83795",
2104 },
2105 .probe = w83795_probe,
2106 .remove = w83795_remove,
2107 .id_table = w83795_id,
2108
2109 .class = I2C_CLASS_HWMON,
2110 .detect = w83795_detect,
2111 .address_list = normal_i2c,
2112};
2113
2114static int __init sensors_w83795_init(void)
2115{
2116 return i2c_add_driver(&w83795_driver);
2117}
2118
2119static void __exit sensors_w83795_exit(void)
2120{
2121 i2c_del_driver(&w83795_driver);
2122}
2123
2124MODULE_AUTHOR("Wei Song");
Jean Delvare315bacf2010-10-28 20:31:45 +02002125MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
Wei Song792d3762010-10-28 20:31:44 +02002126MODULE_LICENSE("GPL");
2127
2128module_init(sensors_w83795_init);
2129module_exit(sensors_w83795_exit);