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Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02001/*
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +00002 * intel TCO Watchdog Driver
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02003 *
Wim Van Sebroeck12d60e22009-01-28 20:51:04 +00004 * (c) Copyright 2006-2009 Wim Van Sebroeck <wim@iguana.be>.
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +02005 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Neither Wim Van Sebroeck nor Iguana vzw. admit liability nor
12 * provide warranty for any of this software. This material is
13 * provided "AS-IS" and at no charge.
14 *
15 * The TCO watchdog is implemented in the following I/O controller hubs:
16 * (See the intel documentation on http://developer.intel.com.)
Wim Van Sebroeckcb711a12009-11-15 13:44:54 +000017 * document number 290655-003, 290677-014: 82801AA (ICH), 82801AB (ICHO)
18 * document number 290687-002, 298242-027: 82801BA (ICH2)
19 * document number 290733-003, 290739-013: 82801CA (ICH3-S)
20 * document number 290716-001, 290718-007: 82801CAM (ICH3-M)
21 * document number 290744-001, 290745-025: 82801DB (ICH4)
22 * document number 252337-001, 252663-008: 82801DBM (ICH4-M)
23 * document number 273599-001, 273645-002: 82801E (C-ICH)
24 * document number 252516-001, 252517-028: 82801EB (ICH5), 82801ER (ICH5R)
25 * document number 300641-004, 300884-013: 6300ESB
26 * document number 301473-002, 301474-026: 82801F (ICH6)
27 * document number 313082-001, 313075-006: 631xESB, 632xESB
28 * document number 307013-003, 307014-024: 82801G (ICH7)
29 * document number 313056-003, 313057-017: 82801H (ICH8)
30 * document number 316972-004, 316973-012: 82801I (ICH9)
31 * document number 319973-002, 319974-002: 82801J (ICH10)
Seth Heasley3c9d8ec2010-01-14 20:58:05 +000032 * document number 322169-001, 322170-003: 5 Series, 3400 Series (PCH)
Imre Kaloz4946f832009-12-07 20:42:26 +010033 * document number 320066-003, 320257-008: EP80597 (IICH)
Seth Heasley3c9d8ec2010-01-14 20:58:05 +000034 * document number TBD : Cougar Point (CPT)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020035 */
36
37/*
38 * Includes, defines, variables, module parameters, ...
39 */
40
41/* Module and version information */
Wim Van Sebroeck7944d3a2008-08-06 20:19:41 +000042#define DRV_NAME "iTCO_wdt"
Pádraig Brady7e6811d2010-04-19 13:38:25 +010043#define DRV_VERSION "1.06"
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020044#define PFX DRV_NAME ": "
45
46/* Includes */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020047#include <linux/module.h> /* For module specific items */
48#include <linux/moduleparam.h> /* For new moduleparam's */
49#include <linux/types.h> /* For standard types (like size_t) */
50#include <linux/errno.h> /* For the -ENODEV/... values */
51#include <linux/kernel.h> /* For printk/panic/... */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010052#include <linux/miscdevice.h> /* For MODULE_ALIAS_MISCDEV
53 (WATCHDOG_MINOR) */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020054#include <linux/watchdog.h> /* For the watchdog specific items */
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +020055#include <linux/init.h> /* For __init/__exit/... */
56#include <linux/fs.h> /* For file operations */
57#include <linux/platform_device.h> /* For platform_driver framework */
58#include <linux/pci.h> /* For pci functions */
59#include <linux/ioport.h> /* For io-port access */
60#include <linux/spinlock.h> /* For spin_lock/spin_unlock/... */
Alan Cox0e6fa3f2008-05-19 14:06:25 +010061#include <linux/uaccess.h> /* For copy_to_user/put_user/... */
62#include <linux/io.h> /* For inb/outb/... */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020063
Alan Cox0e6fa3f2008-05-19 14:06:25 +010064#include "iTCO_vendor.h"
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020065
66/* TCO related info */
67enum iTCO_chipsets {
68 TCO_ICH = 0, /* ICH */
69 TCO_ICH0, /* ICH0 */
70 TCO_ICH2, /* ICH2 */
71 TCO_ICH2M, /* ICH2-M */
72 TCO_ICH3, /* ICH3-S */
73 TCO_ICH3M, /* ICH3-M */
74 TCO_ICH4, /* ICH4 */
75 TCO_ICH4M, /* ICH4-M */
76 TCO_CICH, /* C-ICH */
77 TCO_ICH5, /* ICH5 & ICH5R */
78 TCO_6300ESB, /* 6300ESB */
79 TCO_ICH6, /* ICH6 & ICH6R */
80 TCO_ICH6M, /* ICH6-M */
81 TCO_ICH6W, /* ICH6W & ICH6RW */
Wim Van Sebroeck28d41f52008-11-19 22:25:53 +000082 TCO_631XESB, /* 631xESB/632xESB */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020083 TCO_ICH7, /* ICH7 & ICH7R */
Wim Van Sebroeck28d41f52008-11-19 22:25:53 +000084 TCO_ICH7DH, /* ICH7DH */
85 TCO_ICH7M, /* ICH7-M & ICH7-U */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +020086 TCO_ICH7MDH, /* ICH7-M DH */
Wim Van Sebroecka8edd742006-10-08 21:05:21 +020087 TCO_ICH8, /* ICH8 & ICH8R */
88 TCO_ICH8DH, /* ICH8DH */
89 TCO_ICH8DO, /* ICH8DO */
Wim Van Sebroeckacf60352007-08-31 08:23:10 +000090 TCO_ICH8M, /* ICH8M */
Wim Van Sebroeck28d41f52008-11-19 22:25:53 +000091 TCO_ICH8ME, /* ICH8M-E */
Wim Van Sebroeck286201d2007-07-26 21:11:28 +000092 TCO_ICH9, /* ICH9 */
93 TCO_ICH9R, /* ICH9R */
94 TCO_ICH9DH, /* ICH9DH */
Wim Van Sebroeck7944d3a2008-08-06 20:19:41 +000095 TCO_ICH9DO, /* ICH9DO */
Wim Van Sebroeck28d41f52008-11-19 22:25:53 +000096 TCO_ICH9M, /* ICH9M */
97 TCO_ICH9ME, /* ICH9M-E */
98 TCO_ICH10, /* ICH10 */
99 TCO_ICH10R, /* ICH10R */
100 TCO_ICH10D, /* ICH10D */
101 TCO_ICH10DO, /* ICH10DO */
Seth Heasley79e89412009-11-11 02:24:01 +0100102 TCO_PCH, /* PCH Desktop Full Featured */
103 TCO_PCHM, /* PCH Mobile Full Featured */
Seth Heasley3c9d8ec2010-01-14 20:58:05 +0000104 TCO_P55, /* P55 */
105 TCO_PM55, /* PM55 */
106 TCO_H55, /* H55 */
107 TCO_QM57, /* QM57 */
108 TCO_H57, /* H57 */
109 TCO_HM55, /* HM55 */
110 TCO_Q57, /* Q57 */
111 TCO_HM57, /* HM57 */
Seth Heasley79e89412009-11-11 02:24:01 +0100112 TCO_PCHMSFF, /* PCH Mobile SFF Full Featured */
Seth Heasley3c9d8ec2010-01-14 20:58:05 +0000113 TCO_QS57, /* QS57 */
114 TCO_3400, /* 3400 */
115 TCO_3420, /* 3420 */
116 TCO_3450, /* 3450 */
Imre Kaloz4946f832009-12-07 20:42:26 +0100117 TCO_EP80579, /* EP80579 */
Seth Heasley4c7d8492010-03-25 16:14:41 -0700118 TCO_CPT1, /* Cougar Point */
119 TCO_CPT2, /* Cougar Point Desktop */
120 TCO_CPT3, /* Cougar Point Mobile */
121 TCO_CPT4, /* Cougar Point */
122 TCO_CPT5, /* Cougar Point */
123 TCO_CPT6, /* Cougar Point */
124 TCO_CPT7, /* Cougar Point */
125 TCO_CPT8, /* Cougar Point */
126 TCO_CPT9, /* Cougar Point */
127 TCO_CPT10, /* Cougar Point */
128 TCO_CPT11, /* Cougar Point */
129 TCO_CPT12, /* Cougar Point */
130 TCO_CPT13, /* Cougar Point */
131 TCO_CPT14, /* Cougar Point */
132 TCO_CPT15, /* Cougar Point */
133 TCO_CPT16, /* Cougar Point */
134 TCO_CPT17, /* Cougar Point */
135 TCO_CPT18, /* Cougar Point */
136 TCO_CPT19, /* Cougar Point */
137 TCO_CPT20, /* Cougar Point */
138 TCO_CPT21, /* Cougar Point */
139 TCO_CPT22, /* Cougar Point */
140 TCO_CPT23, /* Cougar Point */
141 TCO_CPT24, /* Cougar Point */
142 TCO_CPT25, /* Cougar Point */
143 TCO_CPT26, /* Cougar Point */
144 TCO_CPT27, /* Cougar Point */
145 TCO_CPT28, /* Cougar Point */
146 TCO_CPT29, /* Cougar Point */
147 TCO_CPT30, /* Cougar Point */
148 TCO_CPT31, /* Cougar Point */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200149};
150
151static struct {
152 char *name;
153 unsigned int iTCO_version;
154} iTCO_chipset_info[] __devinitdata = {
155 {"ICH", 1},
156 {"ICH0", 1},
157 {"ICH2", 1},
158 {"ICH2-M", 1},
159 {"ICH3-S", 1},
160 {"ICH3-M", 1},
161 {"ICH4", 1},
162 {"ICH4-M", 1},
163 {"C-ICH", 1},
164 {"ICH5 or ICH5R", 1},
165 {"6300ESB", 1},
166 {"ICH6 or ICH6R", 2},
167 {"ICH6-M", 2},
168 {"ICH6W or ICH6RW", 2},
Wim Van Sebroeck28d41f52008-11-19 22:25:53 +0000169 {"631xESB/632xESB", 2},
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200170 {"ICH7 or ICH7R", 2},
Wim Van Sebroeck28d41f52008-11-19 22:25:53 +0000171 {"ICH7DH", 2},
172 {"ICH7-M or ICH7-U", 2},
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200173 {"ICH7-M DH", 2},
Arnaud Patard (Rtp)bcbf25b2006-10-04 14:18:29 +0200174 {"ICH8 or ICH8R", 2},
Wim Van Sebroecka8edd742006-10-08 21:05:21 +0200175 {"ICH8DH", 2},
176 {"ICH8DO", 2},
Wim Van Sebroeckacf60352007-08-31 08:23:10 +0000177 {"ICH8M", 2},
Wim Van Sebroeck28d41f52008-11-19 22:25:53 +0000178 {"ICH8M-E", 2},
Wim Van Sebroeck286201d2007-07-26 21:11:28 +0000179 {"ICH9", 2},
180 {"ICH9R", 2},
181 {"ICH9DH", 2},
Gabriel Ca49056d2008-04-30 16:51:10 +0200182 {"ICH9DO", 2},
Wim Van Sebroeck28d41f52008-11-19 22:25:53 +0000183 {"ICH9M", 2},
184 {"ICH9M-E", 2},
185 {"ICH10", 2},
186 {"ICH10R", 2},
187 {"ICH10D", 2},
188 {"ICH10DO", 2},
Seth Heasley79e89412009-11-11 02:24:01 +0100189 {"PCH Desktop Full Featured", 2},
190 {"PCH Mobile Full Featured", 2},
Seth Heasley3c9d8ec2010-01-14 20:58:05 +0000191 {"P55", 2},
192 {"PM55", 2},
193 {"H55", 2},
194 {"QM57", 2},
195 {"H57", 2},
196 {"HM55", 2},
197 {"Q57", 2},
198 {"HM57", 2},
Seth Heasley79e89412009-11-11 02:24:01 +0100199 {"PCH Mobile SFF Full Featured", 2},
Seth Heasley3c9d8ec2010-01-14 20:58:05 +0000200 {"QS57", 2},
201 {"3400", 2},
202 {"3420", 2},
203 {"3450", 2},
Imre Kaloz4946f832009-12-07 20:42:26 +0100204 {"EP80579", 2},
Seth Heasley4c7d8492010-03-25 16:14:41 -0700205 {"Cougar Point", 2},
206 {"Cougar Point", 2},
207 {"Cougar Point", 2},
208 {"Cougar Point", 2},
209 {"Cougar Point", 2},
210 {"Cougar Point", 2},
211 {"Cougar Point", 2},
212 {"Cougar Point", 2},
213 {"Cougar Point", 2},
214 {"Cougar Point", 2},
215 {"Cougar Point", 2},
216 {"Cougar Point", 2},
217 {"Cougar Point", 2},
218 {"Cougar Point", 2},
219 {"Cougar Point", 2},
220 {"Cougar Point", 2},
221 {"Cougar Point", 2},
222 {"Cougar Point", 2},
223 {"Cougar Point", 2},
224 {"Cougar Point", 2},
225 {"Cougar Point", 2},
226 {"Cougar Point", 2},
227 {"Cougar Point", 2},
228 {"Cougar Point", 2},
229 {"Cougar Point", 2},
230 {"Cougar Point", 2},
231 {"Cougar Point", 2},
232 {"Cougar Point", 2},
233 {"Cougar Point", 2},
234 {"Cougar Point", 2},
235 {"Cougar Point", 2},
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100236 {NULL, 0}
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200237};
238
Wim Van Sebroeckc87b6392007-08-19 20:17:58 +0000239#define ITCO_PCI_DEVICE(dev, data) \
240 .vendor = PCI_VENDOR_ID_INTEL, \
241 .device = dev, \
242 .subvendor = PCI_ANY_ID, \
243 .subdevice = PCI_ANY_ID, \
244 .class = 0, \
245 .class_mask = 0, \
246 .driver_data = data
247
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200248/*
249 * This data only exists for exporting the supported PCI ids
250 * via MODULE_DEVICE_TABLE. We do not actually register a
251 * pci_driver, because the I/O Controller Hub has also other
252 * functions that probably will be registered by other drivers.
253 */
254static struct pci_device_id iTCO_wdt_pci_tbl[] = {
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100255 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AA_0, TCO_ICH)},
256 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801AB_0, TCO_ICH0)},
257 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_0, TCO_ICH2)},
258 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801BA_10, TCO_ICH2M)},
259 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_0, TCO_ICH3)},
260 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801CA_12, TCO_ICH3M)},
261 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_0, TCO_ICH4)},
262 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801DB_12, TCO_ICH4M)},
263 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801E_0, TCO_CICH)},
264 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_82801EB_0, TCO_ICH5)},
Wim Van Sebroeckc87b6392007-08-19 20:17:58 +0000265 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ESB_1, TCO_6300ESB)},
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100266 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_0, TCO_ICH6)},
267 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_1, TCO_ICH6M)},
268 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH6_2, TCO_ICH6W)},
Wim Van Sebroeckc87b6392007-08-19 20:17:58 +0000269 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ESB2_0, TCO_631XESB)},
270 { ITCO_PCI_DEVICE(0x2671, TCO_631XESB)},
271 { ITCO_PCI_DEVICE(0x2672, TCO_631XESB)},
272 { ITCO_PCI_DEVICE(0x2673, TCO_631XESB)},
273 { ITCO_PCI_DEVICE(0x2674, TCO_631XESB)},
274 { ITCO_PCI_DEVICE(0x2675, TCO_631XESB)},
275 { ITCO_PCI_DEVICE(0x2676, TCO_631XESB)},
276 { ITCO_PCI_DEVICE(0x2677, TCO_631XESB)},
277 { ITCO_PCI_DEVICE(0x2678, TCO_631XESB)},
278 { ITCO_PCI_DEVICE(0x2679, TCO_631XESB)},
279 { ITCO_PCI_DEVICE(0x267a, TCO_631XESB)},
280 { ITCO_PCI_DEVICE(0x267b, TCO_631XESB)},
281 { ITCO_PCI_DEVICE(0x267c, TCO_631XESB)},
282 { ITCO_PCI_DEVICE(0x267d, TCO_631XESB)},
283 { ITCO_PCI_DEVICE(0x267e, TCO_631XESB)},
284 { ITCO_PCI_DEVICE(0x267f, TCO_631XESB)},
Wim Van Sebroeck28d41f52008-11-19 22:25:53 +0000285 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_0, TCO_ICH7)},
286 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_30, TCO_ICH7DH)},
287 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_1, TCO_ICH7M)},
288 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH7_31, TCO_ICH7MDH)},
289 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_0, TCO_ICH8)},
290 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_2, TCO_ICH8DH)},
291 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_3, TCO_ICH8DO)},
292 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_4, TCO_ICH8M)},
293 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH8_1, TCO_ICH8ME)},
294 { ITCO_PCI_DEVICE(0x2918, TCO_ICH9)},
295 { ITCO_PCI_DEVICE(0x2916, TCO_ICH9R)},
296 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_2, TCO_ICH9DH)},
297 { ITCO_PCI_DEVICE(PCI_DEVICE_ID_INTEL_ICH9_4, TCO_ICH9DO)},
298 { ITCO_PCI_DEVICE(0x2919, TCO_ICH9M)},
299 { ITCO_PCI_DEVICE(0x2917, TCO_ICH9ME)},
300 { ITCO_PCI_DEVICE(0x3a18, TCO_ICH10)},
301 { ITCO_PCI_DEVICE(0x3a16, TCO_ICH10R)},
302 { ITCO_PCI_DEVICE(0x3a1a, TCO_ICH10D)},
303 { ITCO_PCI_DEVICE(0x3a14, TCO_ICH10DO)},
Seth Heasley79e89412009-11-11 02:24:01 +0100304 { ITCO_PCI_DEVICE(0x3b00, TCO_PCH)},
305 { ITCO_PCI_DEVICE(0x3b01, TCO_PCHM)},
Seth Heasley3c9d8ec2010-01-14 20:58:05 +0000306 { ITCO_PCI_DEVICE(0x3b02, TCO_P55)},
307 { ITCO_PCI_DEVICE(0x3b03, TCO_PM55)},
308 { ITCO_PCI_DEVICE(0x3b06, TCO_H55)},
309 { ITCO_PCI_DEVICE(0x3b07, TCO_QM57)},
310 { ITCO_PCI_DEVICE(0x3b08, TCO_H57)},
311 { ITCO_PCI_DEVICE(0x3b09, TCO_HM55)},
312 { ITCO_PCI_DEVICE(0x3b0a, TCO_Q57)},
313 { ITCO_PCI_DEVICE(0x3b0b, TCO_HM57)},
Seth Heasley79e89412009-11-11 02:24:01 +0100314 { ITCO_PCI_DEVICE(0x3b0d, TCO_PCHMSFF)},
Seth Heasley3c9d8ec2010-01-14 20:58:05 +0000315 { ITCO_PCI_DEVICE(0x3b0f, TCO_QS57)},
316 { ITCO_PCI_DEVICE(0x3b12, TCO_3400)},
317 { ITCO_PCI_DEVICE(0x3b14, TCO_3420)},
318 { ITCO_PCI_DEVICE(0x3b16, TCO_3450)},
Imre Kaloz4946f832009-12-07 20:42:26 +0100319 { ITCO_PCI_DEVICE(0x5031, TCO_EP80579)},
Seth Heasley4c7d8492010-03-25 16:14:41 -0700320 { ITCO_PCI_DEVICE(0x1c41, TCO_CPT1)},
321 { ITCO_PCI_DEVICE(0x1c42, TCO_CPT2)},
322 { ITCO_PCI_DEVICE(0x1c43, TCO_CPT3)},
323 { ITCO_PCI_DEVICE(0x1c44, TCO_CPT4)},
324 { ITCO_PCI_DEVICE(0x1c45, TCO_CPT5)},
325 { ITCO_PCI_DEVICE(0x1c46, TCO_CPT6)},
326 { ITCO_PCI_DEVICE(0x1c47, TCO_CPT7)},
327 { ITCO_PCI_DEVICE(0x1c48, TCO_CPT8)},
328 { ITCO_PCI_DEVICE(0x1c49, TCO_CPT9)},
329 { ITCO_PCI_DEVICE(0x1c4a, TCO_CPT10)},
330 { ITCO_PCI_DEVICE(0x1c4b, TCO_CPT11)},
331 { ITCO_PCI_DEVICE(0x1c4c, TCO_CPT12)},
332 { ITCO_PCI_DEVICE(0x1c4d, TCO_CPT13)},
333 { ITCO_PCI_DEVICE(0x1c4e, TCO_CPT14)},
334 { ITCO_PCI_DEVICE(0x1c4f, TCO_CPT15)},
335 { ITCO_PCI_DEVICE(0x1c50, TCO_CPT16)},
336 { ITCO_PCI_DEVICE(0x1c51, TCO_CPT17)},
337 { ITCO_PCI_DEVICE(0x1c52, TCO_CPT18)},
338 { ITCO_PCI_DEVICE(0x1c53, TCO_CPT19)},
339 { ITCO_PCI_DEVICE(0x1c54, TCO_CPT20)},
340 { ITCO_PCI_DEVICE(0x1c55, TCO_CPT21)},
341 { ITCO_PCI_DEVICE(0x1c56, TCO_CPT22)},
342 { ITCO_PCI_DEVICE(0x1c57, TCO_CPT23)},
343 { ITCO_PCI_DEVICE(0x1c58, TCO_CPT24)},
344 { ITCO_PCI_DEVICE(0x1c59, TCO_CPT25)},
345 { ITCO_PCI_DEVICE(0x1c5a, TCO_CPT26)},
346 { ITCO_PCI_DEVICE(0x1c5b, TCO_CPT27)},
347 { ITCO_PCI_DEVICE(0x1c5c, TCO_CPT28)},
348 { ITCO_PCI_DEVICE(0x1c5d, TCO_CPT29)},
349 { ITCO_PCI_DEVICE(0x1c5e, TCO_CPT30)},
350 { ITCO_PCI_DEVICE(0x1c5f, TCO_CPT31)},
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200351 { 0, }, /* End of list */
352};
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100353MODULE_DEVICE_TABLE(pci, iTCO_wdt_pci_tbl);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200354
355/* Address definitions for the TCO */
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100356/* TCO base address */
Wim Van Sebroeck0a7e65822009-04-14 20:20:07 +0000357#define TCOBASE (iTCO_wdt_private.ACPIBASE + 0x60)
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100358/* SMI Control and Enable Register */
Wim Van Sebroeck0a7e65822009-04-14 20:20:07 +0000359#define SMI_EN (iTCO_wdt_private.ACPIBASE + 0x30)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200360
Wim Van Sebroeck0a7e65822009-04-14 20:20:07 +0000361#define TCO_RLD (TCOBASE + 0x00) /* TCO Timer Reload and Curr. Value */
362#define TCOv1_TMR (TCOBASE + 0x01) /* TCOv1 Timer Initial Value */
363#define TCO_DAT_IN (TCOBASE + 0x02) /* TCO Data In Register */
364#define TCO_DAT_OUT (TCOBASE + 0x03) /* TCO Data Out Register */
365#define TCO1_STS (TCOBASE + 0x04) /* TCO1 Status Register */
366#define TCO2_STS (TCOBASE + 0x06) /* TCO2 Status Register */
367#define TCO1_CNT (TCOBASE + 0x08) /* TCO1 Control Register */
368#define TCO2_CNT (TCOBASE + 0x0a) /* TCO2 Control Register */
369#define TCOv2_TMR (TCOBASE + 0x12) /* TCOv2 Timer Initial Value */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200370
371/* internal variables */
372static unsigned long is_active;
373static char expect_release;
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100374static struct { /* this is private data for the iTCO_wdt device */
375 /* TCO version/generation */
376 unsigned int iTCO_version;
377 /* The cards ACPIBASE address (TCOBASE = ACPIBASE+0x60) */
378 unsigned long ACPIBASE;
379 /* NO_REBOOT flag is Memory-Mapped GCS register bit 5 (TCO version 2)*/
380 unsigned long __iomem *gcs;
381 /* the lock for io operations */
382 spinlock_t io_lock;
383 /* the PCI-device */
384 struct pci_dev *pdev;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200385} iTCO_wdt_private;
386
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100387/* the watchdog platform device */
388static struct platform_device *iTCO_wdt_platform_device;
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200389
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200390/* module parameters */
391#define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */
392static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
393module_param(heartbeat, int, 0);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100394MODULE_PARM_DESC(heartbeat, "Watchdog timeout in seconds. "
395 "5..76 (TCO v1) or 3..614 (TCO v2), default="
Wim Van Sebroeck143a2e52009-03-18 08:35:09 +0000396 __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200397
398static int nowayout = WATCHDOG_NOWAYOUT;
399module_param(nowayout, int, 0);
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100400MODULE_PARM_DESC(nowayout,
401 "Watchdog cannot be stopped once started (default="
402 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100403
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200404/*
405 * Some TCO specific functions
406 */
407
408static inline unsigned int seconds_to_ticks(int seconds)
409{
410 /* the internal timer is stored as ticks which decrement
411 * every 0.6 seconds */
412 return (seconds * 10) / 6;
413}
414
415static void iTCO_wdt_set_NO_REBOOT_bit(void)
416{
417 u32 val32;
418
419 /* Set the NO_REBOOT bit: this disables reboots */
420 if (iTCO_wdt_private.iTCO_version == 2) {
421 val32 = readl(iTCO_wdt_private.gcs);
422 val32 |= 0x00000020;
423 writel(val32, iTCO_wdt_private.gcs);
424 } else if (iTCO_wdt_private.iTCO_version == 1) {
425 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
426 val32 |= 0x00000002;
427 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
428 }
429}
430
431static int iTCO_wdt_unset_NO_REBOOT_bit(void)
432{
433 int ret = 0;
434 u32 val32;
435
436 /* Unset the NO_REBOOT bit: this enables reboots */
437 if (iTCO_wdt_private.iTCO_version == 2) {
438 val32 = readl(iTCO_wdt_private.gcs);
439 val32 &= 0xffffffdf;
440 writel(val32, iTCO_wdt_private.gcs);
441
442 val32 = readl(iTCO_wdt_private.gcs);
443 if (val32 & 0x00000020)
444 ret = -EIO;
445 } else if (iTCO_wdt_private.iTCO_version == 1) {
446 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
447 val32 &= 0xfffffffd;
448 pci_write_config_dword(iTCO_wdt_private.pdev, 0xd4, val32);
449
450 pci_read_config_dword(iTCO_wdt_private.pdev, 0xd4, &val32);
451 if (val32 & 0x00000002)
452 ret = -EIO;
453 }
454
455 return ret; /* returns: 0 = OK, -EIO = Error */
456}
457
458static int iTCO_wdt_start(void)
459{
460 unsigned int val;
461
462 spin_lock(&iTCO_wdt_private.io_lock);
463
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100464 iTCO_vendor_pre_start(iTCO_wdt_private.ACPIBASE, heartbeat);
465
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200466 /* disable chipset's NO_REBOOT bit */
467 if (iTCO_wdt_unset_NO_REBOOT_bit()) {
Roel Kluin2ba7d7b2007-10-23 03:08:27 +0200468 spin_unlock(&iTCO_wdt_private.io_lock);
Wim Van Sebroeck143a2e52009-03-18 08:35:09 +0000469 printk(KERN_ERR PFX "failed to reset NO_REBOOT flag, "
470 "reboot disabled by hardware\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200471 return -EIO;
472 }
473
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000474 /* Force the timer to its reload value by writing to the TCO_RLD
475 register */
476 if (iTCO_wdt_private.iTCO_version == 2)
477 outw(0x01, TCO_RLD);
478 else if (iTCO_wdt_private.iTCO_version == 1)
479 outb(0x01, TCO_RLD);
480
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200481 /* Bit 11: TCO Timer Halt -> 0 = The TCO timer is enabled to count */
482 val = inw(TCO1_CNT);
483 val &= 0xf7ff;
484 outw(val, TCO1_CNT);
485 val = inw(TCO1_CNT);
486 spin_unlock(&iTCO_wdt_private.io_lock);
487
488 if (val & 0x0800)
489 return -1;
490 return 0;
491}
492
493static int iTCO_wdt_stop(void)
494{
495 unsigned int val;
496
497 spin_lock(&iTCO_wdt_private.io_lock);
498
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100499 iTCO_vendor_pre_stop(iTCO_wdt_private.ACPIBASE);
500
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200501 /* Bit 11: TCO Timer Halt -> 1 = The TCO timer is disabled */
502 val = inw(TCO1_CNT);
503 val |= 0x0800;
504 outw(val, TCO1_CNT);
505 val = inw(TCO1_CNT);
506
507 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
508 iTCO_wdt_set_NO_REBOOT_bit();
509
510 spin_unlock(&iTCO_wdt_private.io_lock);
511
512 if ((val & 0x0800) == 0)
513 return -1;
514 return 0;
515}
516
517static int iTCO_wdt_keepalive(void)
518{
519 spin_lock(&iTCO_wdt_private.io_lock);
520
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100521 iTCO_vendor_pre_keepalive(iTCO_wdt_private.ACPIBASE, heartbeat);
522
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200523 /* Reload the timer by writing to the TCO Timer Counter register */
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100524 if (iTCO_wdt_private.iTCO_version == 2)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200525 outw(0x01, TCO_RLD);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100526 else if (iTCO_wdt_private.iTCO_version == 1) {
527 /* Reset the timeout status bit so that the timer
528 * needs to count down twice again before rebooting */
529 outw(0x0008, TCO1_STS); /* write 1 to clear bit */
530
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200531 outb(0x01, TCO_RLD);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100532 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200533
534 spin_unlock(&iTCO_wdt_private.io_lock);
535 return 0;
536}
537
538static int iTCO_wdt_set_heartbeat(int t)
539{
540 unsigned int val16;
541 unsigned char val8;
542 unsigned int tmrval;
543
544 tmrval = seconds_to_ticks(t);
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100545
546 /* For TCO v1 the timer counts down twice before rebooting */
547 if (iTCO_wdt_private.iTCO_version == 1)
548 tmrval /= 2;
549
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200550 /* from the specs: */
551 /* "Values of 0h-3h are ignored and should not be attempted" */
552 if (tmrval < 0x04)
553 return -EINVAL;
554 if (((iTCO_wdt_private.iTCO_version == 2) && (tmrval > 0x3ff)) ||
555 ((iTCO_wdt_private.iTCO_version == 1) && (tmrval > 0x03f)))
556 return -EINVAL;
557
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100558 iTCO_vendor_pre_set_heartbeat(tmrval);
559
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200560 /* Write new heartbeat to watchdog */
561 if (iTCO_wdt_private.iTCO_version == 2) {
562 spin_lock(&iTCO_wdt_private.io_lock);
563 val16 = inw(TCOv2_TMR);
564 val16 &= 0xfc00;
565 val16 |= tmrval;
566 outw(val16, TCOv2_TMR);
567 val16 = inw(TCOv2_TMR);
568 spin_unlock(&iTCO_wdt_private.io_lock);
569
570 if ((val16 & 0x3ff) != tmrval)
571 return -EINVAL;
572 } else if (iTCO_wdt_private.iTCO_version == 1) {
573 spin_lock(&iTCO_wdt_private.io_lock);
574 val8 = inb(TCOv1_TMR);
575 val8 &= 0xc0;
576 val8 |= (tmrval & 0xff);
577 outb(val8, TCOv1_TMR);
578 val8 = inb(TCOv1_TMR);
579 spin_unlock(&iTCO_wdt_private.io_lock);
580
581 if ((val8 & 0x3f) != tmrval)
582 return -EINVAL;
583 }
584
585 heartbeat = t;
586 return 0;
587}
588
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100589static int iTCO_wdt_get_timeleft(int *time_left)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200590{
591 unsigned int val16;
592 unsigned char val8;
593
594 /* read the TCO Timer */
595 if (iTCO_wdt_private.iTCO_version == 2) {
596 spin_lock(&iTCO_wdt_private.io_lock);
597 val16 = inw(TCO_RLD);
598 val16 &= 0x3ff;
599 spin_unlock(&iTCO_wdt_private.io_lock);
600
601 *time_left = (val16 * 6) / 10;
602 } else if (iTCO_wdt_private.iTCO_version == 1) {
603 spin_lock(&iTCO_wdt_private.io_lock);
604 val8 = inb(TCO_RLD);
605 val8 &= 0x3f;
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100606 if (!(inw(TCO1_STS) & 0x0008))
607 val8 += (inb(TCOv1_TMR) & 0x3f);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200608 spin_unlock(&iTCO_wdt_private.io_lock);
609
610 *time_left = (val8 * 6) / 10;
Jeff Garzik80060362006-10-10 03:40:44 -0400611 } else
612 return -EINVAL;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200613 return 0;
614}
615
616/*
617 * /dev/watchdog handling
618 */
619
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100620static int iTCO_wdt_open(struct inode *inode, struct file *file)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200621{
622 /* /dev/watchdog can only be opened once */
623 if (test_and_set_bit(0, &is_active))
624 return -EBUSY;
625
626 /*
627 * Reload and activate timer
628 */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200629 iTCO_wdt_start();
630 return nonseekable_open(inode, file);
631}
632
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100633static int iTCO_wdt_release(struct inode *inode, struct file *file)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200634{
635 /*
636 * Shut off the timer.
637 */
638 if (expect_release == 42) {
639 iTCO_wdt_stop();
640 } else {
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100641 printk(KERN_CRIT PFX
642 "Unexpected close, not stopping watchdog!\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200643 iTCO_wdt_keepalive();
644 }
645 clear_bit(0, &is_active);
646 expect_release = 0;
647 return 0;
648}
649
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100650static ssize_t iTCO_wdt_write(struct file *file, const char __user *data,
651 size_t len, loff_t *ppos)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200652{
653 /* See if we got the magic character 'V' and reload the timer */
654 if (len) {
655 if (!nowayout) {
656 size_t i;
657
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100658 /* note: just in case someone wrote the magic
659 character five months ago... */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200660 expect_release = 0;
661
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100662 /* scan to see whether or not we got the
663 magic character */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200664 for (i = 0; i != len; i++) {
665 char c;
Wim Van Sebroeck7944d3a2008-08-06 20:19:41 +0000666 if (get_user(c, data + i))
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200667 return -EFAULT;
668 if (c == 'V')
669 expect_release = 42;
670 }
671 }
672
673 /* someone wrote to us, we should reload the timer */
674 iTCO_wdt_keepalive();
675 }
676 return len;
677}
678
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100679static long iTCO_wdt_ioctl(struct file *file, unsigned int cmd,
680 unsigned long arg)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200681{
682 int new_options, retval = -EINVAL;
683 int new_heartbeat;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200684 void __user *argp = (void __user *)arg;
685 int __user *p = argp;
Wim Van Sebroeck42747d72009-12-26 18:55:22 +0000686 static const struct watchdog_info ident = {
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200687 .options = WDIOF_SETTIMEOUT |
688 WDIOF_KEEPALIVEPING |
689 WDIOF_MAGICCLOSE,
690 .firmware_version = 0,
691 .identity = DRV_NAME,
692 };
693
694 switch (cmd) {
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100695 case WDIOC_GETSUPPORT:
696 return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0;
697 case WDIOC_GETSTATUS:
698 case WDIOC_GETBOOTSTATUS:
699 return put_user(0, p);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200700
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100701 case WDIOC_SETOPTIONS:
702 {
703 if (get_user(new_options, p))
704 return -EFAULT;
705
706 if (new_options & WDIOS_DISABLECARD) {
707 iTCO_wdt_stop();
708 retval = 0;
709 }
710 if (new_options & WDIOS_ENABLECARD) {
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200711 iTCO_wdt_keepalive();
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100712 iTCO_wdt_start();
713 retval = 0;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200714 }
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100715 return retval;
716 }
Wim Van Sebroeck0c060902008-07-18 11:41:17 +0000717 case WDIOC_KEEPALIVE:
718 iTCO_wdt_keepalive();
719 return 0;
720
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100721 case WDIOC_SETTIMEOUT:
722 {
723 if (get_user(new_heartbeat, p))
724 return -EFAULT;
725 if (iTCO_wdt_set_heartbeat(new_heartbeat))
726 return -EINVAL;
727 iTCO_wdt_keepalive();
728 /* Fall */
729 }
730 case WDIOC_GETTIMEOUT:
731 return put_user(heartbeat, p);
732 case WDIOC_GETTIMELEFT:
733 {
734 int time_left;
735 if (iTCO_wdt_get_timeleft(&time_left))
736 return -EINVAL;
737 return put_user(time_left, p);
738 }
739 default:
740 return -ENOTTY;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200741 }
742}
743
744/*
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200745 * Kernel Interfaces
746 */
747
Arjan van de Ven2b8693c2007-02-12 00:55:32 -0800748static const struct file_operations iTCO_wdt_fops = {
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100749 .owner = THIS_MODULE,
750 .llseek = no_llseek,
751 .write = iTCO_wdt_write,
752 .unlocked_ioctl = iTCO_wdt_ioctl,
753 .open = iTCO_wdt_open,
754 .release = iTCO_wdt_release,
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200755};
756
757static struct miscdevice iTCO_wdt_miscdev = {
758 .minor = WATCHDOG_MINOR,
759 .name = "watchdog",
760 .fops = &iTCO_wdt_fops,
761};
762
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200763/*
764 * Init & exit routines
765 */
766
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100767static int __devinit iTCO_wdt_init(struct pci_dev *pdev,
768 const struct pci_device_id *ent, struct platform_device *dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200769{
770 int ret;
771 u32 base_address;
772 unsigned long RCBA;
Wim Van Sebroeck12d60e22009-01-28 20:51:04 +0000773 unsigned long val32;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200774
775 /*
776 * Find the ACPI/PM base I/O address which is the base
777 * for the TCO registers (TCOBASE=ACPIBASE + 0x60)
778 * ACPIBASE is bits [15:7] from 0x40-0x43
779 */
780 pci_read_config_dword(pdev, 0x40, &base_address);
Wim Van Sebroeck0d4804b2007-05-11 18:59:24 +0000781 base_address &= 0x0000ff80;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200782 if (base_address == 0x00000000) {
783 /* Something's wrong here, ACPIBASE has to be set */
784 printk(KERN_ERR PFX "failed to get TCOBASE address\n");
Wim Van Sebroeck4802c652006-07-19 22:39:13 +0200785 pci_dev_put(pdev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200786 return -ENODEV;
787 }
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100788 iTCO_wdt_private.iTCO_version =
789 iTCO_chipset_info[ent->driver_data].iTCO_version;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200790 iTCO_wdt_private.ACPIBASE = base_address;
791 iTCO_wdt_private.pdev = pdev;
792
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100793 /* Get the Memory-Mapped GCS register, we need it for the
794 NO_REBOOT flag (TCO v2). To get access to it you have to
795 read RCBA from PCI Config space 0xf0 and use it as base.
796 GCS = RCBA + ICH6_GCS(0x3410). */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200797 if (iTCO_wdt_private.iTCO_version == 2) {
798 pci_read_config_dword(pdev, 0xf0, &base_address);
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400799 if ((base_address & 1) == 0) {
Naga Chumbalkarec269852010-02-09 00:42:02 +0100800 printk(KERN_ERR PFX "RCBA is disabled by hardware\n");
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400801 ret = -ENODEV;
802 goto out;
803 }
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200804 RCBA = base_address & 0xffffc000;
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100805 iTCO_wdt_private.gcs = ioremap((RCBA + 0x3410), 4);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200806 }
807
808 /* Check chipset's NO_REBOOT bit */
Wim Van Sebroecke0333512006-11-12 18:05:09 +0100809 if (iTCO_wdt_unset_NO_REBOOT_bit() && iTCO_vendor_check_noreboot_on()) {
Naga Chumbalkarec269852010-02-09 00:42:02 +0100810 printk(KERN_INFO PFX "unable to reset NO_REBOOT flag, "
811 "platform may have disabled it\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200812 ret = -ENODEV; /* Cannot reset NO_REBOOT bit */
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400813 goto out_unmap;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200814 }
815
816 /* Set the NO_REBOOT bit to prevent later reboots, just for sure */
817 iTCO_wdt_set_NO_REBOOT_bit();
818
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000819 /* The TCO logic uses the TCO_EN bit in the SMI_EN register */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200820 if (!request_region(SMI_EN, 4, "iTCO_wdt")) {
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100821 printk(KERN_ERR PFX
822 "I/O address 0x%04lx already in use\n", SMI_EN);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200823 ret = -EIO;
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400824 goto out_unmap;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200825 }
Wim Van Sebroeck12d60e22009-01-28 20:51:04 +0000826 /* Bit 13: TCO_EN -> 0 = Disables TCO logic generating an SMI# */
827 val32 = inl(SMI_EN);
828 val32 &= 0xffffdfff; /* Turn off SMI clearing watchdog */
829 outl(val32, SMI_EN);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200830
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100831 /* The TCO I/O registers reside in a 32-byte range pointed to
832 by the TCOBASE value */
833 if (!request_region(TCOBASE, 0x20, "iTCO_wdt")) {
834 printk(KERN_ERR PFX "I/O address 0x%04lx already in use\n",
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200835 TCOBASE);
836 ret = -EIO;
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000837 goto unreg_smi_en;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200838 }
839
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100840 printk(KERN_INFO PFX
841 "Found a %s TCO device (Version=%d, TCOBASE=0x%04lx)\n",
842 iTCO_chipset_info[ent->driver_data].name,
843 iTCO_chipset_info[ent->driver_data].iTCO_version,
844 TCOBASE);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200845
846 /* Clear out the (probably old) status */
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100847 outw(0x0008, TCO1_STS); /* Clear the Time Out Status bit */
848 outw(0x0002, TCO2_STS); /* Clear SECOND_TO_STS bit */
849 outw(0x0004, TCO2_STS); /* Clear BOOT_STS bit */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200850
851 /* Make sure the watchdog is not running */
852 iTCO_wdt_stop();
853
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100854 /* Check that the heartbeat value is within it's range;
855 if not reset to the default */
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200856 if (iTCO_wdt_set_heartbeat(heartbeat)) {
857 iTCO_wdt_set_heartbeat(WATCHDOG_HEARTBEAT);
Wim Van Sebroeck143a2e52009-03-18 08:35:09 +0000858 printk(KERN_INFO PFX
Pádraig Brady7e6811d2010-04-19 13:38:25 +0100859 "timeout value out of range, using %d\n", heartbeat);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200860 }
861
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200862 ret = misc_register(&iTCO_wdt_miscdev);
863 if (ret != 0) {
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100864 printk(KERN_ERR PFX
865 "cannot register miscdev on minor=%d (err=%d)\n",
866 WATCHDOG_MINOR, ret);
Wim Van Sebroeck1bef84b2006-08-05 20:59:01 +0200867 goto unreg_region;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200868 }
869
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100870 printk(KERN_INFO PFX "initialized. heartbeat=%d sec (nowayout=%d)\n",
871 heartbeat, nowayout);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200872
873 return 0;
874
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200875unreg_region:
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100876 release_region(TCOBASE, 0x20);
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000877unreg_smi_en:
878 release_region(SMI_EN, 4);
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400879out_unmap:
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200880 if (iTCO_wdt_private.iTCO_version == 2)
881 iounmap(iTCO_wdt_private.gcs);
Denis V. Lunevde8cd9a2009-06-05 15:13:08 +0400882out:
Wim Van Sebroeck4802c652006-07-19 22:39:13 +0200883 pci_dev_put(iTCO_wdt_private.pdev);
Wim Van Sebroeck1bef84b2006-08-05 20:59:01 +0200884 iTCO_wdt_private.ACPIBASE = 0;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200885 return ret;
886}
887
Wim Van Sebroeck08113e32007-08-31 08:15:34 +0000888static void __devexit iTCO_wdt_cleanup(void)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200889{
890 /* Stop the timer before we leave */
891 if (!nowayout)
892 iTCO_wdt_stop();
893
894 /* Deregister */
895 misc_deregister(&iTCO_wdt_miscdev);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200896 release_region(TCOBASE, 0x20);
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000897 release_region(SMI_EN, 4);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200898 if (iTCO_wdt_private.iTCO_version == 2)
899 iounmap(iTCO_wdt_private.gcs);
Wim Van Sebroeck4802c652006-07-19 22:39:13 +0200900 pci_dev_put(iTCO_wdt_private.pdev);
Wim Van Sebroeck1bef84b2006-08-05 20:59:01 +0200901 iTCO_wdt_private.ACPIBASE = 0;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200902}
903
Wim Van Sebroeck08113e32007-08-31 08:15:34 +0000904static int __devinit iTCO_wdt_probe(struct platform_device *dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200905{
Naga Chumbalkarec269852010-02-09 00:42:02 +0100906 int ret = -ENODEV;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200907 int found = 0;
908 struct pci_dev *pdev = NULL;
909 const struct pci_device_id *ent;
910
911 spin_lock_init(&iTCO_wdt_private.io_lock);
912
913 for_each_pci_dev(pdev) {
914 ent = pci_match_id(iTCO_wdt_pci_tbl, pdev);
915 if (ent) {
Naga Chumbalkarec269852010-02-09 00:42:02 +0100916 found++;
917 ret = iTCO_wdt_init(pdev, ent, dev);
918 if (!ret)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200919 break;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200920 }
921 }
922
Naga Chumbalkarec269852010-02-09 00:42:02 +0100923 if (!found)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200924 printk(KERN_INFO PFX "No card detected\n");
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200925
Naga Chumbalkarec269852010-02-09 00:42:02 +0100926 return ret;
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200927}
928
Wim Van Sebroeck08113e32007-08-31 08:15:34 +0000929static int __devexit iTCO_wdt_remove(struct platform_device *dev)
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200930{
931 if (iTCO_wdt_private.ACPIBASE)
932 iTCO_wdt_cleanup();
933
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200934 return 0;
935}
936
937static void iTCO_wdt_shutdown(struct platform_device *dev)
938{
939 iTCO_wdt_stop();
940}
941
942#define iTCO_wdt_suspend NULL
943#define iTCO_wdt_resume NULL
944
945static struct platform_driver iTCO_wdt_driver = {
946 .probe = iTCO_wdt_probe,
Wim Van Sebroeck08113e32007-08-31 08:15:34 +0000947 .remove = __devexit_p(iTCO_wdt_remove),
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200948 .shutdown = iTCO_wdt_shutdown,
949 .suspend = iTCO_wdt_suspend,
950 .resume = iTCO_wdt_resume,
951 .driver = {
952 .owner = THIS_MODULE,
953 .name = DRV_NAME,
954 },
955};
956
957static int __init iTCO_wdt_init_module(void)
958{
959 int err;
960
Wim Van Sebroeck7cd5b082008-11-19 19:39:58 +0000961 printk(KERN_INFO PFX "Intel TCO WatchDog Timer Driver v%s\n",
962 DRV_VERSION);
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200963
964 err = platform_driver_register(&iTCO_wdt_driver);
965 if (err)
966 return err;
967
Alan Cox0e6fa3f2008-05-19 14:06:25 +0100968 iTCO_wdt_platform_device = platform_device_register_simple(DRV_NAME,
969 -1, NULL, 0);
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200970 if (IS_ERR(iTCO_wdt_platform_device)) {
971 err = PTR_ERR(iTCO_wdt_platform_device);
972 goto unreg_platform_driver;
973 }
974
975 return 0;
976
977unreg_platform_driver:
978 platform_driver_unregister(&iTCO_wdt_driver);
979 return err;
980}
981
982static void __exit iTCO_wdt_cleanup_module(void)
983{
984 platform_device_unregister(iTCO_wdt_platform_device);
985 platform_driver_unregister(&iTCO_wdt_driver);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200986 printk(KERN_INFO PFX "Watchdog Module Unloaded.\n");
987}
988
989module_init(iTCO_wdt_init_module);
990module_exit(iTCO_wdt_cleanup_module);
991
992MODULE_AUTHOR("Wim Van Sebroeck <wim@iguana.be>");
993MODULE_DESCRIPTION("Intel TCO WatchDog Timer Driver");
Wim Van Sebroeck3836cc02006-06-30 08:44:53 +0200994MODULE_VERSION(DRV_VERSION);
Wim Van Sebroeck9e0ea342006-05-21 14:37:44 +0200995MODULE_LICENSE("GPL");
996MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);