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Alexander Shishkin39f40342015-09-22 15:47:14 +03001config INTEL_TH
2 tristate "Intel(R) Trace Hub controller"
3 help
4 Intel(R) Trace Hub (TH) is a set of hardware blocks (subdevices) that
5 produce, switch and output trace data from multiple hardware and
6 software sources over several types of trace output ports encoded
7 in System Trace Protocol (MIPI STPv2) and is intended to perform
8 full system debugging.
9
10 This option enables intel_th bus and common code used by TH
11 subdevices to interact with each other and hardware and for
12 platform glue layers to drive Intel TH devices.
13
14 Say Y here to enable Intel(R) Trace Hub controller support.
15
16if INTEL_TH
17
Alexander Shishkin2b0b16d2015-09-22 15:47:15 +030018config INTEL_TH_PCI
19 tristate "Intel(R) Trace Hub PCI controller"
20 depends on PCI
21 help
22 Intel(R) Trace Hub may exist as a PCI device. This option enables
23 support glue layer for PCI-based Intel TH.
24
25 Say Y here to enable PCI Intel TH support.
26
Alexander Shishkinb27a6a32015-09-22 15:47:16 +030027config INTEL_TH_GTH
28 tristate "Intel(R) Trace Hub Global Trace Hub"
29 help
30 Global Trace Hub (GTH) is the central component of the
31 Intel TH infrastructure and acts as a switch for source
32 and output devices. This driver is required for other
33 Intel TH subdevices to initialize.
34
35 Say Y here to enable GTH subdevice of Intel(R) Trace Hub.
36
Alexander Shishkinf04e4492015-09-22 15:47:17 +030037config INTEL_TH_STH
38 tristate "Intel(R) Trace Hub Software Trace Hub support"
39 depends on STM
40 help
41 Software Trace Hub (STH) enables trace data from software
42 trace sources to be sent out via Intel(R) Trace Hub. It
43 uses stm class device to interface with its sources.
44
45 Say Y here to enable STH subdevice of Intel(R) Trace Hub.
46
Alexander Shishkinba826642015-09-22 15:47:18 +030047config INTEL_TH_MSU
48 tristate "Intel(R) Trace Hub Memory Storage Unit"
49 help
50 Memory Storage Unit (MSU) trace output device enables
51 storing STP traces to system memory. It supports single
52 and multiblock modes of operation and provides read()
53 and mmap() access to the collected data.
54
55 Say Y here to enable MSU output device for Intel TH.
56
Alexander Shishkin14cdbf02015-09-22 15:47:19 +030057config INTEL_TH_PTI
58 tristate "Intel(R) Trace Hub PTI output"
59 help
60 Parallel Trace Interface unit (PTI) is a trace output device
61 of Intel TH architecture that facilitates STP trace output via
62 a PTI port.
63
64 Say Y to enable PTI output of Intel TH data.
65
Alexander Shishkin39f40342015-09-22 15:47:14 +030066config INTEL_TH_DEBUG
67 bool "Intel(R) Trace Hub debugging"
68 depends on DEBUG_FS
69 help
70 Say Y here to enable debugging.
71
72endif