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Magnus Damm0468b2d2013-03-28 00:49:34 +09001/*
2 * r8a7790 processor support
3 *
4 * Copyright (C) 2013 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/irq.h>
Magnus Damm0468b2d2013-03-28 00:49:34 +090022#include <linux/kernel.h>
23#include <linux/of_platform.h>
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020024#include <linux/platform_data/gpio-rcar.h>
Magnus Damm8f5ec0a2013-03-28 00:49:54 +090025#include <linux/platform_data/irq-renesas-irqc.h>
Magnus Damm99ade1a2013-06-28 20:27:04 +090026#include <linux/serial_sci.h>
27#include <linux/sh_timer.h>
Magnus Damm0468b2d2013-03-28 00:49:34 +090028#include <mach/common.h>
29#include <mach/irqs.h>
30#include <mach/r8a7790.h>
31#include <asm/mach/arch.h>
32
Laurent Pinchartcde214a2013-08-08 00:34:53 +020033static const struct resource pfc_resources[] __initconst = {
Magnus Damm69e351d2013-03-28 00:50:03 +090034 DEFINE_RES_MEM(0xe6060000, 0x250),
35};
36
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020037#define R8A7790_GPIO(idx) \
Laurent Pinchartcde214a2013-08-08 00:34:53 +020038static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020039 DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \
40 DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
41}; \
42 \
Laurent Pinchartcde214a2013-08-08 00:34:53 +020043static const struct gpio_rcar_config \
44r8a7790_gpio##idx##_platform_data __initconst = { \
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020045 .gpio_base = 32 * (idx), \
46 .irq_base = 0, \
47 .number_of_pins = 32, \
48 .pctl_name = "pfc-r8a7790", \
Simon Hormand93906b82013-05-13 17:53:52 +090049 .has_both_edge_trigger = 1, \
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020050}; \
51
52R8A7790_GPIO(0);
53R8A7790_GPIO(1);
54R8A7790_GPIO(2);
55R8A7790_GPIO(3);
56R8A7790_GPIO(4);
57R8A7790_GPIO(5);
58
59#define r8a7790_register_gpio(idx) \
60 platform_device_register_resndata(&platform_bus, "gpio_rcar", idx, \
61 r8a7790_gpio##idx##_resources, \
62 ARRAY_SIZE(r8a7790_gpio##idx##_resources), \
63 &r8a7790_gpio##idx##_platform_data, \
64 sizeof(r8a7790_gpio##idx##_platform_data))
65
Kuninori Morimotob448c902013-11-28 19:02:12 -080066static struct resource i2c_resources[] __initdata = {
67 /* I2C0 */
68 DEFINE_RES_MEM(0xE6508000, 0x40),
69 DEFINE_RES_IRQ(gic_spi(287)),
70 /* I2C1 */
71 DEFINE_RES_MEM(0xE6518000, 0x40),
72 DEFINE_RES_IRQ(gic_spi(288)),
73 /* I2C2 */
74 DEFINE_RES_MEM(0xE6530000, 0x40),
75 DEFINE_RES_IRQ(gic_spi(286)),
76 /* I2C3 */
77 DEFINE_RES_MEM(0xE6540000, 0x40),
78 DEFINE_RES_IRQ(gic_spi(290)),
79
80};
81
82#define r8a7790_register_i2c(idx) \
83 platform_device_register_simple( \
84 "i2c-rcar", idx, \
85 i2c_resources + (2 * idx), 2); \
86
Magnus Damm69e351d2013-03-28 00:50:03 +090087void __init r8a7790_pinmux_init(void)
88{
89 platform_device_register_simple("pfc-r8a7790", -1, pfc_resources,
90 ARRAY_SIZE(pfc_resources));
Laurent Pinchart43ca9cb2013-04-08 11:36:17 +020091 r8a7790_register_gpio(0);
92 r8a7790_register_gpio(1);
93 r8a7790_register_gpio(2);
94 r8a7790_register_gpio(3);
95 r8a7790_register_gpio(4);
96 r8a7790_register_gpio(5);
Kuninori Morimotob448c902013-11-28 19:02:12 -080097 r8a7790_register_i2c(0);
98 r8a7790_register_i2c(1);
99 r8a7790_register_i2c(2);
100 r8a7790_register_i2c(3);
Magnus Damm69e351d2013-03-28 00:50:03 +0900101}
102
Magnus Damm55d9fab2013-03-28 00:49:44 +0900103#define SCIF_COMMON(scif_type, baseaddr, irq) \
104 .type = scif_type, \
105 .mapbase = baseaddr, \
106 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
107 .irqs = SCIx_IRQ_MUXED(irq)
108
109#define SCIFA_DATA(index, baseaddr, irq) \
110[index] = { \
111 SCIF_COMMON(PORT_SCIFA, baseaddr, irq), \
112 .scbrr_algo_id = SCBRR_ALGO_4, \
113 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
114}
115
116#define SCIFB_DATA(index, baseaddr, irq) \
117[index] = { \
118 SCIF_COMMON(PORT_SCIFB, baseaddr, irq), \
119 .scbrr_algo_id = SCBRR_ALGO_4, \
120 .scscr = SCSCR_RE | SCSCR_TE, \
121}
122
123#define SCIF_DATA(index, baseaddr, irq) \
124[index] = { \
125 SCIF_COMMON(PORT_SCIF, baseaddr, irq), \
126 .scbrr_algo_id = SCBRR_ALGO_2, \
Ulrich Hechtc972f022013-05-31 17:57:04 +0200127 .scscr = SCSCR_RE | SCSCR_TE, \
Magnus Damm55d9fab2013-03-28 00:49:44 +0900128}
129
Ulrich Hechtd44f8302013-05-31 17:57:02 +0200130#define HSCIF_DATA(index, baseaddr, irq) \
131[index] = { \
132 SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \
133 .scbrr_algo_id = SCBRR_ALGO_6, \
134 .scscr = SCSCR_RE | SCSCR_TE, \
135}
136
137enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
138 HSCIF0, HSCIF1 };
Magnus Damm55d9fab2013-03-28 00:49:44 +0900139
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200140static const struct plat_sci_port scif[] __initconst = {
Magnus Damm55d9fab2013-03-28 00:49:44 +0900141 SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
142 SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
143 SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
144 SCIFB_DATA(SCIFB1, 0xe6c30000, gic_spi(149)), /* SCIFB1 */
145 SCIFB_DATA(SCIFB2, 0xe6ce0000, gic_spi(150)), /* SCIFB2 */
146 SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */
147 SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */
148 SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */
Ulrich Hechtd44f8302013-05-31 17:57:02 +0200149 HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */
150 HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */
Magnus Damm55d9fab2013-03-28 00:49:44 +0900151};
152
153static inline void r8a7790_register_scif(int idx)
154{
155 platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
156 sizeof(struct plat_sci_port));
157}
158
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200159static const struct renesas_irqc_config irqc0_data __initconst = {
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900160 .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
161};
162
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200163static const struct resource irqc0_resources[] __initconst = {
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900164 DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
165 DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
166 DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
167 DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */
168 DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */
169};
170
171#define r8a7790_register_irqc(idx) \
172 platform_device_register_resndata(&platform_bus, "renesas_irqc", \
173 idx, irqc##idx##_resources, \
174 ARRAY_SIZE(irqc##idx##_resources), \
175 &irqc##idx##_data, \
176 sizeof(struct renesas_irqc_config))
177
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200178static const struct resource thermal_resources[] __initconst = {
Simon Horman0b8eeba2013-06-26 16:22:21 +0900179 DEFINE_RES_MEM(0xe61f0000, 0x14),
180 DEFINE_RES_MEM(0xe61f0100, 0x38),
181 DEFINE_RES_IRQ(gic_spi(69)),
182};
183
184#define r8a7790_register_thermal() \
185 platform_device_register_simple("rcar_thermal", -1, \
186 thermal_resources, \
187 ARRAY_SIZE(thermal_resources))
188
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200189static const struct sh_timer_config cmt00_platform_data __initconst = {
Magnus Damm99ade1a2013-06-28 20:27:04 +0900190 .name = "CMT00",
191 .timer_bit = 0,
192 .clockevent_rating = 80,
193};
194
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200195static const struct resource cmt00_resources[] __initconst = {
Magnus Damm99ade1a2013-06-28 20:27:04 +0900196 DEFINE_RES_MEM(0xffca0510, 0x0c),
197 DEFINE_RES_MEM(0xffca0500, 0x04),
198 DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
199};
200
201#define r8a7790_register_cmt(idx) \
202 platform_device_register_resndata(&platform_bus, "sh_cmt", \
203 idx, cmt##idx##_resources, \
204 ARRAY_SIZE(cmt##idx##_resources), \
205 &cmt##idx##_platform_data, \
206 sizeof(struct sh_timer_config))
207
Simon Horman6dace672013-06-28 13:42:16 +0900208void __init r8a7790_add_dt_devices(void)
Magnus Damm0468b2d2013-03-28 00:49:34 +0900209{
Magnus Damm55d9fab2013-03-28 00:49:44 +0900210 r8a7790_register_scif(SCIFA0);
211 r8a7790_register_scif(SCIFA1);
212 r8a7790_register_scif(SCIFB0);
213 r8a7790_register_scif(SCIFB1);
214 r8a7790_register_scif(SCIFB2);
215 r8a7790_register_scif(SCIFA2);
216 r8a7790_register_scif(SCIF0);
217 r8a7790_register_scif(SCIF1);
Ulrich Hechtd44f8302013-05-31 17:57:02 +0200218 r8a7790_register_scif(HSCIF0);
219 r8a7790_register_scif(HSCIF1);
Simon Horman6dace672013-06-28 13:42:16 +0900220 r8a7790_register_cmt(00);
221}
222
223void __init r8a7790_add_standard_devices(void)
224{
225 r8a7790_add_dt_devices();
Magnus Damm8f5ec0a2013-03-28 00:49:54 +0900226 r8a7790_register_irqc(0);
Simon Horman0b8eeba2013-06-26 16:22:21 +0900227 r8a7790_register_thermal();
Magnus Damm0468b2d2013-03-28 00:49:34 +0900228}
229
Magnus Damm0efd7fa2013-08-08 07:27:01 +0900230void __init r8a7790_init_early(void)
Magnus Damm8333d8c2013-06-28 20:27:13 +0900231{
232#ifndef CONFIG_ARM_ARCH_TIMER
233 shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
234#endif
235}
236
Magnus Damm0468b2d2013-03-28 00:49:34 +0900237#ifdef CONFIG_USE_OF
Magnus Damm0468b2d2013-03-28 00:49:34 +0900238
Laurent Pinchartcde214a2013-08-08 00:34:53 +0200239static const char * const r8a7790_boards_compat_dt[] __initconst = {
Magnus Damm0468b2d2013-03-28 00:49:34 +0900240 "renesas,r8a7790",
241 NULL,
242};
243
244DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
Magnus Dammad09cb82013-08-29 08:22:07 +0900245 .smp = smp_ops(r8a7790_smp_ops),
Magnus Damm0efd7fa2013-08-08 07:27:01 +0900246 .init_early = r8a7790_init_early,
Magnus Damm50c517d2013-09-12 09:32:49 +0900247 .init_time = rcar_gen2_timer_init,
Magnus Damm0468b2d2013-03-28 00:49:34 +0900248 .dt_compat = r8a7790_boards_compat_dt,
249MACHINE_END
250#endif /* CONFIG_USE_OF */