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Hollis Blanchard75f74f02008-11-05 09:36:16 -06001/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
14 *
15 * Copyright IBM Corp. 2008
16 *
17 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
18 */
19
20#include <asm/kvm_ppc.h>
21#include <asm/dcr.h>
22#include <asm/dcr-regs.h>
23#include <asm/disassemble.h>
Hollis Blanchardfe4e7712008-11-10 14:57:36 -060024#include <asm/kvm_44x.h>
Hollis Blanchard73e75b42008-12-02 15:51:57 -060025#include "timing.h"
Hollis Blanchard75f74f02008-11-05 09:36:16 -060026
27#include "booke.h"
28#include "44x_tlb.h"
29
Alexander Grafceb985f2012-08-16 00:34:58 +020030#define XOP_MFDCRX 259
Hollis Blanchard75f74f02008-11-05 09:36:16 -060031#define XOP_MFDCR 323
Alexander Grafe4dcfe82012-08-16 00:28:09 +020032#define XOP_MTDCRX 387
Hollis Blanchard75f74f02008-11-05 09:36:16 -060033#define XOP_MTDCR 451
34#define XOP_TLBSX 914
35#define XOP_ICCCI 966
36#define XOP_TLBWE 978
37
Alexander Grafe4dcfe82012-08-16 00:28:09 +020038static int emulate_mtdcr(struct kvm_vcpu *vcpu, int rs, int dcrn)
39{
40 /* emulate some access in kernel */
41 switch (dcrn) {
42 case DCRN_CPR0_CONFIG_ADDR:
43 vcpu->arch.cpr0_cfgaddr = kvmppc_get_gpr(vcpu, rs);
44 return EMULATE_DONE;
45 default:
46 vcpu->run->dcr.dcrn = dcrn;
47 vcpu->run->dcr.data = kvmppc_get_gpr(vcpu, rs);
48 vcpu->run->dcr.is_write = 1;
Alexander Grafe43a0282012-10-06 03:56:35 +020049 vcpu->arch.dcr_is_write = 1;
Alexander Grafe4dcfe82012-08-16 00:28:09 +020050 vcpu->arch.dcr_needed = 1;
51 kvmppc_account_exit(vcpu, DCR_EXITS);
52 return EMULATE_DO_DCR;
53 }
54}
55
Alexander Grafceb985f2012-08-16 00:34:58 +020056static int emulate_mfdcr(struct kvm_vcpu *vcpu, int rt, int dcrn)
57{
58 /* The guest may access CPR0 registers to determine the timebase
59 * frequency, and it must know the real host frequency because it
60 * can directly access the timebase registers.
61 *
62 * It would be possible to emulate those accesses in userspace,
63 * but userspace can really only figure out the end frequency.
64 * We could decompose that into the factors that compute it, but
65 * that's tricky math, and it's easier to just report the real
66 * CPR0 values.
67 */
68 switch (dcrn) {
69 case DCRN_CPR0_CONFIG_ADDR:
70 kvmppc_set_gpr(vcpu, rt, vcpu->arch.cpr0_cfgaddr);
71 break;
72 case DCRN_CPR0_CONFIG_DATA:
73 local_irq_disable();
74 mtdcr(DCRN_CPR0_CONFIG_ADDR,
75 vcpu->arch.cpr0_cfgaddr);
76 kvmppc_set_gpr(vcpu, rt,
77 mfdcr(DCRN_CPR0_CONFIG_DATA));
78 local_irq_enable();
79 break;
80 default:
81 vcpu->run->dcr.dcrn = dcrn;
82 vcpu->run->dcr.data = 0;
83 vcpu->run->dcr.is_write = 0;
Alexander Grafe43a0282012-10-06 03:56:35 +020084 vcpu->arch.dcr_is_write = 0;
Alexander Grafceb985f2012-08-16 00:34:58 +020085 vcpu->arch.io_gpr = rt;
86 vcpu->arch.dcr_needed = 1;
87 kvmppc_account_exit(vcpu, DCR_EXITS);
88 return EMULATE_DO_DCR;
89 }
90
91 return EMULATE_DONE;
92}
93
Hollis Blanchard75f74f02008-11-05 09:36:16 -060094int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
95 unsigned int inst, int *advance)
96{
97 int emulated = EMULATE_DONE;
Alexander Grafc46dc9a2012-05-04 14:01:33 +020098 int dcrn = get_dcrn(inst);
99 int ra = get_ra(inst);
100 int rb = get_rb(inst);
101 int rc = get_rc(inst);
102 int rs = get_rs(inst);
103 int rt = get_rt(inst);
104 int ws = get_ws(inst);
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600105
106 switch (get_op(inst)) {
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600107 case 31:
108 switch (get_xop(inst)) {
109
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600110 case XOP_MFDCR:
Alexander Grafceb985f2012-08-16 00:34:58 +0200111 emulated = emulate_mfdcr(vcpu, rt, dcrn);
112 break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600113
Alexander Grafceb985f2012-08-16 00:34:58 +0200114 case XOP_MFDCRX:
115 emulated = emulate_mfdcr(vcpu, rt,
116 kvmppc_get_gpr(vcpu, ra));
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600117 break;
118
119 case XOP_MTDCR:
Alexander Grafe4dcfe82012-08-16 00:28:09 +0200120 emulated = emulate_mtdcr(vcpu, rs, dcrn);
121 break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600122
Alexander Grafe4dcfe82012-08-16 00:28:09 +0200123 case XOP_MTDCRX:
124 emulated = emulate_mtdcr(vcpu, rs,
125 kvmppc_get_gpr(vcpu, ra));
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600126 break;
127
128 case XOP_TLBWE:
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600129 emulated = kvmppc_44x_emul_tlbwe(vcpu, ra, rs, ws);
130 break;
131
132 case XOP_TLBSX:
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600133 emulated = kvmppc_44x_emul_tlbsx(vcpu, rt, ra, rb, rc);
134 break;
135
136 case XOP_ICCCI:
137 break;
138
139 default:
140 emulated = EMULATE_FAIL;
141 }
142
143 break;
144
145 default:
146 emulated = EMULATE_FAIL;
147 }
148
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600149 if (emulated == EMULATE_FAIL)
150 emulated = kvmppc_booke_emulate_op(run, vcpu, inst, advance);
151
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600152 return emulated;
153}
154
Alexander Graf54771e62012-05-04 14:55:12 +0200155int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600156{
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600157 int emulated = EMULATE_DONE;
158
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600159 switch (sprn) {
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600160 case SPRN_PID:
Alexander Graf54771e62012-05-04 14:55:12 +0200161 kvmppc_set_pid(vcpu, spr_val); break;
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600162 case SPRN_MMUCR:
Alexander Graf54771e62012-05-04 14:55:12 +0200163 vcpu->arch.mmucr = spr_val; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600164 case SPRN_CCR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200165 vcpu->arch.ccr0 = spr_val; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600166 case SPRN_CCR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200167 vcpu->arch.ccr1 = spr_val; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600168 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200169 emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, spr_val);
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600170 }
171
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600172 return emulated;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600173}
174
Alexander Graf54771e62012-05-04 14:55:12 +0200175int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600176{
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600177 int emulated = EMULATE_DONE;
178
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600179 switch (sprn) {
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600180 case SPRN_PID:
Alexander Graf54771e62012-05-04 14:55:12 +0200181 *spr_val = vcpu->arch.pid; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600182 case SPRN_MMUCR:
Alexander Graf54771e62012-05-04 14:55:12 +0200183 *spr_val = vcpu->arch.mmucr; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600184 case SPRN_CCR0:
Alexander Graf54771e62012-05-04 14:55:12 +0200185 *spr_val = vcpu->arch.ccr0; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600186 case SPRN_CCR1:
Alexander Graf54771e62012-05-04 14:55:12 +0200187 *spr_val = vcpu->arch.ccr1; break;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600188 default:
Alexander Graf54771e62012-05-04 14:55:12 +0200189 emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, spr_val);
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600190 }
191
Hollis Blanchardd0c7dc02009-01-03 16:23:06 -0600192 return emulated;
Hollis Blanchard75f74f02008-11-05 09:36:16 -0600193}
194