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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Paul Mundtb1fa8882010-05-24 10:55:59 +09002 * drivers/watchdog/shwdt.c
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * Watchdog driver for integrated watchdog in the SuperH processors.
5 *
Paul Mundt40968122012-05-10 14:21:15 +09006 * Copyright (C) 2001 - 2012 Paul Mundt <lethal@linux-sh.org>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * 14-Dec-2001 Matt Domsch <Matt_Domsch@dell.com>
14 * Added nowayout module option to override CONFIG_WATCHDOG_NOWAYOUT
15 *
16 * 19-Apr-2002 Rob Radez <rob@osinvestor.com>
17 * Added expect close support, made emulated timeout runtime changeable
18 * general cleanups, add some ioctls
19 */
Joe Perches27c766a2012-02-15 15:06:19 -080020
21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <linux/module.h>
24#include <linux/moduleparam.h>
Paul Mundt8f5585e2010-05-25 18:31:12 +090025#include <linux/platform_device.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#include <linux/init.h>
27#include <linux/types.h>
Paul Mundtf9fb3602012-05-10 15:15:08 +090028#include <linux/spinlock.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070029#include <linux/watchdog.h>
Paul Mundt8c013d962012-05-10 16:08:35 +090030#include <linux/pm_runtime.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include <linux/fs.h>
Paul Mundtf1184202006-09-27 17:53:59 +090032#include <linux/mm.h>
Paul Mundt8f5585e2010-05-25 18:31:12 +090033#include <linux/slab.h>
Alan Cox70b814e2008-05-19 14:08:55 +010034#include <linux/io.h>
Paul Mundt9ea64042012-05-10 15:46:48 +090035#include <linux/clk.h>
Sachin Kamat6330c702013-03-04 10:36:41 +053036#include <linux/err.h>
Adrian Bunk58cf4192008-08-08 18:39:11 +030037#include <asm/watchdog.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
Paul Mundt8f5585e2010-05-25 18:31:12 +090039#define DRV_NAME "sh-wdt"
Linus Torvalds1da177e2005-04-16 15:20:36 -070040
41/*
42 * Default clock division ratio is 5.25 msecs. For an additional table of
43 * values, consult the asm-sh/watchdog.h. Overload this at module load
44 * time.
45 *
46 * In order for this to work reliably we need to have HZ set to 1000 or
47 * something quite higher than 100 (or we need a proper high-res timer
48 * implementation that will deal with this properly), otherwise the 10ms
49 * resolution of a jiffy is enough to trigger the overflow. For things like
50 * the SH-4 and SH-5, this isn't necessarily that big of a problem, though
51 * for the SH-2 and SH-3, this isn't recommended unless the WDT is absolutely
52 * necssary.
53 *
54 * As a result of this timing problem, the only modes that are particularly
Lucas De Marchi25985ed2011-03-30 22:57:33 -030055 * feasible are the 4096 and the 2048 divisors, which yield 5.25 and 2.62ms
Linus Torvalds1da177e2005-04-16 15:20:36 -070056 * overflow periods respectively.
57 *
58 * Also, since we can't really expect userspace to be responsive enough
Joe Perchesee0fc092008-02-03 17:32:52 +020059 * before the overflow happens, we maintain two separate timers .. One in
Linus Torvalds1da177e2005-04-16 15:20:36 -070060 * the kernel for clearing out WOVF every 2ms or so (again, this depends on
61 * HZ == 1000), and another for monitoring userspace writes to the WDT device.
62 *
63 * As such, we currently use a configurable heartbeat interval which defaults
64 * to 30s. In this case, the userspace daemon is only responsible for periodic
65 * writes to the device before the next heartbeat is scheduled. If the daemon
66 * misses its deadline, the kernel timer will allow the WDT to overflow.
67 */
68static int clock_division_ratio = WTCSR_CKS_4096;
David Engrafbea19062011-07-20 15:03:39 +020069#define next_ping_period(cks) (jiffies + msecs_to_jiffies(cks - 4))
Linus Torvalds1da177e2005-04-16 15:20:36 -070070
Linus Torvalds1da177e2005-04-16 15:20:36 -070071#define WATCHDOG_HEARTBEAT 30 /* 30 sec default heartbeat */
72static int heartbeat = WATCHDOG_HEARTBEAT; /* in seconds */
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +010073static bool nowayout = WATCHDOG_NOWAYOUT;
Paul Mundt8f5585e2010-05-25 18:31:12 +090074static unsigned long next_heartbeat;
Linus Torvalds1da177e2005-04-16 15:20:36 -070075
Paul Mundt8f5585e2010-05-25 18:31:12 +090076struct sh_wdt {
77 void __iomem *base;
78 struct device *dev;
Paul Mundt9ea64042012-05-10 15:46:48 +090079 struct clk *clk;
Paul Mundtf9fb3602012-05-10 15:15:08 +090080 spinlock_t lock;
Paul Mundt8f5585e2010-05-25 18:31:12 +090081
82 struct timer_list timer;
Paul Mundt8f5585e2010-05-25 18:31:12 +090083};
84
Paul Mundt1950f492012-05-10 15:07:53 +090085static int sh_wdt_start(struct watchdog_device *wdt_dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -070086{
Paul Mundt1950f492012-05-10 15:07:53 +090087 struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
Alan Cox70b814e2008-05-19 14:08:55 +010088 unsigned long flags;
Paul Mundt8f5585e2010-05-25 18:31:12 +090089 u8 csr;
Alan Cox70b814e2008-05-19 14:08:55 +010090
Paul Mundt8c013d962012-05-10 16:08:35 +090091 pm_runtime_get_sync(wdt->dev);
Paul Mundtd42c9742012-05-10 16:14:40 +090092 clk_enable(wdt->clk);
Paul Mundt8c013d962012-05-10 16:08:35 +090093
Paul Mundtf9fb3602012-05-10 15:15:08 +090094 spin_lock_irqsave(&wdt->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070095
96 next_heartbeat = jiffies + (heartbeat * HZ);
Paul Mundt8f5585e2010-05-25 18:31:12 +090097 mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
Linus Torvalds1da177e2005-04-16 15:20:36 -070098
99 csr = sh_wdt_read_csr();
100 csr |= WTCSR_WT | clock_division_ratio;
101 sh_wdt_write_csr(csr);
102
103 sh_wdt_write_cnt(0);
104
105 /*
106 * These processors have a bit of an inconsistent initialization
107 * process.. starting with SH-3, RSTS was moved to WTCSR, and the
108 * RSTCSR register was removed.
109 *
110 * On the SH-2 however, in addition with bits being in different
111 * locations, we must deal with RSTCSR outright..
112 */
113 csr = sh_wdt_read_csr();
114 csr |= WTCSR_TME;
115 csr &= ~WTCSR_RSTS;
116 sh_wdt_write_csr(csr);
117
118#ifdef CONFIG_CPU_SH2
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119 csr = sh_wdt_read_rstcsr();
120 csr &= ~RSTCSR_RSTS;
121 sh_wdt_write_rstcsr(csr);
122#endif
Paul Mundtf9fb3602012-05-10 15:15:08 +0900123 spin_unlock_irqrestore(&wdt->lock, flags);
Paul Mundt1950f492012-05-10 15:07:53 +0900124
125 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700126}
127
Paul Mundt1950f492012-05-10 15:07:53 +0900128static int sh_wdt_stop(struct watchdog_device *wdt_dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129{
Paul Mundt1950f492012-05-10 15:07:53 +0900130 struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
Alan Cox70b814e2008-05-19 14:08:55 +0100131 unsigned long flags;
Paul Mundt8f5585e2010-05-25 18:31:12 +0900132 u8 csr;
Alan Cox70b814e2008-05-19 14:08:55 +0100133
Paul Mundtf9fb3602012-05-10 15:15:08 +0900134 spin_lock_irqsave(&wdt->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700135
Paul Mundt8f5585e2010-05-25 18:31:12 +0900136 del_timer(&wdt->timer);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700137
138 csr = sh_wdt_read_csr();
139 csr &= ~WTCSR_TME;
140 sh_wdt_write_csr(csr);
Paul Mundt8f5585e2010-05-25 18:31:12 +0900141
Paul Mundtf9fb3602012-05-10 15:15:08 +0900142 spin_unlock_irqrestore(&wdt->lock, flags);
Paul Mundt1950f492012-05-10 15:07:53 +0900143
Paul Mundtd42c9742012-05-10 16:14:40 +0900144 clk_disable(wdt->clk);
Paul Mundt8c013d962012-05-10 16:08:35 +0900145 pm_runtime_put_sync(wdt->dev);
146
Paul Mundt1950f492012-05-10 15:07:53 +0900147 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148}
149
Paul Mundt1950f492012-05-10 15:07:53 +0900150static int sh_wdt_keepalive(struct watchdog_device *wdt_dev)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151{
Paul Mundtf9fb3602012-05-10 15:15:08 +0900152 struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
Alan Cox70b814e2008-05-19 14:08:55 +0100153 unsigned long flags;
154
Paul Mundtf9fb3602012-05-10 15:15:08 +0900155 spin_lock_irqsave(&wdt->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156 next_heartbeat = jiffies + (heartbeat * HZ);
Paul Mundtf9fb3602012-05-10 15:15:08 +0900157 spin_unlock_irqrestore(&wdt->lock, flags);
Paul Mundt1950f492012-05-10 15:07:53 +0900158
159 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160}
161
Paul Mundt1950f492012-05-10 15:07:53 +0900162static int sh_wdt_set_heartbeat(struct watchdog_device *wdt_dev, unsigned t)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700163{
Paul Mundtf9fb3602012-05-10 15:15:08 +0900164 struct sh_wdt *wdt = watchdog_get_drvdata(wdt_dev);
Alan Cox70b814e2008-05-19 14:08:55 +0100165 unsigned long flags;
166
167 if (unlikely(t < 1 || t > 3600)) /* arbitrary upper limit */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 return -EINVAL;
169
Paul Mundtf9fb3602012-05-10 15:15:08 +0900170 spin_lock_irqsave(&wdt->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 heartbeat = t;
Paul Mundt1950f492012-05-10 15:07:53 +0900172 wdt_dev->timeout = t;
Paul Mundtf9fb3602012-05-10 15:15:08 +0900173 spin_unlock_irqrestore(&wdt->lock, flags);
Paul Mundt1950f492012-05-10 15:07:53 +0900174
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175 return 0;
176}
177
Linus Torvalds1da177e2005-04-16 15:20:36 -0700178static void sh_wdt_ping(unsigned long data)
179{
Paul Mundt8f5585e2010-05-25 18:31:12 +0900180 struct sh_wdt *wdt = (struct sh_wdt *)data;
Alan Cox70b814e2008-05-19 14:08:55 +0100181 unsigned long flags;
182
Paul Mundtf9fb3602012-05-10 15:15:08 +0900183 spin_lock_irqsave(&wdt->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184 if (time_before(jiffies, next_heartbeat)) {
Paul Mundt8f5585e2010-05-25 18:31:12 +0900185 u8 csr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700186
187 csr = sh_wdt_read_csr();
188 csr &= ~WTCSR_IOVF;
189 sh_wdt_write_csr(csr);
190
191 sh_wdt_write_cnt(0);
192
Paul Mundt8f5585e2010-05-25 18:31:12 +0900193 mod_timer(&wdt->timer, next_ping_period(clock_division_ratio));
Paul Mundte4c2cfe2006-09-27 12:31:01 +0900194 } else
Paul Mundt8f5585e2010-05-25 18:31:12 +0900195 dev_warn(wdt->dev, "Heartbeat lost! Will not ping "
196 "the watchdog\n");
Paul Mundtf9fb3602012-05-10 15:15:08 +0900197 spin_unlock_irqrestore(&wdt->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700198}
199
Alan Cox70b814e2008-05-19 14:08:55 +0100200static const struct watchdog_info sh_wdt_info = {
Paul Mundte4c2cfe2006-09-27 12:31:01 +0900201 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT |
202 WDIOF_MAGICCLOSE,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700203 .firmware_version = 1,
204 .identity = "SH WDT",
205};
206
Paul Mundt1950f492012-05-10 15:07:53 +0900207static const struct watchdog_ops sh_wdt_ops = {
208 .owner = THIS_MODULE,
209 .start = sh_wdt_start,
210 .stop = sh_wdt_stop,
211 .ping = sh_wdt_keepalive,
212 .set_timeout = sh_wdt_set_heartbeat,
213};
214
215static struct watchdog_device sh_wdt_dev = {
216 .info = &sh_wdt_info,
217 .ops = &sh_wdt_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218};
219
Bill Pemberton2d991a12012-11-19 13:21:41 -0500220static int sh_wdt_probe(struct platform_device *pdev)
Paul Mundt8f5585e2010-05-25 18:31:12 +0900221{
222 struct sh_wdt *wdt;
223 struct resource *res;
224 int rc;
225
226 /*
227 * As this driver only covers the global watchdog case, reject
228 * any attempts to register per-CPU watchdogs.
229 */
230 if (pdev->id != -1)
231 return -EINVAL;
232
233 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
234 if (unlikely(!res))
235 return -EINVAL;
236
Paul Mundt8f5585e2010-05-25 18:31:12 +0900237 wdt = devm_kzalloc(&pdev->dev, sizeof(struct sh_wdt), GFP_KERNEL);
Paul Mundt9ea64042012-05-10 15:46:48 +0900238 if (unlikely(!wdt))
239 return -ENOMEM;
Paul Mundt8f5585e2010-05-25 18:31:12 +0900240
241 wdt->dev = &pdev->dev;
242
Jingoo Han2f7b9b42013-04-29 18:16:33 +0900243 wdt->clk = devm_clk_get(&pdev->dev, NULL);
Paul Mundt9ea64042012-05-10 15:46:48 +0900244 if (IS_ERR(wdt->clk)) {
245 /*
246 * Clock framework support is optional, continue on
247 * anyways if we don't find a matching clock.
248 */
249 wdt->clk = NULL;
250 }
251
Sachin Kamat6330c702013-03-04 10:36:41 +0530252 wdt->base = devm_ioremap_resource(wdt->dev, res);
Jingoo Han2f7b9b42013-04-29 18:16:33 +0900253 if (IS_ERR(wdt->base))
254 return PTR_ERR(wdt->base);
Paul Mundt9ea64042012-05-10 15:46:48 +0900255
Paul Mundtf9fb3602012-05-10 15:15:08 +0900256 watchdog_set_nowayout(&sh_wdt_dev, nowayout);
257 watchdog_set_drvdata(&sh_wdt_dev, wdt);
258
Paul Mundtf9fb3602012-05-10 15:15:08 +0900259 spin_lock_init(&wdt->lock);
260
Paul Mundt1950f492012-05-10 15:07:53 +0900261 rc = sh_wdt_set_heartbeat(&sh_wdt_dev, heartbeat);
Paul Mundt8f5585e2010-05-25 18:31:12 +0900262 if (unlikely(rc)) {
Paul Mundt1950f492012-05-10 15:07:53 +0900263 /* Default timeout if invalid */
264 sh_wdt_set_heartbeat(&sh_wdt_dev, WATCHDOG_HEARTBEAT);
265
266 dev_warn(&pdev->dev,
267 "heartbeat value must be 1<=x<=3600, using %d\n",
268 sh_wdt_dev.timeout);
269 }
270
271 dev_info(&pdev->dev, "configured with heartbeat=%d sec (nowayout=%d)\n",
272 sh_wdt_dev.timeout, nowayout);
273
Paul Mundt1950f492012-05-10 15:07:53 +0900274 rc = watchdog_register_device(&sh_wdt_dev);
275 if (unlikely(rc)) {
276 dev_err(&pdev->dev, "Can't register watchdog (err=%d)\n", rc);
Jingoo Han2f7b9b42013-04-29 18:16:33 +0900277 return rc;
Paul Mundt8f5585e2010-05-25 18:31:12 +0900278 }
279
280 init_timer(&wdt->timer);
281 wdt->timer.function = sh_wdt_ping;
282 wdt->timer.data = (unsigned long)wdt;
283 wdt->timer.expires = next_ping_period(clock_division_ratio);
284
285 platform_set_drvdata(pdev, wdt);
Paul Mundt8f5585e2010-05-25 18:31:12 +0900286
287 dev_info(&pdev->dev, "initialized.\n");
288
Paul Mundt8c013d962012-05-10 16:08:35 +0900289 pm_runtime_enable(&pdev->dev);
290
Paul Mundt8f5585e2010-05-25 18:31:12 +0900291 return 0;
Paul Mundt8f5585e2010-05-25 18:31:12 +0900292}
293
Bill Pemberton4b12b892012-11-19 13:26:24 -0500294static int sh_wdt_remove(struct platform_device *pdev)
Paul Mundt8f5585e2010-05-25 18:31:12 +0900295{
Paul Mundt1950f492012-05-10 15:07:53 +0900296 watchdog_unregister_device(&sh_wdt_dev);
Paul Mundt8f5585e2010-05-25 18:31:12 +0900297
Paul Mundt8c013d962012-05-10 16:08:35 +0900298 pm_runtime_disable(&pdev->dev);
Paul Mundt8f5585e2010-05-25 18:31:12 +0900299
300 return 0;
301}
302
Paul Mundt40968122012-05-10 14:21:15 +0900303static void sh_wdt_shutdown(struct platform_device *pdev)
304{
Paul Mundt1950f492012-05-10 15:07:53 +0900305 sh_wdt_stop(&sh_wdt_dev);
Paul Mundt40968122012-05-10 14:21:15 +0900306}
307
Paul Mundt8f5585e2010-05-25 18:31:12 +0900308static struct platform_driver sh_wdt_driver = {
309 .driver = {
310 .name = DRV_NAME,
311 .owner = THIS_MODULE,
312 },
313
Paul Mundt40968122012-05-10 14:21:15 +0900314 .probe = sh_wdt_probe,
Bill Pemberton82268712012-11-19 13:21:12 -0500315 .remove = sh_wdt_remove,
Paul Mundt40968122012-05-10 14:21:15 +0900316 .shutdown = sh_wdt_shutdown,
Paul Mundt8f5585e2010-05-25 18:31:12 +0900317};
318
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319static int __init sh_wdt_init(void)
320{
Paul Mundt8f5585e2010-05-25 18:31:12 +0900321 if (unlikely(clock_division_ratio < 0x5 ||
322 clock_division_ratio > 0x7)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 clock_division_ratio = WTCSR_CKS_4096;
Paul Mundt8f5585e2010-05-25 18:31:12 +0900324
Joe Perches27c766a2012-02-15 15:06:19 -0800325 pr_info("divisor must be 0x5<=x<=0x7, using %d\n",
326 clock_division_ratio);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327 }
328
Paul Mundt8f5585e2010-05-25 18:31:12 +0900329 return platform_driver_register(&sh_wdt_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700330}
331
Linus Torvalds1da177e2005-04-16 15:20:36 -0700332static void __exit sh_wdt_exit(void)
333{
Paul Mundt8f5585e2010-05-25 18:31:12 +0900334 platform_driver_unregister(&sh_wdt_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700335}
Paul Mundt8f5585e2010-05-25 18:31:12 +0900336module_init(sh_wdt_init);
337module_exit(sh_wdt_exit);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700338
339MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>");
340MODULE_DESCRIPTION("SuperH watchdog driver");
341MODULE_LICENSE("GPL");
Paul Mundt8f5585e2010-05-25 18:31:12 +0900342MODULE_ALIAS("platform:" DRV_NAME);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700343
344module_param(clock_division_ratio, int, 0);
Wim Van Sebroecka77dba72009-04-14 20:20:07 +0000345MODULE_PARM_DESC(clock_division_ratio,
346 "Clock division ratio. Valid ranges are from 0x5 (1.31ms) "
Randy Dunlap76550d32010-05-01 09:46:15 -0700347 "to 0x7 (5.25ms). (default=" __MODULE_STRING(WTCSR_CKS_4096) ")");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700348
349module_param(heartbeat, int, 0);
Alan Cox70b814e2008-05-19 14:08:55 +0100350MODULE_PARM_DESC(heartbeat,
351 "Watchdog heartbeat in seconds. (1 <= heartbeat <= 3600, default="
352 __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700353
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +0100354module_param(nowayout, bool, 0);
Alan Cox70b814e2008-05-19 14:08:55 +0100355MODULE_PARM_DESC(nowayout,
356 "Watchdog cannot be stopped once started (default="
357 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");