Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* linux/drivers/mtd/nand/s3c2410.c |
| 2 | * |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 3 | * Copyright (c) 2004,2005 Simtec Electronics |
Ben Dooks | fdf2fd5 | 2005-02-18 14:46:15 +0000 | [diff] [blame] | 4 | * http://www.simtec.co.uk/products/SWLINUX/ |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 7 | * Samsung S3C2410/S3C240 NAND driver |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 8 | * |
| 9 | * Changelog: |
| 10 | * 21-Sep-2004 BJD Initial version |
| 11 | * 23-Sep-2004 BJD Mulitple device support |
| 12 | * 28-Sep-2004 BJD Fixed ECC placement for Hardware mode |
| 13 | * 12-Oct-2004 BJD Fixed errors in use of platform data |
Ben Dooks | 3e4ef3b | 2005-03-17 11:31:30 +0000 | [diff] [blame] | 14 | * 18-Feb-2005 BJD Fix sparse errors |
| 15 | * 14-Mar-2005 BJD Applied tglx's code reduction patch |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 16 | * 02-May-2005 BJD Fixed s3c2440 support |
| 17 | * 02-May-2005 BJD Reduced hwcontrol decode |
| 18 | * 20-Jun-2005 BJD Updated s3c2440 support, fixed timing bug |
Ben Dooks | fb8d82a | 2005-07-06 21:05:10 +0100 | [diff] [blame] | 19 | * 08-Jul-2005 BJD Fix OOPS when no platform data supplied |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 20 | * 20-Oct-2005 BJD Fix timing calculation bug |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 21 | * 14-Jan-2006 BJD Allow clock to be stopped when idle |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | * |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 23 | * $Id: s3c2410.c,v 1.23 2006/04/01 18:06:29 bjd Exp $ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | * |
| 25 | * This program is free software; you can redistribute it and/or modify |
| 26 | * it under the terms of the GNU General Public License as published by |
| 27 | * the Free Software Foundation; either version 2 of the License, or |
| 28 | * (at your option) any later version. |
| 29 | * |
| 30 | * This program is distributed in the hope that it will be useful, |
| 31 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 32 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 33 | * GNU General Public License for more details. |
| 34 | * |
| 35 | * You should have received a copy of the GNU General Public License |
| 36 | * along with this program; if not, write to the Free Software |
| 37 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 38 | */ |
| 39 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 40 | #ifdef CONFIG_MTD_NAND_S3C2410_DEBUG |
| 41 | #define DEBUG |
| 42 | #endif |
| 43 | |
| 44 | #include <linux/module.h> |
| 45 | #include <linux/types.h> |
| 46 | #include <linux/init.h> |
| 47 | #include <linux/kernel.h> |
| 48 | #include <linux/string.h> |
| 49 | #include <linux/ioport.h> |
Russell King | d052d1b | 2005-10-29 19:07:23 +0100 | [diff] [blame] | 50 | #include <linux/platform_device.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | #include <linux/delay.h> |
| 52 | #include <linux/err.h> |
Tim Schmielau | 4e57b68 | 2005-10-30 15:03:48 -0800 | [diff] [blame] | 53 | #include <linux/slab.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 54 | #include <linux/clk.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 55 | |
| 56 | #include <linux/mtd/mtd.h> |
| 57 | #include <linux/mtd/nand.h> |
| 58 | #include <linux/mtd/nand_ecc.h> |
| 59 | #include <linux/mtd/partitions.h> |
| 60 | |
| 61 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 62 | |
Ben Dooks | b7a7018 | 2007-07-24 13:37:27 +0100 | [diff] [blame] | 63 | #include <asm/plat-s3c/regs-nand.h> |
| 64 | #include <asm/plat-s3c/nand.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | #ifdef CONFIG_MTD_NAND_S3C2410_HWECC |
| 67 | static int hardware_ecc = 1; |
| 68 | #else |
| 69 | static int hardware_ecc = 0; |
| 70 | #endif |
| 71 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 72 | #ifdef CONFIG_MTD_NAND_S3C2410_CLKSTOP |
| 73 | static int clock_stop = 1; |
| 74 | #else |
| 75 | static const int clock_stop = 0; |
| 76 | #endif |
| 77 | |
| 78 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | /* new oob placement block for use with hardware ecc generation |
| 80 | */ |
| 81 | |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 82 | static struct nand_ecclayout nand_hw_eccoob = { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 83 | .eccbytes = 3, |
| 84 | .eccpos = {0, 1, 2}, |
| 85 | .oobfree = {{8, 8}} |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | }; |
| 87 | |
| 88 | /* controller and mtd information */ |
| 89 | |
| 90 | struct s3c2410_nand_info; |
| 91 | |
| 92 | struct s3c2410_nand_mtd { |
| 93 | struct mtd_info mtd; |
| 94 | struct nand_chip chip; |
| 95 | struct s3c2410_nand_set *set; |
| 96 | struct s3c2410_nand_info *info; |
| 97 | int scan_res; |
| 98 | }; |
| 99 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 100 | enum s3c_cpu_type { |
| 101 | TYPE_S3C2410, |
| 102 | TYPE_S3C2412, |
| 103 | TYPE_S3C2440, |
| 104 | }; |
| 105 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | /* overview of the s3c2410 nand state */ |
| 107 | |
| 108 | struct s3c2410_nand_info { |
| 109 | /* mtd info */ |
| 110 | struct nand_hw_control controller; |
| 111 | struct s3c2410_nand_mtd *mtds; |
| 112 | struct s3c2410_platform_nand *platform; |
| 113 | |
| 114 | /* device info */ |
| 115 | struct device *device; |
| 116 | struct resource *area; |
| 117 | struct clk *clk; |
Ben Dooks | fdf2fd5 | 2005-02-18 14:46:15 +0000 | [diff] [blame] | 118 | void __iomem *regs; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 119 | void __iomem *sel_reg; |
| 120 | int sel_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | int mtd_count; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 122 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 123 | enum s3c_cpu_type cpu_type; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | }; |
| 125 | |
| 126 | /* conversion functions */ |
| 127 | |
| 128 | static struct s3c2410_nand_mtd *s3c2410_nand_mtd_toours(struct mtd_info *mtd) |
| 129 | { |
| 130 | return container_of(mtd, struct s3c2410_nand_mtd, mtd); |
| 131 | } |
| 132 | |
| 133 | static struct s3c2410_nand_info *s3c2410_nand_mtd_toinfo(struct mtd_info *mtd) |
| 134 | { |
| 135 | return s3c2410_nand_mtd_toours(mtd)->info; |
| 136 | } |
| 137 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 138 | static struct s3c2410_nand_info *to_nand_info(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 140 | return platform_get_drvdata(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 141 | } |
| 142 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 143 | static struct s3c2410_platform_nand *to_nand_plat(struct platform_device *dev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 144 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 145 | return dev->dev.platform_data; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 146 | } |
| 147 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 148 | static inline int allow_clk_stop(struct s3c2410_nand_info *info) |
| 149 | { |
| 150 | return clock_stop; |
| 151 | } |
| 152 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 153 | /* timing calculations */ |
| 154 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 155 | #define NS_IN_KHZ 1000000 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 156 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 157 | static int s3c_nand_calc_rate(int wanted, unsigned long clk, int max) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 158 | { |
| 159 | int result; |
| 160 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 161 | result = (wanted * clk) / NS_IN_KHZ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | result++; |
| 163 | |
| 164 | pr_debug("result %d from %ld, %d\n", result, clk, wanted); |
| 165 | |
| 166 | if (result > max) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 167 | printk("%d ns is too big for current clock rate %ld\n", wanted, clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 168 | return -1; |
| 169 | } |
| 170 | |
| 171 | if (result < 1) |
| 172 | result = 1; |
| 173 | |
| 174 | return result; |
| 175 | } |
| 176 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 177 | #define to_ns(ticks,clk) (((ticks) * NS_IN_KHZ) / (unsigned int)(clk)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | |
| 179 | /* controller setup */ |
| 180 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 181 | static int s3c2410_nand_inithw(struct s3c2410_nand_info *info, |
| 182 | struct platform_device *pdev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 183 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 184 | struct s3c2410_platform_nand *plat = to_nand_plat(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 185 | unsigned long clkrate = clk_get_rate(info->clk); |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 186 | int tacls_max = (info->cpu_type == TYPE_S3C2412) ? 8 : 4; |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 187 | int tacls, twrph0, twrph1; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 188 | unsigned long cfg = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 189 | |
| 190 | /* calculate the timing information for the controller */ |
| 191 | |
Ben Dooks | cfd320f | 2005-10-20 22:22:58 +0100 | [diff] [blame] | 192 | clkrate /= 1000; /* turn clock into kHz for ease of use */ |
| 193 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | if (plat != NULL) { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 195 | tacls = s3c_nand_calc_rate(plat->tacls, clkrate, tacls_max); |
| 196 | twrph0 = s3c_nand_calc_rate(plat->twrph0, clkrate, 8); |
| 197 | twrph1 = s3c_nand_calc_rate(plat->twrph1, clkrate, 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 198 | } else { |
| 199 | /* default timings */ |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 200 | tacls = tacls_max; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | twrph0 = 8; |
| 202 | twrph1 = 8; |
| 203 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 204 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 205 | if (tacls < 0 || twrph0 < 0 || twrph1 < 0) { |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 206 | dev_err(info->device, "cannot get suitable timings\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 207 | return -EINVAL; |
| 208 | } |
| 209 | |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 210 | dev_info(info->device, "Tacls=%d, %dns Twrph0=%d %dns, Twrph1=%d %dns\n", |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 211 | tacls, to_ns(tacls, clkrate), twrph0, to_ns(twrph0, clkrate), twrph1, to_ns(twrph1, clkrate)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 213 | switch (info->cpu_type) { |
| 214 | case TYPE_S3C2410: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 215 | cfg = S3C2410_NFCONF_EN; |
| 216 | cfg |= S3C2410_NFCONF_TACLS(tacls - 1); |
| 217 | cfg |= S3C2410_NFCONF_TWRPH0(twrph0 - 1); |
| 218 | cfg |= S3C2410_NFCONF_TWRPH1(twrph1 - 1); |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 219 | break; |
| 220 | |
| 221 | case TYPE_S3C2440: |
| 222 | case TYPE_S3C2412: |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 223 | cfg = S3C2440_NFCONF_TACLS(tacls - 1); |
| 224 | cfg |= S3C2440_NFCONF_TWRPH0(twrph0 - 1); |
| 225 | cfg |= S3C2440_NFCONF_TWRPH1(twrph1 - 1); |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 226 | |
| 227 | /* enable the controller and de-assert nFCE */ |
| 228 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 229 | writel(S3C2440_NFCONT_ENABLE, info->regs + S3C2440_NFCONT); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 230 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 231 | |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 232 | dev_dbg(info->device, "NF_CONF is 0x%lx\n", cfg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | |
| 234 | writel(cfg, info->regs + S3C2410_NFCONF); |
| 235 | return 0; |
| 236 | } |
| 237 | |
| 238 | /* select chip */ |
| 239 | |
| 240 | static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip) |
| 241 | { |
| 242 | struct s3c2410_nand_info *info; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 243 | struct s3c2410_nand_mtd *nmtd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 244 | struct nand_chip *this = mtd->priv; |
| 245 | unsigned long cur; |
| 246 | |
| 247 | nmtd = this->priv; |
| 248 | info = nmtd->info; |
| 249 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 250 | if (chip != -1 && allow_clk_stop(info)) |
| 251 | clk_enable(info->clk); |
| 252 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 253 | cur = readl(info->sel_reg); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | |
| 255 | if (chip == -1) { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 256 | cur |= info->sel_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 257 | } else { |
Ben Dooks | fb8d82a | 2005-07-06 21:05:10 +0100 | [diff] [blame] | 258 | if (nmtd->set != NULL && chip > nmtd->set->nr_chips) { |
Ben Dooks | 99974c6 | 2006-06-21 15:43:05 +0100 | [diff] [blame] | 259 | dev_err(info->device, "invalid chip %d\n", chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | return; |
| 261 | } |
| 262 | |
| 263 | if (info->platform != NULL) { |
| 264 | if (info->platform->select_chip != NULL) |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 265 | (info->platform->select_chip) (nmtd->set, chip); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 266 | } |
| 267 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 268 | cur &= ~info->sel_bit; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 269 | } |
| 270 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 271 | writel(cur, info->sel_reg); |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 272 | |
| 273 | if (chip == -1 && allow_clk_stop(info)) |
| 274 | clk_disable(info->clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 | } |
| 276 | |
Ben Dooks | ad3b5fb | 2006-06-19 09:43:23 +0100 | [diff] [blame] | 277 | /* s3c2410_nand_hwcontrol |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 278 | * |
Ben Dooks | ad3b5fb | 2006-06-19 09:43:23 +0100 | [diff] [blame] | 279 | * Issue command and address cycles to the chip |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 280 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 281 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 282 | static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd, |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 283 | unsigned int ctrl) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | { |
| 285 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
David Woodhouse | c9ac597 | 2006-11-30 08:17:38 +0000 | [diff] [blame] | 286 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 287 | if (cmd == NAND_CMD_NONE) |
| 288 | return; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 289 | |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 290 | if (ctrl & NAND_CLE) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 291 | writeb(cmd, info->regs + S3C2410_NFCMD); |
| 292 | else |
| 293 | writeb(cmd, info->regs + S3C2410_NFADDR); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 294 | } |
| 295 | |
| 296 | /* command and control functions */ |
| 297 | |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 298 | static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd, |
| 299 | unsigned int ctrl) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 300 | { |
| 301 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 302 | |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 303 | if (cmd == NAND_CMD_NONE) |
| 304 | return; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 305 | |
David Woodhouse | f906887 | 2006-06-10 00:53:16 +0100 | [diff] [blame] | 306 | if (ctrl & NAND_CLE) |
Thomas Gleixner | 7abd3ef | 2006-05-23 23:25:53 +0200 | [diff] [blame] | 307 | writeb(cmd, info->regs + S3C2440_NFCMD); |
| 308 | else |
| 309 | writeb(cmd, info->regs + S3C2440_NFADDR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | } |
| 311 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 312 | /* s3c2410_nand_devready() |
| 313 | * |
| 314 | * returns 0 if the nand is busy, 1 if it is ready |
| 315 | */ |
| 316 | |
| 317 | static int s3c2410_nand_devready(struct mtd_info *mtd) |
| 318 | { |
| 319 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | return readb(info->regs + S3C2410_NFSTAT) & S3C2410_NFSTAT_BUSY; |
| 321 | } |
| 322 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 323 | static int s3c2440_nand_devready(struct mtd_info *mtd) |
| 324 | { |
| 325 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 326 | return readb(info->regs + S3C2440_NFSTAT) & S3C2440_NFSTAT_READY; |
| 327 | } |
| 328 | |
| 329 | static int s3c2412_nand_devready(struct mtd_info *mtd) |
| 330 | { |
| 331 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 332 | return readb(info->regs + S3C2412_NFSTAT) & S3C2412_NFSTAT_READY; |
| 333 | } |
| 334 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 335 | /* ECC handling functions */ |
| 336 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 337 | static int s3c2410_nand_correct_data(struct mtd_info *mtd, u_char *dat, |
| 338 | u_char *read_ecc, u_char *calc_ecc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | { |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 340 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 341 | unsigned int diff0, diff1, diff2; |
| 342 | unsigned int bit, byte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 344 | pr_debug("%s(%p,%p,%p,%p)\n", __func__, mtd, dat, read_ecc, calc_ecc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 345 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 346 | diff0 = read_ecc[0] ^ calc_ecc[0]; |
| 347 | diff1 = read_ecc[1] ^ calc_ecc[1]; |
| 348 | diff2 = read_ecc[2] ^ calc_ecc[2]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 349 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 350 | pr_debug("%s: rd %02x%02x%02x calc %02x%02x%02x diff %02x%02x%02x\n", |
| 351 | __func__, |
| 352 | read_ecc[0], read_ecc[1], read_ecc[2], |
| 353 | calc_ecc[0], calc_ecc[1], calc_ecc[2], |
| 354 | diff0, diff1, diff2); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 356 | if (diff0 == 0 && diff1 == 0 && diff2 == 0) |
| 357 | return 0; /* ECC is ok */ |
| 358 | |
| 359 | /* Can we correct this ECC (ie, one row and column change). |
| 360 | * Note, this is similar to the 256 error code on smartmedia */ |
| 361 | |
| 362 | if (((diff0 ^ (diff0 >> 1)) & 0x55) == 0x55 && |
| 363 | ((diff1 ^ (diff1 >> 1)) & 0x55) == 0x55 && |
| 364 | ((diff2 ^ (diff2 >> 1)) & 0x55) == 0x55) { |
| 365 | /* calculate the bit position of the error */ |
| 366 | |
| 367 | bit = (diff2 >> 2) & 1; |
| 368 | bit |= (diff2 >> 3) & 2; |
| 369 | bit |= (diff2 >> 4) & 4; |
| 370 | |
| 371 | /* calculate the byte position of the error */ |
| 372 | |
| 373 | byte = (diff1 << 1) & 0x80; |
| 374 | byte |= (diff1 << 2) & 0x40; |
| 375 | byte |= (diff1 << 3) & 0x20; |
| 376 | byte |= (diff1 << 4) & 0x10; |
| 377 | |
| 378 | byte |= (diff0 >> 3) & 0x08; |
| 379 | byte |= (diff0 >> 2) & 0x04; |
| 380 | byte |= (diff0 >> 1) & 0x02; |
| 381 | byte |= (diff0 >> 0) & 0x01; |
| 382 | |
| 383 | byte |= (diff2 << 8) & 0x100; |
| 384 | |
| 385 | dev_dbg(info->device, "correcting error bit %d, byte %d\n", |
| 386 | bit, byte); |
| 387 | |
| 388 | dat[byte] ^= (1 << bit); |
| 389 | return 1; |
| 390 | } |
| 391 | |
| 392 | /* if there is only one bit difference in the ECC, then |
| 393 | * one of only a row or column parity has changed, which |
| 394 | * means the error is most probably in the ECC itself */ |
| 395 | |
| 396 | diff0 |= (diff1 << 8); |
| 397 | diff0 |= (diff2 << 16); |
| 398 | |
| 399 | if ((diff0 & ~(1<<fls(diff0))) == 0) |
| 400 | return 1; |
| 401 | |
| 402 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 403 | } |
| 404 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 405 | /* ECC functions |
| 406 | * |
| 407 | * These allow the s3c2410 and s3c2440 to use the controller's ECC |
| 408 | * generator block to ECC the data as it passes through] |
| 409 | */ |
| 410 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 411 | static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
| 412 | { |
| 413 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 414 | unsigned long ctrl; |
| 415 | |
| 416 | ctrl = readl(info->regs + S3C2410_NFCONF); |
| 417 | ctrl |= S3C2410_NFCONF_INITECC; |
| 418 | writel(ctrl, info->regs + S3C2410_NFCONF); |
| 419 | } |
| 420 | |
Matthieu CASTET | 4f65992 | 2007-02-13 12:30:38 +0100 | [diff] [blame] | 421 | static void s3c2412_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
| 422 | { |
| 423 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 424 | unsigned long ctrl; |
| 425 | |
| 426 | ctrl = readl(info->regs + S3C2440_NFCONT); |
| 427 | writel(ctrl | S3C2412_NFCONT_INIT_MAIN_ECC, info->regs + S3C2440_NFCONT); |
| 428 | } |
| 429 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 430 | static void s3c2440_nand_enable_hwecc(struct mtd_info *mtd, int mode) |
| 431 | { |
| 432 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 433 | unsigned long ctrl; |
| 434 | |
| 435 | ctrl = readl(info->regs + S3C2440_NFCONT); |
| 436 | writel(ctrl | S3C2440_NFCONT_INITECC, info->regs + S3C2440_NFCONT); |
| 437 | } |
| 438 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 439 | static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 440 | { |
| 441 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 442 | |
| 443 | ecc_code[0] = readb(info->regs + S3C2410_NFECC + 0); |
| 444 | ecc_code[1] = readb(info->regs + S3C2410_NFECC + 1); |
| 445 | ecc_code[2] = readb(info->regs + S3C2410_NFECC + 2); |
| 446 | |
Ben Dooks | a259324 | 2007-02-02 16:59:33 +0000 | [diff] [blame] | 447 | pr_debug("%s: returning ecc %02x%02x%02x\n", __func__, |
| 448 | ecc_code[0], ecc_code[1], ecc_code[2]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | |
| 450 | return 0; |
| 451 | } |
| 452 | |
Matthieu CASTET | 4f65992 | 2007-02-13 12:30:38 +0100 | [diff] [blame] | 453 | static int s3c2412_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
| 454 | { |
| 455 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 456 | unsigned long ecc = readl(info->regs + S3C2412_NFMECC0); |
| 457 | |
| 458 | ecc_code[0] = ecc; |
| 459 | ecc_code[1] = ecc >> 8; |
| 460 | ecc_code[2] = ecc >> 16; |
| 461 | |
| 462 | pr_debug("calculate_ecc: returning ecc %02x,%02x,%02x\n", ecc_code[0], ecc_code[1], ecc_code[2]); |
| 463 | |
| 464 | return 0; |
| 465 | } |
| 466 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 467 | static int s3c2440_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 468 | { |
| 469 | struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd); |
| 470 | unsigned long ecc = readl(info->regs + S3C2440_NFMECC0); |
| 471 | |
| 472 | ecc_code[0] = ecc; |
| 473 | ecc_code[1] = ecc >> 8; |
| 474 | ecc_code[2] = ecc >> 16; |
| 475 | |
Arnaud Patard | dff5e44 | 2007-02-23 01:00:09 +0100 | [diff] [blame] | 476 | pr_debug("%s: returning ecc %06lx\n", __func__, ecc); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 477 | |
| 478 | return 0; |
| 479 | } |
| 480 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 481 | /* over-ride the standard functions for a little more speed. We can |
| 482 | * use read/write block to move the data buffers to/from the controller |
| 483 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 484 | |
| 485 | static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) |
| 486 | { |
| 487 | struct nand_chip *this = mtd->priv; |
| 488 | readsb(this->IO_ADDR_R, buf, len); |
| 489 | } |
| 490 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 491 | static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | { |
| 493 | struct nand_chip *this = mtd->priv; |
| 494 | writesb(this->IO_ADDR_W, buf, len); |
| 495 | } |
| 496 | |
| 497 | /* device management functions */ |
| 498 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 499 | static int s3c2410_nand_remove(struct platform_device *pdev) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 500 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 501 | struct s3c2410_nand_info *info = to_nand_info(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 503 | platform_set_drvdata(pdev, NULL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 505 | if (info == NULL) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 506 | return 0; |
| 507 | |
| 508 | /* first thing we need to do is release all our mtds |
| 509 | * and their partitions, then go through freeing the |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 510 | * resources used |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 511 | */ |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 512 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 513 | if (info->mtds != NULL) { |
| 514 | struct s3c2410_nand_mtd *ptr = info->mtds; |
| 515 | int mtdno; |
| 516 | |
| 517 | for (mtdno = 0; mtdno < info->mtd_count; mtdno++, ptr++) { |
| 518 | pr_debug("releasing mtd %d (%p)\n", mtdno, ptr); |
| 519 | nand_release(&ptr->mtd); |
| 520 | } |
| 521 | |
| 522 | kfree(info->mtds); |
| 523 | } |
| 524 | |
| 525 | /* free the common resources */ |
| 526 | |
| 527 | if (info->clk != NULL && !IS_ERR(info->clk)) { |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 528 | if (!allow_clk_stop(info)) |
| 529 | clk_disable(info->clk); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 530 | clk_put(info->clk); |
| 531 | } |
| 532 | |
| 533 | if (info->regs != NULL) { |
| 534 | iounmap(info->regs); |
| 535 | info->regs = NULL; |
| 536 | } |
| 537 | |
| 538 | if (info->area != NULL) { |
| 539 | release_resource(info->area); |
| 540 | kfree(info->area); |
| 541 | info->area = NULL; |
| 542 | } |
| 543 | |
| 544 | kfree(info); |
| 545 | |
| 546 | return 0; |
| 547 | } |
| 548 | |
| 549 | #ifdef CONFIG_MTD_PARTITIONS |
| 550 | static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, |
| 551 | struct s3c2410_nand_mtd *mtd, |
| 552 | struct s3c2410_nand_set *set) |
| 553 | { |
| 554 | if (set == NULL) |
| 555 | return add_mtd_device(&mtd->mtd); |
| 556 | |
| 557 | if (set->nr_partitions > 0 && set->partitions != NULL) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 558 | return add_mtd_partitions(&mtd->mtd, set->partitions, set->nr_partitions); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 559 | } |
| 560 | |
| 561 | return add_mtd_device(&mtd->mtd); |
| 562 | } |
| 563 | #else |
| 564 | static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, |
| 565 | struct s3c2410_nand_mtd *mtd, |
| 566 | struct s3c2410_nand_set *set) |
| 567 | { |
| 568 | return add_mtd_device(&mtd->mtd); |
| 569 | } |
| 570 | #endif |
| 571 | |
| 572 | /* s3c2410_nand_init_chip |
| 573 | * |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 574 | * init a single instance of an chip |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 575 | */ |
| 576 | |
| 577 | static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, |
| 578 | struct s3c2410_nand_mtd *nmtd, |
| 579 | struct s3c2410_nand_set *set) |
| 580 | { |
| 581 | struct nand_chip *chip = &nmtd->chip; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 582 | void __iomem *regs = info->regs; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 584 | chip->write_buf = s3c2410_nand_write_buf; |
| 585 | chip->read_buf = s3c2410_nand_read_buf; |
| 586 | chip->select_chip = s3c2410_nand_select_chip; |
| 587 | chip->chip_delay = 50; |
| 588 | chip->priv = nmtd; |
| 589 | chip->options = 0; |
| 590 | chip->controller = &info->controller; |
| 591 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 592 | switch (info->cpu_type) { |
| 593 | case TYPE_S3C2410: |
| 594 | chip->IO_ADDR_W = regs + S3C2410_NFDATA; |
| 595 | info->sel_reg = regs + S3C2410_NFCONF; |
| 596 | info->sel_bit = S3C2410_NFCONF_nFCE; |
| 597 | chip->cmd_ctrl = s3c2410_nand_hwcontrol; |
| 598 | chip->dev_ready = s3c2410_nand_devready; |
| 599 | break; |
| 600 | |
| 601 | case TYPE_S3C2440: |
| 602 | chip->IO_ADDR_W = regs + S3C2440_NFDATA; |
| 603 | info->sel_reg = regs + S3C2440_NFCONT; |
| 604 | info->sel_bit = S3C2440_NFCONT_nFCE; |
| 605 | chip->cmd_ctrl = s3c2440_nand_hwcontrol; |
| 606 | chip->dev_ready = s3c2440_nand_devready; |
| 607 | break; |
| 608 | |
| 609 | case TYPE_S3C2412: |
| 610 | chip->IO_ADDR_W = regs + S3C2440_NFDATA; |
| 611 | info->sel_reg = regs + S3C2440_NFCONT; |
| 612 | info->sel_bit = S3C2412_NFCONT_nFCE0; |
| 613 | chip->cmd_ctrl = s3c2440_nand_hwcontrol; |
| 614 | chip->dev_ready = s3c2412_nand_devready; |
| 615 | |
| 616 | if (readl(regs + S3C2410_NFCONF) & S3C2412_NFCONF_NANDBOOT) |
| 617 | dev_info(info->device, "System booted from NAND\n"); |
| 618 | |
| 619 | break; |
| 620 | } |
| 621 | |
| 622 | chip->IO_ADDR_R = chip->IO_ADDR_W; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 623 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 624 | nmtd->info = info; |
| 625 | nmtd->mtd.priv = chip; |
David Woodhouse | 552d920 | 2006-05-14 01:20:46 +0100 | [diff] [blame] | 626 | nmtd->mtd.owner = THIS_MODULE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 627 | nmtd->set = set; |
| 628 | |
| 629 | if (hardware_ecc) { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 630 | chip->ecc.calculate = s3c2410_nand_calculate_ecc; |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 631 | chip->ecc.correct = s3c2410_nand_correct_data; |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 632 | chip->ecc.mode = NAND_ECC_HW; |
| 633 | chip->ecc.size = 512; |
| 634 | chip->ecc.bytes = 3; |
Thomas Gleixner | 5bd34c0 | 2006-05-27 22:16:10 +0200 | [diff] [blame] | 635 | chip->ecc.layout = &nand_hw_eccoob; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 636 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 637 | switch (info->cpu_type) { |
| 638 | case TYPE_S3C2410: |
| 639 | chip->ecc.hwctl = s3c2410_nand_enable_hwecc; |
| 640 | chip->ecc.calculate = s3c2410_nand_calculate_ecc; |
| 641 | break; |
| 642 | |
| 643 | case TYPE_S3C2412: |
Matthieu CASTET | 4f65992 | 2007-02-13 12:30:38 +0100 | [diff] [blame] | 644 | chip->ecc.hwctl = s3c2412_nand_enable_hwecc; |
| 645 | chip->ecc.calculate = s3c2412_nand_calculate_ecc; |
| 646 | break; |
| 647 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 648 | case TYPE_S3C2440: |
| 649 | chip->ecc.hwctl = s3c2440_nand_enable_hwecc; |
| 650 | chip->ecc.calculate = s3c2440_nand_calculate_ecc; |
| 651 | break; |
| 652 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 653 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 654 | } else { |
Thomas Gleixner | 6dfc6d2 | 2006-05-23 12:00:46 +0200 | [diff] [blame] | 655 | chip->ecc.mode = NAND_ECC_SOFT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 656 | } |
| 657 | } |
| 658 | |
| 659 | /* s3c2410_nand_probe |
| 660 | * |
| 661 | * called by device layer when it finds a device matching |
| 662 | * one our driver can handled. This code checks to see if |
| 663 | * it can allocate all necessary resources then calls the |
| 664 | * nand layer to look for devices |
| 665 | */ |
| 666 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 667 | static int s3c24xx_nand_probe(struct platform_device *pdev, |
| 668 | enum s3c_cpu_type cpu_type) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 669 | { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 670 | struct s3c2410_platform_nand *plat = to_nand_plat(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 671 | struct s3c2410_nand_info *info; |
| 672 | struct s3c2410_nand_mtd *nmtd; |
| 673 | struct s3c2410_nand_set *sets; |
| 674 | struct resource *res; |
| 675 | int err = 0; |
| 676 | int size; |
| 677 | int nr_sets; |
| 678 | int setno; |
| 679 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 680 | pr_debug("s3c2410_nand_probe(%p)\n", pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 681 | |
| 682 | info = kmalloc(sizeof(*info), GFP_KERNEL); |
| 683 | if (info == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 684 | dev_err(&pdev->dev, "no memory for flash info\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 685 | err = -ENOMEM; |
| 686 | goto exit_error; |
| 687 | } |
| 688 | |
| 689 | memzero(info, sizeof(*info)); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 690 | platform_set_drvdata(pdev, info); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 691 | |
| 692 | spin_lock_init(&info->controller.lock); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 693 | init_waitqueue_head(&info->controller.wq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | |
| 695 | /* get the clock source and enable it */ |
| 696 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 697 | info->clk = clk_get(&pdev->dev, "nand"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 698 | if (IS_ERR(info->clk)) { |
Joe Perches | 898eb71 | 2007-10-18 03:06:30 -0700 | [diff] [blame] | 699 | dev_err(&pdev->dev, "failed to get clock\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 700 | err = -ENOENT; |
| 701 | goto exit_error; |
| 702 | } |
| 703 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 704 | clk_enable(info->clk); |
| 705 | |
| 706 | /* allocate and map the resource */ |
| 707 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 708 | /* currently we assume we have the one resource */ |
| 709 | res = pdev->resource; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 710 | size = res->end - res->start + 1; |
| 711 | |
| 712 | info->area = request_mem_region(res->start, size, pdev->name); |
| 713 | |
| 714 | if (info->area == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 715 | dev_err(&pdev->dev, "cannot reserve register region\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 716 | err = -ENOENT; |
| 717 | goto exit_error; |
| 718 | } |
| 719 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 720 | info->device = &pdev->dev; |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 721 | info->platform = plat; |
| 722 | info->regs = ioremap(res->start, size); |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 723 | info->cpu_type = cpu_type; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 724 | |
| 725 | if (info->regs == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 726 | dev_err(&pdev->dev, "cannot reserve register region\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 727 | err = -EIO; |
| 728 | goto exit_error; |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 729 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 731 | dev_dbg(&pdev->dev, "mapped registers at %p\n", info->regs); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 732 | |
| 733 | /* initialise the hardware */ |
| 734 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 735 | err = s3c2410_nand_inithw(info, pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 736 | if (err != 0) |
| 737 | goto exit_error; |
| 738 | |
| 739 | sets = (plat != NULL) ? plat->sets : NULL; |
| 740 | nr_sets = (plat != NULL) ? plat->nr_sets : 1; |
| 741 | |
| 742 | info->mtd_count = nr_sets; |
| 743 | |
| 744 | /* allocate our information */ |
| 745 | |
| 746 | size = nr_sets * sizeof(*info->mtds); |
| 747 | info->mtds = kmalloc(size, GFP_KERNEL); |
| 748 | if (info->mtds == NULL) { |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 749 | dev_err(&pdev->dev, "failed to allocate mtd storage\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 750 | err = -ENOMEM; |
| 751 | goto exit_error; |
| 752 | } |
| 753 | |
| 754 | memzero(info->mtds, size); |
| 755 | |
| 756 | /* initialise all possible chips */ |
| 757 | |
| 758 | nmtd = info->mtds; |
| 759 | |
| 760 | for (setno = 0; setno < nr_sets; setno++, nmtd++) { |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 761 | pr_debug("initialising set %d (%p, info %p)\n", setno, nmtd, info); |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 762 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 763 | s3c2410_nand_init_chip(info, nmtd, sets); |
| 764 | |
David Woodhouse | e0c7d76 | 2006-05-13 18:07:53 +0100 | [diff] [blame] | 765 | nmtd->scan_res = nand_scan(&nmtd->mtd, (sets) ? sets->nr_chips : 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 766 | |
| 767 | if (nmtd->scan_res == 0) { |
| 768 | s3c2410_nand_add_partition(info, nmtd, sets); |
| 769 | } |
| 770 | |
| 771 | if (sets != NULL) |
| 772 | sets++; |
| 773 | } |
Thomas Gleixner | 61b03bd | 2005-11-07 11:15:49 +0000 | [diff] [blame] | 774 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 775 | if (allow_clk_stop(info)) { |
| 776 | dev_info(&pdev->dev, "clock idle support enabled\n"); |
| 777 | clk_disable(info->clk); |
| 778 | } |
| 779 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 780 | pr_debug("initialised ok\n"); |
| 781 | return 0; |
| 782 | |
| 783 | exit_error: |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 784 | s3c2410_nand_remove(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 785 | |
| 786 | if (err == 0) |
| 787 | err = -EINVAL; |
| 788 | return err; |
| 789 | } |
| 790 | |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 791 | /* PM Support */ |
| 792 | #ifdef CONFIG_PM |
| 793 | |
| 794 | static int s3c24xx_nand_suspend(struct platform_device *dev, pm_message_t pm) |
| 795 | { |
| 796 | struct s3c2410_nand_info *info = platform_get_drvdata(dev); |
| 797 | |
| 798 | if (info) { |
| 799 | if (!allow_clk_stop(info)) |
| 800 | clk_disable(info->clk); |
| 801 | } |
| 802 | |
| 803 | return 0; |
| 804 | } |
| 805 | |
| 806 | static int s3c24xx_nand_resume(struct platform_device *dev) |
| 807 | { |
| 808 | struct s3c2410_nand_info *info = platform_get_drvdata(dev); |
| 809 | |
| 810 | if (info) { |
| 811 | clk_enable(info->clk); |
| 812 | s3c2410_nand_inithw(info, dev); |
| 813 | |
| 814 | if (allow_clk_stop(info)) |
| 815 | clk_disable(info->clk); |
| 816 | } |
| 817 | |
| 818 | return 0; |
| 819 | } |
| 820 | |
| 821 | #else |
| 822 | #define s3c24xx_nand_suspend NULL |
| 823 | #define s3c24xx_nand_resume NULL |
| 824 | #endif |
| 825 | |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 826 | /* driver device registration */ |
| 827 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 828 | static int s3c2410_nand_probe(struct platform_device *dev) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 829 | { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 830 | return s3c24xx_nand_probe(dev, TYPE_S3C2410); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 831 | } |
| 832 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 833 | static int s3c2440_nand_probe(struct platform_device *dev) |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 834 | { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 835 | return s3c24xx_nand_probe(dev, TYPE_S3C2440); |
| 836 | } |
| 837 | |
| 838 | static int s3c2412_nand_probe(struct platform_device *dev) |
| 839 | { |
| 840 | return s3c24xx_nand_probe(dev, TYPE_S3C2412); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 841 | } |
| 842 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 843 | static struct platform_driver s3c2410_nand_driver = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 844 | .probe = s3c2410_nand_probe, |
| 845 | .remove = s3c2410_nand_remove, |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 846 | .suspend = s3c24xx_nand_suspend, |
| 847 | .resume = s3c24xx_nand_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 848 | .driver = { |
| 849 | .name = "s3c2410-nand", |
| 850 | .owner = THIS_MODULE, |
| 851 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 852 | }; |
| 853 | |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 854 | static struct platform_driver s3c2440_nand_driver = { |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 855 | .probe = s3c2440_nand_probe, |
| 856 | .remove = s3c2410_nand_remove, |
Ben Dooks | d1fef3c | 2006-06-19 09:29:38 +0100 | [diff] [blame] | 857 | .suspend = s3c24xx_nand_suspend, |
| 858 | .resume = s3c24xx_nand_resume, |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 859 | .driver = { |
| 860 | .name = "s3c2440-nand", |
| 861 | .owner = THIS_MODULE, |
| 862 | }, |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 863 | }; |
| 864 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 865 | static struct platform_driver s3c2412_nand_driver = { |
| 866 | .probe = s3c2412_nand_probe, |
| 867 | .remove = s3c2410_nand_remove, |
| 868 | .suspend = s3c24xx_nand_suspend, |
| 869 | .resume = s3c24xx_nand_resume, |
| 870 | .driver = { |
| 871 | .name = "s3c2412-nand", |
| 872 | .owner = THIS_MODULE, |
| 873 | }, |
| 874 | }; |
| 875 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 876 | static int __init s3c2410_nand_init(void) |
| 877 | { |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 878 | printk("S3C24XX NAND Driver, (c) 2004 Simtec Electronics\n"); |
| 879 | |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 880 | platform_driver_register(&s3c2412_nand_driver); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 881 | platform_driver_register(&s3c2440_nand_driver); |
| 882 | return platform_driver_register(&s3c2410_nand_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 883 | } |
| 884 | |
| 885 | static void __exit s3c2410_nand_exit(void) |
| 886 | { |
Ben Dooks | 2c06a08 | 2006-06-27 14:35:46 +0100 | [diff] [blame] | 887 | platform_driver_unregister(&s3c2412_nand_driver); |
Russell King | 3ae5eae | 2005-11-09 22:32:44 +0000 | [diff] [blame] | 888 | platform_driver_unregister(&s3c2440_nand_driver); |
| 889 | platform_driver_unregister(&s3c2410_nand_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 890 | } |
| 891 | |
| 892 | module_init(s3c2410_nand_init); |
| 893 | module_exit(s3c2410_nand_exit); |
| 894 | |
| 895 | MODULE_LICENSE("GPL"); |
| 896 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); |
Ben Dooks | a4f957f | 2005-06-20 12:48:25 +0100 | [diff] [blame] | 897 | MODULE_DESCRIPTION("S3C24XX MTD NAND driver"); |