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gerrit-public.fairphone.software / kernel / msm-4.9 / b79c6df705e02b5dcb0e9360a15b28373813fec1 / . / drivers / media / dvb / frontends / stv090x.c
blob: e57581d14ccbe315a17c3902b943f55cfd4e7645 [file] [log] [blame]
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1/*
2 STV0900/0903 Multistandard Broadcast Frontend driver
3 Copyright (C) Manu Abraham <abraham.manu@gmail.com>
4
5 Copyright (C) ST Microelectronics
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#include <linux/init.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/string.h>
26#include <linux/mutex.h>
27
28#include <linux/dvb/frontend.h>
29#include "dvb_frontend.h"
30
31#include "stv6110x.h" /* for demodulator internal modes */
32
33#include "stv090x_reg.h"
34#include "stv090x.h"
35#include "stv090x_priv.h"
36
37static unsigned int verbose;
38module_param(verbose, int, 0644);
39
40struct mutex demod_lock;
41
42/* DVBS1 and DSS C/N Lookup table */
43static const struct stv090x_tab stv090x_s1cn_tab[] = {
44 { 0, 8917 }, /* 0.0dB */
45 { 5, 8801 }, /* 0.5dB */
46 { 10, 8667 }, /* 1.0dB */
47 { 15, 8522 }, /* 1.5dB */
48 { 20, 8355 }, /* 2.0dB */
49 { 25, 8175 }, /* 2.5dB */
50 { 30, 7979 }, /* 3.0dB */
51 { 35, 7763 }, /* 3.5dB */
52 { 40, 7530 }, /* 4.0dB */
53 { 45, 7282 }, /* 4.5dB */
54 { 50, 7026 }, /* 5.0dB */
55 { 55, 6781 }, /* 5.5dB */
56 { 60, 6514 }, /* 6.0dB */
57 { 65, 6241 }, /* 6.5dB */
58 { 70, 5965 }, /* 7.0dB */
59 { 75, 5690 }, /* 7.5dB */
60 { 80, 5424 }, /* 8.0dB */
61 { 85, 5161 }, /* 8.5dB */
62 { 90, 4902 }, /* 9.0dB */
63 { 95, 4654 }, /* 9.5dB */
64 { 100, 4417 }, /* 10.0dB */
65 { 105, 4186 }, /* 10.5dB */
66 { 110, 3968 }, /* 11.0dB */
67 { 115, 3757 }, /* 11.5dB */
68 { 120, 3558 }, /* 12.0dB */
69 { 125, 3366 }, /* 12.5dB */
70 { 130, 3185 }, /* 13.0dB */
71 { 135, 3012 }, /* 13.5dB */
72 { 140, 2850 }, /* 14.0dB */
73 { 145, 2698 }, /* 14.5dB */
74 { 150, 2550 }, /* 15.0dB */
75 { 160, 2283 }, /* 16.0dB */
76 { 170, 2042 }, /* 17.0dB */
77 { 180, 1827 }, /* 18.0dB */
78 { 190, 1636 }, /* 19.0dB */
79 { 200, 1466 }, /* 20.0dB */
80 { 210, 1315 }, /* 21.0dB */
81 { 220, 1181 }, /* 22.0dB */
82 { 230, 1064 }, /* 23.0dB */
83 { 240, 960 }, /* 24.0dB */
84 { 250, 869 }, /* 25.0dB */
85 { 260, 792 }, /* 26.0dB */
86 { 270, 724 }, /* 27.0dB */
87 { 280, 665 }, /* 28.0dB */
88 { 290, 616 }, /* 29.0dB */
89 { 300, 573 }, /* 30.0dB */
90 { 310, 537 }, /* 31.0dB */
91 { 320, 507 }, /* 32.0dB */
92 { 330, 483 }, /* 33.0dB */
93 { 400, 398 }, /* 40.0dB */
94 { 450, 381 }, /* 45.0dB */
95 { 500, 377 } /* 50.0dB */
96};
97
98/* DVBS2 C/N Lookup table */
99static const struct stv090x_tab stv090x_s2cn_tab[] = {
100 { -30, 13348 }, /* -3.0dB */
101 { -20, 12640 }, /* -2d.0B */
102 { -10, 11883 }, /* -1.0dB */
103 { 0, 11101 }, /* -0.0dB */
104 { 5, 10718 }, /* 0.5dB */
105 { 10, 10339 }, /* 1.0dB */
106 { 15, 9947 }, /* 1.5dB */
107 { 20, 9552 }, /* 2.0dB */
108 { 25, 9183 }, /* 2.5dB */
109 { 30, 8799 }, /* 3.0dB */
110 { 35, 8422 }, /* 3.5dB */
111 { 40, 8062 }, /* 4.0dB */
112 { 45, 7707 }, /* 4.5dB */
113 { 50, 7353 }, /* 5.0dB */
114 { 55, 7025 }, /* 5.5dB */
115 { 60, 6684 }, /* 6.0dB */
116 { 65, 6331 }, /* 6.5dB */
117 { 70, 6036 }, /* 7.0dB */
118 { 75, 5727 }, /* 7.5dB */
119 { 80, 5437 }, /* 8.0dB */
120 { 85, 5164 }, /* 8.5dB */
121 { 90, 4902 }, /* 9.0dB */
122 { 95, 4653 }, /* 9.5dB */
123 { 100, 4408 }, /* 10.0dB */
124 { 105, 4187 }, /* 10.5dB */
125 { 110, 3961 }, /* 11.0dB */
126 { 115, 3751 }, /* 11.5dB */
127 { 120, 3558 }, /* 12.0dB */
128 { 125, 3368 }, /* 12.5dB */
129 { 130, 3191 }, /* 13.0dB */
130 { 135, 3017 }, /* 13.5dB */
131 { 140, 2862 }, /* 14.0dB */
132 { 145, 2710 }, /* 14.5dB */
133 { 150, 2565 }, /* 15.0dB */
134 { 160, 2300 }, /* 16.0dB */
135 { 170, 2058 }, /* 17.0dB */
136 { 180, 1849 }, /* 18.0dB */
137 { 190, 1663 }, /* 19.0dB */
138 { 200, 1495 }, /* 20.0dB */
139 { 210, 1349 }, /* 21.0dB */
140 { 220, 1222 }, /* 22.0dB */
141 { 230, 1110 }, /* 23.0dB */
142 { 240, 1011 }, /* 24.0dB */
143 { 250, 925 }, /* 25.0dB */
144 { 260, 853 }, /* 26.0dB */
145 { 270, 789 }, /* 27.0dB */
146 { 280, 734 }, /* 28.0dB */
147 { 290, 690 }, /* 29.0dB */
148 { 300, 650 }, /* 30.0dB */
149 { 310, 619 }, /* 31.0dB */
150 { 320, 593 }, /* 32.0dB */
151 { 330, 571 }, /* 33.0dB */
152 { 400, 498 }, /* 40.0dB */
153 { 450, 484 }, /* 45.0dB */
154 { 500, 481 } /* 50.0dB */
155};
156
157/* RF level C/N lookup table */
158static const struct stv090x_tab stv090x_rf_tab[] = {
159 { -5, 0xcaa1 }, /* -5dBm */
160 { -10, 0xc229 }, /* -10dBm */
161 { -15, 0xbb08 }, /* -15dBm */
162 { -20, 0xb4bc }, /* -20dBm */
163 { -25, 0xad5a }, /* -25dBm */
164 { -30, 0xa298 }, /* -30dBm */
165 { -35, 0x98a8 }, /* -35dBm */
166 { -40, 0x8389 }, /* -40dBm */
167 { -45, 0x59be }, /* -45dBm */
168 { -50, 0x3a14 }, /* -50dBm */
169 { -55, 0x2d11 }, /* -55dBm */
170 { -60, 0x210d }, /* -60dBm */
171 { -65, 0xa14f }, /* -65dBm */
172 { -70, 0x07aa } /* -70dBm */
173};
174
175
176static struct stv090x_reg stv0900_initval[] = {
177
178 { STV090x_OUTCFG, 0x00 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]179 { STV090x_MODECFG, 0xff },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]180 { STV090x_AGCRF1CFG, 0x11 },
181 { STV090x_AGCRF2CFG, 0x13 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]182 { STV090x_TSGENERAL1X, 0x14 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]183 { STV090x_TSTTNR2, 0x21 },
184 { STV090x_TSTTNR4, 0x21 },
185 { STV090x_P2_DISTXCTL, 0x22 },
186 { STV090x_P2_F22TX, 0xc0 },
187 { STV090x_P2_F22RX, 0xc0 },
188 { STV090x_P2_DISRXCTL, 0x00 },
189 { STV090x_P2_DMDCFGMD, 0xF9 },
190 { STV090x_P2_DEMOD, 0x08 },
191 { STV090x_P2_DMDCFG3, 0xc4 },
192 { STV090x_P2_CARFREQ, 0xed },
193 { STV090x_P2_LDT, 0xd0 },
194 { STV090x_P2_LDT2, 0xb8 },
195 { STV090x_P2_TMGCFG, 0xd2 },
196 { STV090x_P2_TMGTHRISE, 0x20 },
197 { STV090x_P1_TMGCFG, 0xd2 },
198
199 { STV090x_P2_TMGTHFALL, 0x00 },
200 { STV090x_P2_FECSPY, 0x88 },
201 { STV090x_P2_FSPYDATA, 0x3a },
202 { STV090x_P2_FBERCPT4, 0x00 },
203 { STV090x_P2_FSPYBER, 0x10 },
204 { STV090x_P2_ERRCTRL1, 0x35 },
205 { STV090x_P2_ERRCTRL2, 0xc1 },
206 { STV090x_P2_CFRICFG, 0xf8 },
207 { STV090x_P2_NOSCFG, 0x1c },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]208 { STV090x_P2_DMDTOM, 0x20 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]209 { STV090x_P2_CORRELMANT, 0x70 },
210 { STV090x_P2_CORRELABS, 0x88 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]211 { STV090x_P2_AGC2O, 0x5b },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]212 { STV090x_P2_AGC2REF, 0x38 },
213 { STV090x_P2_CARCFG, 0xe4 },
214 { STV090x_P2_ACLC, 0x1A },
215 { STV090x_P2_BCLC, 0x09 },
216 { STV090x_P2_CARHDR, 0x08 },
217 { STV090x_P2_KREFTMG, 0xc1 },
218 { STV090x_P2_SFRUPRATIO, 0xf0 },
219 { STV090x_P2_SFRLOWRATIO, 0x70 },
220 { STV090x_P2_SFRSTEP, 0x58 },
221 { STV090x_P2_TMGCFG2, 0x01 },
222 { STV090x_P2_CAR2CFG, 0x26 },
223 { STV090x_P2_BCLC2S2Q, 0x86 },
224 { STV090x_P2_BCLC2S28, 0x86 },
225 { STV090x_P2_SMAPCOEF7, 0x77 },
226 { STV090x_P2_SMAPCOEF6, 0x85 },
227 { STV090x_P2_SMAPCOEF5, 0x77 },
228 { STV090x_P2_TSCFGL, 0x20 },
229 { STV090x_P2_DMDCFG2, 0x3b },
230 { STV090x_P2_MODCODLST0, 0xff },
231 { STV090x_P2_MODCODLST1, 0xff },
232 { STV090x_P2_MODCODLST2, 0xff },
233 { STV090x_P2_MODCODLST3, 0xff },
234 { STV090x_P2_MODCODLST4, 0xff },
235 { STV090x_P2_MODCODLST5, 0xff },
236 { STV090x_P2_MODCODLST6, 0xff },
237 { STV090x_P2_MODCODLST7, 0xcc },
238 { STV090x_P2_MODCODLST8, 0xcc },
239 { STV090x_P2_MODCODLST9, 0xcc },
240 { STV090x_P2_MODCODLSTA, 0xcc },
241 { STV090x_P2_MODCODLSTB, 0xcc },
242 { STV090x_P2_MODCODLSTC, 0xcc },
243 { STV090x_P2_MODCODLSTD, 0xcc },
244 { STV090x_P2_MODCODLSTE, 0xcc },
245 { STV090x_P2_MODCODLSTF, 0xcf },
246 { STV090x_P1_DISTXCTL, 0x22 },
247 { STV090x_P1_F22TX, 0xc0 },
248 { STV090x_P1_F22RX, 0xc0 },
249 { STV090x_P1_DISRXCTL, 0x00 },
250 { STV090x_P1_DMDCFGMD, 0xf9 },
251 { STV090x_P1_DEMOD, 0x08 },
252 { STV090x_P1_DMDCFG3, 0xc4 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]253 { STV090x_P1_DMDTOM, 0x20 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]254 { STV090x_P1_CARFREQ, 0xed },
255 { STV090x_P1_LDT, 0xd0 },
256 { STV090x_P1_LDT2, 0xb8 },
257 { STV090x_P1_TMGCFG, 0xd2 },
258 { STV090x_P1_TMGTHRISE, 0x20 },
259 { STV090x_P1_TMGTHFALL, 0x00 },
260 { STV090x_P1_SFRUPRATIO, 0xf0 },
261 { STV090x_P1_SFRLOWRATIO, 0x70 },
262 { STV090x_P1_TSCFGL, 0x20 },
263 { STV090x_P1_FECSPY, 0x88 },
264 { STV090x_P1_FSPYDATA, 0x3a },
265 { STV090x_P1_FBERCPT4, 0x00 },
266 { STV090x_P1_FSPYBER, 0x10 },
267 { STV090x_P1_ERRCTRL1, 0x35 },
268 { STV090x_P1_ERRCTRL2, 0xc1 },
269 { STV090x_P1_CFRICFG, 0xf8 },
270 { STV090x_P1_NOSCFG, 0x1c },
271 { STV090x_P1_CORRELMANT, 0x70 },
272 { STV090x_P1_CORRELABS, 0x88 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]273 { STV090x_P1_AGC2O, 0x5b },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]274 { STV090x_P1_AGC2REF, 0x38 },
275 { STV090x_P1_CARCFG, 0xe4 },
276 { STV090x_P1_ACLC, 0x1A },
277 { STV090x_P1_BCLC, 0x09 },
278 { STV090x_P1_CARHDR, 0x08 },
279 { STV090x_P1_KREFTMG, 0xc1 },
280 { STV090x_P1_SFRSTEP, 0x58 },
281 { STV090x_P1_TMGCFG2, 0x01 },
282 { STV090x_P1_CAR2CFG, 0x26 },
283 { STV090x_P1_BCLC2S2Q, 0x86 },
284 { STV090x_P1_BCLC2S28, 0x86 },
285 { STV090x_P1_SMAPCOEF7, 0x77 },
286 { STV090x_P1_SMAPCOEF6, 0x85 },
287 { STV090x_P1_SMAPCOEF5, 0x77 },
288 { STV090x_P1_DMDCFG2, 0x3b },
289 { STV090x_P1_MODCODLST0, 0xff },
290 { STV090x_P1_MODCODLST1, 0xff },
291 { STV090x_P1_MODCODLST2, 0xff },
292 { STV090x_P1_MODCODLST3, 0xff },
293 { STV090x_P1_MODCODLST4, 0xff },
294 { STV090x_P1_MODCODLST5, 0xff },
295 { STV090x_P1_MODCODLST6, 0xff },
296 { STV090x_P1_MODCODLST7, 0xcc },
297 { STV090x_P1_MODCODLST8, 0xcc },
298 { STV090x_P1_MODCODLST9, 0xcc },
299 { STV090x_P1_MODCODLSTA, 0xcc },
300 { STV090x_P1_MODCODLSTB, 0xcc },
301 { STV090x_P1_MODCODLSTC, 0xcc },
302 { STV090x_P1_MODCODLSTD, 0xcc },
303 { STV090x_P1_MODCODLSTE, 0xcc },
304 { STV090x_P1_MODCODLSTF, 0xcf },
305 { STV090x_GENCFG, 0x1d },
306 { STV090x_NBITER_NF4, 0x37 },
307 { STV090x_NBITER_NF5, 0x29 },
308 { STV090x_NBITER_NF6, 0x37 },
309 { STV090x_NBITER_NF7, 0x33 },
310 { STV090x_NBITER_NF8, 0x31 },
311 { STV090x_NBITER_NF9, 0x2f },
312 { STV090x_NBITER_NF10, 0x39 },
313 { STV090x_NBITER_NF11, 0x3a },
314 { STV090x_NBITER_NF12, 0x29 },
315 { STV090x_NBITER_NF13, 0x37 },
316 { STV090x_NBITER_NF14, 0x33 },
317 { STV090x_NBITER_NF15, 0x2f },
318 { STV090x_NBITER_NF16, 0x39 },
319 { STV090x_NBITER_NF17, 0x3a },
320 { STV090x_NBITERNOERR, 0x04 },
321 { STV090x_GAINLLR_NF4, 0x0C },
322 { STV090x_GAINLLR_NF5, 0x0F },
323 { STV090x_GAINLLR_NF6, 0x11 },
324 { STV090x_GAINLLR_NF7, 0x14 },
325 { STV090x_GAINLLR_NF8, 0x17 },
326 { STV090x_GAINLLR_NF9, 0x19 },
327 { STV090x_GAINLLR_NF10, 0x20 },
328 { STV090x_GAINLLR_NF11, 0x21 },
329 { STV090x_GAINLLR_NF12, 0x0D },
330 { STV090x_GAINLLR_NF13, 0x0F },
331 { STV090x_GAINLLR_NF14, 0x13 },
332 { STV090x_GAINLLR_NF15, 0x1A },
333 { STV090x_GAINLLR_NF16, 0x1F },
334 { STV090x_GAINLLR_NF17, 0x21 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]335 { STV090x_RCCFGH, 0x20 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]336 { STV090x_P1_FECM, 0x01 }, /* disable DSS modes */
337 { STV090x_P2_FECM, 0x01 }, /* disable DSS modes */
338 { STV090x_P1_PRVIT, 0x2F }, /* disable PR 6/7 */
339 { STV090x_P2_PRVIT, 0x2F }, /* disable PR 6/7 */
340};
341
342static struct stv090x_reg stv0903_initval[] = {
343 { STV090x_OUTCFG, 0x00 },
344 { STV090x_AGCRF1CFG, 0x11 },
345 { STV090x_STOPCLK1, 0x48 },
346 { STV090x_STOPCLK2, 0x14 },
347 { STV090x_TSTTNR1, 0x27 },
348 { STV090x_TSTTNR2, 0x21 },
349 { STV090x_P1_DISTXCTL, 0x22 },
350 { STV090x_P1_F22TX, 0xc0 },
351 { STV090x_P1_F22RX, 0xc0 },
352 { STV090x_P1_DISRXCTL, 0x00 },
353 { STV090x_P1_DMDCFGMD, 0xF9 },
354 { STV090x_P1_DEMOD, 0x08 },
355 { STV090x_P1_DMDCFG3, 0xc4 },
356 { STV090x_P1_CARFREQ, 0xed },
357 { STV090x_P1_TNRCFG2, 0x82 },
358 { STV090x_P1_LDT, 0xd0 },
359 { STV090x_P1_LDT2, 0xb8 },
360 { STV090x_P1_TMGCFG, 0xd2 },
361 { STV090x_P1_TMGTHRISE, 0x20 },
362 { STV090x_P1_TMGTHFALL, 0x00 },
363 { STV090x_P1_SFRUPRATIO, 0xf0 },
364 { STV090x_P1_SFRLOWRATIO, 0x70 },
365 { STV090x_P1_TSCFGL, 0x20 },
366 { STV090x_P1_FECSPY, 0x88 },
367 { STV090x_P1_FSPYDATA, 0x3a },
368 { STV090x_P1_FBERCPT4, 0x00 },
369 { STV090x_P1_FSPYBER, 0x10 },
370 { STV090x_P1_ERRCTRL1, 0x35 },
371 { STV090x_P1_ERRCTRL2, 0xc1 },
372 { STV090x_P1_CFRICFG, 0xf8 },
373 { STV090x_P1_NOSCFG, 0x1c },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]374 { STV090x_P1_DMDTOM, 0x20 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]375 { STV090x_P1_CORRELMANT, 0x70 },
376 { STV090x_P1_CORRELABS, 0x88 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]377 { STV090x_P1_AGC2O, 0x5b },
378 { STV090x_P1_AGC2REF, 0x38 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]379 { STV090x_P1_CARCFG, 0xe4 },
380 { STV090x_P1_ACLC, 0x1A },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]381 { STV090x_P1_BCLC, 0x09 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]382 { STV090x_P1_CARHDR, 0x08 },
383 { STV090x_P1_KREFTMG, 0xc1 },
384 { STV090x_P1_SFRSTEP, 0x58 },
385 { STV090x_P1_TMGCFG2, 0x01 },
386 { STV090x_P1_CAR2CFG, 0x26 },
387 { STV090x_P1_BCLC2S2Q, 0x86 },
388 { STV090x_P1_BCLC2S28, 0x86 },
389 { STV090x_P1_SMAPCOEF7, 0x77 },
390 { STV090x_P1_SMAPCOEF6, 0x85 },
391 { STV090x_P1_SMAPCOEF5, 0x77 },
392 { STV090x_P1_DMDCFG2, 0x3b },
393 { STV090x_P1_MODCODLST0, 0xff },
394 { STV090x_P1_MODCODLST1, 0xff },
395 { STV090x_P1_MODCODLST2, 0xff },
396 { STV090x_P1_MODCODLST3, 0xff },
397 { STV090x_P1_MODCODLST4, 0xff },
398 { STV090x_P1_MODCODLST5, 0xff },
399 { STV090x_P1_MODCODLST6, 0xff },
400 { STV090x_P1_MODCODLST7, 0xcc },
401 { STV090x_P1_MODCODLST8, 0xcc },
402 { STV090x_P1_MODCODLST9, 0xcc },
403 { STV090x_P1_MODCODLSTA, 0xcc },
404 { STV090x_P1_MODCODLSTB, 0xcc },
405 { STV090x_P1_MODCODLSTC, 0xcc },
406 { STV090x_P1_MODCODLSTD, 0xcc },
407 { STV090x_P1_MODCODLSTE, 0xcc },
408 { STV090x_P1_MODCODLSTF, 0xcf },
409 { STV090x_GENCFG, 0x1c },
410 { STV090x_NBITER_NF4, 0x37 },
411 { STV090x_NBITER_NF5, 0x29 },
412 { STV090x_NBITER_NF6, 0x37 },
413 { STV090x_NBITER_NF7, 0x33 },
414 { STV090x_NBITER_NF8, 0x31 },
415 { STV090x_NBITER_NF9, 0x2f },
416 { STV090x_NBITER_NF10, 0x39 },
417 { STV090x_NBITER_NF11, 0x3a },
418 { STV090x_NBITER_NF12, 0x29 },
419 { STV090x_NBITER_NF13, 0x37 },
420 { STV090x_NBITER_NF14, 0x33 },
421 { STV090x_NBITER_NF15, 0x2f },
422 { STV090x_NBITER_NF16, 0x39 },
423 { STV090x_NBITER_NF17, 0x3a },
424 { STV090x_NBITERNOERR, 0x04 },
425 { STV090x_GAINLLR_NF4, 0x0C },
426 { STV090x_GAINLLR_NF5, 0x0F },
427 { STV090x_GAINLLR_NF6, 0x11 },
428 { STV090x_GAINLLR_NF7, 0x14 },
429 { STV090x_GAINLLR_NF8, 0x17 },
430 { STV090x_GAINLLR_NF9, 0x19 },
431 { STV090x_GAINLLR_NF10, 0x20 },
432 { STV090x_GAINLLR_NF11, 0x21 },
433 { STV090x_GAINLLR_NF12, 0x0D },
434 { STV090x_GAINLLR_NF13, 0x0F },
435 { STV090x_GAINLLR_NF14, 0x13 },
436 { STV090x_GAINLLR_NF15, 0x1A },
437 { STV090x_GAINLLR_NF16, 0x1F },
438 { STV090x_GAINLLR_NF17, 0x21 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]439 { STV090x_RCCFGH, 0x20 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]440 { STV090x_P1_FECM, 0x01 }, /*disable the DSS mode */
441 { STV090x_P1_PRVIT, 0x2f } /*disable puncture rate 6/7*/
442};
443
444static struct stv090x_reg stv0900_cut20_val[] = {
445
446 { STV090x_P2_DMDCFG3, 0xe8 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]447 { STV090x_P2_DMDCFG4, 0x10 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]448 { STV090x_P2_CARFREQ, 0x38 },
449 { STV090x_P2_CARHDR, 0x20 },
450 { STV090x_P2_KREFTMG, 0x5a },
451 { STV090x_P2_SMAPCOEF7, 0x06 },
452 { STV090x_P2_SMAPCOEF6, 0x00 },
453 { STV090x_P2_SMAPCOEF5, 0x04 },
454 { STV090x_P2_NOSCFG, 0x0c },
455 { STV090x_P1_DMDCFG3, 0xe8 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]456 { STV090x_P1_DMDCFG4, 0x10 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]457 { STV090x_P1_CARFREQ, 0x38 },
458 { STV090x_P1_CARHDR, 0x20 },
459 { STV090x_P1_KREFTMG, 0x5a },
460 { STV090x_P1_SMAPCOEF7, 0x06 },
461 { STV090x_P1_SMAPCOEF6, 0x00 },
462 { STV090x_P1_SMAPCOEF5, 0x04 },
463 { STV090x_P1_NOSCFG, 0x0c },
464 { STV090x_GAINLLR_NF4, 0x21 },
465 { STV090x_GAINLLR_NF5, 0x21 },
466 { STV090x_GAINLLR_NF6, 0x20 },
467 { STV090x_GAINLLR_NF7, 0x1F },
468 { STV090x_GAINLLR_NF8, 0x1E },
469 { STV090x_GAINLLR_NF9, 0x1E },
470 { STV090x_GAINLLR_NF10, 0x1D },
471 { STV090x_GAINLLR_NF11, 0x1B },
472 { STV090x_GAINLLR_NF12, 0x20 },
473 { STV090x_GAINLLR_NF13, 0x20 },
474 { STV090x_GAINLLR_NF14, 0x20 },
475 { STV090x_GAINLLR_NF15, 0x20 },
476 { STV090x_GAINLLR_NF16, 0x20 },
477 { STV090x_GAINLLR_NF17, 0x21 },
478};
479
480static struct stv090x_reg stv0903_cut20_val[] = {
481 { STV090x_P1_DMDCFG3, 0xe8 },
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]482 { STV090x_P1_DMDCFG4, 0x10 },
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]483 { STV090x_P1_CARFREQ, 0x38 },
484 { STV090x_P1_CARHDR, 0x20 },
485 { STV090x_P1_KREFTMG, 0x5a },
486 { STV090x_P1_SMAPCOEF7, 0x06 },
487 { STV090x_P1_SMAPCOEF6, 0x00 },
488 { STV090x_P1_SMAPCOEF5, 0x04 },
489 { STV090x_P1_NOSCFG, 0x0c },
490 { STV090x_GAINLLR_NF4, 0x21 },
491 { STV090x_GAINLLR_NF5, 0x21 },
492 { STV090x_GAINLLR_NF6, 0x20 },
493 { STV090x_GAINLLR_NF7, 0x1F },
494 { STV090x_GAINLLR_NF8, 0x1E },
495 { STV090x_GAINLLR_NF9, 0x1E },
496 { STV090x_GAINLLR_NF10, 0x1D },
497 { STV090x_GAINLLR_NF11, 0x1B },
498 { STV090x_GAINLLR_NF12, 0x20 },
499 { STV090x_GAINLLR_NF13, 0x20 },
500 { STV090x_GAINLLR_NF14, 0x20 },
501 { STV090x_GAINLLR_NF15, 0x20 },
502 { STV090x_GAINLLR_NF16, 0x20 },
503 { STV090x_GAINLLR_NF17, 0x21 }
504};
505
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]506/* Cut 2.0 Long Frame Tracking CR loop */
507static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
508 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
509 { STV090x_QPSK_12, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
510 { STV090x_QPSK_35, 0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
511 { STV090x_QPSK_23, 0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
512 { STV090x_QPSK_34, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
513 { STV090x_QPSK_45, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
514 { STV090x_QPSK_56, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
515 { STV090x_QPSK_89, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
516 { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
517 { STV090x_8PSK_35, 0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
518 { STV090x_8PSK_23, 0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
519 { STV090x_8PSK_34, 0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
520 { STV090x_8PSK_56, 0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
521 { STV090x_8PSK_89, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
522 { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
523};
524
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]525/* Cut 3.0 Long Frame Tracking CR loop */
526static struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
527 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
528 { STV090x_QPSK_12, 0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
529 { STV090x_QPSK_35, 0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
530 { STV090x_QPSK_23, 0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
531 { STV090x_QPSK_34, 0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
532 { STV090x_QPSK_45, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
533 { STV090x_QPSK_56, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
534 { STV090x_QPSK_89, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
535 { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
536 { STV090x_8PSK_35, 0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
537 { STV090x_8PSK_23, 0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
538 { STV090x_8PSK_34, 0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
539 { STV090x_8PSK_56, 0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
540 { STV090x_8PSK_89, 0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
541 { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
542};
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]543
544/* Cut 2.0 Long Frame Tracking CR Loop */
545static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
546 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
547 { STV090x_16APSK_23, 0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
548 { STV090x_16APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
549 { STV090x_16APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
550 { STV090x_16APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
551 { STV090x_16APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
552 { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
553 { STV090x_32APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
554 { STV090x_32APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
555 { STV090x_32APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
556 { STV090x_32APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
557 { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
558};
559
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]560/* Cut 3.0 Long Frame Tracking CR Loop */
561static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = {
562 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
563 { STV090x_16APSK_23, 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
564 { STV090x_16APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
565 { STV090x_16APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
566 { STV090x_16APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
567 { STV090x_16APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
568 { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
569 { STV090x_32APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
570 { STV090x_32APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
571 { STV090x_32APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
572 { STV090x_32APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
573 { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
574};
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]575
576static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
577 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
578 { STV090x_QPSK_14, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
579 { STV090x_QPSK_13, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
580 { STV090x_QPSK_25, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
581};
582
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]583static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = {
584 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
585 { STV090x_QPSK_14, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
586 { STV090x_QPSK_13, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
587 { STV090x_QPSK_25, 0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]588};
589
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]590/* Cut 2.0 Short Frame Tracking CR Loop */
591static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
592 /* MODCOD 2M 5M 10M 20M 30M */
593 { STV090x_QPSK, 0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
594 { STV090x_8PSK, 0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
595 { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
596 { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
597};
598
599/* Cut 3.0 Short Frame Tracking CR Loop */
600static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
601 /* MODCOD 2M 5M 10M 20M 30M */
602 { STV090x_QPSK, 0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
603 { STV090x_8PSK, 0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
604 { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
605 { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
606};
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]607
608static inline s32 comp2(s32 __x, s32 __width)
609{
610 if (__width == 32)
611 return __x;
612 else
613 return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
614}
615
616static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
617{
618 const struct stv090x_config *config = state->config;
619 int ret;
620
621 u8 b0[] = { reg >> 8, reg & 0xff };
622 u8 buf;
623
624 struct i2c_msg msg[] = {
625 { .addr = config->address, .flags = 0, .buf = b0, .len = 2 },
626 { .addr = config->address, .flags = I2C_M_RD, .buf = &buf, .len = 1 }
627 };
628
629 ret = i2c_transfer(state->i2c, msg, 2);
630 if (ret != 2) {
631 if (ret != -ERESTARTSYS)
632 dprintk(FE_ERROR, 1,
633 "Read error, Reg=[0x%02x], Status=%d",
634 reg, ret);
635
636 return ret < 0 ? ret : -EREMOTEIO;
637 }
638 if (unlikely(*state->verbose >= FE_DEBUGREG))
639 dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
640 reg, buf);
641
642 return (unsigned int) buf;
643}
644
645static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
646{
647 const struct stv090x_config *config = state->config;
648 int ret;
649 u8 buf[2 + count];
650 struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
651
652 buf[0] = reg >> 8;
653 buf[1] = reg & 0xff;
654 memcpy(&buf[2], data, count);
655
656 if (unlikely(*state->verbose >= FE_DEBUGREG)) {
657 int i;
658
659 printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
660 for (i = 0; i < count; i++)
661 printk(" %02x", data[i]);
662 printk("\n");
663 }
664
665 ret = i2c_transfer(state->i2c, &i2c_msg, 1);
666 if (ret != 1) {
667 if (ret != -ERESTARTSYS)
668 dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
669 reg, data[0], count, ret);
670 return ret < 0 ? ret : -EREMOTEIO;
671 }
672
673 return 0;
674}
675
676static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
677{
678 return stv090x_write_regs(state, reg, &data, 1);
679}
680
681static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
682{
683 struct stv090x_state *state = fe->demodulator_priv;
684 u32 reg;
685
686 reg = STV090x_READ_DEMOD(state, I2CRPT);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]687 if (enable) {
Manu Abraham017eb0382009-04-07 05:19:54 -0300[diff] [blame]688 dprintk(FE_DEBUG, 1, "Enable Gate");
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]689 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
690 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
691 goto err;
692
693 } else {
Manu Abraham017eb0382009-04-07 05:19:54 -0300[diff] [blame]694 dprintk(FE_DEBUG, 1, "Disable Gate");
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]695 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
696 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
697 goto err;
698 }
699 return 0;
700err:
701 dprintk(FE_ERROR, 1, "I/O error");
702 return -1;
703}
704
705static void stv090x_get_lock_tmg(struct stv090x_state *state)
706{
707 switch (state->algo) {
708 case STV090x_BLIND_SEARCH:
709 dprintk(FE_DEBUG, 1, "Blind Search");
710 if (state->srate <= 1500000) { /*10Msps< SR <=15Msps*/
711 state->DemodTimeout = 1500;
712 state->FecTimeout = 400;
713 } else if (state->srate <= 5000000) { /*10Msps< SR <=15Msps*/
714 state->DemodTimeout = 1000;
715 state->FecTimeout = 300;
716 } else { /*SR >20Msps*/
717 state->DemodTimeout = 700;
718 state->FecTimeout = 100;
719 }
720 break;
721
722 case STV090x_COLD_SEARCH:
723 case STV090x_WARM_SEARCH:
724 default:
725 dprintk(FE_DEBUG, 1, "Normal Search");
726 if (state->srate <= 1000000) { /*SR <=1Msps*/
727 state->DemodTimeout = 4500;
728 state->FecTimeout = 1700;
729 } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
730 state->DemodTimeout = 2500;
731 state->FecTimeout = 1100;
732 } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
733 state->DemodTimeout = 1000;
734 state->FecTimeout = 550;
735 } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
736 state->DemodTimeout = 700;
737 state->FecTimeout = 250;
738 } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
739 state->DemodTimeout = 400;
740 state->FecTimeout = 130;
741 } else { /*SR >20Msps*/
742 state->DemodTimeout = 300;
743 state->FecTimeout = 100;
744 }
745 break;
746 }
747
748 if (state->algo == STV090x_WARM_SEARCH)
749 state->DemodTimeout /= 2;
750}
751
752static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
753{
754 u32 sym;
755
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]756 if (srate > 60000000) {
757 sym = (srate << 4); /* SR * 2^16 / master_clk */
758 sym /= (state->mclk >> 12);
759 } else if (srate > 6000000) {
760 sym = (srate << 6);
761 sym /= (state->mclk >> 10);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]762 } else {
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]763 sym = (srate << 9);
764 sym /= (state->mclk >> 7);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]765 }
766
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]767 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]768 goto err;
769 if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
770 goto err;
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]771
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]772 return 0;
773err:
774 dprintk(FE_ERROR, 1, "I/O error");
775 return -1;
776}
777
778static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
779{
780 u32 sym;
781
782 srate = 105 * (srate / 100);
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]783 if (srate > 60000000) {
784 sym = (srate << 4); /* SR * 2^16 / master_clk */
785 sym /= (state->mclk >> 12);
786 } else if (srate > 6000000) {
787 sym = (srate << 6);
788 sym /= (state->mclk >> 10);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]789 } else {
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]790 sym = (srate << 9);
791 sym /= (state->mclk >> 7);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]792 }
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]793
794 if (sym < 0x7fff) {
795 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
796 goto err;
797 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
798 goto err;
799 } else {
800 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
801 goto err;
802 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
803 goto err;
804 }
805
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]806 return 0;
807err:
808 dprintk(FE_ERROR, 1, "I/O error");
809 return -1;
810}
811
812static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
813{
814 u32 sym;
815
816 srate = 95 * (srate / 100);
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]817 if (srate > 60000000) {
818 sym = (srate << 4); /* SR * 2^16 / master_clk */
819 sym /= (state->mclk >> 12);
820 } else if (srate > 6000000) {
821 sym = (srate << 6);
822 sym /= (state->mclk >> 10);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]823 } else {
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]824 sym = (srate << 9);
825 sym /= (state->mclk >> 7);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]826 }
Manu Abraham15bb3662009-04-08 20:14:00 -0300[diff] [blame]827
Andreas Regelb671a8d2009-11-13 18:15:27 -0300[diff] [blame]828 if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]829 goto err;
830 if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
831 goto err;
832 return 0;
833err:
834 dprintk(FE_ERROR, 1, "I/O error");
835 return -1;
836}
837
Andreas Regel4e58a682009-04-16 08:40:36 -0300[diff] [blame]838static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]839{
Andreas Regel4e58a682009-04-16 08:40:36 -0300[diff] [blame]840 u32 ro;
841
842 switch (rolloff) {
843 case STV090x_RO_20:
844 ro = 20;
845 break;
846 case STV090x_RO_25:
847 ro = 25;
848 break;
849 case STV090x_RO_35:
850 default:
851 ro = 35;
852 break;
853 }
854
855 return srate + (srate * ro) / 100;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]856}
857
858static int stv090x_set_vit_thacq(struct stv090x_state *state)
859{
860 if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
861 goto err;
862 if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
863 goto err;
864 if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
865 goto err;
866 if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
867 goto err;
868 if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
869 goto err;
870 if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
871 goto err;
872 return 0;
873err:
874 dprintk(FE_ERROR, 1, "I/O error");
875 return -1;
876}
877
878static int stv090x_set_vit_thtracq(struct stv090x_state *state)
879{
880 if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
881 goto err;
882 if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
883 goto err;
884 if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
885 goto err;
886 if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
887 goto err;
888 if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
889 goto err;
890 if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
891 goto err;
892 return 0;
893err:
894 dprintk(FE_ERROR, 1, "I/O error");
895 return -1;
896}
897
898static int stv090x_set_viterbi(struct stv090x_state *state)
899{
900 switch (state->search_mode) {
901 case STV090x_SEARCH_AUTO:
902 if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
903 goto err;
904 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
905 goto err;
906 break;
907 case STV090x_SEARCH_DVBS1:
908 if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
909 goto err;
910 switch (state->fec) {
911 case STV090x_PR12:
912 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
913 goto err;
914 break;
915
916 case STV090x_PR23:
917 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
918 goto err;
919 break;
920
921 case STV090x_PR34:
922 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
923 goto err;
924 break;
925
926 case STV090x_PR56:
927 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
928 goto err;
929 break;
930
931 case STV090x_PR78:
932 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
933 goto err;
934 break;
935
936 default:
937 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
938 goto err;
939 break;
940 }
941 break;
942 case STV090x_SEARCH_DSS:
943 if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
944 goto err;
945 switch (state->fec) {
946 case STV090x_PR12:
947 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
948 goto err;
949 break;
950
951 case STV090x_PR23:
952 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
953 goto err;
954 break;
955
956 case STV090x_PR67:
957 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
958 goto err;
959 break;
960
961 default:
962 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
963 goto err;
964 break;
965 }
966 break;
967 default:
968 break;
969 }
970 return 0;
971err:
972 dprintk(FE_ERROR, 1, "I/O error");
973 return -1;
974}
975
976static int stv090x_stop_modcod(struct stv090x_state *state)
977{
978 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
979 goto err;
980 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
981 goto err;
982 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
983 goto err;
984 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
985 goto err;
986 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
987 goto err;
988 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
989 goto err;
990 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
991 goto err;
992 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
993 goto err;
994 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
995 goto err;
996 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
997 goto err;
998 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
999 goto err;
1000 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
1001 goto err;
1002 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
1003 goto err;
1004 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
1005 goto err;
1006 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
1007 goto err;
1008 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
1009 goto err;
1010 return 0;
1011err:
1012 dprintk(FE_ERROR, 1, "I/O error");
1013 return -1;
1014}
1015
1016static int stv090x_activate_modcod(struct stv090x_state *state)
1017{
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1018 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1019 goto err;
1020 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
1021 goto err;
1022 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
1023 goto err;
1024 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
1025 goto err;
1026 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
1027 goto err;
1028 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
1029 goto err;
1030 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
1031 goto err;
1032 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
1033 goto err;
1034 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
1035 goto err;
1036 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
1037 goto err;
1038 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
1039 goto err;
1040 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
1041 goto err;
1042 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
1043 goto err;
1044 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
1045 goto err;
1046 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
1047 goto err;
1048 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
1049 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1050
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1051 return 0;
1052err:
1053 dprintk(FE_ERROR, 1, "I/O error");
1054 return -1;
1055}
1056
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1057static int stv090x_activate_modcod_single(struct stv090x_state *state)
1058{
1059
1060 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
1061 goto err;
1062 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
1063 goto err;
1064 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
1065 goto err;
1066 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
1067 goto err;
1068 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
1069 goto err;
1070 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
1071 goto err;
1072 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
1073 goto err;
1074 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
1075 goto err;
1076 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
1077 goto err;
1078 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
1079 goto err;
1080 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
1081 goto err;
1082 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
1083 goto err;
1084 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
1085 goto err;
1086 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
1087 goto err;
1088 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
1089 goto err;
1090 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
1091 goto err;
1092
1093 return 0;
1094
1095err:
1096 dprintk(FE_ERROR, 1, "I/O error");
1097 return -1;
1098}
1099
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1100static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1101{
1102 u32 reg;
1103
1104 switch (state->demod) {
1105 case STV090x_DEMODULATOR_0:
1106 mutex_lock(&demod_lock);
1107 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1108 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1109 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1110 goto err;
1111 mutex_unlock(&demod_lock);
1112 break;
1113
1114 case STV090x_DEMODULATOR_1:
1115 mutex_lock(&demod_lock);
1116 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1117 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1118 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1119 goto err;
1120 mutex_unlock(&demod_lock);
1121 break;
1122
1123 default:
1124 dprintk(FE_ERROR, 1, "Wrong demodulator!");
1125 break;
1126 }
1127 return 0;
1128err:
1129 mutex_unlock(&demod_lock);
1130 dprintk(FE_ERROR, 1, "I/O error");
1131 return -1;
1132}
1133
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1134static int stv090x_dvbs_track_crl(struct stv090x_state *state)
1135{
1136 if (state->dev_ver >= 0x30) {
1137 /* Set ACLC BCLC optimised value vs SR */
1138 if (state->srate >= 15000000) {
1139 if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
1140 goto err;
1141 if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
1142 goto err;
1143 } else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
1144 if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
1145 goto err;
1146 if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
1147 goto err;
1148 } else if (state->srate < 7000000) {
1149 if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
1150 goto err;
1151 if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
1152 goto err;
1153 }
1154
1155 } else {
1156 /* Cut 2.0 */
1157 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1158 goto err;
1159 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1160 goto err;
1161 }
1162 return 0;
1163err:
1164 dprintk(FE_ERROR, 1, "I/O error");
1165 return -1;
1166}
1167
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1168static int stv090x_delivery_search(struct stv090x_state *state)
1169{
1170 u32 reg;
1171
1172 switch (state->search_mode) {
1173 case STV090x_SEARCH_DVBS1:
1174 case STV090x_SEARCH_DSS:
1175 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1176 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1177 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1178 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1179 goto err;
1180
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1181 /* Activate Viterbi decoder in legacy search,
1182 * do not use FRESVIT1, might impact VITERBI2
1183 */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1184 if (stv090x_vitclk_ctl(state, 0) < 0)
1185 goto err;
1186
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1187 if (stv090x_dvbs_track_crl(state) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1188 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1189
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1190 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
1191 goto err;
1192
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1193 if (stv090x_set_vit_thacq(state) < 0)
1194 goto err;
1195 if (stv090x_set_viterbi(state) < 0)
1196 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1197 break;
1198
1199 case STV090x_SEARCH_DVBS2:
1200 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1201 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1202 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1203 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1204 goto err;
1205 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1206 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1207 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1208 goto err;
1209
1210 if (stv090x_vitclk_ctl(state, 1) < 0)
1211 goto err;
1212
1213 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
1214 goto err;
1215 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1216 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1217
1218 if (state->dev_ver <= 0x20) {
1219 /* enable S2 carrier loop */
1220 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1221 goto err;
1222 } else {
1223 /* > Cut 3: Stop carrier 3 */
1224 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1225 goto err;
1226 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1227
1228 if (state->demod_mode != STV090x_SINGLE) {
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1229 /* Cut 2: enable link during search */
1230 if (stv090x_activate_modcod(state) < 0)
1231 goto err;
1232 } else {
1233 /* Single demodulator
1234 * Authorize SHORT and LONG frames,
1235 * QPSK, 8PSK, 16APSK and 32APSK
1236 */
1237 if (stv090x_activate_modcod_single(state) < 0)
1238 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1239 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1240
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1241 if (stv090x_set_vit_thtracq(state) < 0)
1242 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1243 break;
1244
1245 case STV090x_SEARCH_AUTO:
1246 default:
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1247 /* enable DVB-S2 and DVB-S2 in Auto MODE */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1248 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
Andreas Regelb79c6df2010-01-05 19:18:52 -0300[diff] [blame^]1249 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1250 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1251 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1252 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1253 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1254 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1255 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1256 goto err;
1257
Andreas Regel4e58a682009-04-16 08:40:36 -0300[diff] [blame]1258 if (stv090x_vitclk_ctl(state, 0) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1259 goto err;
1260
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1261 if (stv090x_dvbs_track_crl(state) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1262 goto err;
1263
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1264 if (state->dev_ver <= 0x20) {
1265 /* enable S2 carrier loop */
1266 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1267 goto err;
1268 } else {
1269 /* > Cut 3: Stop carrier 3 */
1270 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
1271 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1272 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1273
1274 if (state->demod_mode != STV090x_SINGLE) {
1275 /* Cut 2: enable link during search */
1276 if (stv090x_activate_modcod(state) < 0)
1277 goto err;
1278 } else {
1279 /* Single demodulator
1280 * Authorize SHORT and LONG frames,
1281 * QPSK, 8PSK, 16APSK and 32APSK
1282 */
1283 if (stv090x_activate_modcod_single(state) < 0)
1284 goto err;
1285 }
1286
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1287 if (stv090x_set_vit_thacq(state) < 0)
1288 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1289
1290 if (stv090x_set_viterbi(state) < 0)
1291 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1292 break;
1293 }
1294 return 0;
1295err:
1296 dprintk(FE_ERROR, 1, "I/O error");
1297 return -1;
1298}
1299
1300static int stv090x_start_search(struct stv090x_state *state)
1301{
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1302 u32 reg, freq_abs;
1303 s16 freq;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1304
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1305 /* Reset demodulator */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1306 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1307 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
1308 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1309 goto err;
1310
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1311 if (state->dev_ver <= 0x20) {
1312 if (state->srate <= 5000000) {
1313 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1314 goto err;
1315 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
1316 goto err;
Andreas Regelb671a8d2009-11-13 18:15:27 -0300[diff] [blame]1317 if (STV090x_WRITE_DEMOD(state, CFRUP0, 0xff) < 0)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1318 goto err;
1319 if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
1320 goto err;
1321 if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
1322 goto err;
1323
1324 /*enlarge the timing bandwith for Low SR*/
1325 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
1326 goto err;
1327 } else {
1328 /* If the symbol rate is >5 Msps
1329 Set The carrier search up and low to auto mode */
1330 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1331 goto err;
1332 /*reduce the timing bandwith for high SR*/
1333 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1334 goto err;
1335 }
1336 } else {
1337 /* >= Cut 3 */
1338 if (state->srate <= 5000000) {
1339 /* enlarge the timing bandwith for Low SR */
1340 STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
1341 } else {
1342 /* reduce timing bandwith for high SR */
1343 STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
1344 }
1345
1346 /* Set CFR min and max to manual mode */
1347 STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
1348
1349 if (state->algo == STV090x_WARM_SEARCH) {
1350 /* WARM Start
1351 * CFR min = -1MHz,
1352 * CFR max = +1MHz
1353 */
1354 freq_abs = 1000 << 16;
1355 freq_abs /= (state->mclk / 1000);
1356 freq = (s16) freq_abs;
1357 } else {
1358 /* COLD Start
1359 * CFR min =- (SearchRange / 2 + 600KHz)
1360 * CFR max = +(SearchRange / 2 + 600KHz)
1361 * (600KHz for the tuner step size)
1362 */
1363 freq_abs = (state->search_range / 2000) + 600;
1364 freq_abs = freq_abs << 16;
1365 freq_abs /= (state->mclk / 1000);
1366 freq = (s16) freq_abs;
1367 }
1368
1369 if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1370 goto err;
Andreas Regelb671a8d2009-11-13 18:15:27 -0300[diff] [blame]1371 if (STV090x_WRITE_DEMOD(state, CFRUP0, LSB(freq)) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1372 goto err;
1373
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1374 freq *= -1;
1375
1376 if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1377 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1378 if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1379 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1380
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1381 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1382
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1383 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
1384 goto err;
1385 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1386 goto err;
1387
1388 if (state->dev_ver >= 0x20) {
1389 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1390 goto err;
1391 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1392 goto err;
1393
1394 if ((state->search_mode == STV090x_DVBS1) ||
1395 (state->search_mode == STV090x_DSS) ||
1396 (state->search_mode == STV090x_SEARCH_AUTO)) {
1397
1398 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1399 goto err;
1400 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
1401 goto err;
1402 }
1403 }
1404
1405 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
1406 goto err;
1407 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
1408 goto err;
1409 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
1410 goto err;
1411
1412 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1413 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1414 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1415 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1416 goto err;
1417 reg = STV090x_READ_DEMOD(state, DMDCFG2);
1418 STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
1419 if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
1420 goto err;
1421
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1422 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
1423 goto err;
1424
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1425 if (state->dev_ver >= 0x20) {
1426 /*Frequency offset detector setting*/
1427 if (state->srate < 2000000) {
1428 if (state->dev_ver <= 0x20) {
1429 /* Cut 2 */
1430 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
1431 goto err;
1432 } else {
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1433 /* Cut 3 */
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1434 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
1435 goto err;
1436 }
1437 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
1438 goto err;
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]1439 } else if (state->srate < 10000000) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1440 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
1441 goto err;
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1442 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1443 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1444 } else {
1445 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
1446 goto err;
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1447 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
1448 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1449 }
1450 } else {
1451 if (state->srate < 10000000) {
1452 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
1453 goto err;
1454 } else {
1455 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1456 goto err;
1457 }
1458 }
1459
1460 switch (state->algo) {
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1461 case STV090x_WARM_SEARCH:
1462 /* The symbol rate and the exact
1463 * carrier Frequency are known
1464 */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1465 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1466 goto err;
1467 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
1468 goto err;
1469 break;
1470
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1471 case STV090x_COLD_SEARCH:
1472 /* The symbol rate is known */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1473 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1474 goto err;
1475 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1476 goto err;
1477 break;
1478
1479 default:
1480 break;
1481 }
1482 return 0;
1483err:
1484 dprintk(FE_ERROR, 1, "I/O error");
1485 return -1;
1486}
1487
1488static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1489{
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1490 u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1491 s32 i, j, steps, dir;
1492
1493 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1494 goto err;
1495 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1496 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1497 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1498 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1499 goto err;
1500
1501 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
1502 goto err;
1503 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1504 goto err;
1505 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
1506 goto err;
1507 if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1508 goto err;
1509 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
1510 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1511 if (stv090x_set_srate(state, 1000000) < 0)
1512 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1513
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1514 steps = state->search_range / 1000000;
1515 if (steps <= 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1516 steps = 1;
1517
1518 dir = 1;
1519 freq_step = (1000000 * 256) / (state->mclk / 256);
1520 freq_init = 0;
1521
1522 for (i = 0; i < steps; i++) {
1523 if (dir > 0)
1524 freq_init = freq_init + (freq_step * i);
1525 else
1526 freq_init = freq_init - (freq_step * i);
1527
Andreas Regelb671a8d2009-11-13 18:15:27 -0300[diff] [blame]1528 dir *= -1;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1529
1530 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
1531 goto err;
1532 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
1533 goto err;
1534 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
1535 goto err;
1536 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
1537 goto err;
1538 msleep(10);
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1539
1540 agc2 = 0;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1541 for (j = 0; j < 10; j++) {
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1542 agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1543 STV090x_READ_DEMOD(state, AGC2I0);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1544 }
1545 agc2 /= 10;
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1546 if (agc2 < agc2_min)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1547 agc2_min = agc2;
1548 }
1549
1550 return agc2_min;
1551err:
1552 dprintk(FE_ERROR, 1, "I/O error");
1553 return -1;
1554}
1555
1556static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
1557{
1558 u8 r3, r2, r1, r0;
1559 s32 srate, int_1, int_2, tmp_1, tmp_2;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1560
1561 r3 = STV090x_READ_DEMOD(state, SFR3);
1562 r2 = STV090x_READ_DEMOD(state, SFR2);
1563 r1 = STV090x_READ_DEMOD(state, SFR1);
1564 r0 = STV090x_READ_DEMOD(state, SFR0);
1565
1566 srate = ((r3 << 24) | (r2 << 16) | (r1 << 8) | r0);
1567
Manu Abrahamf430fff2009-04-08 20:18:50 -0300[diff] [blame]1568 int_1 = clk >> 16;
1569 int_2 = srate >> 16;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1570
Manu Abrahamf430fff2009-04-08 20:18:50 -0300[diff] [blame]1571 tmp_1 = clk % 0x10000;
1572 tmp_2 = srate % 0x10000;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1573
1574 srate = (int_1 * int_2) +
Manu Abrahamf430fff2009-04-08 20:18:50 -0300[diff] [blame]1575 ((int_1 * tmp_2) >> 16) +
1576 ((int_2 * tmp_1) >> 16);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1577
1578 return srate;
1579}
1580
1581static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1582{
1583 struct dvb_frontend *fe = &state->frontend;
1584
1585 int tmg_lock = 0, i;
1586 s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
1587 u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1588 u32 agc2th;
1589
1590 if (state->dev_ver >= 0x30)
1591 agc2th = 0x2e00;
1592 else
1593 agc2th = 0x1f00;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1594
1595 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1596 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
1597 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1598 goto err;
1599 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
1600 goto err;
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1601 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0)
1602 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1603 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
1604 goto err;
1605 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
1606 goto err;
1607 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1608 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1609 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1610 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1611 goto err;
1612
1613 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
1614 goto err;
1615 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1616 goto err;
1617 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
1618 goto err;
1619 if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1620 goto err;
1621 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
1622 goto err;
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1623 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1624 goto err;
1625
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1626 if (state->dev_ver >= 0x30) {
1627 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1628 goto err;
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1629 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1630 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1631
1632 } else if (state->dev_ver >= 0x20) {
1633 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1634 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1635 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1636 goto err;
1637 }
1638
1639 if (state->srate <= 2000000)
1640 car_step = 1000;
1641 else if (state->srate <= 5000000)
1642 car_step = 2000;
1643 else if (state->srate <= 12000000)
1644 car_step = 3000;
1645 else
1646 car_step = 5000;
1647
1648 steps = -1 + ((state->search_range / 1000) / car_step);
1649 steps /= 2;
1650 steps = (2 * steps) + 1;
1651 if (steps < 0)
1652 steps = 1;
1653 else if (steps > 10) {
1654 steps = 11;
1655 car_step = (state->search_range / 1000) / 10;
1656 }
1657 cur_step = 0;
1658 dir = 1;
1659 freq = state->frequency;
1660
1661 while ((!tmg_lock) && (cur_step < steps)) {
1662 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
1663 goto err;
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1664 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
1665 goto err;
1666 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1667 goto err;
1668 if (STV090x_WRITE_DEMOD(state, SFRINIT1, 0x00) < 0)
1669 goto err;
1670 if (STV090x_WRITE_DEMOD(state, SFRINIT0, 0x00) < 0)
1671 goto err;
1672 /* trigger acquisition */
1673 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x40) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1674 goto err;
1675 msleep(50);
1676 for (i = 0; i < 10; i++) {
1677 reg = STV090x_READ_DEMOD(state, DSTATUS);
1678 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1679 tmg_cpt++;
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1680 agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1681 STV090x_READ_DEMOD(state, AGC2I0);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1682 }
1683 agc2 /= 10;
1684 srate_coarse = stv090x_get_srate(state, state->mclk);
1685 cur_step++;
1686 dir *= -1;
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1687 if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
1688 (srate_coarse < 50000000) && (srate_coarse > 850000))
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1689 tmg_lock = 1;
1690 else if (cur_step < steps) {
1691 if (dir > 0)
1692 freq += cur_step * car_step;
1693 else
1694 freq -= cur_step * car_step;
1695
1696 /* Setup tuner */
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1697 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
1698 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1699
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1700 if (state->config->tuner_set_frequency) {
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]1701 if (state->config->tuner_set_frequency(fe, freq) < 0)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1702 goto err;
1703 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1704
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1705 if (state->config->tuner_set_bandwidth) {
1706 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
1707 goto err;
1708 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1709
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1710 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
1711 goto err;
1712
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1713 msleep(50);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1714
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1715 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
1716 goto err;
1717
1718 if (state->config->tuner_get_status) {
1719 if (state->config->tuner_get_status(fe, &reg) < 0)
1720 goto err;
1721 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1722
1723 if (reg)
1724 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1725 else
1726 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1727
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1728 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
1729 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1730
1731 }
1732 }
1733 if (!tmg_lock)
1734 srate_coarse = 0;
1735 else
1736 srate_coarse = stv090x_get_srate(state, state->mclk);
1737
1738 return srate_coarse;
1739err:
1740 dprintk(FE_ERROR, 1, "I/O error");
1741 return -1;
1742}
1743
1744static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1745{
1746 u32 srate_coarse, freq_coarse, sym, reg;
1747
1748 srate_coarse = stv090x_get_srate(state, state->mclk);
1749 freq_coarse = STV090x_READ_DEMOD(state, CFR2) << 8;
1750 freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1751 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1752
1753 if (sym < state->srate)
1754 srate_coarse = 0;
1755 else {
1756 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
1757 goto err;
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1758 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1759 goto err;
1760 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1761 goto err;
1762 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1763 goto err;
1764 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
1765 goto err;
1766 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1767 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
1768 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1769 goto err;
1770
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1771 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1772 goto err;
1773
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1774 if (state->dev_ver >= 0x30) {
1775 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1776 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1777 } else if (state->dev_ver >= 0x20) {
1778 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1779 goto err;
1780 }
1781
1782 if (srate_coarse > 3000000) {
1783 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1784 sym = (sym / 1000) * 65536;
1785 sym /= (state->mclk / 1000);
1786 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1787 goto err;
1788 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1789 goto err;
1790 sym = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1791 sym = (sym / 1000) * 65536;
1792 sym /= (state->mclk / 1000);
1793 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1794 goto err;
1795 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1796 goto err;
1797 sym = (srate_coarse / 1000) * 65536;
1798 sym /= (state->mclk / 1000);
1799 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1800 goto err;
1801 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1802 goto err;
1803 } else {
1804 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1805 sym = (sym / 100) * 65536;
1806 sym /= (state->mclk / 100);
1807 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1808 goto err;
1809 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1810 goto err;
1811 sym = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1812 sym = (sym / 100) * 65536;
1813 sym /= (state->mclk / 100);
1814 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1815 goto err;
1816 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1817 goto err;
1818 sym = (srate_coarse / 100) * 65536;
1819 sym /= (state->mclk / 100);
1820 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1821 goto err;
1822 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1823 goto err;
1824 }
1825 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
1826 goto err;
1827 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
1828 goto err;
1829 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
1830 goto err;
1831 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
1832 goto err;
1833 }
1834
1835 return srate_coarse;
1836
1837err:
1838 dprintk(FE_ERROR, 1, "I/O error");
1839 return -1;
1840}
1841
1842static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
1843{
1844 s32 timer = 0, lock = 0;
1845 u32 reg;
1846 u8 stat;
1847
1848 while ((timer < timeout) && (!lock)) {
1849 reg = STV090x_READ_DEMOD(state, DMDSTATE);
1850 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
1851
1852 switch (stat) {
1853 case 0: /* searching */
1854 case 1: /* first PLH detected */
1855 default:
1856 dprintk(FE_DEBUG, 1, "Demodulator searching ..");
1857 lock = 0;
1858 break;
1859 case 2: /* DVB-S2 mode */
1860 case 3: /* DVB-S1/legacy mode */
1861 reg = STV090x_READ_DEMOD(state, DSTATUS);
1862 lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
1863 break;
1864 }
1865
1866 if (!lock)
1867 msleep(10);
1868 else
1869 dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
1870
1871 timer += 10;
1872 }
1873 return lock;
1874}
1875
1876static int stv090x_blind_search(struct stv090x_state *state)
1877{
1878 u32 agc2, reg, srate_coarse;
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]1879 s32 cpt_fail, agc2_ovflw, i;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1880 u8 k_ref, k_max, k_min;
1881 int coarse_fail, lock;
1882
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1883 k_max = 110;
1884 k_min = 10;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1885
1886 agc2 = stv090x_get_agc2_min_level(state);
1887
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1888 if (agc2 > STV090x_SEARCH_AGC2_TH(state->dev_ver)) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1889 lock = 0;
1890 } else {
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1891
1892 if (state->dev_ver <= 0x20) {
1893 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1894 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1895 } else {
1896 /* > Cut 3 */
1897 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1898 goto err;
1899 }
1900
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1901 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1902 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1903
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1904 if (state->dev_ver >= 0x20) {
1905 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1906 goto err;
1907 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1908 goto err;
1909 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1910 goto err;
1911 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
1912 goto err;
1913 }
1914
1915 k_ref = k_max;
1916 do {
1917 if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
1918 goto err;
1919 if (stv090x_srate_srch_coarse(state) != 0) {
1920 srate_coarse = stv090x_srate_srch_fine(state);
1921 if (srate_coarse != 0) {
1922 stv090x_get_lock_tmg(state);
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]1923 lock = stv090x_get_dmdlock(state,
1924 state->DemodTimeout);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1925 } else {
1926 lock = 0;
1927 }
1928 } else {
1929 cpt_fail = 0;
1930 agc2_ovflw = 0;
1931 for (i = 0; i < 10; i++) {
Andreas Regelb4a42482009-11-13 18:16:44 -0300[diff] [blame]1932 agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
1933 STV090x_READ_DEMOD(state, AGC2I0);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1934 if (agc2 >= 0xff00)
1935 agc2_ovflw++;
1936 reg = STV090x_READ_DEMOD(state, DSTATUS2);
1937 if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
1938 (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
1939
1940 cpt_fail++;
1941 }
1942 if ((cpt_fail > 7) || (agc2_ovflw > 7))
1943 coarse_fail = 1;
1944
1945 lock = 0;
1946 }
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]1947 k_ref -= 20;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1948 } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
1949 }
1950
1951 return lock;
1952
1953err:
1954 dprintk(FE_ERROR, 1, "I/O error");
1955 return -1;
1956}
1957
1958static int stv090x_chk_tmg(struct stv090x_state *state)
1959{
1960 u32 reg;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]1961 s32 tmg_cpt = 0, i;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1962 u8 freq, tmg_thh, tmg_thl;
1963 int tmg_lock;
1964
1965 freq = STV090x_READ_DEMOD(state, CARFREQ);
1966 tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
1967 tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
1968 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1969 goto err;
1970 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1971 goto err;
1972
1973 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1974 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
1975 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1976 goto err;
1977 if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
1978 goto err;
1979
1980 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
1981 goto err;
1982 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
1983 goto err;
1984
1985 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
1986 goto err;
1987 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1988 goto err;
1989 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
1990 goto err;
1991
1992 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
1993 goto err;
1994 msleep(10);
1995
1996 for (i = 0; i < 10; i++) {
1997 reg = STV090x_READ_DEMOD(state, DSTATUS);
1998 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1999 tmg_cpt++;
2000 msleep(1);
2001 }
2002 if (tmg_cpt >= 3)
2003 tmg_lock = 1;
2004
2005 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2006 goto err;
2007 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
2008 goto err;
2009 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
2010 goto err;
2011
2012 if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
2013 goto err;
2014 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
2015 goto err;
2016 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
2017 goto err;
2018
2019 return tmg_lock;
2020
2021err:
2022 dprintk(FE_ERROR, 1, "I/O error");
2023 return -1;
2024}
2025
2026static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
2027{
2028 struct dvb_frontend *fe = &state->frontend;
2029
2030 u32 reg;
2031 s32 car_step, steps, cur_step, dir, freq, timeout_lock;
2032 int lock = 0;
2033
2034 if (state->srate >= 10000000)
2035 timeout_lock = timeout_dmd / 3;
2036 else
2037 timeout_lock = timeout_dmd / 2;
2038
2039 lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
2040 if (!lock) {
2041 if (state->srate >= 10000000) {
2042 if (stv090x_chk_tmg(state)) {
2043 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2044 goto err;
2045 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2046 goto err;
2047 lock = stv090x_get_dmdlock(state, timeout_dmd);
2048 } else {
2049 lock = 0;
2050 }
2051 } else {
2052 if (state->srate <= 4000000)
2053 car_step = 1000;
2054 else if (state->srate <= 7000000)
2055 car_step = 2000;
2056 else if (state->srate <= 10000000)
2057 car_step = 3000;
2058 else
2059 car_step = 5000;
2060
2061 steps = (state->search_range / 1000) / car_step;
2062 steps /= 2;
2063 steps = 2 * (steps + 1);
2064 if (steps < 0)
2065 steps = 2;
2066 else if (steps > 12)
2067 steps = 12;
2068
2069 cur_step = 1;
2070 dir = 1;
2071
2072 if (!lock) {
2073 freq = state->frequency;
2074 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
2075 while ((cur_step <= steps) && (!lock)) {
2076 if (dir > 0)
2077 freq += cur_step * car_step;
2078 else
2079 freq -= cur_step * car_step;
2080
2081 /* Setup tuner */
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2082 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2083 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2084
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2085 if (state->config->tuner_set_frequency) {
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]2086 if (state->config->tuner_set_frequency(fe, freq) < 0)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2087 goto err;
2088 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2089
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2090 if (state->config->tuner_set_bandwidth) {
2091 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2092 goto err;
2093 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2094
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2095 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2096 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2097
2098 msleep(50);
2099
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2100 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2101 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2102
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2103 if (state->config->tuner_get_status) {
2104 if (state->config->tuner_get_status(fe, &reg) < 0)
2105 goto err;
2106 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2107
2108 if (reg)
2109 dprintk(FE_DEBUG, 1, "Tuner phase locked");
2110 else
2111 dprintk(FE_DEBUG, 1, "Tuner unlocked");
2112
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2113 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2114 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2115
2116 STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2117 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
2118 goto err;
2119 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
2120 goto err;
2121 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2122 goto err;
2123 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
2124 goto err;
2125 lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
2126
2127 dir *= -1;
2128 cur_step++;
2129 }
2130 }
2131 }
2132 }
2133
2134 return lock;
2135
2136err:
2137 dprintk(FE_ERROR, 1, "I/O error");
2138 return -1;
2139}
2140
2141static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
2142{
2143 s32 timeout, inc, steps_max, srate, car_max;
2144
2145 srate = state->srate;
2146 car_max = state->search_range / 1000;
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]2147 car_max += car_max / 10;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2148 car_max = 65536 * (car_max / 2);
2149 car_max /= (state->mclk / 1000);
2150
2151 if (car_max > 0x4000)
2152 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
2153
2154 inc = srate;
2155 inc /= state->mclk / 1000;
2156 inc *= 256;
2157 inc *= 256;
2158 inc /= 1000;
2159
Andreas Regel72982f72009-04-08 17:28:41 -0300[diff] [blame]2160 switch (state->search_mode) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2161 case STV090x_SEARCH_DVBS1:
2162 case STV090x_SEARCH_DSS:
2163 inc *= 3; /* freq step = 3% of srate */
2164 timeout = 20;
2165 break;
2166
2167 case STV090x_SEARCH_DVBS2:
2168 inc *= 4;
2169 timeout = 25;
2170 break;
2171
2172 case STV090x_SEARCH_AUTO:
2173 default:
2174 inc *= 3;
2175 timeout = 25;
2176 break;
2177 }
2178 inc /= 100;
2179 if ((inc > car_max) || (inc < 0))
2180 inc = car_max / 2; /* increment <= 1/8 Mclk */
2181
2182 timeout *= 27500; /* 27.5 Msps reference */
2183 if (srate > 0)
2184 timeout /= (srate / 1000);
2185
2186 if ((timeout > 100) || (timeout < 0))
2187 timeout = 100;
2188
2189 steps_max = (car_max / inc) + 1; /* min steps = 3 */
2190 if ((steps_max > 100) || (steps_max < 0)) {
2191 steps_max = 100; /* max steps <= 100 */
2192 inc = car_max / steps_max;
2193 }
2194 *freq_inc = inc;
2195 *timeout_sw = timeout;
2196 *steps = steps_max;
2197
2198 return 0;
2199}
2200
2201static int stv090x_chk_signal(struct stv090x_state *state)
2202{
2203 s32 offst_car, agc2, car_max;
2204 int no_signal;
2205
2206 offst_car = STV090x_READ_DEMOD(state, CFR2) << 8;
2207 offst_car |= STV090x_READ_DEMOD(state, CFR1);
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]2208 offst_car = comp2(offst_car, 16);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2209
2210 agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
2211 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
2212 car_max = state->search_range / 1000;
2213
2214 car_max += (car_max / 10); /* 10% margin */
2215 car_max = (65536 * car_max / 2);
2216 car_max /= state->mclk / 1000;
2217
2218 if (car_max > 0x4000)
2219 car_max = 0x4000;
2220
2221 if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
2222 no_signal = 1;
2223 dprintk(FE_DEBUG, 1, "No Signal");
2224 } else {
2225 no_signal = 0;
2226 dprintk(FE_DEBUG, 1, "Found Signal");
2227 }
2228
2229 return no_signal;
2230}
2231
2232static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
2233{
2234 int no_signal, lock = 0;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2235 s32 cpt_step = 0, offst_freq, car_max;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2236 u32 reg;
2237
2238 car_max = state->search_range / 1000;
2239 car_max += (car_max / 10);
2240 car_max = (65536 * car_max / 2);
2241 car_max /= (state->mclk / 1000);
2242 if (car_max > 0x4000)
2243 car_max = 0x4000;
2244
2245 if (zigzag)
2246 offst_freq = 0;
2247 else
2248 offst_freq = -car_max + inc;
2249
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2250 do {
2251 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2252 goto err;
2253 if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
2254 goto err;
2255 if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
2256 goto err;
2257 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2258 goto err;
2259
2260 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2261 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
2262 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2263 goto err;
2264
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2265 if (zigzag) {
2266 if (offst_freq >= 0)
2267 offst_freq = -offst_freq - 2 * inc;
2268 else
2269 offst_freq = -offst_freq;
2270 } else {
2271 offst_freq += 2 * inc;
2272 }
2273
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]2274 cpt_step++;
2275
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2276 lock = stv090x_get_dmdlock(state, timeout);
2277 no_signal = stv090x_chk_signal(state);
2278
2279 } while ((!lock) &&
2280 (!no_signal) &&
2281 ((offst_freq - inc) < car_max) &&
2282 ((offst_freq + inc) > -car_max) &&
2283 (cpt_step < steps_max));
2284
2285 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2286 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
2287 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2288 goto err;
2289
2290 return lock;
2291err:
2292 dprintk(FE_ERROR, 1, "I/O error");
2293 return -1;
2294}
2295
2296static int stv090x_sw_algo(struct stv090x_state *state)
2297{
2298 int no_signal, zigzag, lock = 0;
2299 u32 reg;
2300
2301 s32 dvbs2_fly_wheel;
2302 s32 inc, timeout_step, trials, steps_max;
2303
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2304 /* get params */
2305 stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2306
Andreas Regel72982f72009-04-08 17:28:41 -0300[diff] [blame]2307 switch (state->search_mode) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2308 case STV090x_SEARCH_DVBS1:
2309 case STV090x_SEARCH_DSS:
2310 /* accelerate the frequency detector */
2311 if (state->dev_ver >= 0x20) {
2312 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2313 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2314 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2315
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2316 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
2317 goto err;
2318 zigzag = 0;
2319 break;
2320
2321 case STV090x_SEARCH_DVBS2:
2322 if (state->dev_ver >= 0x20) {
2323 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2324 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2325 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2326
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2327 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2328 goto err;
2329 zigzag = 1;
2330 break;
2331
2332 case STV090x_SEARCH_AUTO:
2333 default:
2334 /* accelerate the frequency detector */
2335 if (state->dev_ver >= 0x20) {
2336 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2337 goto err;
2338 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2339 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2340 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2341
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]2342 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2343 goto err;
2344 zigzag = 0;
2345 break;
2346 }
2347
2348 trials = 0;
2349 do {
2350 lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
2351 no_signal = stv090x_chk_signal(state);
2352 trials++;
2353
2354 /*run the SW search 2 times maximum*/
2355 if (lock || no_signal || (trials == 2)) {
2356 /*Check if the demod is not losing lock in DVBS2*/
2357 if (state->dev_ver >= 0x20) {
2358 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2359 goto err;
2360 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
2361 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2362 }
2363
2364 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2365 if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
2366 /*Check if the demod is not losing lock in DVBS2*/
2367 msleep(timeout_step);
2368 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2369 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2370 if (dvbs2_fly_wheel < 0xd) { /*if correct frames is decrementing */
2371 msleep(timeout_step);
2372 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2373 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2374 }
2375 if (dvbs2_fly_wheel < 0xd) {
2376 /*FALSE lock, The demod is loosing lock */
2377 lock = 0;
2378 if (trials < 2) {
2379 if (state->dev_ver >= 0x20) {
2380 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2381 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2382 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2383
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2384 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2385 goto err;
2386 }
2387 }
2388 }
2389 }
2390 } while ((!lock) && (trials < 2) && (!no_signal));
2391
2392 return lock;
2393err:
2394 dprintk(FE_ERROR, 1, "I/O error");
2395 return -1;
2396}
2397
2398static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
2399{
2400 u32 reg;
2401 enum stv090x_delsys delsys;
2402
2403 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2404 if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
2405 delsys = STV090x_DVBS2;
2406 else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
2407 reg = STV090x_READ_DEMOD(state, FECM);
2408 if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
2409 delsys = STV090x_DSS;
2410 else
2411 delsys = STV090x_DVBS1;
2412 } else {
2413 delsys = STV090x_ERROR;
2414 }
2415
2416 return delsys;
2417}
2418
2419/* in Hz */
2420static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2421{
2422 s32 derot, int_1, int_2, tmp_1, tmp_2;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2423
2424 derot = STV090x_READ_DEMOD(state, CFR2) << 16;
2425 derot |= STV090x_READ_DEMOD(state, CFR1) << 8;
2426 derot |= STV090x_READ_DEMOD(state, CFR0);
2427
2428 derot = comp2(derot, 24);
Manu Abrahamda4b9052009-04-08 20:30:29 -0300[diff] [blame]2429 int_1 = state->mclk >> 12;
2430 int_2 = derot >> 12;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2431
Manu Abrahamda4b9052009-04-08 20:30:29 -0300[diff] [blame]2432 /* carrier_frequency = MasterClock * Reg / 2^24 */
2433 tmp_1 = state->mclk % 0x1000;
2434 tmp_2 = derot % 0x1000;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2435
2436 derot = (int_1 * int_2) +
Manu Abrahamda4b9052009-04-08 20:30:29 -0300[diff] [blame]2437 ((int_1 * tmp_2) >> 12) +
Andreas Regelb671a8d2009-11-13 18:15:27 -0300[diff] [blame]2438 ((int_2 * tmp_1) >> 12);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2439
2440 return derot;
2441}
2442
2443static int stv090x_get_viterbi(struct stv090x_state *state)
2444{
2445 u32 reg, rate;
2446
2447 reg = STV090x_READ_DEMOD(state, VITCURPUN);
2448 rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
2449
2450 switch (rate) {
2451 case 13:
2452 state->fec = STV090x_PR12;
2453 break;
2454
2455 case 18:
2456 state->fec = STV090x_PR23;
2457 break;
2458
2459 case 21:
2460 state->fec = STV090x_PR34;
2461 break;
2462
2463 case 24:
2464 state->fec = STV090x_PR56;
2465 break;
2466
2467 case 25:
2468 state->fec = STV090x_PR67;
2469 break;
2470
2471 case 26:
2472 state->fec = STV090x_PR78;
2473 break;
2474
2475 default:
2476 state->fec = STV090x_PRERR;
2477 break;
2478 }
2479
2480 return 0;
2481}
2482
2483static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
2484{
2485 struct dvb_frontend *fe = &state->frontend;
2486
2487 u8 tmg;
2488 u32 reg;
2489 s32 i = 0, offst_freq;
2490
2491 msleep(5);
2492
2493 if (state->algo == STV090x_BLIND_SEARCH) {
2494 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2495 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]2496 while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2497 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2498 msleep(5);
2499 i += 5;
2500 }
2501 }
2502 state->delsys = stv090x_get_std(state);
2503
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2504 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2505 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2506
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2507 if (state->config->tuner_get_frequency) {
2508 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2509 goto err;
2510 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2511
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2512 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2513 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2514
2515 offst_freq = stv090x_get_car_freq(state, state->mclk) / 1000;
2516 state->frequency += offst_freq;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2517
2518 if (stv090x_get_viterbi(state) < 0)
2519 goto err;
2520
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2521 reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2522 state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2523 state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2524 state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
2525 reg = STV090x_READ_DEMOD(state, TMGOBS);
2526 state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2527 reg = STV090x_READ_DEMOD(state, FECM);
2528 state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
2529
2530 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
2531
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2532 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2533 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2534
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2535 if (state->config->tuner_get_frequency) {
2536 if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
2537 goto err;
2538 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2539
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2540 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2541 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2542
2543 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]2544 return STV090x_RANGEOK;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2545 else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
2546 return STV090x_RANGEOK;
2547 else
2548 return STV090x_OUTOFRANGE; /* Out of Range */
2549 } else {
2550 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2551 return STV090x_RANGEOK;
2552 else
2553 return STV090x_OUTOFRANGE;
2554 }
2555
2556 return STV090x_OUTOFRANGE;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2557err:
2558 dprintk(FE_ERROR, 1, "I/O error");
2559 return -1;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2560}
2561
2562static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
2563{
2564 s32 offst_tmg;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2565
2566 offst_tmg = STV090x_READ_DEMOD(state, TMGREG2) << 16;
2567 offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) << 8;
2568 offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
2569
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2570 offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
2571 if (!offst_tmg)
2572 offst_tmg = 1;
2573
Manu Abraham5f99feff2009-04-08 20:24:53 -0300[diff] [blame]2574 offst_tmg = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2575 offst_tmg /= 320;
2576
2577 return offst_tmg;
2578}
2579
2580static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
2581{
2582 u8 aclc = 0x29;
2583 s32 i;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2584 struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2585
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2586 if (state->dev_ver == 0x20) {
2587 car_loop = stv090x_s2_crl_cut20;
2588 car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut20;
2589 car_loop_apsk_low = stv090x_s2_apsk_crl_cut20;
2590 } else {
2591 /* >= Cut 3 */
2592 car_loop = stv090x_s2_crl_cut30;
2593 car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut30;
2594 car_loop_apsk_low = stv090x_s2_apsk_crl_cut30;
2595 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2596
2597 if (modcod < STV090x_QPSK_12) {
2598 i = 0;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2599 while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2600 i++;
2601
2602 if (i >= 3)
2603 i = 2;
2604
2605 } else {
2606 i = 0;
2607 while ((i < 14) && (modcod != car_loop[i].modcod))
2608 i++;
2609
2610 if (i >= 14) {
2611 i = 0;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2612 while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2613 i++;
2614
2615 if (i >= 11)
2616 i = 10;
2617 }
2618 }
2619
2620 if (modcod <= STV090x_QPSK_25) {
2621 if (pilots) {
2622 if (state->srate <= 3000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2623 aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2624 else if (state->srate <= 7000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2625 aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2626 else if (state->srate <= 15000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2627 aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2628 else if (state->srate <= 25000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2629 aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2630 else
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2631 aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2632 } else {
2633 if (state->srate <= 3000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2634 aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2635 else if (state->srate <= 7000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2636 aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2637 else if (state->srate <= 15000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2638 aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2639 else if (state->srate <= 25000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2640 aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2641 else
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2642 aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2643 }
2644
2645 } else if (modcod <= STV090x_8PSK_910) {
2646 if (pilots) {
2647 if (state->srate <= 3000000)
2648 aclc = car_loop[i].crl_pilots_on_2;
2649 else if (state->srate <= 7000000)
2650 aclc = car_loop[i].crl_pilots_on_5;
2651 else if (state->srate <= 15000000)
2652 aclc = car_loop[i].crl_pilots_on_10;
2653 else if (state->srate <= 25000000)
2654 aclc = car_loop[i].crl_pilots_on_20;
2655 else
2656 aclc = car_loop[i].crl_pilots_on_30;
2657 } else {
2658 if (state->srate <= 3000000)
2659 aclc = car_loop[i].crl_pilots_off_2;
2660 else if (state->srate <= 7000000)
2661 aclc = car_loop[i].crl_pilots_off_5;
2662 else if (state->srate <= 15000000)
2663 aclc = car_loop[i].crl_pilots_off_10;
2664 else if (state->srate <= 25000000)
2665 aclc = car_loop[i].crl_pilots_off_20;
2666 else
2667 aclc = car_loop[i].crl_pilots_off_30;
2668 }
2669 } else { /* 16APSK and 32APSK */
2670 if (state->srate <= 3000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2671 aclc = car_loop_apsk_low[i].crl_pilots_on_2;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2672 else if (state->srate <= 7000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2673 aclc = car_loop_apsk_low[i].crl_pilots_on_5;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2674 else if (state->srate <= 15000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2675 aclc = car_loop_apsk_low[i].crl_pilots_on_10;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2676 else if (state->srate <= 25000000)
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2677 aclc = car_loop_apsk_low[i].crl_pilots_on_20;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2678 else
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2679 aclc = car_loop_apsk_low[i].crl_pilots_on_30;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2680 }
2681
2682 return aclc;
2683}
2684
2685static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2686{
Manu Abraham0a5ded52009-06-17 16:48:17 -0300[diff] [blame]2687 struct stv090x_short_frame_crloop *short_crl = NULL;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2688 s32 index = 0;
2689 u8 aclc = 0x0b;
2690
2691 switch (state->modulation) {
2692 case STV090x_QPSK:
2693 default:
2694 index = 0;
2695 break;
2696 case STV090x_8PSK:
2697 index = 1;
2698 break;
2699 case STV090x_16APSK:
2700 index = 2;
2701 break;
2702 case STV090x_32APSK:
2703 index = 3;
2704 break;
2705 }
2706
Manu Abrahameebf8d82009-06-18 04:50:53 -0300[diff] [blame]2707 if (state->dev_ver >= 0x30) {
2708 /* Cut 3.0 and up */
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2709 short_crl = stv090x_s2_short_crl_cut30;
Manu Abrahameebf8d82009-06-18 04:50:53 -0300[diff] [blame]2710 } else {
2711 /* Cut 2.0 and up: we don't support cuts older than 2.0 */
2712 short_crl = stv090x_s2_short_crl_cut20;
2713 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2714
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2715 if (state->srate <= 3000000)
2716 aclc = short_crl[index].crl_2;
2717 else if (state->srate <= 7000000)
2718 aclc = short_crl[index].crl_5;
2719 else if (state->srate <= 15000000)
2720 aclc = short_crl[index].crl_10;
2721 else if (state->srate <= 25000000)
2722 aclc = short_crl[index].crl_20;
2723 else
2724 aclc = short_crl[index].crl_30;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2725
2726 return aclc;
2727}
2728
2729static int stv090x_optimize_track(struct stv090x_state *state)
2730{
2731 struct dvb_frontend *fe = &state->frontend;
2732
2733 enum stv090x_rolloff rolloff;
2734 enum stv090x_modcod modcod;
2735
2736 s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2737 u32 reg;
2738
2739 srate = stv090x_get_srate(state, state->mclk);
2740 srate += stv090x_get_tmgoffst(state, srate);
2741
2742 switch (state->delsys) {
2743 case STV090x_DVBS1:
2744 case STV090x_DSS:
Andreas Regelb671a8d2009-11-13 18:15:27 -0300[diff] [blame]2745 if (state->search_mode == STV090x_SEARCH_AUTO) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2746 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2747 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2748 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2749 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2750 goto err;
2751 }
2752 reg = STV090x_READ_DEMOD(state, DEMOD);
2753 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2754 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2755 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2756 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2757
2758 if (state->dev_ver >= 0x30) {
2759 if (stv090x_get_viterbi(state) < 0)
2760 goto err;
2761
2762 if (state->fec == STV090x_PR12) {
2763 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
2764 goto err;
2765 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2766 goto err;
2767 } else {
2768 if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
2769 goto err;
2770 if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
2771 goto err;
2772 }
2773 }
2774
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2775 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
2776 goto err;
2777 break;
2778
2779 case STV090x_DVBS2:
2780 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]2781 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
2782 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2783 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2784 goto err;
2785 if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
2786 goto err;
2787 if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
2788 goto err;
2789 if (state->frame_len == STV090x_LONG_FRAME) {
2790 reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2791 modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2792 pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2793 aclc = stv090x_optimize_carloop(state, modcod, pilots);
2794 if (modcod <= STV090x_QPSK_910) {
2795 STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
2796 } else if (modcod <= STV090x_8PSK_910) {
2797 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2798 goto err;
2799 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2800 goto err;
2801 }
2802 if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
2803 if (modcod <= STV090x_16APSK_910) {
2804 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2805 goto err;
2806 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2807 goto err;
2808 } else {
2809 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2810 goto err;
2811 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2812 goto err;
2813 }
2814 }
2815 } else {
2816 /*Carrier loop setting for short frame*/
2817 aclc = stv090x_optimize_carloop_short(state);
2818 if (state->modulation == STV090x_QPSK) {
2819 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
2820 goto err;
2821 } else if (state->modulation == STV090x_8PSK) {
2822 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2823 goto err;
2824 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2825 goto err;
2826 } else if (state->modulation == STV090x_16APSK) {
2827 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2828 goto err;
2829 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2830 goto err;
2831 } else if (state->modulation == STV090x_32APSK) {
2832 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2833 goto err;
2834 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2835 goto err;
2836 }
2837 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2838
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2839 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
2840 break;
2841
2842 case STV090x_UNKNOWN:
2843 default:
2844 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2845 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2846 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2847 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2848 goto err;
2849 break;
2850 }
2851
2852 f_1 = STV090x_READ_DEMOD(state, CFR2);
2853 f_0 = STV090x_READ_DEMOD(state, CFR1);
2854 reg = STV090x_READ_DEMOD(state, TMGOBS);
2855 rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2856
2857 if (state->algo == STV090x_BLIND_SEARCH) {
2858 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
2859 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2860 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
2861 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
2862 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2863 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2864 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2865 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2866
2867 if (stv090x_set_srate(state, srate) < 0)
2868 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2869 blind_tune = 1;
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]2870
2871 if (stv090x_dvbs_track_crl(state) < 0)
2872 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2873 }
2874
2875 if (state->dev_ver >= 0x20) {
2876 if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
2877 (state->search_mode == STV090x_SEARCH_DSS) ||
2878 (state->search_mode == STV090x_SEARCH_AUTO)) {
2879
2880 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
2881 goto err;
2882 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
2883 goto err;
2884 }
2885 }
2886
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2887 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2888 goto err;
2889
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2890 /* AUTO tracking MODE */
2891 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
2892 goto err;
2893 /* AUTO tracking MODE */
2894 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
2895 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2896
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2897 if ((state->dev_ver >= 0x20) || (blind_tune == 1) || (state->srate < 10000000)) {
2898 /* update initial carrier freq with the found freq offset */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2899 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2900 goto err;
2901 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2902 goto err;
2903 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
2904
2905 if ((state->dev_ver >= 0x20) || (blind_tune == 1)) {
2906
2907 if (state->algo != STV090x_WARM_SEARCH) {
2908
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2909 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
2910 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2911
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2912 if (state->config->tuner_set_bandwidth) {
2913 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
2914 goto err;
2915 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2916
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2917 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
2918 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2919
2920 }
2921 }
2922 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
2923 msleep(50); /* blind search: wait 50ms for SR stabilization */
2924 else
2925 msleep(5);
2926
2927 stv090x_get_lock_tmg(state);
2928
2929 if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
2930 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2931 goto err;
2932 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2933 goto err;
2934 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2935 goto err;
2936 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2937 goto err;
2938
2939 i = 0;
2940
2941 while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
2942
2943 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2944 goto err;
2945 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2946 goto err;
2947 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2948 goto err;
2949 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2950 goto err;
2951 i++;
2952 }
2953 }
2954
2955 }
2956
2957 if (state->dev_ver >= 0x20) {
2958 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2959 goto err;
2960 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]2961
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]2962 if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
2963 stv090x_set_vit_thtracq(state);
2964
2965 return 0;
2966err:
2967 dprintk(FE_ERROR, 1, "I/O error");
2968 return -1;
2969}
2970
2971static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
2972{
2973 s32 timer = 0, lock = 0, stat;
2974 u32 reg;
2975
2976 while ((timer < timeout) && (!lock)) {
2977 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2978 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
2979
2980 switch (stat) {
2981 case 0: /* searching */
2982 case 1: /* first PLH detected */
2983 default:
2984 lock = 0;
2985 break;
2986
2987 case 2: /* DVB-S2 mode */
2988 reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
2989 lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
2990 break;
2991
2992 case 3: /* DVB-S1/legacy mode */
2993 reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
2994 lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
2995 break;
2996 }
2997 if (!lock) {
2998 msleep(10);
2999 timer += 10;
3000 }
3001 }
3002 return lock;
3003}
3004
3005static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
3006{
3007 u32 reg;
3008 s32 timer = 0;
3009 int lock;
3010
3011 lock = stv090x_get_dmdlock(state, timeout_dmd);
3012 if (lock)
3013 lock = stv090x_get_feclock(state, timeout_fec);
3014
3015 if (lock) {
3016 lock = 0;
3017
3018 while ((timer < timeout_fec) && (!lock)) {
3019 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3020 lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
3021 msleep(1);
3022 timer++;
3023 }
3024 }
3025
3026 return lock;
3027}
3028
3029static int stv090x_set_s2rolloff(struct stv090x_state *state)
3030{
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3031 u32 reg;
3032
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3033 if (state->dev_ver <= 0x20) {
3034 /* rolloff to auto mode if DVBS2 */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3035 reg = STV090x_READ_DEMOD(state, DEMOD);
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3036 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3037 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3038 goto err;
3039 } else {
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3040 /* DVB-S2 rolloff to auto mode if DVBS2 */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3041 reg = STV090x_READ_DEMOD(state, DEMOD);
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3042 STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3043 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3044 goto err;
3045 }
3046 return 0;
3047err:
3048 dprintk(FE_ERROR, 1, "I/O error");
3049 return -1;
3050}
3051
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3052
3053static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
3054{
3055 struct dvb_frontend *fe = &state->frontend;
3056 enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
3057 u32 reg;
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]3058 s32 agc1_power, power_iq = 0, i;
Andreas Regel4e58a682009-04-16 08:40:36 -0300[diff] [blame]3059 int lock = 0, low_sr = 0, no_signal = 0;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3060
3061 reg = STV090x_READ_DEMOD(state, TSCFGH);
3062 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
3063 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3064 goto err;
3065
3066 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
3067 goto err;
3068
3069 if (state->dev_ver >= 0x20) {
Andreas Regel7b035da2009-11-13 18:20:54 -0300[diff] [blame]3070 if (state->srate > 5000000) {
3071 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
3072 goto err;
3073 } else {
3074 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x82) < 0)
3075 goto err;
3076 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3077 }
3078
3079 stv090x_get_lock_tmg(state);
3080
3081 if (state->algo == STV090x_BLIND_SEARCH) {
3082 state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3083 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3084 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3085 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
3086 goto err;
3087 if (stv090x_set_srate(state, 1000000) < 0) /* inital srate = 1Msps */
3088 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3089 } else {
3090 /* known srate */
3091 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
3092 goto err;
3093 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
3094 goto err;
3095
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3096 if (state->srate < 2000000) {
3097 /* SR < 2MSPS */
3098 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3099 goto err;
3100 } else {
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3101 /* SR >= 2Msps */
3102 if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3103 goto err;
3104 }
3105
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3106 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
3107 goto err;
3108
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3109 if (state->dev_ver >= 0x20) {
3110 if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
3111 goto err;
3112 if (state->algo == STV090x_COLD_SEARCH)
Andreas Regel4e58a682009-04-16 08:40:36 -0300[diff] [blame]3113 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3114 else if (state->algo == STV090x_WARM_SEARCH)
3115 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3116 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3117
3118 /* if cold start or warm (Symbolrate is known)
3119 * use a Narrow symbol rate scan range
3120 */
3121 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3122 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3123
3124 if (stv090x_set_srate(state, state->srate) < 0)
3125 goto err;
3126
3127 if (stv090x_set_max_srate(state, state->mclk, state->srate) < 0)
3128 goto err;
3129 if (stv090x_set_min_srate(state, state->mclk, state->srate) < 0)
3130 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3131
3132 if (state->srate >= 10000000)
Andreas Regel4e58a682009-04-16 08:40:36 -0300[diff] [blame]3133 low_sr = 0;
3134 else
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3135 low_sr = 1;
3136 }
3137
3138 /* Setup tuner */
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3139 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
3140 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3141
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3142 if (state->config->tuner_set_bbgain) {
3143 if (state->config->tuner_set_bbgain(fe, 10) < 0) /* 10dB */
3144 goto err;
3145 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3146
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3147 if (state->config->tuner_set_frequency) {
3148 if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
3149 goto err;
3150 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3151
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3152 if (state->config->tuner_set_bandwidth) {
3153 if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
3154 goto err;
3155 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3156
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3157 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
3158 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3159
3160 msleep(50);
3161
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3162 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
3163 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3164
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3165 if (state->config->tuner_get_status) {
3166 if (state->config->tuner_get_status(fe, &reg) < 0)
3167 goto err;
3168 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3169
3170 if (reg)
3171 dprintk(FE_DEBUG, 1, "Tuner phase locked");
3172 else
3173 dprintk(FE_DEBUG, 1, "Tuner unlocked");
3174
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3175 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3176 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3177
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3178 msleep(10);
3179 agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
3180 STV090x_READ_DEMOD(state, AGCIQIN0));
3181
3182 if (agc1_power == 0) {
3183 /* If AGC1 integrator value is 0
3184 * then read POWERI, POWERQ
3185 */
3186 for (i = 0; i < 5; i++) {
3187 power_iq += (STV090x_READ_DEMOD(state, POWERI) +
3188 STV090x_READ_DEMOD(state, POWERQ)) >> 1;
3189 }
3190 power_iq /= 5;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3191 }
3192
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3193 if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
3194 dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
3195 lock = 0;
Andreas Regelc4fa6492009-11-13 18:18:53 -0300[diff] [blame]3196 signal_state = STV090x_NOAGC1;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3197 } else {
3198 reg = STV090x_READ_DEMOD(state, DEMOD);
3199 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
3200
3201 if (state->dev_ver <= 0x20) {
3202 /* rolloff to auto mode if DVBS2 */
3203 STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
3204 } else {
3205 /* DVB-S2 rolloff to auto mode if DVBS2 */
3206 STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
3207 }
3208 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3209 goto err;
3210
3211 if (stv090x_delivery_search(state) < 0)
3212 goto err;
3213
3214 if (state->algo != STV090x_BLIND_SEARCH) {
3215 if (stv090x_start_search(state) < 0)
3216 goto err;
3217 }
3218 }
3219
Andreas Regelc4fa6492009-11-13 18:18:53 -0300[diff] [blame]3220 if (signal_state == STV090x_NOAGC1)
3221 return signal_state;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3222
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3223 if (state->algo == STV090x_BLIND_SEARCH)
3224 lock = stv090x_blind_search(state);
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3225
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3226 else if (state->algo == STV090x_COLD_SEARCH)
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]3227 lock = stv090x_get_coldlock(state, state->DemodTimeout);
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3228
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3229 else if (state->algo == STV090x_WARM_SEARCH)
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]3230 lock = stv090x_get_dmdlock(state, state->DemodTimeout);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3231
3232 if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
3233 if (!low_sr) {
3234 if (stv090x_chk_tmg(state))
3235 lock = stv090x_sw_algo(state);
3236 }
3237 }
3238
3239 if (lock)
3240 signal_state = stv090x_get_sig_params(state);
3241
3242 if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3243 stv090x_optimize_track(state);
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3244
3245 if (state->dev_ver >= 0x20) {
3246 /* >= Cut 2.0 :release TS reset after
3247 * demod lock and optimized Tracking
3248 */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3249 reg = STV090x_READ_DEMOD(state, TSCFGH);
3250 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3251 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3252 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3253
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3254 msleep(3);
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3255
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3256 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3257 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3258 goto err;
3259
3260 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3261 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3262 goto err;
3263 }
3264
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]3265 lock = stv090x_get_lock(state, state->FecTimeout,
3266 state->FecTimeout);
3267 if (lock) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3268 if (state->delsys == STV090x_DVBS2) {
3269 stv090x_set_s2rolloff(state);
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3270
3271 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3272 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
3273 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3274 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3275 /* Reset DVBS2 packet delinator error counter */
3276 reg = STV090x_READ_DEMOD(state, PDELCTRL2);
3277 STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
3278 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3279 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3280
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3281 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
3282 goto err;
3283 } else {
3284 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
3285 goto err;
3286 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3287 /* Reset the Total packet counter */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3288 if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
3289 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3290 /* Reset the packet Error counter2 */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3291 if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3292 goto err;
3293 } else {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3294 signal_state = STV090x_NODATA;
3295 no_signal = stv090x_chk_signal(state);
3296 }
3297 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3298 return signal_state;
3299
3300err:
3301 dprintk(FE_ERROR, 1, "I/O error");
3302 return -1;
3303}
3304
3305static enum dvbfe_search stv090x_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
3306{
3307 struct stv090x_state *state = fe->demodulator_priv;
3308 struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3309
3310 state->delsys = props->delivery_system;
3311 state->frequency = p->frequency;
3312 state->srate = p->u.qpsk.symbol_rate;
Andreas Regel4e58a682009-04-16 08:40:36 -0300[diff] [blame]3313 state->search_mode = STV090x_SEARCH_AUTO;
3314 state->algo = STV090x_COLD_SEARCH;
3315 state->fec = STV090x_PRERR;
Andreas Regelc879d8c2009-11-13 18:11:26 -0300[diff] [blame]3316 if (state->srate > 10000000) {
3317 dprintk(FE_DEBUG, 1, "Search range: 10 MHz");
3318 state->search_range = 10000000;
3319 } else {
3320 dprintk(FE_DEBUG, 1, "Search range: 5 MHz");
3321 state->search_range = 5000000;
3322 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3323
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]3324 if (stv090x_algo(state) == STV090x_RANGEOK) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3325 dprintk(FE_DEBUG, 1, "Search success!");
3326 return DVBFE_ALGO_SEARCH_SUCCESS;
3327 } else {
3328 dprintk(FE_DEBUG, 1, "Search failed!");
3329 return DVBFE_ALGO_SEARCH_FAILED;
3330 }
3331
3332 return DVBFE_ALGO_SEARCH_ERROR;
3333}
3334
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3335static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3336{
3337 struct stv090x_state *state = fe->demodulator_priv;
3338 u32 reg;
3339 u8 search_state;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3340
3341 reg = STV090x_READ_DEMOD(state, DMDSTATE);
3342 search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3343
3344 switch (search_state) {
3345 case 0: /* searching */
3346 case 1: /* first PLH detected */
3347 default:
3348 dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
Andreas Regel9629c5b2009-04-23 14:58:36 -0300[diff] [blame]3349 *status = 0;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3350 break;
3351
3352 case 2: /* DVB-S2 mode */
3353 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
3354 reg = STV090x_READ_DEMOD(state, DSTATUS);
3355 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
Andreas Regel1d436172009-11-13 18:19:54 -0300[diff] [blame]3356 reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
3357 if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
3358 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3359 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3360 *status = FE_HAS_CARRIER |
3361 FE_HAS_VITERBI |
3362 FE_HAS_SYNC |
3363 FE_HAS_LOCK;
3364 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3365 }
3366 }
3367 break;
3368
3369 case 3: /* DVB-S1/legacy mode */
3370 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
3371 reg = STV090x_READ_DEMOD(state, DSTATUS);
3372 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3373 reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3374 if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3375 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3376 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3377 *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3378 }
3379 }
3380 }
3381 break;
3382 }
3383
Andreas Regel9629c5b2009-04-23 14:58:36 -0300[diff] [blame]3384 return 0;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3385}
3386
3387static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
3388{
3389 struct stv090x_state *state = fe->demodulator_priv;
3390
3391 s32 count_4, count_3, count_2, count_1, count_0, count;
3392 u32 reg, h, m, l;
3393 enum fe_status status;
3394
Andreas Regel9629c5b2009-04-23 14:58:36 -0300[diff] [blame]3395 stv090x_read_status(fe, &status);
3396 if (!(status & FE_HAS_LOCK)) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3397 *per = 1 << 23; /* Max PER */
3398 } else {
3399 /* Counter 2 */
3400 reg = STV090x_READ_DEMOD(state, ERRCNT22);
3401 h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
3402
3403 reg = STV090x_READ_DEMOD(state, ERRCNT21);
3404 m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
3405
3406 reg = STV090x_READ_DEMOD(state, ERRCNT20);
3407 l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
3408
3409 *per = ((h << 16) | (m << 8) | l);
3410
3411 count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
3412 count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
3413 count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
3414 count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
3415 count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
3416
3417 if ((!count_4) && (!count_3)) {
3418 count = (count_2 & 0xff) << 16;
3419 count |= (count_1 & 0xff) << 8;
3420 count |= count_0 & 0xff;
3421 } else {
3422 count = 1 << 24;
3423 }
3424 if (count == 0)
3425 *per = 1;
3426 }
3427 if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
3428 goto err;
3429 if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3430 goto err;
3431
3432 return 0;
3433err:
3434 dprintk(FE_ERROR, 1, "I/O error");
3435 return -1;
3436}
3437
3438static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
3439{
3440 int res = 0;
3441 int min = 0, med;
3442
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3443 if ((val >= tab[min].read && val < tab[max].read) ||
3444 (val >= tab[max].read && val < tab[min].read)) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3445 while ((max - min) > 1) {
3446 med = (max + min) / 2;
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3447 if ((val >= tab[min].read && val < tab[med].read) ||
3448 (val >= tab[med].read && val < tab[min].read))
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3449 max = med;
3450 else
3451 min = med;
3452 }
3453 res = ((val - tab[min].read) *
3454 (tab[max].real - tab[min].real) /
3455 (tab[max].read - tab[min].read)) +
3456 tab[min].real;
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3457 } else {
3458 if (tab[min].read < tab[max].read) {
3459 if (val < tab[min].read)
3460 res = tab[min].real;
3461 else if (val >= tab[max].read)
3462 res = tab[max].real;
3463 } else {
3464 if (val >= tab[min].read)
3465 res = tab[min].real;
3466 else if (val < tab[max].read)
3467 res = tab[max].real;
3468 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3469 }
3470
3471 return res;
3472}
3473
3474static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3475{
3476 struct stv090x_state *state = fe->demodulator_priv;
3477 u32 reg;
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3478 s32 agc_0, agc_1, agc;
3479 s32 str;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3480
3481 reg = STV090x_READ_DEMOD(state, AGCIQIN1);
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3482 agc_1 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3483 reg = STV090x_READ_DEMOD(state, AGCIQIN0);
3484 agc_0 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3485 agc = MAKEWORD16(agc_1, agc_0);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3486
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3487 str = stv090x_table_lookup(stv090x_rf_tab,
3488 ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3489 if (agc > stv090x_rf_tab[0].read)
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3490 str = 0;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3491 else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3492 str = -100;
3493 *strength = (str + 100) * 0xFFFF / 100;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3494
3495 return 0;
3496}
3497
3498static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
3499{
3500 struct stv090x_state *state = fe->demodulator_priv;
3501 u32 reg_0, reg_1, reg, i;
3502 s32 val_0, val_1, val = 0;
3503 u8 lock_f;
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3504 s32 div;
3505 u32 last;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3506
3507 switch (state->delsys) {
3508 case STV090x_DVBS2:
3509 reg = STV090x_READ_DEMOD(state, DSTATUS);
3510 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3511 if (lock_f) {
3512 msleep(5);
3513 for (i = 0; i < 16; i++) {
3514 reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
3515 val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3516 reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3517 val_0 = STV090x_GETFIELD_Px(reg_0, NOSPLHT_NORMED_FIELD);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3518 val += MAKEWORD16(val_1, val_0);
3519 msleep(1);
3520 }
3521 val /= 16;
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3522 last = ARRAY_SIZE(stv090x_s2cn_tab) - 1;
3523 div = stv090x_s2cn_tab[0].read -
3524 stv090x_s2cn_tab[last].read;
3525 *cnr = 0xFFFF - ((val * 0xFFFF) / div);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3526 }
3527 break;
3528
3529 case STV090x_DVBS1:
3530 case STV090x_DSS:
3531 reg = STV090x_READ_DEMOD(state, DSTATUS);
3532 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3533 if (lock_f) {
3534 msleep(5);
3535 for (i = 0; i < 16; i++) {
3536 reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
3537 val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3538 reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3539 val_0 = STV090x_GETFIELD_Px(reg_0, NOSDATAT_UNNORMED_FIELD);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3540 val += MAKEWORD16(val_1, val_0);
3541 msleep(1);
3542 }
3543 val /= 16;
Andreas Regeldbeb7db2009-11-13 18:14:00 -0300[diff] [blame]3544 last = ARRAY_SIZE(stv090x_s1cn_tab) - 1;
3545 div = stv090x_s1cn_tab[0].read -
3546 stv090x_s1cn_tab[last].read;
3547 *cnr = 0xFFFF - ((val * 0xFFFF) / div);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3548 }
3549 break;
3550 default:
3551 break;
3552 }
3553
3554 return 0;
3555}
3556
3557static int stv090x_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
3558{
3559 struct stv090x_state *state = fe->demodulator_priv;
3560 u32 reg;
3561
3562 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3563 switch (tone) {
3564 case SEC_TONE_ON:
3565 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3566 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3567 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3568 goto err;
3569 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3570 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3571 goto err;
3572 break;
3573
3574 case SEC_TONE_OFF:
3575 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3576 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3577 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3578 goto err;
3579 break;
3580 default:
3581 return -EINVAL;
3582 }
3583
3584 return 0;
3585err:
3586 dprintk(FE_ERROR, 1, "I/O error");
3587 return -1;
3588}
3589
3590
3591static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
3592{
3593 return DVBFE_ALGO_CUSTOM;
3594}
3595
3596static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
3597{
3598 struct stv090x_state *state = fe->demodulator_priv;
3599 u32 reg, idle = 0, fifo_full = 1;
3600 int i;
3601
3602 reg = STV090x_READ_DEMOD(state, DISTXCTL);
Andreas Regelf9ed95d2009-04-08 17:27:51 -0300[diff] [blame]3603
Oliver Endriss30e8ca22009-12-13 09:02:39 -0300[diff] [blame]3604 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
3605 (state->config->diseqc_envelope_mode) ? 4 : 2);
Andreas Regelf9ed95d2009-04-08 17:27:51 -0300[diff] [blame]3606 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3607 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3608 goto err;
3609 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3610 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3611 goto err;
3612
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3613 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3614 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3615 goto err;
3616
3617 for (i = 0; i < cmd->msg_len; i++) {
3618
3619 while (fifo_full) {
3620 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3621 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3622 }
3623
3624 if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
3625 goto err;
Andreas Regelf9ed95d2009-04-08 17:27:51 -0300[diff] [blame]3626 }
3627 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3628 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3629 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3630 goto err;
3631
3632 i = 0;
3633
3634 while ((!idle) && (i < 10)) {
3635 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3636 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3637 msleep(10);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3638 i++;
3639 }
Andreas Regelf9ed95d2009-04-08 17:27:51 -0300[diff] [blame]3640
3641 return 0;
3642err:
3643 dprintk(FE_ERROR, 1, "I/O error");
3644 return -1;
3645}
3646
3647static int stv090x_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
3648{
3649 struct stv090x_state *state = fe->demodulator_priv;
3650 u32 reg, idle = 0, fifo_full = 1;
3651 u8 mode, value;
3652 int i;
3653
3654 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3655
3656 if (burst == SEC_MINI_A) {
Oliver Endriss30e8ca22009-12-13 09:02:39 -0300[diff] [blame]3657 mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
Andreas Regelf9ed95d2009-04-08 17:27:51 -0300[diff] [blame]3658 value = 0x00;
3659 } else {
Oliver Endriss30e8ca22009-12-13 09:02:39 -0300[diff] [blame]3660 mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
Andreas Regelf9ed95d2009-04-08 17:27:51 -0300[diff] [blame]3661 value = 0xFF;
3662 }
3663
3664 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
3665 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3666 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3667 goto err;
3668 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3669 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3670 goto err;
3671
3672 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3673 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3674 goto err;
3675
3676 while (fifo_full) {
3677 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3678 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3679 }
3680
3681 if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
3682 goto err;
3683
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3684 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3685 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3686 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3687 goto err;
3688
3689 i = 0;
3690
3691 while ((!idle) && (i < 10)) {
3692 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3693 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3694 msleep(10);
3695 i++;
3696 }
3697
3698 return 0;
3699err:
3700 dprintk(FE_ERROR, 1, "I/O error");
3701 return -1;
3702}
3703
3704static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
3705{
3706 struct stv090x_state *state = fe->demodulator_priv;
3707 u32 reg = 0, i = 0, rx_end = 0;
3708
3709 while ((rx_end != 1) && (i < 10)) {
3710 msleep(10);
3711 i++;
3712 reg = STV090x_READ_DEMOD(state, DISRX_ST0);
3713 rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
3714 }
3715
3716 if (rx_end) {
3717 reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
3718 for (i = 0; i < reply->msg_len; i++)
3719 reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
3720 }
3721
3722 return 0;
3723}
3724
3725static int stv090x_sleep(struct dvb_frontend *fe)
3726{
3727 struct stv090x_state *state = fe->demodulator_priv;
3728 u32 reg;
3729
3730 dprintk(FE_DEBUG, 1, "Set %s to sleep",
3731 state->device == STV0900 ? "STV0900" : "STV0903");
3732
3733 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3734 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
3735 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3736 goto err;
3737
Manu Abraham26b03bc2009-04-08 18:27:10 -0300[diff] [blame]3738 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3739 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
3740 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3741 goto err;
3742
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3743 return 0;
3744err:
3745 dprintk(FE_ERROR, 1, "I/O error");
3746 return -1;
3747}
3748
3749static int stv090x_wakeup(struct dvb_frontend *fe)
3750{
3751 struct stv090x_state *state = fe->demodulator_priv;
3752 u32 reg;
3753
3754 dprintk(FE_DEBUG, 1, "Wake %s from standby",
3755 state->device == STV0900 ? "STV0900" : "STV0903");
3756
3757 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3758 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
3759 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3760 goto err;
3761
Manu Abraham26b03bc2009-04-08 18:27:10 -0300[diff] [blame]3762 reg = stv090x_read_reg(state, STV090x_TSTTNR1);
3763 STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
3764 if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
3765 goto err;
3766
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3767 return 0;
3768err:
3769 dprintk(FE_ERROR, 1, "I/O error");
3770 return -1;
3771}
3772
3773static void stv090x_release(struct dvb_frontend *fe)
3774{
3775 struct stv090x_state *state = fe->demodulator_priv;
3776
3777 kfree(state);
3778}
3779
3780static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
3781{
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3782 u32 reg = 0;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3783
Andreas Regela4978a82009-11-13 18:17:45 -0300[diff] [blame]3784 reg = stv090x_read_reg(state, STV090x_GENCFG);
3785
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3786 switch (ldpc_mode) {
3787 case STV090x_DUAL:
3788 default:
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3789 if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3790 /* set LDPC to dual mode */
3791 if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3792 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3793
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3794 state->demod_mode = STV090x_DUAL;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3795
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3796 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3797 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3798 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3799 goto err;
3800 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3801 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3802 goto err;
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3803
3804 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
3805 goto err;
3806 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
3807 goto err;
3808 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
3809 goto err;
3810 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
3811 goto err;
3812 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
3813 goto err;
3814 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
3815 goto err;
3816 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
3817 goto err;
3818
3819 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
3820 goto err;
3821 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
3822 goto err;
3823 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
3824 goto err;
3825 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
3826 goto err;
3827 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
3828 goto err;
3829 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
3830 goto err;
3831 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
3832 goto err;
3833
3834 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
3835 goto err;
3836 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
3837 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3838 }
3839 break;
3840
3841 case STV090x_SINGLE:
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]3842 if (stv090x_stop_modcod(state) < 0)
3843 goto err;
3844 if (stv090x_activate_modcod_single(state) < 0)
3845 goto err;
3846
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3847 if (state->demod == STV090x_DEMODULATOR_1) {
3848 if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
3849 goto err;
3850 } else {
3851 if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
3852 goto err;
3853 }
3854
3855 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3856 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3857 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3858 goto err;
3859 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3860 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3861 goto err;
3862
3863 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3864 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
3865 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3866 goto err;
3867 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
3868 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3869 goto err;
3870 break;
3871 }
3872
3873 return 0;
3874err:
3875 dprintk(FE_ERROR, 1, "I/O error");
3876 return -1;
3877}
3878
3879/* return (Hz), clk in Hz*/
3880static u32 stv090x_get_mclk(struct stv090x_state *state)
3881{
3882 const struct stv090x_config *config = state->config;
3883 u32 div, reg;
3884 u8 ratio;
3885
3886 div = stv090x_read_reg(state, STV090x_NCOARSE);
3887 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3888 ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
3889
3890 return (div + 1) * config->xtal / ratio; /* kHz */
3891}
3892
3893static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
3894{
3895 const struct stv090x_config *config = state->config;
3896 u32 reg, div, clk_sel;
3897
3898 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3899 clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
3900
3901 div = ((clk_sel * mclk) / config->xtal) - 1;
3902
3903 reg = stv090x_read_reg(state, STV090x_NCOARSE);
3904 STV090x_SETFIELD(reg, M_DIV_FIELD, div);
3905 if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
3906 goto err;
3907
3908 state->mclk = stv090x_get_mclk(state);
3909
Manu Abraham94a80912009-04-08 19:45:43 -0300[diff] [blame]3910 /*Set the DiseqC frequency to 22KHz */
3911 div = state->mclk / 704000;
3912 if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
3913 goto err;
3914 if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
3915 goto err;
3916
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3917 return 0;
3918err:
3919 dprintk(FE_ERROR, 1, "I/O error");
3920 return -1;
3921}
3922
3923static int stv090x_set_tspath(struct stv090x_state *state)
3924{
3925 u32 reg;
3926
3927 if (state->dev_ver >= 0x20) {
3928 switch (state->config->ts1_mode) {
3929 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3930 case STV090x_TSMODE_DVBCI:
3931 switch (state->config->ts2_mode) {
3932 case STV090x_TSMODE_SERIAL_PUNCTURED:
3933 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3934 default:
3935 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
3936 break;
3937
3938 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3939 case STV090x_TSMODE_DVBCI:
3940 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
3941 goto err;
3942 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3943 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3944 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3945 goto err;
3946 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
3947 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3948 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
3949 goto err;
3950 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
3951 goto err;
3952 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
3953 goto err;
3954 break;
3955 }
3956 break;
3957
3958 case STV090x_TSMODE_SERIAL_PUNCTURED:
3959 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3960 default:
3961 switch (state->config->ts2_mode) {
3962 case STV090x_TSMODE_SERIAL_PUNCTURED:
3963 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3964 default:
3965 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
3966 goto err;
3967 break;
3968
3969 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3970 case STV090x_TSMODE_DVBCI:
3971 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
3972 goto err;
3973 break;
3974 }
3975 break;
3976 }
3977 } else {
3978 switch (state->config->ts1_mode) {
3979 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3980 case STV090x_TSMODE_DVBCI:
3981 switch (state->config->ts2_mode) {
3982 case STV090x_TSMODE_SERIAL_PUNCTURED:
3983 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3984 default:
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]3985 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3986 break;
3987
3988 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3989 case STV090x_TSMODE_DVBCI:
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]3990 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3991 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3992 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3993 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3994 goto err;
3995 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3996 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
3997 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3998 goto err;
3999 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
4000 goto err;
4001 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
4002 goto err;
4003 break;
4004 }
4005 break;
4006
4007 case STV090x_TSMODE_SERIAL_PUNCTURED:
4008 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4009 default:
4010 switch (state->config->ts2_mode) {
4011 case STV090x_TSMODE_SERIAL_PUNCTURED:
4012 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4013 default:
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]4014 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4015 break;
4016
4017 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4018 case STV090x_TSMODE_DVBCI:
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]4019 stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4020 break;
4021 }
4022 break;
4023 }
4024 }
4025
4026 switch (state->config->ts1_mode) {
4027 case STV090x_TSMODE_PARALLEL_PUNCTURED:
4028 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4029 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4030 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4031 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4032 goto err;
4033 break;
4034
4035 case STV090x_TSMODE_DVBCI:
4036 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4037 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4038 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4039 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4040 goto err;
4041 break;
4042
4043 case STV090x_TSMODE_SERIAL_PUNCTURED:
4044 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4045 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4046 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
4047 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4048 goto err;
4049 break;
4050
4051 case STV090x_TSMODE_SERIAL_CONTINUOUS:
4052 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4053 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4054 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
4055 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4056 goto err;
4057 break;
4058
4059 default:
4060 break;
4061 }
4062
4063 switch (state->config->ts2_mode) {
4064 case STV090x_TSMODE_PARALLEL_PUNCTURED:
Andreas Regel64104dc2009-04-16 08:43:41 -0300[diff] [blame]4065 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4066 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4067 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
Andreas Regel64104dc2009-04-16 08:43:41 -0300[diff] [blame]4068 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4069 goto err;
4070 break;
4071
4072 case STV090x_TSMODE_DVBCI:
Andreas Regel64104dc2009-04-16 08:43:41 -0300[diff] [blame]4073 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4074 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
4075 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
Andreas Regel64104dc2009-04-16 08:43:41 -0300[diff] [blame]4076 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4077 goto err;
4078 break;
4079
4080 case STV090x_TSMODE_SERIAL_PUNCTURED:
Andreas Regel64104dc2009-04-16 08:43:41 -0300[diff] [blame]4081 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4082 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4083 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
Andreas Regel64104dc2009-04-16 08:43:41 -0300[diff] [blame]4084 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4085 goto err;
4086 break;
4087
4088 case STV090x_TSMODE_SERIAL_CONTINUOUS:
Andreas Regel64104dc2009-04-16 08:43:41 -0300[diff] [blame]4089 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4090 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
4091 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
Andreas Regel64104dc2009-04-16 08:43:41 -0300[diff] [blame]4092 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4093 goto err;
4094 break;
4095
4096 default:
4097 break;
4098 }
4099 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
4100 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4101 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4102 goto err;
4103 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4104 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
4105 goto err;
4106
4107 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
4108 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
4109 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4110 goto err;
4111 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
4112 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
4113 goto err;
4114
4115 return 0;
4116err:
4117 dprintk(FE_ERROR, 1, "I/O error");
4118 return -1;
4119}
4120
4121static int stv090x_init(struct dvb_frontend *fe)
4122{
4123 struct stv090x_state *state = fe->demodulator_priv;
4124 const struct stv090x_config *config = state->config;
4125 u32 reg;
4126
Andreas Regelcbc320d2009-04-23 14:59:03 -0300[diff] [blame]4127 if (stv090x_wakeup(fe) < 0) {
4128 dprintk(FE_ERROR, 1, "Error waking device");
4129 goto err;
4130 }
4131
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]4132 if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
4133 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4134
4135 reg = STV090x_READ_DEMOD(state, TNRCFG2);
4136 STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
4137 if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
4138 goto err;
4139 reg = STV090x_READ_DEMOD(state, DEMOD);
4140 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
4141 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
4142 goto err;
4143
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]4144 if (stv090x_i2c_gate_ctrl(fe, 1) < 0)
4145 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4146
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]4147 if (config->tuner_set_mode) {
4148 if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
4149 goto err;
4150 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4151
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]4152 if (config->tuner_init) {
4153 if (config->tuner_init(fe) < 0)
4154 goto err;
4155 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4156
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]4157 if (stv090x_i2c_gate_ctrl(fe, 0) < 0)
4158 goto err;
4159
4160 if (stv090x_set_tspath(state) < 0)
4161 goto err;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4162
4163 return 0;
4164err:
4165 dprintk(FE_ERROR, 1, "I/O error");
4166 return -1;
4167}
4168
4169static int stv090x_setup(struct dvb_frontend *fe)
4170{
4171 struct stv090x_state *state = fe->demodulator_priv;
4172 const struct stv090x_config *config = state->config;
4173 const struct stv090x_reg *stv090x_initval = NULL;
4174 const struct stv090x_reg *stv090x_cut20_val = NULL;
4175 unsigned long t1_size = 0, t2_size = 0;
Manu Abraham017eb0382009-04-07 05:19:54 -0300[diff] [blame]4176 u32 reg = 0;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4177
4178 int i;
4179
4180 if (state->device == STV0900) {
4181 dprintk(FE_DEBUG, 1, "Initializing STV0900");
4182 stv090x_initval = stv0900_initval;
4183 t1_size = ARRAY_SIZE(stv0900_initval);
4184 stv090x_cut20_val = stv0900_cut20_val;
4185 t2_size = ARRAY_SIZE(stv0900_cut20_val);
4186 } else if (state->device == STV0903) {
4187 dprintk(FE_DEBUG, 1, "Initializing STV0903");
4188 stv090x_initval = stv0903_initval;
4189 t1_size = ARRAY_SIZE(stv0903_initval);
4190 stv090x_cut20_val = stv0903_cut20_val;
4191 t2_size = ARRAY_SIZE(stv0903_cut20_val);
4192 }
4193
4194 /* STV090x init */
4195 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Stop Demod */
4196 goto err;
4197
4198 msleep(5);
4199
4200 if (STV090x_WRITE_DEMOD(state, TNRCFG, 0x6c) < 0) /* check register ! (No Tuner Mode) */
4201 goto err;
4202
Manu Abraham017eb0382009-04-07 05:19:54 -0300[diff] [blame]4203 STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
4204 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0) /* repeater OFF */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4205 goto err;
4206
4207 if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
4208 goto err;
4209 msleep(5);
4210 if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
4211 goto err;
4212 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
4213 goto err;
4214 msleep(5);
4215
4216 /* write initval */
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]4217 dprintk(FE_DEBUG, 1, "Setting up initial values");
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4218 for (i = 0; i < t1_size; i++) {
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4219 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
4220 goto err;
4221 }
4222
Andreas Regel2f5914b2009-04-23 14:56:41 -0300[diff] [blame]4223 state->dev_ver = stv090x_read_reg(state, STV090x_MID);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4224 if (state->dev_ver >= 0x20) {
4225 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
4226 goto err;
4227
4228 /* write cut20_val*/
4229 dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
4230 for (i = 0; i < t2_size; i++) {
4231 if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
4232 goto err;
4233 }
Manu Abraham27d40322009-05-02 18:26:58 -0300[diff] [blame]4234
4235 } else if (state->dev_ver < 0x20) {
4236 dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
4237 state->dev_ver);
4238
4239 goto err;
4240 } else if (state->dev_ver > 0x30) {
4241 /* we shouldn't bail out from here */
4242 dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
4243 state->dev_ver);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4244 }
4245
4246 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
4247 goto err;
4248 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
4249 goto err;
4250
4251 stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
4252 msleep(5);
4253 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0)
4254 goto err;
4255 stv090x_get_mclk(state);
4256
4257 return 0;
4258err:
4259 dprintk(FE_ERROR, 1, "I/O error");
4260 return -1;
4261}
4262
4263static struct dvb_frontend_ops stv090x_ops = {
4264
4265 .info = {
4266 .name = "STV090x Multistandard",
Andreas Regel7fc08bb2009-04-23 15:00:40 -0300[diff] [blame]4267 .type = FE_QPSK,
4268 .frequency_min = 950000,
4269 .frequency_max = 2150000,
4270 .frequency_stepsize = 0,
4271 .frequency_tolerance = 0,
4272 .symbol_rate_min = 1000000,
4273 .symbol_rate_max = 45000000,
4274 .caps = FE_CAN_INVERSION_AUTO |
4275 FE_CAN_FEC_AUTO |
4276 FE_CAN_QPSK |
4277 FE_CAN_2G_MODULATION
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4278 },
4279
4280 .release = stv090x_release,
4281 .init = stv090x_init,
4282
4283 .sleep = stv090x_sleep,
4284 .get_frontend_algo = stv090x_frontend_algo,
4285
4286 .i2c_gate_ctrl = stv090x_i2c_gate_ctrl,
4287
4288 .diseqc_send_master_cmd = stv090x_send_diseqc_msg,
Andreas Regelf9ed95d2009-04-08 17:27:51 -0300[diff] [blame]4289 .diseqc_send_burst = stv090x_send_diseqc_burst,
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4290 .diseqc_recv_slave_reply = stv090x_recv_slave_reply,
4291 .set_tone = stv090x_set_tone,
4292
4293 .search = stv090x_search,
4294 .read_status = stv090x_read_status,
4295 .read_ber = stv090x_read_per,
4296 .read_signal_strength = stv090x_read_signal_strength,
4297 .read_snr = stv090x_read_cnr
4298};
4299
4300
4301struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
4302 struct i2c_adapter *i2c,
4303 enum stv090x_demodulator demod)
4304{
4305 struct stv090x_state *state = NULL;
4306
4307 state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
4308 if (state == NULL)
4309 goto error;
4310
4311 state->verbose = &verbose;
4312 state->config = config;
4313 state->i2c = i2c;
4314 state->frontend.ops = stv090x_ops;
4315 state->frontend.demodulator_priv = state;
Manu Abraham56571502009-04-07 16:08:26 -0300[diff] [blame]4316 state->demod = demod;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4317 state->demod_mode = config->demod_mode; /* Single or Dual mode */
4318 state->device = config->device;
Andreas Regel4e58a682009-04-16 08:40:36 -0300[diff] [blame]4319 state->rolloff = STV090x_RO_35; /* default */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4320
4321 if (state->demod == STV090x_DEMODULATOR_0)
4322 mutex_init(&demod_lock);
4323
4324 if (stv090x_sleep(&state->frontend) < 0) {
4325 dprintk(FE_ERROR, 1, "Error putting device to sleep");
4326 goto error;
4327 }
4328
4329 if (stv090x_setup(&state->frontend) < 0) {
4330 dprintk(FE_ERROR, 1, "Error setting up device");
4331 goto error;
4332 }
4333 if (stv090x_wakeup(&state->frontend) < 0) {
4334 dprintk(FE_ERROR, 1, "Error waking device");
4335 goto error;
4336 }
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]4337
4338 dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x\n",
4339 state->device == STV0900 ? "STV0900" : "STV0903",
4340 demod,
4341 state->dev_ver);
4342
4343 return &state->frontend;
4344
4345error:
4346 kfree(state);
4347 return NULL;
4348}
4349EXPORT_SYMBOL(stv090x_attach);
4350MODULE_PARM_DESC(verbose, "Set Verbosity level");
4351MODULE_AUTHOR("Manu Abraham");
4352MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
4353MODULE_LICENSE("GPL");