Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 1 | /* |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 2 | * Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 13 | #include <linux/bitmap.h> |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 14 | #include <linux/delay.h> |
| 15 | #include <linux/err.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/io.h> |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 18 | #include <linux/irqchip/chained_irq.h> |
| 19 | #include <linux/irqdomain.h> |
| 20 | #include <linux/irq.h> |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 21 | #include <linux/kernel.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/of.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/slab.h> |
| 26 | #include <linux/spmi.h> |
| 27 | |
| 28 | /* PMIC Arbiter configuration registers */ |
| 29 | #define PMIC_ARB_VERSION 0x0000 |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 30 | #define PMIC_ARB_VERSION_V2_MIN 0x20010000 |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 31 | #define PMIC_ARB_INT_EN 0x0004 |
| 32 | |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 33 | /* PMIC Arbiter channel registers offsets */ |
| 34 | #define PMIC_ARB_CMD 0x00 |
| 35 | #define PMIC_ARB_CONFIG 0x04 |
| 36 | #define PMIC_ARB_STATUS 0x08 |
| 37 | #define PMIC_ARB_WDATA0 0x10 |
| 38 | #define PMIC_ARB_WDATA1 0x14 |
| 39 | #define PMIC_ARB_RDATA0 0x18 |
| 40 | #define PMIC_ARB_RDATA1 0x1C |
| 41 | #define PMIC_ARB_REG_CHNL(N) (0x800 + 0x4 * (N)) |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 42 | |
| 43 | /* Mapping Table */ |
| 44 | #define SPMI_MAPPING_TABLE_REG(N) (0x0B00 + (4 * (N))) |
| 45 | #define SPMI_MAPPING_BIT_INDEX(X) (((X) >> 18) & 0xF) |
| 46 | #define SPMI_MAPPING_BIT_IS_0_FLAG(X) (((X) >> 17) & 0x1) |
| 47 | #define SPMI_MAPPING_BIT_IS_0_RESULT(X) (((X) >> 9) & 0xFF) |
| 48 | #define SPMI_MAPPING_BIT_IS_1_FLAG(X) (((X) >> 8) & 0x1) |
| 49 | #define SPMI_MAPPING_BIT_IS_1_RESULT(X) (((X) >> 0) & 0xFF) |
| 50 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 51 | #define SPMI_MAPPING_TABLE_TREE_DEPTH 16 /* Maximum of 16-bits */ |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 52 | #define PMIC_ARB_MAX_PPID BIT(12) /* PPID is 12bit */ |
| 53 | #define PMIC_ARB_CHAN_VALID BIT(15) |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 54 | |
| 55 | /* Ownership Table */ |
| 56 | #define SPMI_OWNERSHIP_TABLE_REG(N) (0x0700 + (4 * (N))) |
| 57 | #define SPMI_OWNERSHIP_PERIPH2OWNER(X) ((X) & 0x7) |
| 58 | |
| 59 | /* Channel Status fields */ |
| 60 | enum pmic_arb_chnl_status { |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 61 | PMIC_ARB_STATUS_DONE = BIT(0), |
| 62 | PMIC_ARB_STATUS_FAILURE = BIT(1), |
| 63 | PMIC_ARB_STATUS_DENIED = BIT(2), |
| 64 | PMIC_ARB_STATUS_DROPPED = BIT(3), |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 65 | }; |
| 66 | |
| 67 | /* Command register fields */ |
| 68 | #define PMIC_ARB_CMD_MAX_BYTE_COUNT 8 |
| 69 | |
| 70 | /* Command Opcodes */ |
| 71 | enum pmic_arb_cmd_op_code { |
| 72 | PMIC_ARB_OP_EXT_WRITEL = 0, |
| 73 | PMIC_ARB_OP_EXT_READL = 1, |
| 74 | PMIC_ARB_OP_EXT_WRITE = 2, |
| 75 | PMIC_ARB_OP_RESET = 3, |
| 76 | PMIC_ARB_OP_SLEEP = 4, |
| 77 | PMIC_ARB_OP_SHUTDOWN = 5, |
| 78 | PMIC_ARB_OP_WAKEUP = 6, |
| 79 | PMIC_ARB_OP_AUTHENTICATE = 7, |
| 80 | PMIC_ARB_OP_MSTR_READ = 8, |
| 81 | PMIC_ARB_OP_MSTR_WRITE = 9, |
| 82 | PMIC_ARB_OP_EXT_READ = 13, |
| 83 | PMIC_ARB_OP_WRITE = 14, |
| 84 | PMIC_ARB_OP_READ = 15, |
| 85 | PMIC_ARB_OP_ZERO_WRITE = 16, |
| 86 | }; |
| 87 | |
| 88 | /* Maximum number of support PMIC peripherals */ |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 89 | #define PMIC_ARB_MAX_PERIPHS 512 |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 90 | #define PMIC_ARB_TIMEOUT_US 100 |
| 91 | #define PMIC_ARB_MAX_TRANS_BYTES (8) |
| 92 | |
| 93 | #define PMIC_ARB_APID_MASK 0xFF |
| 94 | #define PMIC_ARB_PPID_MASK 0xFFF |
| 95 | |
| 96 | /* interrupt enable bit */ |
| 97 | #define SPMI_PIC_ACC_ENABLE_BIT BIT(0) |
| 98 | |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 99 | struct pmic_arb_ver_ops; |
| 100 | |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 101 | struct apid_data { |
| 102 | u16 ppid; |
| 103 | u8 owner; |
| 104 | u8 enabled_irq_mask; |
| 105 | }; |
| 106 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 107 | /** |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 108 | * spmi_pmic_arb - SPMI PMIC Arbiter object |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 109 | * |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 110 | * @rd_base: on v1 "core", on v2 "observer" register base off DT. |
| 111 | * @wr_base: on v1 "core", on v2 "chnls" register base off DT. |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 112 | * @intr: address of the SPMI interrupt control registers. |
| 113 | * @cnfg: address of the PMIC Arbiter configuration registers. |
| 114 | * @lock: lock to synchronize accesses. |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 115 | * @channel: execution environment channel to use for accesses. |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 116 | * @irq: PMIC ARB interrupt. |
| 117 | * @ee: the current Execution Environment |
| 118 | * @min_apid: minimum APID (used for bounding IRQ search) |
| 119 | * @max_apid: maximum APID |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 120 | * @max_periph: maximum number of PMIC peripherals supported by HW. |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 121 | * @mapping_table: in-memory copy of PPID -> APID mapping table. |
| 122 | * @domain: irq domain object for PMIC IRQ domain |
| 123 | * @spmic: SPMI controller object |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 124 | * @ver_ops: version dependent operations. |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 125 | * @ppid_to_apid in-memory copy of PPID -> channel (APID) mapping table. |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 126 | * v2 only. |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 127 | */ |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 128 | struct spmi_pmic_arb { |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 129 | void __iomem *rd_base; |
| 130 | void __iomem *wr_base; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 131 | void __iomem *intr; |
| 132 | void __iomem *cnfg; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 133 | void __iomem *core; |
| 134 | resource_size_t core_size; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 135 | raw_spinlock_t lock; |
| 136 | u8 channel; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 137 | int irq; |
| 138 | u8 ee; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 139 | u16 min_apid; |
| 140 | u16 max_apid; |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 141 | u16 max_periph; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 142 | u32 *mapping_table; |
| 143 | DECLARE_BITMAP(mapping_table_valid, PMIC_ARB_MAX_PERIPHS); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 144 | struct irq_domain *domain; |
| 145 | struct spmi_controller *spmic; |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 146 | const struct pmic_arb_ver_ops *ver_ops; |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 147 | u16 *ppid_to_apid; |
| 148 | u16 last_apid; |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 149 | struct apid_data apid_data[PMIC_ARB_MAX_PERIPHS]; |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 150 | }; |
| 151 | |
| 152 | /** |
| 153 | * pmic_arb_ver: version dependent functionality. |
| 154 | * |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 155 | * @mode: access rights to specified pmic peripheral. |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 156 | * @non_data_cmd: on v1 issues an spmi non-data command. |
| 157 | * on v2 no HW support, returns -EOPNOTSUPP. |
| 158 | * @offset: on v1 offset of per-ee channel. |
| 159 | * on v2 offset of per-ee and per-ppid channel. |
| 160 | * @fmt_cmd: formats a GENI/SPMI command. |
| 161 | * @owner_acc_status: on v1 offset of PMIC_ARB_SPMI_PIC_OWNERm_ACC_STATUSn |
| 162 | * on v2 offset of SPMI_PIC_OWNERm_ACC_STATUSn. |
| 163 | * @acc_enable: on v1 offset of PMIC_ARB_SPMI_PIC_ACC_ENABLEn |
| 164 | * on v2 offset of SPMI_PIC_ACC_ENABLEn. |
| 165 | * @irq_status: on v1 offset of PMIC_ARB_SPMI_PIC_IRQ_STATUSn |
| 166 | * on v2 offset of SPMI_PIC_IRQ_STATUSn. |
| 167 | * @irq_clear: on v1 offset of PMIC_ARB_SPMI_PIC_IRQ_CLEARn |
| 168 | * on v2 offset of SPMI_PIC_IRQ_CLEARn. |
| 169 | */ |
| 170 | struct pmic_arb_ver_ops { |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 171 | int (*ppid_to_apid)(struct spmi_pmic_arb *pa, u8 sid, u16 addr, |
| 172 | u8 *apid); |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 173 | int (*mode)(struct spmi_pmic_arb *dev, u8 sid, u16 addr, |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 174 | mode_t *mode); |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 175 | /* spmi commands (read_cmd, write_cmd, cmd) functionality */ |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 176 | int (*offset)(struct spmi_pmic_arb *dev, u8 sid, u16 addr, |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 177 | u32 *offset); |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 178 | u32 (*fmt_cmd)(u8 opc, u8 sid, u16 addr, u8 bc); |
| 179 | int (*non_data_cmd)(struct spmi_controller *ctrl, u8 opc, u8 sid); |
| 180 | /* Interrupts controller functionality (offset of PIC registers) */ |
| 181 | u32 (*owner_acc_status)(u8 m, u8 n); |
| 182 | u32 (*acc_enable)(u8 n); |
| 183 | u32 (*irq_status)(u8 n); |
| 184 | u32 (*irq_clear)(u8 n); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 185 | }; |
| 186 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 187 | static inline void pmic_arb_base_write(struct spmi_pmic_arb *pa, |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 188 | u32 offset, u32 val) |
| 189 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 190 | writel_relaxed(val, pa->wr_base + offset); |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 191 | } |
| 192 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 193 | static inline void pmic_arb_set_rd_cmd(struct spmi_pmic_arb *pa, |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 194 | u32 offset, u32 val) |
| 195 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 196 | writel_relaxed(val, pa->rd_base + offset); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 197 | } |
| 198 | |
| 199 | /** |
| 200 | * pa_read_data: reads pmic-arb's register and copy 1..4 bytes to buf |
| 201 | * @bc: byte count -1. range: 0..3 |
| 202 | * @reg: register's address |
| 203 | * @buf: output parameter, length must be bc + 1 |
| 204 | */ |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 205 | static void pa_read_data(struct spmi_pmic_arb *pa, u8 *buf, u32 reg, u8 bc) |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 206 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 207 | u32 data = __raw_readl(pa->rd_base + reg); |
| 208 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 209 | memcpy(buf, &data, (bc & 3) + 1); |
| 210 | } |
| 211 | |
| 212 | /** |
| 213 | * pa_write_data: write 1..4 bytes from buf to pmic-arb's register |
| 214 | * @bc: byte-count -1. range: 0..3. |
| 215 | * @reg: register's address. |
| 216 | * @buf: buffer to write. length must be bc + 1. |
| 217 | */ |
| 218 | static void |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 219 | pa_write_data(struct spmi_pmic_arb *pa, const u8 *buf, u32 reg, u8 bc) |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 220 | { |
| 221 | u32 data = 0; |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 222 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 223 | memcpy(&data, buf, (bc & 3) + 1); |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 224 | pmic_arb_base_write(pa, reg, data); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 225 | } |
| 226 | |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 227 | static int pmic_arb_wait_for_done(struct spmi_controller *ctrl, |
| 228 | void __iomem *base, u8 sid, u16 addr) |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 229 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 230 | struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 231 | u32 status = 0; |
| 232 | u32 timeout = PMIC_ARB_TIMEOUT_US; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 233 | u32 offset; |
| 234 | int rc; |
| 235 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 236 | rc = pa->ver_ops->offset(pa, sid, addr, &offset); |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 237 | if (rc) |
| 238 | return rc; |
| 239 | |
| 240 | offset += PMIC_ARB_STATUS; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 241 | |
| 242 | while (timeout--) { |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 243 | status = readl_relaxed(base + offset); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 244 | |
| 245 | if (status & PMIC_ARB_STATUS_DONE) { |
| 246 | if (status & PMIC_ARB_STATUS_DENIED) { |
| 247 | dev_err(&ctrl->dev, |
| 248 | "%s: transaction denied (0x%x)\n", |
| 249 | __func__, status); |
| 250 | return -EPERM; |
| 251 | } |
| 252 | |
| 253 | if (status & PMIC_ARB_STATUS_FAILURE) { |
| 254 | dev_err(&ctrl->dev, |
| 255 | "%s: transaction failed (0x%x)\n", |
| 256 | __func__, status); |
| 257 | return -EIO; |
| 258 | } |
| 259 | |
| 260 | if (status & PMIC_ARB_STATUS_DROPPED) { |
| 261 | dev_err(&ctrl->dev, |
| 262 | "%s: transaction dropped (0x%x)\n", |
| 263 | __func__, status); |
| 264 | return -EIO; |
| 265 | } |
| 266 | |
| 267 | return 0; |
| 268 | } |
| 269 | udelay(1); |
| 270 | } |
| 271 | |
| 272 | dev_err(&ctrl->dev, |
| 273 | "%s: timeout, status 0x%x\n", |
| 274 | __func__, status); |
| 275 | return -ETIMEDOUT; |
| 276 | } |
| 277 | |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 278 | static int |
| 279 | pmic_arb_non_data_cmd_v1(struct spmi_controller *ctrl, u8 opc, u8 sid) |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 280 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 281 | struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 282 | unsigned long flags; |
| 283 | u32 cmd; |
| 284 | int rc; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 285 | u32 offset; |
| 286 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 287 | rc = pa->ver_ops->offset(pa, sid, 0, &offset); |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 288 | if (rc) |
| 289 | return rc; |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 290 | |
| 291 | cmd = ((opc | 0x40) << 27) | ((sid & 0xf) << 20); |
| 292 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 293 | raw_spin_lock_irqsave(&pa->lock, flags); |
| 294 | pmic_arb_base_write(pa, offset + PMIC_ARB_CMD, cmd); |
| 295 | rc = pmic_arb_wait_for_done(ctrl, pa->wr_base, sid, 0); |
| 296 | raw_spin_unlock_irqrestore(&pa->lock, flags); |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 297 | |
| 298 | return rc; |
| 299 | } |
| 300 | |
| 301 | static int |
| 302 | pmic_arb_non_data_cmd_v2(struct spmi_controller *ctrl, u8 opc, u8 sid) |
| 303 | { |
| 304 | return -EOPNOTSUPP; |
| 305 | } |
| 306 | |
| 307 | /* Non-data command */ |
| 308 | static int pmic_arb_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid) |
| 309 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 310 | struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl); |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 311 | |
| 312 | dev_dbg(&ctrl->dev, "cmd op:0x%x sid:%d\n", opc, sid); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 313 | |
| 314 | /* Check for valid non-data command */ |
| 315 | if (opc < SPMI_CMD_RESET || opc > SPMI_CMD_WAKEUP) |
| 316 | return -EINVAL; |
| 317 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 318 | return pa->ver_ops->non_data_cmd(ctrl, opc, sid); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 319 | } |
| 320 | |
| 321 | static int pmic_arb_read_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, |
| 322 | u16 addr, u8 *buf, size_t len) |
| 323 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 324 | struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 325 | unsigned long flags; |
| 326 | u8 bc = len - 1; |
| 327 | u32 cmd; |
| 328 | int rc; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 329 | u32 offset; |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 330 | mode_t mode; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 331 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 332 | rc = pa->ver_ops->offset(pa, sid, addr, &offset); |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 333 | if (rc) |
| 334 | return rc; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 335 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 336 | rc = pa->ver_ops->mode(pa, sid, addr, &mode); |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 337 | if (rc) |
| 338 | return rc; |
| 339 | |
| 340 | if (!(mode & 0400)) { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 341 | dev_err(&pa->spmic->dev, |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 342 | "error: impermissible read from peripheral sid:%d addr:0x%x\n", |
| 343 | sid, addr); |
| 344 | return -ENODEV; |
| 345 | } |
| 346 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 347 | if (bc >= PMIC_ARB_MAX_TRANS_BYTES) { |
| 348 | dev_err(&ctrl->dev, |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 349 | "pmic-arb supports 1..%d bytes per trans, but:%zu requested", |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 350 | PMIC_ARB_MAX_TRANS_BYTES, len); |
| 351 | return -EINVAL; |
| 352 | } |
| 353 | |
| 354 | /* Check the opcode */ |
| 355 | if (opc >= 0x60 && opc <= 0x7F) |
| 356 | opc = PMIC_ARB_OP_READ; |
| 357 | else if (opc >= 0x20 && opc <= 0x2F) |
| 358 | opc = PMIC_ARB_OP_EXT_READ; |
| 359 | else if (opc >= 0x38 && opc <= 0x3F) |
| 360 | opc = PMIC_ARB_OP_EXT_READL; |
| 361 | else |
| 362 | return -EINVAL; |
| 363 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 364 | cmd = pa->ver_ops->fmt_cmd(opc, sid, addr, bc); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 365 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 366 | raw_spin_lock_irqsave(&pa->lock, flags); |
| 367 | pmic_arb_set_rd_cmd(pa, offset + PMIC_ARB_CMD, cmd); |
| 368 | rc = pmic_arb_wait_for_done(ctrl, pa->rd_base, sid, addr); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 369 | if (rc) |
| 370 | goto done; |
| 371 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 372 | pa_read_data(pa, buf, offset + PMIC_ARB_RDATA0, |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 373 | min_t(u8, bc, 3)); |
| 374 | |
| 375 | if (bc > 3) |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 376 | pa_read_data(pa, buf + 4, offset + PMIC_ARB_RDATA1, bc - 4); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 377 | |
| 378 | done: |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 379 | raw_spin_unlock_irqrestore(&pa->lock, flags); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 380 | return rc; |
| 381 | } |
| 382 | |
| 383 | static int pmic_arb_write_cmd(struct spmi_controller *ctrl, u8 opc, u8 sid, |
| 384 | u16 addr, const u8 *buf, size_t len) |
| 385 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 386 | struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 387 | unsigned long flags; |
| 388 | u8 bc = len - 1; |
| 389 | u32 cmd; |
| 390 | int rc; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 391 | u32 offset; |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 392 | mode_t mode; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 393 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 394 | rc = pa->ver_ops->offset(pa, sid, addr, &offset); |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 395 | if (rc) |
| 396 | return rc; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 397 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 398 | rc = pa->ver_ops->mode(pa, sid, addr, &mode); |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 399 | if (rc) |
| 400 | return rc; |
| 401 | |
| 402 | if (!(mode & 0200)) { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 403 | dev_err(&pa->spmic->dev, |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 404 | "error: impermissible write to peripheral sid:%d addr:0x%x\n", |
| 405 | sid, addr); |
| 406 | return -ENODEV; |
| 407 | } |
| 408 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 409 | if (bc >= PMIC_ARB_MAX_TRANS_BYTES) { |
| 410 | dev_err(&ctrl->dev, |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 411 | "pmic-arb supports 1..%d bytes per trans, but:%zu requested", |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 412 | PMIC_ARB_MAX_TRANS_BYTES, len); |
| 413 | return -EINVAL; |
| 414 | } |
| 415 | |
| 416 | /* Check the opcode */ |
| 417 | if (opc >= 0x40 && opc <= 0x5F) |
| 418 | opc = PMIC_ARB_OP_WRITE; |
| 419 | else if (opc >= 0x00 && opc <= 0x0F) |
| 420 | opc = PMIC_ARB_OP_EXT_WRITE; |
| 421 | else if (opc >= 0x30 && opc <= 0x37) |
| 422 | opc = PMIC_ARB_OP_EXT_WRITEL; |
Stephen Boyd | 9b76968 | 2015-08-28 12:31:10 -0700 | [diff] [blame] | 423 | else if (opc >= 0x80) |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 424 | opc = PMIC_ARB_OP_ZERO_WRITE; |
| 425 | else |
| 426 | return -EINVAL; |
| 427 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 428 | cmd = pa->ver_ops->fmt_cmd(opc, sid, addr, bc); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 429 | |
| 430 | /* Write data to FIFOs */ |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 431 | raw_spin_lock_irqsave(&pa->lock, flags); |
| 432 | pa_write_data(pa, buf, offset + PMIC_ARB_WDATA0, min_t(u8, bc, 3)); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 433 | if (bc > 3) |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 434 | pa_write_data(pa, buf + 4, offset + PMIC_ARB_WDATA1, bc - 4); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 435 | |
| 436 | /* Start the transaction */ |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 437 | pmic_arb_base_write(pa, offset + PMIC_ARB_CMD, cmd); |
| 438 | rc = pmic_arb_wait_for_done(ctrl, pa->wr_base, sid, addr); |
| 439 | raw_spin_unlock_irqrestore(&pa->lock, flags); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 440 | |
| 441 | return rc; |
| 442 | } |
| 443 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 444 | enum qpnpint_regs { |
| 445 | QPNPINT_REG_RT_STS = 0x10, |
| 446 | QPNPINT_REG_SET_TYPE = 0x11, |
| 447 | QPNPINT_REG_POLARITY_HIGH = 0x12, |
| 448 | QPNPINT_REG_POLARITY_LOW = 0x13, |
| 449 | QPNPINT_REG_LATCHED_CLR = 0x14, |
| 450 | QPNPINT_REG_EN_SET = 0x15, |
| 451 | QPNPINT_REG_EN_CLR = 0x16, |
| 452 | QPNPINT_REG_LATCHED_STS = 0x18, |
| 453 | }; |
| 454 | |
| 455 | struct spmi_pmic_arb_qpnpint_type { |
| 456 | u8 type; /* 1 -> edge */ |
| 457 | u8 polarity_high; |
| 458 | u8 polarity_low; |
| 459 | } __packed; |
| 460 | |
| 461 | /* Simplified accessor functions for irqchip callbacks */ |
| 462 | static void qpnpint_spmi_write(struct irq_data *d, u8 reg, void *buf, |
| 463 | size_t len) |
| 464 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 465 | struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 466 | u8 sid = d->hwirq >> 24; |
| 467 | u8 per = d->hwirq >> 16; |
| 468 | |
| 469 | if (pmic_arb_write_cmd(pa->spmic, SPMI_CMD_EXT_WRITEL, sid, |
| 470 | (per << 8) + reg, buf, len)) |
| 471 | dev_err_ratelimited(&pa->spmic->dev, |
| 472 | "failed irqchip transaction on %x\n", |
| 473 | d->irq); |
| 474 | } |
| 475 | |
| 476 | static void qpnpint_spmi_read(struct irq_data *d, u8 reg, void *buf, size_t len) |
| 477 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 478 | struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 479 | u8 sid = d->hwirq >> 24; |
| 480 | u8 per = d->hwirq >> 16; |
| 481 | |
| 482 | if (pmic_arb_read_cmd(pa->spmic, SPMI_CMD_EXT_READL, sid, |
| 483 | (per << 8) + reg, buf, len)) |
| 484 | dev_err_ratelimited(&pa->spmic->dev, |
| 485 | "failed irqchip transaction on %x\n", |
| 486 | d->irq); |
| 487 | } |
| 488 | |
Abhijeet Dharmapurikar | b9b8744 | 2016-01-08 10:50:19 -0800 | [diff] [blame^] | 489 | static void cleanup_irq(struct spmi_pmic_arb *pa, u8 apid, int id) |
| 490 | { |
| 491 | u32 status; |
| 492 | u16 ppid = pa->apid_data[apid].ppid; |
| 493 | u8 sid = ppid >> 8; |
| 494 | u8 per = ppid & 0xFF; |
| 495 | unsigned long flags; |
| 496 | u8 irq_mask = BIT(id); |
| 497 | |
| 498 | raw_spin_lock_irqsave(&pa->lock, flags); |
| 499 | writel_relaxed(irq_mask, pa->intr + pa->ver_ops->irq_clear(apid)); |
| 500 | if (pa->apid_data[apid].enabled_irq_mask == 0) { |
| 501 | status |
| 502 | = readl_relaxed(pa->intr + pa->ver_ops->acc_enable(apid)); |
| 503 | status = status & ~SPMI_PIC_ACC_ENABLE_BIT; |
| 504 | writel_relaxed(status, |
| 505 | pa->intr + pa->ver_ops->acc_enable(apid)); |
| 506 | } |
| 507 | raw_spin_unlock_irqrestore(&pa->lock, flags); |
| 508 | |
| 509 | if (pmic_arb_write_cmd(pa->spmic, SPMI_CMD_EXT_WRITEL, sid, |
| 510 | (per << 8) + QPNPINT_REG_LATCHED_CLR, &irq_mask, 1)) |
| 511 | dev_err_ratelimited(&pa->spmic->dev, |
| 512 | "failed to ack irq_mask = 0x%x for ppid = %x\n", |
| 513 | irq_mask, ppid); |
| 514 | |
| 515 | if (pmic_arb_write_cmd(pa->spmic, SPMI_CMD_EXT_WRITEL, sid, |
| 516 | (per << 8) + QPNPINT_REG_EN_CLR, &irq_mask, 1)) |
| 517 | dev_err_ratelimited(&pa->spmic->dev, |
| 518 | "failed to ack irq_mask = 0x%x for ppid = %x\n", |
| 519 | irq_mask, ppid); |
| 520 | } |
| 521 | |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 522 | static void periph_interrupt(struct spmi_pmic_arb *pa, u8 apid) |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 523 | { |
| 524 | unsigned int irq; |
| 525 | u32 status; |
| 526 | int id; |
| 527 | |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 528 | status = readl_relaxed(pa->intr + pa->ver_ops->irq_status(apid)); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 529 | while (status) { |
| 530 | id = ffs(status) - 1; |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 531 | status &= ~BIT(id); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 532 | irq = irq_find_mapping(pa->domain, |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 533 | pa->apid_data[apid].ppid << 16 |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 534 | | id << 8 |
| 535 | | apid); |
Abhijeet Dharmapurikar | b9b8744 | 2016-01-08 10:50:19 -0800 | [diff] [blame^] | 536 | if (irq == 0) { |
| 537 | cleanup_irq(pa, apid, id); |
| 538 | continue; |
| 539 | } |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 540 | generic_handle_irq(irq); |
| 541 | } |
| 542 | } |
| 543 | |
Thomas Gleixner | bd0b9ac | 2015-09-14 10:42:37 +0200 | [diff] [blame] | 544 | static void pmic_arb_chained_irq(struct irq_desc *desc) |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 545 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 546 | struct spmi_pmic_arb *pa = irq_desc_get_handler_data(desc); |
Jiang Liu | 7fe88f3 | 2015-07-13 20:52:25 +0000 | [diff] [blame] | 547 | struct irq_chip *chip = irq_desc_get_chip(desc); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 548 | void __iomem *intr = pa->intr; |
| 549 | int first = pa->min_apid >> 5; |
| 550 | int last = pa->max_apid >> 5; |
| 551 | u32 status; |
| 552 | int i, id; |
| 553 | |
| 554 | chained_irq_enter(chip, desc); |
| 555 | |
| 556 | for (i = first; i <= last; ++i) { |
| 557 | status = readl_relaxed(intr + |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 558 | pa->ver_ops->owner_acc_status(pa->ee, i)); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 559 | while (status) { |
| 560 | id = ffs(status) - 1; |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 561 | status &= ~BIT(id); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 562 | periph_interrupt(pa, id + i * 32); |
| 563 | } |
| 564 | } |
| 565 | |
| 566 | chained_irq_exit(chip, desc); |
| 567 | } |
| 568 | |
| 569 | static void qpnpint_irq_ack(struct irq_data *d) |
| 570 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 571 | struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 572 | u8 irq = d->hwirq >> 8; |
| 573 | u8 apid = d->hwirq; |
| 574 | unsigned long flags; |
| 575 | u8 data; |
| 576 | |
| 577 | raw_spin_lock_irqsave(&pa->lock, flags); |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 578 | writel_relaxed(BIT(irq), pa->intr + pa->ver_ops->irq_clear(apid)); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 579 | raw_spin_unlock_irqrestore(&pa->lock, flags); |
| 580 | |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 581 | data = BIT(irq); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 582 | qpnpint_spmi_write(d, QPNPINT_REG_LATCHED_CLR, &data, 1); |
| 583 | } |
| 584 | |
| 585 | static void qpnpint_irq_mask(struct irq_data *d) |
| 586 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 587 | struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 588 | u8 irq = d->hwirq >> 8; |
| 589 | u8 apid = d->hwirq; |
| 590 | unsigned long flags; |
| 591 | u32 status; |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 592 | u8 data = BIT(irq); |
| 593 | u8 prev_enabled_irq_mask; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 594 | |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 595 | prev_enabled_irq_mask = pa->apid_data[apid].enabled_irq_mask; |
| 596 | pa->apid_data[apid].enabled_irq_mask &= ~BIT(irq); |
| 597 | |
| 598 | if (prev_enabled_irq_mask != 0 && |
| 599 | pa->apid_data[apid].enabled_irq_mask == 0) { |
| 600 | raw_spin_lock_irqsave(&pa->lock, flags); |
| 601 | status = readl_relaxed(pa->intr |
| 602 | + pa->ver_ops->acc_enable(apid)); |
| 603 | if (status & SPMI_PIC_ACC_ENABLE_BIT) { |
| 604 | status = status & ~SPMI_PIC_ACC_ENABLE_BIT; |
| 605 | writel_relaxed(status, pa->intr + |
| 606 | pa->ver_ops->acc_enable(apid)); |
| 607 | } |
| 608 | raw_spin_unlock_irqrestore(&pa->lock, flags); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 609 | } |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 610 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 611 | qpnpint_spmi_write(d, QPNPINT_REG_EN_CLR, &data, 1); |
| 612 | } |
| 613 | |
| 614 | static void qpnpint_irq_unmask(struct irq_data *d) |
| 615 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 616 | struct spmi_pmic_arb *pa = irq_data_get_irq_chip_data(d); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 617 | u8 irq = d->hwirq >> 8; |
| 618 | u8 apid = d->hwirq; |
| 619 | unsigned long flags; |
| 620 | u32 status; |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 621 | u8 data = BIT(irq); |
| 622 | u8 prev_enabled_irq_mask; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 623 | |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 624 | prev_enabled_irq_mask = pa->apid_data[apid].enabled_irq_mask; |
| 625 | pa->apid_data[apid].enabled_irq_mask &= ~BIT(irq); |
| 626 | pa->apid_data[apid].enabled_irq_mask |= BIT(irq); |
| 627 | |
| 628 | if (prev_enabled_irq_mask == 0 && |
| 629 | pa->apid_data[apid].enabled_irq_mask != 0) { |
| 630 | raw_spin_lock_irqsave(&pa->lock, flags); |
| 631 | status = readl_relaxed(pa->intr |
| 632 | + pa->ver_ops->acc_enable(apid)); |
| 633 | if (!(status & SPMI_PIC_ACC_ENABLE_BIT)) { |
| 634 | writel_relaxed(status | SPMI_PIC_ACC_ENABLE_BIT, |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 635 | pa->intr + pa->ver_ops->acc_enable(apid)); |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 636 | } |
| 637 | raw_spin_unlock_irqrestore(&pa->lock, flags); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 638 | } |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 639 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 640 | qpnpint_spmi_write(d, QPNPINT_REG_EN_SET, &data, 1); |
| 641 | } |
| 642 | |
| 643 | static void qpnpint_irq_enable(struct irq_data *d) |
| 644 | { |
| 645 | u8 irq = d->hwirq >> 8; |
| 646 | u8 data; |
| 647 | |
| 648 | qpnpint_irq_unmask(d); |
| 649 | |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 650 | data = BIT(irq); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 651 | qpnpint_spmi_write(d, QPNPINT_REG_LATCHED_CLR, &data, 1); |
| 652 | } |
| 653 | |
| 654 | static int qpnpint_irq_set_type(struct irq_data *d, unsigned int flow_type) |
| 655 | { |
| 656 | struct spmi_pmic_arb_qpnpint_type type; |
| 657 | u8 irq = d->hwirq >> 8; |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 658 | u8 bit_mask_irq = BIT(irq); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 659 | |
| 660 | qpnpint_spmi_read(d, QPNPINT_REG_SET_TYPE, &type, sizeof(type)); |
| 661 | |
| 662 | if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 663 | type.type |= bit_mask_irq; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 664 | if (flow_type & IRQF_TRIGGER_RISING) |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 665 | type.polarity_high |= bit_mask_irq; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 666 | if (flow_type & IRQF_TRIGGER_FALLING) |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 667 | type.polarity_low |= bit_mask_irq; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 668 | } else { |
| 669 | if ((flow_type & (IRQF_TRIGGER_HIGH)) && |
| 670 | (flow_type & (IRQF_TRIGGER_LOW))) |
| 671 | return -EINVAL; |
| 672 | |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 673 | type.type &= ~bit_mask_irq; /* level trig */ |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 674 | if (flow_type & IRQF_TRIGGER_HIGH) |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 675 | type.polarity_high |= bit_mask_irq; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 676 | else |
Abhijeet Dharmapurikar | 469f2c3 | 2016-01-05 16:52:38 -0800 | [diff] [blame] | 677 | type.polarity_low |= bit_mask_irq; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 678 | } |
| 679 | |
| 680 | qpnpint_spmi_write(d, QPNPINT_REG_SET_TYPE, &type, sizeof(type)); |
| 681 | return 0; |
| 682 | } |
| 683 | |
Courtney Cavin | 60be423 | 2015-07-30 10:53:54 -0700 | [diff] [blame] | 684 | static int qpnpint_get_irqchip_state(struct irq_data *d, |
| 685 | enum irqchip_irq_state which, |
| 686 | bool *state) |
| 687 | { |
| 688 | u8 irq = d->hwirq >> 8; |
| 689 | u8 status = 0; |
| 690 | |
| 691 | if (which != IRQCHIP_STATE_LINE_LEVEL) |
| 692 | return -EINVAL; |
| 693 | |
| 694 | qpnpint_spmi_read(d, QPNPINT_REG_RT_STS, &status, 1); |
| 695 | *state = !!(status & BIT(irq)); |
| 696 | |
| 697 | return 0; |
| 698 | } |
| 699 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 700 | static struct irq_chip pmic_arb_irqchip = { |
| 701 | .name = "pmic_arb", |
| 702 | .irq_enable = qpnpint_irq_enable, |
| 703 | .irq_ack = qpnpint_irq_ack, |
| 704 | .irq_mask = qpnpint_irq_mask, |
| 705 | .irq_unmask = qpnpint_irq_unmask, |
| 706 | .irq_set_type = qpnpint_irq_set_type, |
Courtney Cavin | 60be423 | 2015-07-30 10:53:54 -0700 | [diff] [blame] | 707 | .irq_get_irqchip_state = qpnpint_get_irqchip_state, |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 708 | .flags = IRQCHIP_MASK_ON_SUSPEND |
| 709 | | IRQCHIP_SKIP_SET_WAKE, |
| 710 | }; |
| 711 | |
| 712 | struct spmi_pmic_arb_irq_spec { |
| 713 | unsigned slave:4; |
| 714 | unsigned per:8; |
| 715 | unsigned irq:3; |
| 716 | }; |
| 717 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 718 | static int qpnpint_irq_domain_dt_translate(struct irq_domain *d, |
| 719 | struct device_node *controller, |
| 720 | const u32 *intspec, |
| 721 | unsigned int intsize, |
| 722 | unsigned long *out_hwirq, |
| 723 | unsigned int *out_type) |
| 724 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 725 | struct spmi_pmic_arb *pa = d->host_data; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 726 | struct spmi_pmic_arb_irq_spec spec; |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 727 | int rc; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 728 | u8 apid; |
| 729 | |
| 730 | dev_dbg(&pa->spmic->dev, |
| 731 | "intspec[0] 0x%1x intspec[1] 0x%02x intspec[2] 0x%02x\n", |
| 732 | intspec[0], intspec[1], intspec[2]); |
| 733 | |
Marc Zyngier | 5d4c9bc | 2015-10-13 12:51:29 +0100 | [diff] [blame] | 734 | if (irq_domain_get_of_node(d) != controller) |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 735 | return -EINVAL; |
| 736 | if (intsize != 4) |
| 737 | return -EINVAL; |
| 738 | if (intspec[0] > 0xF || intspec[1] > 0xFF || intspec[2] > 0x7) |
| 739 | return -EINVAL; |
| 740 | |
| 741 | spec.slave = intspec[0]; |
| 742 | spec.per = intspec[1]; |
| 743 | spec.irq = intspec[2]; |
| 744 | |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 745 | rc = pa->ver_ops->ppid_to_apid(pa, intspec[0], |
| 746 | (intspec[1] << 8), &apid); |
| 747 | if (rc < 0) { |
| 748 | dev_err(&pa->spmic->dev, |
| 749 | "failed to xlate sid = 0x%x, periph = 0x%x, irq = %x rc = %d\n", |
| 750 | intspec[0], intspec[1], intspec[2], rc); |
| 751 | return rc; |
| 752 | } |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 753 | |
| 754 | /* Keep track of {max,min}_apid for bounding search during interrupt */ |
| 755 | if (apid > pa->max_apid) |
| 756 | pa->max_apid = apid; |
| 757 | if (apid < pa->min_apid) |
| 758 | pa->min_apid = apid; |
| 759 | |
| 760 | *out_hwirq = spec.slave << 24 |
| 761 | | spec.per << 16 |
| 762 | | spec.irq << 8 |
| 763 | | apid; |
| 764 | *out_type = intspec[3] & IRQ_TYPE_SENSE_MASK; |
| 765 | |
| 766 | dev_dbg(&pa->spmic->dev, "out_hwirq = %lu\n", *out_hwirq); |
| 767 | |
| 768 | return 0; |
| 769 | } |
| 770 | |
| 771 | static int qpnpint_irq_domain_map(struct irq_domain *d, |
| 772 | unsigned int virq, |
| 773 | irq_hw_number_t hwirq) |
| 774 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 775 | struct spmi_pmic_arb *pa = d->host_data; |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 776 | |
| 777 | dev_dbg(&pa->spmic->dev, "virq = %u, hwirq = %lu\n", virq, hwirq); |
| 778 | |
| 779 | irq_set_chip_and_handler(virq, &pmic_arb_irqchip, handle_level_irq); |
| 780 | irq_set_chip_data(virq, d->host_data); |
| 781 | irq_set_noprobe(virq); |
| 782 | return 0; |
| 783 | } |
| 784 | |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 785 | static int |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 786 | pmic_arb_ppid_to_apid_v1(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u8 *apid) |
| 787 | { |
| 788 | u16 ppid = sid << 8 | ((addr >> 8) & 0xFF); |
| 789 | u32 *mapping_table = pa->mapping_table; |
| 790 | int index = 0, i; |
| 791 | u16 apid_valid; |
| 792 | u32 data; |
| 793 | |
| 794 | apid_valid = pa->ppid_to_apid[ppid]; |
| 795 | if (apid_valid & PMIC_ARB_CHAN_VALID) { |
| 796 | *apid = (apid_valid & ~PMIC_ARB_CHAN_VALID); |
| 797 | return 0; |
| 798 | } |
| 799 | |
| 800 | for (i = 0; i < SPMI_MAPPING_TABLE_TREE_DEPTH; ++i) { |
| 801 | if (!test_and_set_bit(index, pa->mapping_table_valid)) |
| 802 | mapping_table[index] = readl_relaxed(pa->cnfg + |
| 803 | SPMI_MAPPING_TABLE_REG(index)); |
| 804 | |
| 805 | data = mapping_table[index]; |
| 806 | |
| 807 | if (ppid & BIT(SPMI_MAPPING_BIT_INDEX(data))) { |
| 808 | if (SPMI_MAPPING_BIT_IS_1_FLAG(data)) { |
| 809 | index = SPMI_MAPPING_BIT_IS_1_RESULT(data); |
| 810 | } else { |
| 811 | *apid = SPMI_MAPPING_BIT_IS_1_RESULT(data); |
| 812 | pa->ppid_to_apid[ppid] |
| 813 | = *apid | PMIC_ARB_CHAN_VALID; |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 814 | pa->apid_data[*apid].ppid = ppid; |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 815 | return 0; |
| 816 | } |
| 817 | } else { |
| 818 | if (SPMI_MAPPING_BIT_IS_0_FLAG(data)) { |
| 819 | index = SPMI_MAPPING_BIT_IS_0_RESULT(data); |
| 820 | } else { |
| 821 | *apid = SPMI_MAPPING_BIT_IS_0_RESULT(data); |
| 822 | pa->ppid_to_apid[ppid] |
| 823 | = *apid | PMIC_ARB_CHAN_VALID; |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 824 | pa->apid_data[*apid].ppid = ppid; |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 825 | return 0; |
| 826 | } |
| 827 | } |
| 828 | } |
| 829 | |
| 830 | return -ENODEV; |
| 831 | } |
| 832 | |
| 833 | static int |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 834 | pmic_arb_mode_v1(struct spmi_pmic_arb *pa, u8 sid, u16 addr, mode_t *mode) |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 835 | { |
| 836 | *mode = 0600; |
| 837 | return 0; |
| 838 | } |
| 839 | |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 840 | /* v1 offset per ee */ |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 841 | static int |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 842 | pmic_arb_offset_v1(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u32 *offset) |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 843 | { |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 844 | *offset = 0x800 + 0x80 * pa->channel; |
| 845 | return 0; |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 846 | } |
| 847 | |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 848 | static u16 pmic_arb_find_apid(struct spmi_pmic_arb *pa, u16 ppid) |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 849 | { |
| 850 | u32 regval, offset; |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 851 | u16 apid; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 852 | u16 id; |
| 853 | |
| 854 | /* |
| 855 | * PMIC_ARB_REG_CHNL is a table in HW mapping channel to ppid. |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 856 | * ppid_to_apid is an in-memory invert of that table. |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 857 | */ |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 858 | for (apid = pa->last_apid; apid < pa->max_periph; apid++) { |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 859 | regval = readl_relaxed(pa->cnfg + |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 860 | SPMI_OWNERSHIP_TABLE_REG(apid)); |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 861 | pa->apid_data[apid].owner = SPMI_OWNERSHIP_PERIPH2OWNER(regval); |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 862 | |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 863 | offset = PMIC_ARB_REG_CHNL(apid); |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 864 | if (offset >= pa->core_size) |
| 865 | break; |
| 866 | |
| 867 | regval = readl_relaxed(pa->core + offset); |
| 868 | if (!regval) |
| 869 | continue; |
| 870 | |
| 871 | id = (regval >> 8) & PMIC_ARB_PPID_MASK; |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 872 | pa->ppid_to_apid[id] = apid | PMIC_ARB_CHAN_VALID; |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 873 | pa->apid_data[apid].ppid = id; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 874 | if (id == ppid) { |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 875 | apid |= PMIC_ARB_CHAN_VALID; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 876 | break; |
| 877 | } |
| 878 | } |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 879 | pa->last_apid = apid & ~PMIC_ARB_CHAN_VALID; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 880 | |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 881 | return apid; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 882 | } |
| 883 | |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 884 | static int |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 885 | pmic_arb_ppid_to_apid_v2(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u8 *apid) |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 886 | { |
| 887 | u16 ppid = (sid << 8) | (addr >> 8); |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 888 | u16 apid_valid; |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 889 | |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 890 | apid_valid = pa->ppid_to_apid[ppid]; |
| 891 | if (!(apid_valid & PMIC_ARB_CHAN_VALID)) |
| 892 | apid_valid = pmic_arb_find_apid(pa, ppid); |
| 893 | if (!(apid_valid & PMIC_ARB_CHAN_VALID)) |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 894 | return -ENODEV; |
| 895 | |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 896 | *apid = (apid_valid & ~PMIC_ARB_CHAN_VALID); |
| 897 | return 0; |
| 898 | } |
| 899 | |
| 900 | static int |
| 901 | pmic_arb_mode_v2(struct spmi_pmic_arb *pa, u8 sid, u16 addr, mode_t *mode) |
| 902 | { |
| 903 | u8 apid; |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 904 | int rc; |
| 905 | |
| 906 | rc = pmic_arb_ppid_to_apid_v2(pa, sid, addr, &apid); |
| 907 | if (rc < 0) |
| 908 | return rc; |
| 909 | |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 910 | *mode = 0; |
| 911 | *mode |= 0400; |
| 912 | |
Abhijeet Dharmapurikar | 8f8ec81 | 2016-01-08 12:54:36 -0800 | [diff] [blame] | 913 | if (pa->ee == pa->apid_data[apid].owner) |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 914 | *mode |= 0200; |
| 915 | return 0; |
| 916 | } |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 917 | |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 918 | /* v2 offset per ppid and per ee */ |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 919 | static int |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 920 | pmic_arb_offset_v2(struct spmi_pmic_arb *pa, u8 sid, u16 addr, u32 *offset) |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 921 | { |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 922 | u8 apid; |
| 923 | int rc; |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 924 | |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 925 | rc = pmic_arb_ppid_to_apid_v2(pa, sid, addr, &apid); |
| 926 | if (rc < 0) |
| 927 | return rc; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 928 | |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 929 | *offset = 0x1000 * pa->ee + 0x8000 * apid; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 930 | return 0; |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 931 | } |
| 932 | |
| 933 | static u32 pmic_arb_fmt_cmd_v1(u8 opc, u8 sid, u16 addr, u8 bc) |
| 934 | { |
| 935 | return (opc << 27) | ((sid & 0xf) << 20) | (addr << 4) | (bc & 0x7); |
| 936 | } |
| 937 | |
| 938 | static u32 pmic_arb_fmt_cmd_v2(u8 opc, u8 sid, u16 addr, u8 bc) |
| 939 | { |
| 940 | return (opc << 27) | ((addr & 0xff) << 4) | (bc & 0x7); |
| 941 | } |
| 942 | |
| 943 | static u32 pmic_arb_owner_acc_status_v1(u8 m, u8 n) |
| 944 | { |
| 945 | return 0x20 * m + 0x4 * n; |
| 946 | } |
| 947 | |
| 948 | static u32 pmic_arb_owner_acc_status_v2(u8 m, u8 n) |
| 949 | { |
| 950 | return 0x100000 + 0x1000 * m + 0x4 * n; |
| 951 | } |
| 952 | |
| 953 | static u32 pmic_arb_acc_enable_v1(u8 n) |
| 954 | { |
| 955 | return 0x200 + 0x4 * n; |
| 956 | } |
| 957 | |
| 958 | static u32 pmic_arb_acc_enable_v2(u8 n) |
| 959 | { |
| 960 | return 0x1000 * n; |
| 961 | } |
| 962 | |
| 963 | static u32 pmic_arb_irq_status_v1(u8 n) |
| 964 | { |
| 965 | return 0x600 + 0x4 * n; |
| 966 | } |
| 967 | |
| 968 | static u32 pmic_arb_irq_status_v2(u8 n) |
| 969 | { |
| 970 | return 0x4 + 0x1000 * n; |
| 971 | } |
| 972 | |
| 973 | static u32 pmic_arb_irq_clear_v1(u8 n) |
| 974 | { |
| 975 | return 0xA00 + 0x4 * n; |
| 976 | } |
| 977 | |
| 978 | static u32 pmic_arb_irq_clear_v2(u8 n) |
| 979 | { |
| 980 | return 0x8 + 0x1000 * n; |
| 981 | } |
| 982 | |
| 983 | static const struct pmic_arb_ver_ops pmic_arb_v1 = { |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 984 | .ppid_to_apid = pmic_arb_ppid_to_apid_v1, |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 985 | .mode = pmic_arb_mode_v1, |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 986 | .non_data_cmd = pmic_arb_non_data_cmd_v1, |
| 987 | .offset = pmic_arb_offset_v1, |
| 988 | .fmt_cmd = pmic_arb_fmt_cmd_v1, |
| 989 | .owner_acc_status = pmic_arb_owner_acc_status_v1, |
| 990 | .acc_enable = pmic_arb_acc_enable_v1, |
| 991 | .irq_status = pmic_arb_irq_status_v1, |
| 992 | .irq_clear = pmic_arb_irq_clear_v1, |
| 993 | }; |
| 994 | |
| 995 | static const struct pmic_arb_ver_ops pmic_arb_v2 = { |
Abhijeet Dharmapurikar | 6e9eb38 | 2016-01-08 12:50:24 -0800 | [diff] [blame] | 996 | .ppid_to_apid = pmic_arb_ppid_to_apid_v2, |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 997 | .mode = pmic_arb_mode_v2, |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 998 | .non_data_cmd = pmic_arb_non_data_cmd_v2, |
| 999 | .offset = pmic_arb_offset_v2, |
| 1000 | .fmt_cmd = pmic_arb_fmt_cmd_v2, |
| 1001 | .owner_acc_status = pmic_arb_owner_acc_status_v2, |
| 1002 | .acc_enable = pmic_arb_acc_enable_v2, |
| 1003 | .irq_status = pmic_arb_irq_status_v2, |
| 1004 | .irq_clear = pmic_arb_irq_clear_v2, |
| 1005 | }; |
| 1006 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1007 | static const struct irq_domain_ops pmic_arb_irq_domain_ops = { |
| 1008 | .map = qpnpint_irq_domain_map, |
| 1009 | .xlate = qpnpint_irq_domain_dt_translate, |
| 1010 | }; |
| 1011 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1012 | static int spmi_pmic_arb_probe(struct platform_device *pdev) |
| 1013 | { |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 1014 | struct spmi_pmic_arb *pa; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1015 | struct spmi_controller *ctrl; |
| 1016 | struct resource *res; |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 1017 | void __iomem *core; |
| 1018 | u32 channel, ee, hw_ver; |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 1019 | int err; |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 1020 | bool is_v1; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1021 | |
| 1022 | ctrl = spmi_controller_alloc(&pdev->dev, sizeof(*pa)); |
| 1023 | if (!ctrl) |
| 1024 | return -ENOMEM; |
| 1025 | |
| 1026 | pa = spmi_controller_get_drvdata(ctrl); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1027 | pa->spmic = ctrl; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1028 | |
| 1029 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "core"); |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 1030 | pa->core_size = resource_size(res); |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 1031 | if (pa->core_size <= 0x800) { |
| 1032 | dev_err(&pdev->dev, "core_size is smaller than 0x800. Failing Probe\n"); |
| 1033 | err = -EINVAL; |
| 1034 | goto err_put_ctrl; |
| 1035 | } |
| 1036 | |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 1037 | core = devm_ioremap_resource(&ctrl->dev, res); |
| 1038 | if (IS_ERR(core)) { |
| 1039 | err = PTR_ERR(core); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1040 | goto err_put_ctrl; |
| 1041 | } |
| 1042 | |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 1043 | hw_ver = readl_relaxed(core + PMIC_ARB_VERSION); |
| 1044 | is_v1 = (hw_ver < PMIC_ARB_VERSION_V2_MIN); |
| 1045 | |
| 1046 | dev_info(&ctrl->dev, "PMIC Arb Version-%d (0x%x)\n", (is_v1 ? 1 : 2), |
| 1047 | hw_ver); |
| 1048 | |
| 1049 | if (is_v1) { |
| 1050 | pa->ver_ops = &pmic_arb_v1; |
| 1051 | pa->wr_base = core; |
| 1052 | pa->rd_base = core; |
| 1053 | } else { |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 1054 | pa->core = core; |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 1055 | pa->ver_ops = &pmic_arb_v2; |
| 1056 | |
Abhijeet Dharmapurikar | ea64f7f | 2016-01-18 22:00:33 -0800 | [diff] [blame] | 1057 | /* the apid to ppid table starts at PMIC_ARB_REG_CHNL(0) */ |
| 1058 | pa->max_periph = (pa->core_size - PMIC_ARB_REG_CHNL(0)) / 4; |
| 1059 | |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 1060 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 1061 | "obsrvr"); |
| 1062 | pa->rd_base = devm_ioremap_resource(&ctrl->dev, res); |
| 1063 | if (IS_ERR(pa->rd_base)) { |
| 1064 | err = PTR_ERR(pa->rd_base); |
| 1065 | goto err_put_ctrl; |
| 1066 | } |
| 1067 | |
| 1068 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, |
| 1069 | "chnls"); |
| 1070 | pa->wr_base = devm_ioremap_resource(&ctrl->dev, res); |
| 1071 | if (IS_ERR(pa->wr_base)) { |
| 1072 | err = PTR_ERR(pa->wr_base); |
| 1073 | goto err_put_ctrl; |
| 1074 | } |
| 1075 | |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 1076 | pa->ppid_to_apid = devm_kcalloc(&ctrl->dev, |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 1077 | PMIC_ARB_MAX_PPID, |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 1078 | sizeof(*pa->ppid_to_apid), |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 1079 | GFP_KERNEL); |
Abhijeet Dharmapurikar | 39155b6 | 2016-01-06 19:55:21 -0800 | [diff] [blame] | 1080 | if (!pa->ppid_to_apid) { |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 1081 | err = -ENOMEM; |
| 1082 | goto err_put_ctrl; |
| 1083 | } |
Gilad Avidov | d0c6ae4 | 2015-03-25 11:37:32 -0600 | [diff] [blame] | 1084 | } |
| 1085 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1086 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "intr"); |
| 1087 | pa->intr = devm_ioremap_resource(&ctrl->dev, res); |
| 1088 | if (IS_ERR(pa->intr)) { |
| 1089 | err = PTR_ERR(pa->intr); |
| 1090 | goto err_put_ctrl; |
| 1091 | } |
| 1092 | |
| 1093 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cnfg"); |
| 1094 | pa->cnfg = devm_ioremap_resource(&ctrl->dev, res); |
| 1095 | if (IS_ERR(pa->cnfg)) { |
| 1096 | err = PTR_ERR(pa->cnfg); |
| 1097 | goto err_put_ctrl; |
| 1098 | } |
| 1099 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1100 | pa->irq = platform_get_irq_byname(pdev, "periph_irq"); |
| 1101 | if (pa->irq < 0) { |
| 1102 | err = pa->irq; |
| 1103 | goto err_put_ctrl; |
| 1104 | } |
| 1105 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1106 | err = of_property_read_u32(pdev->dev.of_node, "qcom,channel", &channel); |
| 1107 | if (err) { |
| 1108 | dev_err(&pdev->dev, "channel unspecified.\n"); |
| 1109 | goto err_put_ctrl; |
| 1110 | } |
| 1111 | |
| 1112 | if (channel > 5) { |
| 1113 | dev_err(&pdev->dev, "invalid channel (%u) specified.\n", |
| 1114 | channel); |
Christophe JAILLET | e98cc18 | 2016-09-26 22:24:46 +0200 | [diff] [blame] | 1115 | err = -EINVAL; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1116 | goto err_put_ctrl; |
| 1117 | } |
| 1118 | |
| 1119 | pa->channel = channel; |
| 1120 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1121 | err = of_property_read_u32(pdev->dev.of_node, "qcom,ee", &ee); |
| 1122 | if (err) { |
| 1123 | dev_err(&pdev->dev, "EE unspecified.\n"); |
| 1124 | goto err_put_ctrl; |
| 1125 | } |
| 1126 | |
| 1127 | if (ee > 5) { |
| 1128 | dev_err(&pdev->dev, "invalid EE (%u) specified\n", ee); |
| 1129 | err = -EINVAL; |
| 1130 | goto err_put_ctrl; |
| 1131 | } |
| 1132 | |
| 1133 | pa->ee = ee; |
| 1134 | |
Stephen Boyd | 987a9f1 | 2015-11-17 16:13:55 -0800 | [diff] [blame] | 1135 | pa->mapping_table = devm_kcalloc(&ctrl->dev, PMIC_ARB_MAX_PERIPHS - 1, |
| 1136 | sizeof(*pa->mapping_table), GFP_KERNEL); |
| 1137 | if (!pa->mapping_table) { |
| 1138 | err = -ENOMEM; |
| 1139 | goto err_put_ctrl; |
| 1140 | } |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1141 | |
| 1142 | /* Initialize max_apid/min_apid to the opposite bounds, during |
| 1143 | * the irq domain translation, we are sure to update these */ |
| 1144 | pa->max_apid = 0; |
| 1145 | pa->min_apid = PMIC_ARB_MAX_PERIPHS - 1; |
| 1146 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1147 | platform_set_drvdata(pdev, ctrl); |
| 1148 | raw_spin_lock_init(&pa->lock); |
| 1149 | |
| 1150 | ctrl->cmd = pmic_arb_cmd; |
| 1151 | ctrl->read_cmd = pmic_arb_read_cmd; |
| 1152 | ctrl->write_cmd = pmic_arb_write_cmd; |
| 1153 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1154 | dev_dbg(&pdev->dev, "adding irq domain\n"); |
| 1155 | pa->domain = irq_domain_add_tree(pdev->dev.of_node, |
| 1156 | &pmic_arb_irq_domain_ops, pa); |
| 1157 | if (!pa->domain) { |
| 1158 | dev_err(&pdev->dev, "unable to create irq_domain\n"); |
| 1159 | err = -ENOMEM; |
| 1160 | goto err_put_ctrl; |
| 1161 | } |
| 1162 | |
Thomas Gleixner | fb68ba6 | 2015-07-13 20:52:24 +0000 | [diff] [blame] | 1163 | irq_set_chained_handler_and_data(pa->irq, pmic_arb_chained_irq, pa); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1164 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1165 | err = spmi_controller_add(ctrl); |
| 1166 | if (err) |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1167 | goto err_domain_remove; |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1168 | |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1169 | return 0; |
| 1170 | |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1171 | err_domain_remove: |
Thomas Gleixner | fb68ba6 | 2015-07-13 20:52:24 +0000 | [diff] [blame] | 1172 | irq_set_chained_handler_and_data(pa->irq, NULL, NULL); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1173 | irq_domain_remove(pa->domain); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1174 | err_put_ctrl: |
| 1175 | spmi_controller_put(ctrl); |
| 1176 | return err; |
| 1177 | } |
| 1178 | |
| 1179 | static int spmi_pmic_arb_remove(struct platform_device *pdev) |
| 1180 | { |
| 1181 | struct spmi_controller *ctrl = platform_get_drvdata(pdev); |
Abhijeet Dharmapurikar | fbcfb7e | 2016-01-08 12:45:20 -0800 | [diff] [blame] | 1182 | struct spmi_pmic_arb *pa = spmi_controller_get_drvdata(ctrl); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1183 | spmi_controller_remove(ctrl); |
Thomas Gleixner | fb68ba6 | 2015-07-13 20:52:24 +0000 | [diff] [blame] | 1184 | irq_set_chained_handler_and_data(pa->irq, NULL, NULL); |
Josh Cartwright | 67b563f | 2014-02-12 13:44:25 -0600 | [diff] [blame] | 1185 | irq_domain_remove(pa->domain); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1186 | spmi_controller_put(ctrl); |
| 1187 | return 0; |
| 1188 | } |
| 1189 | |
| 1190 | static const struct of_device_id spmi_pmic_arb_match_table[] = { |
| 1191 | { .compatible = "qcom,spmi-pmic-arb", }, |
| 1192 | {}, |
| 1193 | }; |
| 1194 | MODULE_DEVICE_TABLE(of, spmi_pmic_arb_match_table); |
| 1195 | |
| 1196 | static struct platform_driver spmi_pmic_arb_driver = { |
| 1197 | .probe = spmi_pmic_arb_probe, |
| 1198 | .remove = spmi_pmic_arb_remove, |
| 1199 | .driver = { |
| 1200 | .name = "spmi_pmic_arb", |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1201 | .of_match_table = spmi_pmic_arb_match_table, |
| 1202 | }, |
| 1203 | }; |
Abhijeet Dharmapurikar | df9bf94 | 2015-09-23 11:36:23 -0700 | [diff] [blame] | 1204 | |
| 1205 | int __init spmi_pmic_arb_init(void) |
| 1206 | { |
| 1207 | return platform_driver_register(&spmi_pmic_arb_driver); |
| 1208 | } |
| 1209 | arch_initcall(spmi_pmic_arb_init); |
Kenneth Heitke | 39ae93e | 2014-02-12 13:44:24 -0600 | [diff] [blame] | 1210 | |
| 1211 | MODULE_LICENSE("GPL v2"); |
| 1212 | MODULE_ALIAS("platform:spmi_pmic_arb"); |