Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 3 | * copy of this software and associated documentation files (the "Software"), |
| 4 | * to deal in the Software without restriction, including without limitation |
| 5 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 6 | * and/or sell copies of the Software, and to permit persons to whom the |
| 7 | * Software is furnished to do so, subject to the following conditions: |
| 8 | * |
| 9 | * The above copyright notice and this permission notice shall be included in |
| 10 | * all copies or substantial portions of the Software. |
| 11 | * |
| 12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 13 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 14 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 15 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
| 16 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| 17 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| 18 | * OTHER DEALINGS IN THE SOFTWARE. |
| 19 | * |
| 20 | * Authors: Rafał Miłecki <zajec5@gmail.com> |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 21 | * Alex Deucher <alexdeucher@gmail.com> |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 22 | */ |
| 23 | #include "drmP.h" |
| 24 | #include "radeon.h" |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 25 | #include "avivod.h" |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 26 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 27 | #define RADEON_IDLE_LOOP_MS 100 |
| 28 | #define RADEON_RECLOCK_DELAY_MS 200 |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 29 | #define RADEON_WAIT_VBLANK_TIMEOUT 200 |
Alex Deucher | 2031f77 | 2010-04-22 12:52:11 -0400 | [diff] [blame] | 30 | #define RADEON_WAIT_IDLE_TIMEOUT 200 |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 31 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 32 | static void radeon_pm_set_clocks_locked(struct radeon_device *rdev); |
| 33 | static void radeon_pm_set_clocks(struct radeon_device *rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 34 | static void radeon_pm_idle_work_handler(struct work_struct *work); |
| 35 | static int radeon_debugfs_pm_init(struct radeon_device *rdev); |
| 36 | |
| 37 | static const char *pm_state_names[4] = { |
| 38 | "PM_STATE_DISABLED", |
| 39 | "PM_STATE_MINIMUM", |
| 40 | "PM_STATE_PAUSED", |
| 41 | "PM_STATE_ACTIVE" |
| 42 | }; |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 43 | |
Alex Deucher | 0ec0e74 | 2009-12-23 13:21:58 -0500 | [diff] [blame] | 44 | static const char *pm_state_types[5] = { |
| 45 | "Default", |
| 46 | "Powersave", |
| 47 | "Battery", |
| 48 | "Balanced", |
| 49 | "Performance", |
| 50 | }; |
| 51 | |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 52 | static void radeon_print_power_mode_info(struct radeon_device *rdev) |
| 53 | { |
| 54 | int i, j; |
| 55 | bool is_default; |
| 56 | |
| 57 | DRM_INFO("%d Power State(s)\n", rdev->pm.num_power_states); |
| 58 | for (i = 0; i < rdev->pm.num_power_states; i++) { |
| 59 | if (rdev->pm.default_power_state == &rdev->pm.power_state[i]) |
| 60 | is_default = true; |
| 61 | else |
| 62 | is_default = false; |
Alex Deucher | 0ec0e74 | 2009-12-23 13:21:58 -0500 | [diff] [blame] | 63 | DRM_INFO("State %d %s %s\n", i, |
| 64 | pm_state_types[rdev->pm.power_state[i].type], |
| 65 | is_default ? "(default)" : ""); |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 66 | if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) |
| 67 | DRM_INFO("\t%d PCIE Lanes\n", rdev->pm.power_state[i].non_clock_info.pcie_lanes); |
| 68 | DRM_INFO("\t%d Clock Mode(s)\n", rdev->pm.power_state[i].num_clock_modes); |
| 69 | for (j = 0; j < rdev->pm.power_state[i].num_clock_modes; j++) { |
| 70 | if (rdev->flags & RADEON_IS_IGP) |
| 71 | DRM_INFO("\t\t%d engine: %d\n", |
| 72 | j, |
| 73 | rdev->pm.power_state[i].clock_info[j].sclk * 10); |
| 74 | else |
| 75 | DRM_INFO("\t\t%d engine/memory: %d/%d\n", |
| 76 | j, |
| 77 | rdev->pm.power_state[i].clock_info[j].sclk * 10, |
| 78 | rdev->pm.power_state[i].clock_info[j].mclk * 10); |
| 79 | } |
| 80 | } |
| 81 | } |
| 82 | |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 83 | static struct radeon_power_state * radeon_pick_power_state(struct radeon_device *rdev, |
| 84 | enum radeon_pm_state_type type) |
| 85 | { |
Rafał Miłecki | bc4624c | 2010-02-11 21:50:06 +0000 | [diff] [blame] | 86 | int i, j; |
| 87 | enum radeon_pm_state_type wanted_types[2]; |
| 88 | int wanted_count; |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 89 | |
| 90 | switch (type) { |
| 91 | case POWER_STATE_TYPE_DEFAULT: |
| 92 | default: |
| 93 | return rdev->pm.default_power_state; |
| 94 | case POWER_STATE_TYPE_POWERSAVE: |
Rafał Miłecki | 08ff2a7 | 2010-02-21 22:46:30 +0000 | [diff] [blame] | 95 | if (rdev->flags & RADEON_IS_MOBILITY) { |
| 96 | wanted_types[0] = POWER_STATE_TYPE_POWERSAVE; |
| 97 | wanted_types[1] = POWER_STATE_TYPE_BATTERY; |
| 98 | wanted_count = 2; |
| 99 | } else { |
| 100 | wanted_types[0] = POWER_STATE_TYPE_PERFORMANCE; |
| 101 | wanted_count = 1; |
| 102 | } |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 103 | break; |
| 104 | case POWER_STATE_TYPE_BATTERY: |
Rafał Miłecki | 08ff2a7 | 2010-02-21 22:46:30 +0000 | [diff] [blame] | 105 | if (rdev->flags & RADEON_IS_MOBILITY) { |
| 106 | wanted_types[0] = POWER_STATE_TYPE_BATTERY; |
| 107 | wanted_types[1] = POWER_STATE_TYPE_POWERSAVE; |
| 108 | wanted_count = 2; |
| 109 | } else { |
| 110 | wanted_types[0] = POWER_STATE_TYPE_PERFORMANCE; |
| 111 | wanted_count = 1; |
| 112 | } |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 113 | break; |
| 114 | case POWER_STATE_TYPE_BALANCED: |
| 115 | case POWER_STATE_TYPE_PERFORMANCE: |
Rafał Miłecki | bc4624c | 2010-02-11 21:50:06 +0000 | [diff] [blame] | 116 | wanted_types[0] = type; |
| 117 | wanted_count = 1; |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 118 | break; |
| 119 | } |
| 120 | |
Rafał Miłecki | bc4624c | 2010-02-11 21:50:06 +0000 | [diff] [blame] | 121 | for (i = 0; i < wanted_count; i++) { |
| 122 | for (j = 0; j < rdev->pm.num_power_states; j++) { |
| 123 | if (rdev->pm.power_state[j].type == wanted_types[i]) |
| 124 | return &rdev->pm.power_state[j]; |
| 125 | } |
| 126 | } |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 127 | |
Rafał Miłecki | bc4624c | 2010-02-11 21:50:06 +0000 | [diff] [blame] | 128 | return rdev->pm.default_power_state; |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 129 | } |
| 130 | |
| 131 | static struct radeon_pm_clock_info * radeon_pick_clock_mode(struct radeon_device *rdev, |
| 132 | struct radeon_power_state *power_state, |
| 133 | enum radeon_pm_clock_mode_type type) |
| 134 | { |
| 135 | switch (type) { |
| 136 | case POWER_MODE_TYPE_DEFAULT: |
| 137 | default: |
| 138 | return power_state->default_clock_mode; |
| 139 | case POWER_MODE_TYPE_LOW: |
| 140 | return &power_state->clock_info[0]; |
| 141 | case POWER_MODE_TYPE_MID: |
| 142 | if (power_state->num_clock_modes > 2) |
| 143 | return &power_state->clock_info[1]; |
| 144 | else |
| 145 | return &power_state->clock_info[0]; |
| 146 | break; |
| 147 | case POWER_MODE_TYPE_HIGH: |
| 148 | return &power_state->clock_info[power_state->num_clock_modes - 1]; |
| 149 | } |
| 150 | |
| 151 | } |
| 152 | |
| 153 | static void radeon_get_power_state(struct radeon_device *rdev, |
| 154 | enum radeon_pm_action action) |
| 155 | { |
| 156 | switch (action) { |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 157 | case PM_ACTION_MINIMUM: |
| 158 | rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_BATTERY); |
Rafał Miłecki | 9038dfd | 2010-02-20 23:15:04 +0000 | [diff] [blame] | 159 | rdev->pm.requested_clock_mode = |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 160 | radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_LOW); |
| 161 | break; |
| 162 | case PM_ACTION_DOWNCLOCK: |
| 163 | rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_POWERSAVE); |
Rafał Miłecki | 9038dfd | 2010-02-20 23:15:04 +0000 | [diff] [blame] | 164 | rdev->pm.requested_clock_mode = |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 165 | radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_MID); |
| 166 | break; |
| 167 | case PM_ACTION_UPCLOCK: |
| 168 | rdev->pm.requested_power_state = radeon_pick_power_state(rdev, POWER_STATE_TYPE_DEFAULT); |
Rafał Miłecki | 9038dfd | 2010-02-20 23:15:04 +0000 | [diff] [blame] | 169 | rdev->pm.requested_clock_mode = |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 170 | radeon_pick_clock_mode(rdev, rdev->pm.requested_power_state, POWER_MODE_TYPE_HIGH); |
| 171 | break; |
Rafał Miłecki | 9038dfd | 2010-02-20 23:15:04 +0000 | [diff] [blame] | 172 | case PM_ACTION_NONE: |
| 173 | default: |
| 174 | DRM_ERROR("Requested mode for not defined action\n"); |
| 175 | return; |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 176 | } |
Alex Deucher | 530079a | 2009-12-23 14:39:36 -0500 | [diff] [blame] | 177 | DRM_INFO("Requested: e: %d m: %d p: %d\n", |
Rafał Miłecki | 9038dfd | 2010-02-20 23:15:04 +0000 | [diff] [blame] | 178 | rdev->pm.requested_clock_mode->sclk, |
| 179 | rdev->pm.requested_clock_mode->mclk, |
Alex Deucher | 530079a | 2009-12-23 14:39:36 -0500 | [diff] [blame] | 180 | rdev->pm.requested_power_state->non_clock_info.pcie_lanes); |
Alex Deucher | 516d0e4 | 2009-12-23 14:28:05 -0500 | [diff] [blame] | 181 | } |
| 182 | |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame^] | 183 | void radeon_sync_with_vblank(struct radeon_device *rdev) |
Rafał Miłecki | d0d6cb8 | 2010-03-02 22:06:52 +0100 | [diff] [blame] | 184 | { |
| 185 | if (rdev->pm.active_crtcs) { |
| 186 | rdev->pm.vblank_sync = false; |
| 187 | wait_event_timeout( |
| 188 | rdev->irq.vblank_queue, rdev->pm.vblank_sync, |
| 189 | msecs_to_jiffies(RADEON_WAIT_VBLANK_TIMEOUT)); |
| 190 | } |
| 191 | } |
| 192 | |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 193 | int radeon_pm_init(struct radeon_device *rdev) |
| 194 | { |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 195 | rdev->pm.state = PM_STATE_DISABLED; |
| 196 | rdev->pm.planned_action = PM_ACTION_NONE; |
| 197 | rdev->pm.downclocked = false; |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 198 | |
Alex Deucher | 56278a8 | 2009-12-28 13:58:44 -0500 | [diff] [blame] | 199 | if (rdev->bios) { |
| 200 | if (rdev->is_atom_bios) |
| 201 | radeon_atombios_get_power_modes(rdev); |
| 202 | else |
| 203 | radeon_combios_get_power_modes(rdev); |
| 204 | radeon_print_power_mode_info(rdev); |
| 205 | } |
| 206 | |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 207 | if (radeon_debugfs_pm_init(rdev)) { |
Rafał Miłecki | c142c3e | 2009-11-06 11:38:34 +0100 | [diff] [blame] | 208 | DRM_ERROR("Failed to register debugfs file for PM!\n"); |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 209 | } |
| 210 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 211 | INIT_DELAYED_WORK(&rdev->pm.idle_work, radeon_pm_idle_work_handler); |
| 212 | |
| 213 | if (radeon_dynpm != -1 && radeon_dynpm) { |
| 214 | rdev->pm.state = PM_STATE_PAUSED; |
| 215 | DRM_INFO("radeon: dynamic power management enabled\n"); |
| 216 | } |
| 217 | |
| 218 | DRM_INFO("radeon: power management initialized\n"); |
| 219 | |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 220 | return 0; |
| 221 | } |
| 222 | |
Alex Deucher | 29fb52c | 2010-03-11 10:01:17 -0500 | [diff] [blame] | 223 | void radeon_pm_fini(struct radeon_device *rdev) |
| 224 | { |
| 225 | if (rdev->pm.i2c_bus) |
| 226 | radeon_i2c_destroy(rdev->pm.i2c_bus); |
| 227 | } |
| 228 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 229 | void radeon_pm_compute_clocks(struct radeon_device *rdev) |
| 230 | { |
| 231 | struct drm_device *ddev = rdev->ddev; |
| 232 | struct drm_connector *connector; |
| 233 | struct radeon_crtc *radeon_crtc; |
| 234 | int count = 0; |
| 235 | |
| 236 | if (rdev->pm.state == PM_STATE_DISABLED) |
| 237 | return; |
| 238 | |
| 239 | mutex_lock(&rdev->pm.mutex); |
| 240 | |
| 241 | rdev->pm.active_crtcs = 0; |
| 242 | list_for_each_entry(connector, |
| 243 | &ddev->mode_config.connector_list, head) { |
| 244 | if (connector->encoder && |
Alex Deucher | 57f50d7 | 2010-03-14 16:31:36 -0400 | [diff] [blame] | 245 | connector->encoder->crtc && |
| 246 | connector->dpms != DRM_MODE_DPMS_OFF) { |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 247 | radeon_crtc = to_radeon_crtc(connector->encoder->crtc); |
| 248 | rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); |
| 249 | ++count; |
| 250 | } |
| 251 | } |
| 252 | |
| 253 | if (count > 1) { |
| 254 | if (rdev->pm.state == PM_STATE_ACTIVE) { |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 255 | cancel_delayed_work(&rdev->pm.idle_work); |
| 256 | |
| 257 | rdev->pm.state = PM_STATE_PAUSED; |
| 258 | rdev->pm.planned_action = PM_ACTION_UPCLOCK; |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 259 | if (rdev->pm.downclocked) |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 260 | radeon_pm_set_clocks(rdev); |
| 261 | |
| 262 | DRM_DEBUG("radeon: dynamic power management deactivated\n"); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 263 | } |
| 264 | } else if (count == 1) { |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 265 | /* TODO: Increase clocks if needed for current mode */ |
| 266 | |
| 267 | if (rdev->pm.state == PM_STATE_MINIMUM) { |
| 268 | rdev->pm.state = PM_STATE_ACTIVE; |
| 269 | rdev->pm.planned_action = PM_ACTION_UPCLOCK; |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 270 | radeon_pm_set_clocks(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 271 | |
| 272 | queue_delayed_work(rdev->wq, &rdev->pm.idle_work, |
| 273 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
| 274 | } |
| 275 | else if (rdev->pm.state == PM_STATE_PAUSED) { |
| 276 | rdev->pm.state = PM_STATE_ACTIVE; |
| 277 | queue_delayed_work(rdev->wq, &rdev->pm.idle_work, |
| 278 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
| 279 | DRM_DEBUG("radeon: dynamic power management activated\n"); |
| 280 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 281 | } |
| 282 | else { /* count == 0 */ |
| 283 | if (rdev->pm.state != PM_STATE_MINIMUM) { |
| 284 | cancel_delayed_work(&rdev->pm.idle_work); |
| 285 | |
| 286 | rdev->pm.state = PM_STATE_MINIMUM; |
| 287 | rdev->pm.planned_action = PM_ACTION_MINIMUM; |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 288 | radeon_pm_set_clocks(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 289 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 290 | } |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 291 | |
| 292 | mutex_unlock(&rdev->pm.mutex); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 293 | } |
| 294 | |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame^] | 295 | bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish) |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 296 | { |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame^] | 297 | u32 stat_crtc = 0; |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 298 | bool in_vbl = true; |
| 299 | |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame^] | 300 | if (ASIC_IS_DCE4(rdev)) { |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 301 | if (rdev->pm.active_crtcs & (1 << 0)) { |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame^] | 302 | stat_crtc = RREG32(EVERGREEN_CRTC_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET); |
| 303 | if (!(stat_crtc & 1)) |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 304 | in_vbl = false; |
| 305 | } |
| 306 | if (rdev->pm.active_crtcs & (1 << 1)) { |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame^] | 307 | stat_crtc = RREG32(EVERGREEN_CRTC_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET); |
| 308 | if (!(stat_crtc & 1)) |
| 309 | in_vbl = false; |
| 310 | } |
| 311 | if (rdev->pm.active_crtcs & (1 << 2)) { |
| 312 | stat_crtc = RREG32(EVERGREEN_CRTC_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET); |
| 313 | if (!(stat_crtc & 1)) |
| 314 | in_vbl = false; |
| 315 | } |
| 316 | if (rdev->pm.active_crtcs & (1 << 3)) { |
| 317 | stat_crtc = RREG32(EVERGREEN_CRTC_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET); |
| 318 | if (!(stat_crtc & 1)) |
| 319 | in_vbl = false; |
| 320 | } |
| 321 | if (rdev->pm.active_crtcs & (1 << 4)) { |
| 322 | stat_crtc = RREG32(EVERGREEN_CRTC_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET); |
| 323 | if (!(stat_crtc & 1)) |
| 324 | in_vbl = false; |
| 325 | } |
| 326 | if (rdev->pm.active_crtcs & (1 << 5)) { |
| 327 | stat_crtc = RREG32(EVERGREEN_CRTC_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET); |
| 328 | if (!(stat_crtc & 1)) |
| 329 | in_vbl = false; |
| 330 | } |
| 331 | } else if (ASIC_IS_AVIVO(rdev)) { |
| 332 | if (rdev->pm.active_crtcs & (1 << 0)) { |
| 333 | stat_crtc = RREG32(D1CRTC_STATUS); |
| 334 | if (!(stat_crtc & 1)) |
| 335 | in_vbl = false; |
| 336 | } |
| 337 | if (rdev->pm.active_crtcs & (1 << 1)) { |
| 338 | stat_crtc = RREG32(D2CRTC_STATUS); |
| 339 | if (!(stat_crtc & 1)) |
| 340 | in_vbl = false; |
| 341 | } |
| 342 | } else { |
| 343 | if (rdev->pm.active_crtcs & (1 << 0)) { |
| 344 | stat_crtc = RREG32(RADEON_CRTC_STATUS); |
| 345 | if (!(stat_crtc & 1)) |
| 346 | in_vbl = false; |
| 347 | } |
| 348 | if (rdev->pm.active_crtcs & (1 << 1)) { |
| 349 | stat_crtc = RREG32(RADEON_CRTC2_STATUS); |
| 350 | if (!(stat_crtc & 1)) |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 351 | in_vbl = false; |
| 352 | } |
| 353 | } |
| 354 | if (in_vbl == false) |
Alex Deucher | bae6b562 | 2010-04-22 13:38:05 -0400 | [diff] [blame^] | 355 | DRM_INFO("not in vbl for pm change %08x at %s\n", stat_crtc, |
| 356 | finish ? "exit" : "entry"); |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 357 | return in_vbl; |
| 358 | } |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 359 | static void radeon_pm_set_clocks_locked(struct radeon_device *rdev) |
| 360 | { |
| 361 | /*radeon_fence_wait_last(rdev);*/ |
| 362 | switch (rdev->pm.planned_action) { |
| 363 | case PM_ACTION_UPCLOCK: |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 364 | rdev->pm.downclocked = false; |
| 365 | break; |
| 366 | case PM_ACTION_DOWNCLOCK: |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 367 | rdev->pm.downclocked = true; |
| 368 | break; |
| 369 | case PM_ACTION_MINIMUM: |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 370 | break; |
| 371 | case PM_ACTION_NONE: |
| 372 | DRM_ERROR("%s: PM_ACTION_NONE\n", __func__); |
| 373 | break; |
| 374 | } |
Dave Airlie | f735261 | 2010-02-18 15:58:36 +1000 | [diff] [blame] | 375 | |
Alex Deucher | 530079a | 2009-12-23 14:39:36 -0500 | [diff] [blame] | 376 | radeon_set_power_state(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 377 | rdev->pm.planned_action = PM_ACTION_NONE; |
| 378 | } |
| 379 | |
| 380 | static void radeon_pm_set_clocks(struct radeon_device *rdev) |
| 381 | { |
Alex Deucher | 8a56df6 | 2010-03-15 17:09:05 -0400 | [diff] [blame] | 382 | int i; |
| 383 | |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 384 | radeon_get_power_state(rdev, rdev->pm.planned_action); |
| 385 | mutex_lock(&rdev->cp.mutex); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 386 | |
Alex Deucher | ef6e6cf | 2010-03-17 14:29:15 -0400 | [diff] [blame] | 387 | /* wait for GPU idle */ |
| 388 | rdev->pm.gui_idle = false; |
| 389 | rdev->irq.gui_idle = true; |
| 390 | radeon_irq_set(rdev); |
| 391 | wait_event_interruptible_timeout( |
| 392 | rdev->irq.idle_queue, rdev->pm.gui_idle, |
| 393 | msecs_to_jiffies(RADEON_WAIT_IDLE_TIMEOUT)); |
| 394 | rdev->irq.gui_idle = false; |
| 395 | radeon_irq_set(rdev); |
| 396 | |
Alex Deucher | 8a56df6 | 2010-03-15 17:09:05 -0400 | [diff] [blame] | 397 | for (i = 0; i < rdev->num_crtc; i++) { |
| 398 | if (rdev->pm.active_crtcs & (1 << i)) { |
| 399 | rdev->pm.req_vblank |= (1 << i); |
| 400 | drm_vblank_get(rdev->ddev, i); |
| 401 | } |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 402 | } |
Rafał Miłecki | d0d6cb8 | 2010-03-02 22:06:52 +0100 | [diff] [blame] | 403 | radeon_pm_set_clocks_locked(rdev); |
Alex Deucher | 8a56df6 | 2010-03-15 17:09:05 -0400 | [diff] [blame] | 404 | for (i = 0; i < rdev->num_crtc; i++) { |
| 405 | if (rdev->pm.req_vblank & (1 << i)) { |
| 406 | rdev->pm.req_vblank &= ~(1 << i); |
| 407 | drm_vblank_put(rdev->ddev, i); |
| 408 | } |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 409 | } |
| 410 | |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 411 | mutex_unlock(&rdev->cp.mutex); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 412 | } |
| 413 | |
| 414 | static void radeon_pm_idle_work_handler(struct work_struct *work) |
| 415 | { |
| 416 | struct radeon_device *rdev; |
| 417 | rdev = container_of(work, struct radeon_device, |
| 418 | pm.idle_work.work); |
| 419 | |
| 420 | mutex_lock(&rdev->pm.mutex); |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 421 | if (rdev->pm.state == PM_STATE_ACTIVE) { |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 422 | unsigned long irq_flags; |
| 423 | int not_processed = 0; |
| 424 | |
| 425 | read_lock_irqsave(&rdev->fence_drv.lock, irq_flags); |
| 426 | if (!list_empty(&rdev->fence_drv.emited)) { |
| 427 | struct list_head *ptr; |
| 428 | list_for_each(ptr, &rdev->fence_drv.emited) { |
| 429 | /* count up to 3, that's enought info */ |
| 430 | if (++not_processed >= 3) |
| 431 | break; |
| 432 | } |
| 433 | } |
| 434 | read_unlock_irqrestore(&rdev->fence_drv.lock, irq_flags); |
| 435 | |
| 436 | if (not_processed >= 3) { /* should upclock */ |
| 437 | if (rdev->pm.planned_action == PM_ACTION_DOWNCLOCK) { |
| 438 | rdev->pm.planned_action = PM_ACTION_NONE; |
| 439 | } else if (rdev->pm.planned_action == PM_ACTION_NONE && |
| 440 | rdev->pm.downclocked) { |
| 441 | rdev->pm.planned_action = |
| 442 | PM_ACTION_UPCLOCK; |
| 443 | rdev->pm.action_timeout = jiffies + |
| 444 | msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS); |
| 445 | } |
| 446 | } else if (not_processed == 0) { /* should downclock */ |
| 447 | if (rdev->pm.planned_action == PM_ACTION_UPCLOCK) { |
| 448 | rdev->pm.planned_action = PM_ACTION_NONE; |
| 449 | } else if (rdev->pm.planned_action == PM_ACTION_NONE && |
| 450 | !rdev->pm.downclocked) { |
| 451 | rdev->pm.planned_action = |
| 452 | PM_ACTION_DOWNCLOCK; |
| 453 | rdev->pm.action_timeout = jiffies + |
| 454 | msecs_to_jiffies(RADEON_RECLOCK_DELAY_MS); |
| 455 | } |
| 456 | } |
| 457 | |
| 458 | if (rdev->pm.planned_action != PM_ACTION_NONE && |
Rafał Miłecki | 73a6d3f | 2010-01-08 00:22:47 +0100 | [diff] [blame] | 459 | jiffies > rdev->pm.action_timeout) { |
| 460 | radeon_pm_set_clocks(rdev); |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 461 | } |
| 462 | } |
| 463 | mutex_unlock(&rdev->pm.mutex); |
| 464 | |
| 465 | queue_delayed_work(rdev->wq, &rdev->pm.idle_work, |
| 466 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
| 467 | } |
| 468 | |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 469 | /* |
| 470 | * Debugfs info |
| 471 | */ |
| 472 | #if defined(CONFIG_DEBUG_FS) |
| 473 | |
| 474 | static int radeon_debugfs_pm_info(struct seq_file *m, void *data) |
| 475 | { |
| 476 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
| 477 | struct drm_device *dev = node->minor->dev; |
| 478 | struct radeon_device *rdev = dev->dev_private; |
| 479 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 480 | seq_printf(m, "state: %s\n", pm_state_names[rdev->pm.state]); |
Rafał Miłecki | 6234077 | 2009-12-15 21:46:58 +0100 | [diff] [blame] | 481 | seq_printf(m, "default engine clock: %u0 kHz\n", rdev->clock.default_sclk); |
| 482 | seq_printf(m, "current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); |
| 483 | seq_printf(m, "default memory clock: %u0 kHz\n", rdev->clock.default_mclk); |
| 484 | if (rdev->asic->get_memory_clock) |
| 485 | seq_printf(m, "current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); |
Rafał Miłecki | aa5120d | 2010-02-18 20:24:28 +0000 | [diff] [blame] | 486 | if (rdev->asic->get_pcie_lanes) |
| 487 | seq_printf(m, "PCIE lanes: %d\n", radeon_get_pcie_lanes(rdev)); |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 488 | |
| 489 | return 0; |
| 490 | } |
| 491 | |
| 492 | static struct drm_info_list radeon_pm_info_list[] = { |
| 493 | {"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL}, |
| 494 | }; |
| 495 | #endif |
| 496 | |
Rafał Miłecki | c913e23 | 2009-12-22 23:02:16 +0100 | [diff] [blame] | 497 | static int radeon_debugfs_pm_init(struct radeon_device *rdev) |
Rafał Miłecki | 7433874 | 2009-11-03 00:53:02 +0100 | [diff] [blame] | 498 | { |
| 499 | #if defined(CONFIG_DEBUG_FS) |
| 500 | return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list)); |
| 501 | #else |
| 502 | return 0; |
| 503 | #endif |
| 504 | } |