| R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 1 | Kernel driver smsc47m1 |
| 2 | ====================== |
| 3 | |
| 4 | Supported chips: |
| Jean Delvare | 6091780 | 2006-10-08 22:00:44 +0200 | [diff] [blame] | 5 | * SMSC LPC47B27x, LPC47M112, LPC47M10x, LPC47M13x, LPC47M14x, |
| 6 | LPC47M15x and LPC47M192 |
| R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 7 | Addresses scanned: none, address read from Super I/O config space |
| 8 | Prefix: 'smsc47m1' |
| 9 | Datasheets: |
| 10 | http://www.smsc.com/main/datasheets/47b27x.pdf |
| 11 | http://www.smsc.com/main/datasheets/47m10x.pdf |
| Jean Delvare | 6091780 | 2006-10-08 22:00:44 +0200 | [diff] [blame] | 12 | http://www.smsc.com/main/datasheets/47m112.pdf |
| R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 13 | http://www.smsc.com/main/tools/discontinued/47m13x.pdf |
| 14 | http://www.smsc.com/main/datasheets/47m14x.pdf |
| 15 | http://www.smsc.com/main/tools/discontinued/47m15x.pdf |
| 16 | http://www.smsc.com/main/datasheets/47m192.pdf |
| Jean Delvare | 8eccbb6 | 2007-05-08 17:21:59 +0200 | [diff] [blame] | 17 | * SMSC LPC47M292 |
| 18 | Addresses scanned: none, address read from Super I/O config space |
| 19 | Prefix: 'smsc47m2' |
| 20 | Datasheet: Not public |
| Jean Delvare | b890a07 | 2005-10-26 22:21:24 +0200 | [diff] [blame] | 21 | * SMSC LPC47M997 |
| 22 | Addresses scanned: none, address read from Super I/O config space |
| 23 | Prefix: 'smsc47m1' |
| 24 | Datasheet: none |
| R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 25 | |
| 26 | Authors: |
| 27 | Mark D. Studebaker <mdsxyz123@yahoo.com>, |
| 28 | With assistance from Bruce Allen <ballen@uwm.edu>, and his |
| 29 | fan.c program: http://www.lsc-group.phys.uwm.edu/%7Eballen/driver/ |
| 30 | Gabriele Gorla <gorlik@yahoo.com>, |
| 31 | Jean Delvare <khali@linux-fr.org> |
| 32 | |
| 33 | Description |
| 34 | ----------- |
| 35 | |
| 36 | The Standard Microsystems Corporation (SMSC) 47M1xx Super I/O chips |
| 37 | contain monitoring and PWM control circuitry for two fans. |
| 38 | |
| Jean Delvare | 8eccbb6 | 2007-05-08 17:21:59 +0200 | [diff] [blame] | 39 | The LPC47M15x, LPC47M192 and LPC47M292 chips contain a full 'hardware |
| 40 | monitoring block' in addition to the fan monitoring and control. The |
| 41 | hardware monitoring block is not supported by this driver, use the |
| 42 | smsc47m192 driver for that. |
| R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 43 | |
| Jean Delvare | b890a07 | 2005-10-26 22:21:24 +0200 | [diff] [blame] | 44 | No documentation is available for the 47M997, but it has the same device |
| 45 | ID as the 47M15x and 47M192 chips and seems to be compatible. |
| 46 | |
| R.Marek@sh.cvut.cz | 7f15b66 | 2005-05-26 12:42:19 +0000 | [diff] [blame] | 47 | Fan rotation speeds are reported in RPM (rotations per minute). An alarm is |
| 48 | triggered if the rotation speed has dropped below a programmable limit. Fan |
| 49 | readings can be divided by a programmable divider (1, 2, 4 or 8) to give |
| 50 | the readings more range or accuracy. Not all RPM values can accurately be |
| 51 | represented, so some rounding is done. With a divider of 2, the lowest |
| 52 | representable value is around 2600 RPM. |
| 53 | |
| 54 | PWM values are from 0 to 255. |
| 55 | |
| 56 | If an alarm triggers, it will remain triggered until the hardware register |
| 57 | is read at least once. This means that the cause for the alarm may |
| 58 | already have disappeared! Note that in the current implementation, all |
| 59 | hardware registers are read whenever any data is read (unless it is less |
| 60 | than 1.5 seconds since the last update). This means that you can easily |
| 61 | miss once-only alarms. |
| 62 | |
| 63 | |
| 64 | ********************** |
| 65 | The lm_sensors project gratefully acknowledges the support of |
| 66 | Intel in the development of this driver. |