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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (C) 1998-2000 Michel Aubry
3 * Copyright (C) 1998-2000 Andrzej Krzysztofowicz
4 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
Bartlomiej Zolnierkiewicz9445de72007-05-16 00:51:42 +02005 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * Portions copyright (c) 2001 Sun Microsystems
7 *
8 *
9 * RCC/ServerWorks IDE driver for Linux
10 *
11 * OSB4: `Open South Bridge' IDE Interface (fn 1)
12 * supports UDMA mode 2 (33 MB/s)
13 *
14 * CSB5: `Champion South Bridge' IDE Interface (fn 1)
15 * all revisions support UDMA mode 4 (66 MB/s)
16 * revision A2.0 and up support UDMA mode 5 (100 MB/s)
17 *
18 * *** The CSB5 does not provide ANY register ***
19 * *** to detect 80-conductor cable presence. ***
20 *
21 * CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
22 *
Narendra Sankar84f57fb2005-08-18 22:30:35 +020023 * HT1000: AKA BCM5785 - Hypertransport Southbridge for Opteron systems. IDE
24 * controller same as the CSB6. Single channel ATA100 only.
25 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 * Documentation:
27 * Available under NDA only. Errata info very hard to get.
28 *
29 */
30
Linus Torvalds1da177e2005-04-16 15:20:36 -070031#include <linux/types.h>
32#include <linux/module.h>
33#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070034#include <linux/pci.h>
35#include <linux/hdreg.h>
36#include <linux/ide.h>
37#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
39#include <asm/io.h>
40
41#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
42#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
43
44/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
45 * can overrun their FIFOs when used with the CSB5 */
46static const char *svwks_bad_ata100[] = {
47 "ST320011A",
48 "ST340016A",
49 "ST360021A",
50 "ST380021A",
51 NULL
52};
53
Linus Torvalds1da177e2005-04-16 15:20:36 -070054static struct pci_dev *isa_dev;
55
56static int check_in_drive_lists (ide_drive_t *drive, const char **list)
57{
58 while (*list)
59 if (!strcmp(*list++, drive->id->model))
60 return 1;
61 return 0;
62}
63
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020064static u8 svwks_udma_filter(ide_drive_t *drive)
Linus Torvalds1da177e2005-04-16 15:20:36 -070065{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +010066 struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020067 u8 mask = 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -070068
Narendra Sankar84f57fb2005-08-18 22:30:35 +020069 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE)
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020070 return 0x1f;
Linus Torvalds1da177e2005-04-16 15:20:36 -070071 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
72 u32 reg = 0;
73 if (isa_dev)
74 pci_read_config_dword(isa_dev, 0x64, &reg);
75
76 /*
77 * Don't enable UDMA on disk devices for the moment
78 */
79 if(drive->media == ide_disk)
80 return 0;
81 /* Check the OSB4 DMA33 enable bit */
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020082 return ((reg & 0x00004000) == 0x00004000) ? 0x07 : 0;
Auke Kok44c10132007-06-08 15:46:36 -070083 } else if (dev->revision < SVWKS_CSB5_REVISION_NEW) {
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020084 return 0x07;
Auke Kok44c10132007-06-08 15:46:36 -070085 } else if (dev->revision >= SVWKS_CSB5_REVISION_NEW) {
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020086 u8 btr = 0, mode;
Linus Torvalds1da177e2005-04-16 15:20:36 -070087 pci_read_config_byte(dev, 0x5A, &btr);
88 mode = btr & 0x3;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020089
Linus Torvalds1da177e2005-04-16 15:20:36 -070090 /* If someone decides to do UDMA133 on CSB5 the same
91 issue will bite so be inclusive */
92 if (mode > 2 && check_in_drive_lists(drive, svwks_bad_ata100))
93 mode = 2;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020094
95 switch(mode) {
Tony Battersby0c824b52007-10-16 22:29:52 +020096 case 3: mask = 0x3f; break;
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +020097 case 2: mask = 0x1f; break;
98 case 1: mask = 0x07; break;
99 default: mask = 0x00; break;
100 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700101 }
102 if (((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
103 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) &&
104 (!(PCI_FUNC(dev->devfn) & 1)))
Bartlomiej Zolnierkiewicz2d5eaa62007-05-10 00:01:08 +0200105 mask = 0x1f;
106
107 return mask;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108}
109
110static u8 svwks_csb_check (struct pci_dev *dev)
111{
112 switch (dev->device) {
113 case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
114 case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
115 case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200116 case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 return 1;
118 default:
119 break;
120 }
121 return 0;
122}
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200123
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200124static void svwks_set_pio_mode(ide_drive_t *drive, const u8 pio)
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200125{
126 static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
127 static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 };
128
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100129 struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200130
131 pci_write_config_byte(dev, drive_pci[drive->dn], pio_modes[pio]);
132
133 if (svwks_csb_check(dev)) {
134 u16 csb_pio = 0;
135
136 pci_read_config_word(dev, 0x4a, &csb_pio);
137
138 csb_pio &= ~(0x0f << (4 * drive->dn));
139 csb_pio |= (pio << (4 * drive->dn));
140
141 pci_write_config_word(dev, 0x4a, csb_pio);
142 }
143}
144
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200145static void svwks_set_dma_mode(ide_drive_t *drive, const u8 speed)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146{
Alan Coxf201f502006-06-28 04:27:02 -0700147 static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 };
148 static const u8 dma_modes[] = { 0x77, 0x21, 0x20 };
Alan Coxf201f502006-06-28 04:27:02 -0700149 static const u8 drive_pci2[] = { 0x45, 0x44, 0x47, 0x46 };
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
151 ide_hwif_t *hwif = HWIF(drive);
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100152 struct pci_dev *dev = to_pci_dev(hwif->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700153 u8 unit = (drive->select.b.unit & 0x01);
Bartlomiej Zolnierkiewicz1880a8d2007-07-20 01:11:56 +0200154
155 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
156
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157 pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700158 pci_read_config_byte(dev, 0x54, &ultra_enable);
159
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 ultra_timing &= ~(0x0F << (4*unit));
161 ultra_enable &= ~(0x01 << drive->dn);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162
Bartlomiej Zolnierkiewicz7b971df2008-01-26 20:12:59 +0100163 if (speed >= XFER_UDMA_0) {
164 dma_timing |= dma_modes[2];
165 ultra_timing |= (udma_modes[speed - XFER_UDMA_0] << (4 * unit));
166 ultra_enable |= (0x01 << drive->dn);
167 } else if (speed >= XFER_MW_DMA_0)
168 dma_timing |= dma_modes[speed - XFER_MW_DMA_0];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169
Linus Torvalds1da177e2005-04-16 15:20:36 -0700170 pci_write_config_byte(dev, drive_pci2[drive->dn], dma_timing);
171 pci_write_config_byte(dev, (0x56|hwif->channel), ultra_timing);
172 pci_write_config_byte(dev, 0x54, ultra_enable);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173}
174
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175static unsigned int __devinit init_chipset_svwks (struct pci_dev *dev, const char *name)
176{
177 unsigned int reg;
178 u8 btr;
179
Linus Torvalds1da177e2005-04-16 15:20:36 -0700180 /* force Master Latency Timer value to 64 PCICLKs */
181 pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40);
182
183 /* OSB4 : South Bridge and IDE */
184 if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
Alan Cox970a6132006-09-30 23:27:29 -0700185 isa_dev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700186 PCI_DEVICE_ID_SERVERWORKS_OSB4, NULL);
187 if (isa_dev) {
188 pci_read_config_dword(isa_dev, 0x64, &reg);
189 reg &= ~0x00002000; /* disable 600ns interrupt mask */
190 if(!(reg & 0x00004000))
191 printk(KERN_DEBUG "%s: UDMA not BIOS enabled.\n", name);
192 reg |= 0x00004000; /* enable UDMA/33 support */
193 pci_write_config_dword(isa_dev, 0x64, reg);
194 }
195 }
196
197 /* setup CSB5/CSB6 : South Bridge and IDE option RAID */
198 else if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) ||
199 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
200 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) {
201
202 /* Third Channel Test */
203 if (!(PCI_FUNC(dev->devfn) & 1)) {
204 struct pci_dev * findev = NULL;
205 u32 reg4c = 0;
Alan Cox970a6132006-09-30 23:27:29 -0700206 findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 PCI_DEVICE_ID_SERVERWORKS_CSB5, NULL);
208 if (findev) {
209 pci_read_config_dword(findev, 0x4C, &reg4c);
210 reg4c &= ~0x000007FF;
211 reg4c |= 0x00000040;
212 reg4c |= 0x00000020;
213 pci_write_config_dword(findev, 0x4C, reg4c);
Alan Cox970a6132006-09-30 23:27:29 -0700214 pci_dev_put(findev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215 }
216 outb_p(0x06, 0x0c00);
217 dev->irq = inb_p(0x0c01);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 } else {
219 struct pci_dev * findev = NULL;
220 u8 reg41 = 0;
221
Alan Cox970a6132006-09-30 23:27:29 -0700222 findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223 PCI_DEVICE_ID_SERVERWORKS_CSB6, NULL);
224 if (findev) {
225 pci_read_config_byte(findev, 0x41, &reg41);
226 reg41 &= ~0x40;
227 pci_write_config_byte(findev, 0x41, reg41);
Alan Cox970a6132006-09-30 23:27:29 -0700228 pci_dev_put(findev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229 }
230 /*
231 * This is a device pin issue on CSB6.
232 * Since there will be a future raid mode,
233 * early versions of the chipset require the
234 * interrupt pin to be set, and it is a compatibility
235 * mode issue.
236 */
237 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE)
238 dev->irq = 0;
239 }
240// pci_read_config_dword(dev, 0x40, &pioreg)
241// pci_write_config_dword(dev, 0x40, 0x99999999);
242// pci_read_config_dword(dev, 0x44, &dmareg);
243// pci_write_config_dword(dev, 0x44, 0xFFFFFFFF);
244 /* setup the UDMA Control register
245 *
246 * 1. clear bit 6 to enable DMA
247 * 2. enable DMA modes with bits 0-1
248 * 00 : legacy
249 * 01 : udma2
250 * 10 : udma2/udma4
251 * 11 : udma2/udma4/udma5
252 */
253 pci_read_config_byte(dev, 0x5A, &btr);
254 btr &= ~0x40;
255 if (!(PCI_FUNC(dev->devfn) & 1))
256 btr |= 0x2;
257 else
Auke Kok44c10132007-06-08 15:46:36 -0700258 btr |= (dev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700259 pci_write_config_byte(dev, 0x5A, btr);
260 }
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200261 /* Setup HT1000 SouthBridge Controller - Single Channel Only */
262 else if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) {
263 pci_read_config_byte(dev, 0x5A, &btr);
264 btr &= ~0x40;
265 btr |= 0x3;
266 pci_write_config_byte(dev, 0x5A, btr);
267 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268
Alan Coxf201f502006-06-28 04:27:02 -0700269 return dev->irq;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700270}
271
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200272static u8 __devinit ata66_svwks_svwks(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700273{
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200274 return ATA_CBL_PATA80;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700275}
276
277/* On Dell PowerEdge servers with a CSB5/CSB6, the top two bits
278 * of the subsystem device ID indicate presence of an 80-pin cable.
279 * Bit 15 clear = secondary IDE channel does not have 80-pin cable.
280 * Bit 15 set = secondary IDE channel has 80-pin cable.
281 * Bit 14 clear = primary IDE channel does not have 80-pin cable.
282 * Bit 14 set = primary IDE channel has 80-pin cable.
283 */
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200284static u8 __devinit ata66_svwks_dell(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700285{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100286 struct pci_dev *dev = to_pci_dev(hwif->dev);
287
Linus Torvalds1da177e2005-04-16 15:20:36 -0700288 if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
289 dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
290 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE ||
291 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE))
292 return ((1 << (hwif->channel + 14)) &
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200293 dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
294 return ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700295}
296
297/* Sun Cobalt Alpine hardware avoids the 80-pin cable
298 * detect issue by attaching the drives directly to the board.
299 * This check follows the Dell precedent (how scary is that?!)
300 *
301 * WARNING: this only works on Alpine hardware!
302 */
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200303static u8 __devinit ata66_svwks_cobalt(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700304{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100305 struct pci_dev *dev = to_pci_dev(hwif->dev);
306
Linus Torvalds1da177e2005-04-16 15:20:36 -0700307 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN &&
308 dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
309 dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
310 return ((1 << (hwif->channel + 14)) &
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200311 dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
312 return ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700313}
314
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200315static u8 __devinit svwks_cable_detect(ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700316{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100317 struct pci_dev *dev = to_pci_dev(hwif->dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700318
Linus Torvalds1da177e2005-04-16 15:20:36 -0700319 /* Server Works */
320 if (dev->subsystem_vendor == PCI_VENDOR_ID_SERVERWORKS)
321 return ata66_svwks_svwks (hwif);
322
323 /* Dell PowerEdge */
324 if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL)
325 return ata66_svwks_dell (hwif);
326
327 /* Cobalt Alpine */
328 if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN)
329 return ata66_svwks_cobalt (hwif);
330
Alan Coxf201f502006-06-28 04:27:02 -0700331 /* Per Specified Design by OEM, and ASIC Architect */
332 if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
333 (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2))
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200334 return ATA_CBL_PATA80;
Alan Coxf201f502006-06-28 04:27:02 -0700335
Bartlomiej Zolnierkiewicz49521f92007-07-09 23:17:58 +0200336 return ATA_CBL_PATA40;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700337}
338
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200339static const struct ide_port_ops osb4_port_ops = {
340 .set_pio_mode = svwks_set_pio_mode,
341 .set_dma_mode = svwks_set_dma_mode,
342 .udma_filter = svwks_udma_filter,
343};
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100344
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200345static const struct ide_port_ops svwks_port_ops = {
346 .set_pio_mode = svwks_set_pio_mode,
347 .set_dma_mode = svwks_set_dma_mode,
348 .udma_filter = svwks_udma_filter,
349 .cable_detect = svwks_cable_detect,
350};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700351
Bartlomiej Zolnierkiewicz3b2a5c72008-07-23 19:55:56 +0200352#define IDE_HFLAGS_SVWKS IDE_HFLAG_LEGACY_IRQS
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100353
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200354static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700355 { /* 0 */
356 .name = "SvrWks OSB4",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700357 .init_chipset = init_chipset_svwks,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200358 .port_ops = &osb4_port_ops,
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100359 .host_flags = IDE_HFLAGS_SVWKS,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200360 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200361 .mwdma_mask = ATA_MWDMA2,
362 .udma_mask = 0x00, /* UDMA is problematic on OSB4 */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700363 },{ /* 1 */
364 .name = "SvrWks CSB5",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700365 .init_chipset = init_chipset_svwks,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200366 .port_ops = &svwks_port_ops,
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100367 .host_flags = IDE_HFLAGS_SVWKS,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200368 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200369 .mwdma_mask = ATA_MWDMA2,
370 .udma_mask = ATA_UDMA5,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700371 },{ /* 2 */
372 .name = "SvrWks CSB6",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700373 .init_chipset = init_chipset_svwks,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200374 .port_ops = &svwks_port_ops,
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100375 .host_flags = IDE_HFLAGS_SVWKS,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200376 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200377 .mwdma_mask = ATA_MWDMA2,
378 .udma_mask = ATA_UDMA5,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700379 },{ /* 3 */
380 .name = "SvrWks CSB6",
Linus Torvalds1da177e2005-04-16 15:20:36 -0700381 .init_chipset = init_chipset_svwks,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200382 .port_ops = &svwks_port_ops,
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100383 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200384 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200385 .mwdma_mask = ATA_MWDMA2,
386 .udma_mask = ATA_UDMA5,
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200387 },{ /* 4 */
388 .name = "SvrWks HT1000",
Narendra Sankar84f57fb2005-08-18 22:30:35 +0200389 .init_chipset = init_chipset_svwks,
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200390 .port_ops = &svwks_port_ops,
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100391 .host_flags = IDE_HFLAGS_SVWKS | IDE_HFLAG_SINGLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200392 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200393 .mwdma_mask = ATA_MWDMA2,
394 .udma_mask = ATA_UDMA5,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395 }
396};
397
398/**
399 * svwks_init_one - called when a OSB/CSB is found
400 * @dev: the svwks device
401 * @id: the matching pci id
402 *
403 * Called when the PCI registration layer (or the IDE initialization)
404 * finds a device matching our IDE device tables.
405 */
406
407static int __devinit svwks_init_one(struct pci_dev *dev, const struct pci_device_id *id)
408{
Bartlomiej Zolnierkiewicz039788e2007-10-20 00:32:34 +0200409 struct ide_port_info d;
Bartlomiej Zolnierkiewicz7ed58292007-10-19 00:30:09 +0200410 u8 idx = id->driver_data;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700411
Bartlomiej Zolnierkiewicz7ed58292007-10-19 00:30:09 +0200412 d = serverworks_chipsets[idx];
413
Bartlomiej Zolnierkiewicz8ac2b42a2008-02-01 23:09:30 +0100414 if (idx == 1)
415 d.host_flags |= IDE_HFLAG_CLEAR_SIMPLEX;
416 else if (idx == 2 || idx == 3) {
Bartlomiej Zolnierkiewicz7ed58292007-10-19 00:30:09 +0200417 if ((PCI_FUNC(dev->devfn) & 1) == 0) {
418 if (pci_resource_start(dev, 0) != 0x01f1)
Bartlomiej Zolnierkiewicz5e71d9c2008-04-26 17:36:35 +0200419 d.host_flags |= IDE_HFLAG_NON_BOOTABLE;
Bartlomiej Zolnierkiewicz7ed58292007-10-19 00:30:09 +0200420 d.host_flags |= IDE_HFLAG_SINGLE;
421 } else
422 d.host_flags &= ~IDE_HFLAG_SINGLE;
423 }
424
Bartlomiej Zolnierkiewicz6cdf6eb2008-07-24 22:53:14 +0200425 return ide_pci_init_one(dev, &d, NULL);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426}
427
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200428static const struct pci_device_id svwks_pci_tbl[] = {
429 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_OSB4IDE), 0 },
430 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE), 1 },
431 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE), 2 },
432 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2), 3 },
433 { PCI_VDEVICE(SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT1000IDE), 4 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700434 { 0, },
435};
436MODULE_DEVICE_TABLE(pci, svwks_pci_tbl);
437
438static struct pci_driver driver = {
439 .name = "Serverworks_IDE",
440 .id_table = svwks_pci_tbl,
441 .probe = svwks_init_one,
Bartlomiej Zolnierkiewiczbc2c9a82008-07-24 22:53:25 +0200442 .remove = ide_pci_remove,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700443};
444
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100445static int __init svwks_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700446{
447 return ide_pci_register_driver(&driver);
448}
449
Bartlomiej Zolnierkiewiczbc2c9a82008-07-24 22:53:25 +0200450static void __exit svwks_ide_exit(void)
451{
452 pci_unregister_driver(&driver);
453}
454
Linus Torvalds1da177e2005-04-16 15:20:36 -0700455module_init(svwks_ide_init);
Bartlomiej Zolnierkiewiczbc2c9a82008-07-24 22:53:25 +0200456module_exit(svwks_ide_exit);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457
458MODULE_AUTHOR("Michael Aubry. Andrzej Krzysztofowicz, Andre Hedrick");
459MODULE_DESCRIPTION("PCI driver module for Serverworks OSB4/CSB5/CSB6 IDE");
460MODULE_LICENSE("GPL");