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Dimitris Papastamos9fabe242011-09-19 14:34:00 +01001/*
2 * Register cache access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/slab.h>
Paul Gortmaker1b6bc322011-05-27 07:12:15 -040014#include <linux/export.h>
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010015#include <trace/events/regmap.h>
Mark Brownf094fea2011-10-04 22:05:47 +010016#include <linux/bsearch.h>
Dimitris Papastamosc08604b2011-10-03 10:50:14 +010017#include <linux/sort.h>
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010018
19#include "internal.h"
20
21static const struct regcache_ops *cache_types[] = {
Dimitris Papastamos195af652011-09-19 14:34:01 +010022 &regcache_indexed_ops,
Dimitris Papastamos28644c802011-09-19 14:34:02 +010023 &regcache_rbtree_ops,
Dimitris Papastamos2cbbb572011-09-19 14:34:03 +010024 &regcache_lzo_ops,
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010025};
26
27static int regcache_hw_init(struct regmap *map)
28{
29 int i, j;
30 int ret;
31 int count;
32 unsigned int val;
33 void *tmp_buf;
34
35 if (!map->num_reg_defaults_raw)
36 return -EINVAL;
37
38 if (!map->reg_defaults_raw) {
39 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
40 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
41 if (!tmp_buf)
42 return -EINVAL;
43 ret = regmap_bulk_read(map, 0, tmp_buf,
44 map->num_reg_defaults_raw);
45 if (ret < 0) {
46 kfree(tmp_buf);
47 return ret;
48 }
49 map->reg_defaults_raw = tmp_buf;
50 map->cache_free = 1;
51 }
52
53 /* calculate the size of reg_defaults */
54 for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
55 val = regcache_get_val(map->reg_defaults_raw,
56 i, map->cache_word_size);
57 if (!val)
58 continue;
59 count++;
60 }
61
62 map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
63 GFP_KERNEL);
Lars-Peter Clausen021cd612011-11-14 10:40:16 +010064 if (!map->reg_defaults) {
65 ret = -ENOMEM;
66 goto err_free;
67 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010068
69 /* fill the reg_defaults */
70 map->num_reg_defaults = count;
71 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
72 val = regcache_get_val(map->reg_defaults_raw,
73 i, map->cache_word_size);
74 if (!val)
75 continue;
76 map->reg_defaults[j].reg = i;
77 map->reg_defaults[j].def = val;
78 j++;
79 }
80
81 return 0;
Lars-Peter Clausen021cd612011-11-14 10:40:16 +010082
83err_free:
84 if (map->cache_free)
85 kfree(map->reg_defaults_raw);
86
87 return ret;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010088}
89
90int regcache_init(struct regmap *map)
91{
92 int ret;
93 int i;
94 void *tmp_buf;
95
Mark Browne7a6db32011-09-19 16:08:03 +010096 if (map->cache_type == REGCACHE_NONE) {
97 map->cache_bypass = true;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010098 return 0;
Mark Browne7a6db32011-09-19 16:08:03 +010099 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100100
101 for (i = 0; i < ARRAY_SIZE(cache_types); i++)
102 if (cache_types[i]->type == map->cache_type)
103 break;
104
105 if (i == ARRAY_SIZE(cache_types)) {
106 dev_err(map->dev, "Could not match compress type: %d\n",
107 map->cache_type);
108 return -EINVAL;
109 }
110
111 map->cache = NULL;
112 map->cache_ops = cache_types[i];
113
114 if (!map->cache_ops->read ||
115 !map->cache_ops->write ||
116 !map->cache_ops->name)
117 return -EINVAL;
118
119 /* We still need to ensure that the reg_defaults
120 * won't vanish from under us. We'll need to make
121 * a copy of it.
122 */
123 if (map->reg_defaults) {
124 if (!map->num_reg_defaults)
125 return -EINVAL;
126 tmp_buf = kmemdup(map->reg_defaults, map->num_reg_defaults *
127 sizeof(struct reg_default), GFP_KERNEL);
128 if (!tmp_buf)
129 return -ENOMEM;
130 map->reg_defaults = tmp_buf;
Mark Brown8528bdd2011-10-09 13:13:58 +0100131 } else if (map->num_reg_defaults_raw) {
Mark Brown5fcd2562011-09-29 15:24:54 +0100132 /* Some devices such as PMICs don't have cache defaults,
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100133 * we cope with this by reading back the HW registers and
134 * crafting the cache defaults by hand.
135 */
136 ret = regcache_hw_init(map);
137 if (ret < 0)
138 return ret;
139 }
140
141 if (!map->max_register)
142 map->max_register = map->num_reg_defaults_raw;
143
144 if (map->cache_ops->init) {
145 dev_dbg(map->dev, "Initializing %s cache\n",
146 map->cache_ops->name);
Lars-Peter Clausenbd061c72011-11-14 10:40:17 +0100147 ret = map->cache_ops->init(map);
148 if (ret)
149 goto err_free;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100150 }
151 return 0;
Lars-Peter Clausenbd061c72011-11-14 10:40:17 +0100152
153err_free:
154 kfree(map->reg_defaults);
155 if (map->cache_free)
156 kfree(map->reg_defaults_raw);
157
158 return ret;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100159}
160
161void regcache_exit(struct regmap *map)
162{
163 if (map->cache_type == REGCACHE_NONE)
164 return;
165
166 BUG_ON(!map->cache_ops);
167
168 kfree(map->reg_defaults);
169 if (map->cache_free)
170 kfree(map->reg_defaults_raw);
171
172 if (map->cache_ops->exit) {
173 dev_dbg(map->dev, "Destroying %s cache\n",
174 map->cache_ops->name);
175 map->cache_ops->exit(map);
176 }
177}
178
179/**
180 * regcache_read: Fetch the value of a given register from the cache.
181 *
182 * @map: map to configure.
183 * @reg: The register index.
184 * @value: The value to be returned.
185 *
186 * Return a negative value on failure, 0 on success.
187 */
188int regcache_read(struct regmap *map,
189 unsigned int reg, unsigned int *value)
190{
191 if (map->cache_type == REGCACHE_NONE)
192 return -ENOSYS;
193
194 BUG_ON(!map->cache_ops);
195
196 if (!regmap_readable(map, reg))
197 return -EIO;
198
199 if (!regmap_volatile(map, reg))
200 return map->cache_ops->read(map, reg, value);
201
202 return -EINVAL;
203}
204EXPORT_SYMBOL_GPL(regcache_read);
205
206/**
207 * regcache_write: Set the value of a given register in the cache.
208 *
209 * @map: map to configure.
210 * @reg: The register index.
211 * @value: The new register value.
212 *
213 * Return a negative value on failure, 0 on success.
214 */
215int regcache_write(struct regmap *map,
216 unsigned int reg, unsigned int value)
217{
218 if (map->cache_type == REGCACHE_NONE)
219 return 0;
220
221 BUG_ON(!map->cache_ops);
222
223 if (!regmap_writeable(map, reg))
224 return -EIO;
225
226 if (!regmap_volatile(map, reg))
227 return map->cache_ops->write(map, reg, value);
228
229 return 0;
230}
231EXPORT_SYMBOL_GPL(regcache_write);
232
233/**
234 * regcache_sync: Sync the register cache with the hardware.
235 *
236 * @map: map to configure.
237 *
238 * Any registers that should not be synced should be marked as
239 * volatile. In general drivers can choose not to use the provided
240 * syncing functionality if they so require.
241 *
242 * Return a negative value on failure, 0 on success.
243 */
244int regcache_sync(struct regmap *map)
245{
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100246 int ret = 0;
247 unsigned int val;
248 unsigned int i;
Dimitris Papastamos59360082011-09-19 14:34:04 +0100249 const char *name;
Dimitris Papastamosbeb1a102011-09-29 14:36:26 +0100250 unsigned int bypass;
Dimitris Papastamos59360082011-09-19 14:34:04 +0100251
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100252 BUG_ON(!map->cache_ops);
253
Dimitris Papastamos13753a92011-09-29 14:36:25 +0100254 mutex_lock(&map->lock);
Dimitris Papastamosbeb1a102011-09-29 14:36:26 +0100255 /* Remember the initial bypass state */
256 bypass = map->cache_bypass;
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100257 dev_dbg(map->dev, "Syncing %s cache\n",
258 map->cache_ops->name);
259 name = map->cache_ops->name;
260 trace_regcache_sync(map->dev, name, "start");
Mark Brown8ae0d7e2011-10-26 10:34:22 +0200261 if (!map->cache_dirty)
262 goto out;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100263 if (map->cache_ops->sync) {
Dimitris Papastamos59360082011-09-19 14:34:04 +0100264 ret = map->cache_ops->sync(map);
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100265 } else {
266 for (i = 0; i < map->num_reg_defaults; i++) {
267 ret = regcache_read(map, i, &val);
268 if (ret < 0)
269 goto out;
Dimitris Papastamosec8a3652011-09-28 11:43:42 +0100270 map->cache_bypass = 1;
Dimitris Papastamos13753a92011-09-29 14:36:25 +0100271 ret = _regmap_write(map, i, val);
Dimitris Papastamosec8a3652011-09-28 11:43:42 +0100272 map->cache_bypass = 0;
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100273 if (ret < 0)
274 goto out;
275 dev_dbg(map->dev, "Synced register %#x, value %#x\n",
276 map->reg_defaults[i].reg,
277 map->reg_defaults[i].def);
278 }
279
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100280 }
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100281out:
282 trace_regcache_sync(map->dev, name, "stop");
Dimitris Papastamosbeb1a102011-09-29 14:36:26 +0100283 /* Restore the bypass state */
284 map->cache_bypass = bypass;
Dimitris Papastamos13753a92011-09-29 14:36:25 +0100285 mutex_unlock(&map->lock);
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100286
287 return ret;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100288}
289EXPORT_SYMBOL_GPL(regcache_sync);
290
Mark Brown92afb282011-09-19 18:22:14 +0100291/**
292 * regcache_cache_only: Put a register map into cache only mode
293 *
294 * @map: map to configure
295 * @cache_only: flag if changes should be written to the hardware
296 *
297 * When a register map is marked as cache only writes to the register
298 * map API will only update the register cache, they will not cause
299 * any hardware changes. This is useful for allowing portions of
300 * drivers to act as though the device were functioning as normal when
301 * it is disabled for power saving reasons.
302 */
303void regcache_cache_only(struct regmap *map, bool enable)
304{
Mark Brown2cd148f12011-09-29 10:40:55 +0100305 mutex_lock(&map->lock);
Dimitris Papastamosac77a762011-09-29 14:36:28 +0100306 WARN_ON(map->cache_bypass && enable);
Mark Brown92afb282011-09-19 18:22:14 +0100307 map->cache_only = enable;
Mark Brown2cd148f12011-09-29 10:40:55 +0100308 mutex_unlock(&map->lock);
Mark Brown92afb282011-09-19 18:22:14 +0100309}
310EXPORT_SYMBOL_GPL(regcache_cache_only);
311
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100312/**
Mark Brown8ae0d7e2011-10-26 10:34:22 +0200313 * regcache_mark_dirty: Mark the register cache as dirty
314 *
315 * @map: map to mark
316 *
317 * Mark the register cache as dirty, for example due to the device
318 * having been powered down for suspend. If the cache is not marked
319 * as dirty then the cache sync will be suppressed.
320 */
321void regcache_mark_dirty(struct regmap *map)
322{
323 mutex_lock(&map->lock);
324 map->cache_dirty = true;
325 mutex_unlock(&map->lock);
326}
327EXPORT_SYMBOL_GPL(regcache_mark_dirty);
328
329/**
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100330 * regcache_cache_bypass: Put a register map into cache bypass mode
331 *
332 * @map: map to configure
Dimitris Papastamos0eef6b02011-10-03 06:54:16 +0100333 * @cache_bypass: flag if changes should not be written to the hardware
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100334 *
335 * When a register map is marked with the cache bypass option, writes
336 * to the register map API will only update the hardware and not the
337 * the cache directly. This is useful when syncing the cache back to
338 * the hardware.
339 */
340void regcache_cache_bypass(struct regmap *map, bool enable)
341{
342 mutex_lock(&map->lock);
Dimitris Papastamosac77a762011-09-29 14:36:28 +0100343 WARN_ON(map->cache_only && enable);
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100344 map->cache_bypass = enable;
345 mutex_unlock(&map->lock);
346}
347EXPORT_SYMBOL_GPL(regcache_cache_bypass);
348
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100349bool regcache_set_val(void *base, unsigned int idx,
350 unsigned int val, unsigned int word_size)
351{
352 switch (word_size) {
353 case 1: {
354 u8 *cache = base;
355 if (cache[idx] == val)
356 return true;
357 cache[idx] = val;
358 break;
359 }
360 case 2: {
361 u16 *cache = base;
362 if (cache[idx] == val)
363 return true;
364 cache[idx] = val;
365 break;
366 }
367 default:
368 BUG();
369 }
370 /* unreachable */
371 return false;
372}
373
374unsigned int regcache_get_val(const void *base, unsigned int idx,
375 unsigned int word_size)
376{
377 if (!base)
378 return -EINVAL;
379
380 switch (word_size) {
381 case 1: {
382 const u8 *cache = base;
383 return cache[idx];
384 }
385 case 2: {
386 const u16 *cache = base;
387 return cache[idx];
388 }
389 default:
390 BUG();
391 }
392 /* unreachable */
393 return -1;
394}
395
Mark Brownf094fea2011-10-04 22:05:47 +0100396static int regcache_default_cmp(const void *a, const void *b)
Dimitris Papastamosc08604b2011-10-03 10:50:14 +0100397{
398 const struct reg_default *_a = a;
399 const struct reg_default *_b = b;
400
401 return _a->reg - _b->reg;
402}
403
Mark Brownf094fea2011-10-04 22:05:47 +0100404int regcache_lookup_reg(struct regmap *map, unsigned int reg)
405{
406 struct reg_default key;
407 struct reg_default *r;
408
409 key.reg = reg;
410 key.def = 0;
411
412 r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
413 sizeof(struct reg_default), regcache_default_cmp);
414
415 if (r)
416 return r - map->reg_defaults;
417 else
Mark Brown6e6ace02011-10-09 13:23:31 +0100418 return -ENOENT;
Mark Brownf094fea2011-10-04 22:05:47 +0100419}
420
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100421int regcache_insert_reg(struct regmap *map, unsigned int reg,
422 unsigned int val)
423{
424 void *tmp;
425
426 tmp = krealloc(map->reg_defaults,
427 (map->num_reg_defaults + 1) * sizeof(struct reg_default),
428 GFP_KERNEL);
429 if (!tmp)
430 return -ENOMEM;
431 map->reg_defaults = tmp;
432 map->num_reg_defaults++;
433 map->reg_defaults[map->num_reg_defaults - 1].reg = reg;
434 map->reg_defaults[map->num_reg_defaults - 1].def = val;
Dimitris Papastamosc08604b2011-10-03 10:50:14 +0100435 sort(map->reg_defaults, map->num_reg_defaults,
Mark Brownf094fea2011-10-04 22:05:47 +0100436 sizeof(struct reg_default), regcache_default_cmp, NULL);
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100437 return 0;
438}