Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008 Atheros Communications Inc. |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ATH9K_H |
| 18 | #define ATH9K_H |
| 19 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 20 | #include <linux/etherdevice.h> |
| 21 | #include <linux/device.h> |
| 22 | #include <net/mac80211.h> |
| 23 | #include <linux/leds.h> |
| 24 | #include <linux/rfkill.h> |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 25 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 26 | #include "hw.h" |
| 27 | #include "rc.h" |
| 28 | #include "debug.h" |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 29 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 30 | struct ath_node; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 31 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 32 | /* Macro to expand scalars to 64-bit objects */ |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 33 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 34 | #define ito64(x) (sizeof(x) == 8) ? \ |
| 35 | (((unsigned long long int)(x)) & (0xff)) : \ |
| 36 | (sizeof(x) == 16) ? \ |
| 37 | (((unsigned long long int)(x)) & 0xffff) : \ |
| 38 | ((sizeof(x) == 32) ? \ |
| 39 | (((unsigned long long int)(x)) & 0xffffffff) : \ |
| 40 | (unsigned long long int)(x)) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 41 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 42 | /* increment with wrap-around */ |
| 43 | #define INCR(_l, _sz) do { \ |
| 44 | (_l)++; \ |
| 45 | (_l) &= ((_sz) - 1); \ |
| 46 | } while (0) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 47 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 48 | /* decrement with wrap-around */ |
| 49 | #define DECR(_l, _sz) do { \ |
| 50 | (_l)--; \ |
| 51 | (_l) &= ((_sz) - 1); \ |
| 52 | } while (0) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 53 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 54 | #define A_MAX(a, b) ((a) > (b) ? (a) : (b)) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 55 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 56 | #define ASSERT(exp) do { \ |
| 57 | if (unlikely(!(exp))) { \ |
| 58 | BUG(); \ |
| 59 | } \ |
| 60 | } while (0) |
| 61 | |
| 62 | #define TSF_TO_TU(_h,_l) \ |
| 63 | ((((u32)(_h)) << 22) | (((u32)(_l)) >> 10)) |
| 64 | |
| 65 | #define ATH_TXQ_SETUP(sc, i) ((sc)->tx.txqsetup & (1<<i)) |
| 66 | |
| 67 | static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; |
| 68 | |
| 69 | struct ath_config { |
| 70 | u32 ath_aggr_prot; |
| 71 | u16 txpowlimit; |
| 72 | u8 cabqReadytime; |
| 73 | u8 swBeaconProcess; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 74 | }; |
| 75 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 76 | /*************************/ |
| 77 | /* Descriptor Management */ |
| 78 | /*************************/ |
| 79 | |
| 80 | #define ATH_TXBUF_RESET(_bf) do { \ |
| 81 | (_bf)->bf_status = 0; \ |
| 82 | (_bf)->bf_lastbf = NULL; \ |
| 83 | (_bf)->bf_next = NULL; \ |
| 84 | memset(&((_bf)->bf_state), 0, \ |
| 85 | sizeof(struct ath_buf_state)); \ |
| 86 | } while (0) |
| 87 | |
| 88 | /** |
| 89 | * enum buffer_type - Buffer type flags |
| 90 | * |
| 91 | * @BUF_HT: Send this buffer using HT capabilities |
| 92 | * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) |
| 93 | * @BUF_AGGR: Indicates whether the buffer can be aggregated |
| 94 | * (used in aggregation scheduling) |
| 95 | * @BUF_RETRY: Indicates whether the buffer is retried |
| 96 | * @BUF_XRETRY: To denote excessive retries of the buffer |
| 97 | */ |
| 98 | enum buffer_type { |
| 99 | BUF_HT = BIT(1), |
| 100 | BUF_AMPDU = BIT(2), |
| 101 | BUF_AGGR = BIT(3), |
| 102 | BUF_RETRY = BIT(4), |
| 103 | BUF_XRETRY = BIT(5), |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 104 | }; |
| 105 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 106 | struct ath_buf_state { |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 107 | int bfs_nframes; |
| 108 | u16 bfs_al; |
| 109 | u16 bfs_frmlen; |
| 110 | int bfs_seqno; |
| 111 | int bfs_tidno; |
| 112 | int bfs_retries; |
| 113 | u32 bf_type; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 114 | u32 bfs_keyix; |
| 115 | enum ath9k_key_type bfs_keytype; |
| 116 | }; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 117 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 118 | #define bf_nframes bf_state.bfs_nframes |
| 119 | #define bf_al bf_state.bfs_al |
| 120 | #define bf_frmlen bf_state.bfs_frmlen |
| 121 | #define bf_retries bf_state.bfs_retries |
| 122 | #define bf_seqno bf_state.bfs_seqno |
| 123 | #define bf_tidno bf_state.bfs_tidno |
| 124 | #define bf_keyix bf_state.bfs_keyix |
| 125 | #define bf_keytype bf_state.bfs_keytype |
| 126 | #define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT) |
| 127 | #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) |
| 128 | #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) |
| 129 | #define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY) |
| 130 | #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 131 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 132 | struct ath_buf { |
| 133 | struct list_head list; |
| 134 | struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or |
| 135 | an aggregate) */ |
| 136 | struct ath_buf *bf_next; /* next subframe in the aggregate */ |
| 137 | void *bf_mpdu; /* enclosing frame structure */ |
| 138 | struct ath_desc *bf_desc; /* virtual addr of desc */ |
| 139 | dma_addr_t bf_daddr; /* physical addr of desc */ |
| 140 | dma_addr_t bf_buf_addr; /* physical addr of data buffer */ |
| 141 | u32 bf_status; |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 142 | u16 bf_flags; |
| 143 | struct ath_buf_state bf_state; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 144 | dma_addr_t bf_dmacontext; |
| 145 | }; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 146 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 147 | #define ATH_RXBUF_RESET(_bf) ((_bf)->bf_status = 0) |
| 148 | #define ATH_BUFSTATUS_STALE 0x00000002 |
| 149 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 150 | struct ath_descdma { |
| 151 | const char *dd_name; |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 152 | struct ath_desc *dd_desc; |
| 153 | dma_addr_t dd_desc_paddr; |
| 154 | u32 dd_desc_len; |
| 155 | struct ath_buf *dd_bufptr; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 156 | dma_addr_t dd_dmacontext; |
| 157 | }; |
| 158 | |
| 159 | int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd, |
| 160 | struct list_head *head, const char *name, |
| 161 | int nbuf, int ndesc); |
| 162 | void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd, |
| 163 | struct list_head *head); |
| 164 | |
| 165 | /***********/ |
| 166 | /* RX / TX */ |
| 167 | /***********/ |
| 168 | |
| 169 | #define ATH_MAX_ANTENNA 3 |
| 170 | #define ATH_RXBUF 512 |
| 171 | #define WME_NUM_TID 16 |
| 172 | #define ATH_TXBUF 512 |
| 173 | #define ATH_TXMAXTRY 13 |
| 174 | #define ATH_11N_TXMAXTRY 10 |
| 175 | #define ATH_MGT_TXMAXTRY 4 |
| 176 | #define WME_BA_BMP_SIZE 64 |
| 177 | #define WME_MAX_BA WME_BA_BMP_SIZE |
| 178 | #define ATH_TID_MAX_BUFS (2 * WME_MAX_BA) |
| 179 | |
| 180 | #define TID_TO_WME_AC(_tid) \ |
| 181 | ((((_tid) == 0) || ((_tid) == 3)) ? WME_AC_BE : \ |
| 182 | (((_tid) == 1) || ((_tid) == 2)) ? WME_AC_BK : \ |
| 183 | (((_tid) == 4) || ((_tid) == 5)) ? WME_AC_VI : \ |
| 184 | WME_AC_VO) |
| 185 | |
| 186 | #define WME_AC_BE 0 |
| 187 | #define WME_AC_BK 1 |
| 188 | #define WME_AC_VI 2 |
| 189 | #define WME_AC_VO 3 |
| 190 | #define WME_NUM_AC 4 |
| 191 | |
| 192 | #define ADDBA_EXCHANGE_ATTEMPTS 10 |
| 193 | #define ATH_AGGR_DELIM_SZ 4 |
| 194 | #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ |
| 195 | /* number of delimiters for encryption padding */ |
| 196 | #define ATH_AGGR_ENCRYPTDELIM 10 |
| 197 | /* minimum h/w qdepth to be sustained to maximize aggregation */ |
| 198 | #define ATH_AGGR_MIN_QDEPTH 2 |
| 199 | #define ATH_AMPDU_SUBFRAME_DEFAULT 32 |
| 200 | #define ATH_AMPDU_LIMIT_MAX (64 * 1024 - 1) |
| 201 | #define ATH_AMPDU_LIMIT_DEFAULT ATH_AMPDU_LIMIT_MAX |
| 202 | |
| 203 | #define IEEE80211_SEQ_SEQ_SHIFT 4 |
| 204 | #define IEEE80211_SEQ_MAX 4096 |
| 205 | #define IEEE80211_MIN_AMPDU_BUF 0x8 |
| 206 | #define IEEE80211_HTCAP_MAXRXAMPDU_FACTOR 13 |
| 207 | #define IEEE80211_WEP_IVLEN 3 |
| 208 | #define IEEE80211_WEP_KIDLEN 1 |
| 209 | #define IEEE80211_WEP_CRCLEN 4 |
| 210 | #define IEEE80211_MAX_MPDU_LEN (3840 + FCS_LEN + \ |
| 211 | (IEEE80211_WEP_IVLEN + \ |
| 212 | IEEE80211_WEP_KIDLEN + \ |
| 213 | IEEE80211_WEP_CRCLEN)) |
| 214 | |
| 215 | /* return whether a bit at index _n in bitmap _bm is set |
| 216 | * _sz is the size of the bitmap */ |
| 217 | #define ATH_BA_ISSET(_bm, _n) (((_n) < (WME_BA_BMP_SIZE)) && \ |
| 218 | ((_bm)[(_n) >> 5] & (1 << ((_n) & 31)))) |
| 219 | |
| 220 | /* return block-ack bitmap index given sequence and starting sequence */ |
| 221 | #define ATH_BA_INDEX(_st, _seq) (((_seq) - (_st)) & (IEEE80211_SEQ_MAX - 1)) |
| 222 | |
| 223 | /* returns delimiter padding required given the packet length */ |
| 224 | #define ATH_AGGR_GET_NDELIM(_len) \ |
| 225 | (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \ |
| 226 | (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2) |
| 227 | |
| 228 | #define BAW_WITHIN(_start, _bawsz, _seqno) \ |
| 229 | ((((_seqno) - (_start)) & 4095) < (_bawsz)) |
| 230 | |
| 231 | #define ATH_DS_BA_SEQ(_ds) ((_ds)->ds_us.tx.ts_seqnum) |
| 232 | #define ATH_DS_BA_BITMAP(_ds) (&(_ds)->ds_us.tx.ba_low) |
| 233 | #define ATH_DS_TX_BA(_ds) ((_ds)->ds_us.tx.ts_flags & ATH9K_TX_BA) |
| 234 | #define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)]) |
| 235 | |
| 236 | enum ATH_AGGR_STATUS { |
| 237 | ATH_AGGR_DONE, |
| 238 | ATH_AGGR_BAW_CLOSED, |
| 239 | ATH_AGGR_LIMITED, |
| 240 | }; |
| 241 | |
| 242 | struct ath_txq { |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 243 | u32 axq_qnum; |
| 244 | u32 *axq_link; |
| 245 | struct list_head axq_q; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 246 | spinlock_t axq_lock; |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 247 | u32 axq_depth; |
| 248 | u8 axq_aggr_depth; |
| 249 | u32 axq_totalqueued; |
| 250 | bool stopped; |
| 251 | struct ath_buf *axq_linkbuf; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 252 | |
| 253 | /* first desc of the last descriptor that contains CTS */ |
| 254 | struct ath_desc *axq_lastdsWithCTS; |
| 255 | |
| 256 | /* final desc of the gating desc that determines whether |
| 257 | lastdsWithCTS has been DMA'ed or not */ |
| 258 | struct ath_desc *axq_gatingds; |
| 259 | |
| 260 | struct list_head axq_acq; |
| 261 | }; |
| 262 | |
| 263 | #define AGGR_CLEANUP BIT(1) |
| 264 | #define AGGR_ADDBA_COMPLETE BIT(2) |
| 265 | #define AGGR_ADDBA_PROGRESS BIT(3) |
| 266 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 267 | struct ath_atx_tid { |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 268 | struct list_head list; |
| 269 | struct list_head buf_q; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 270 | struct ath_node *an; |
| 271 | struct ath_atx_ac *ac; |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 272 | struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 273 | u16 seq_start; |
| 274 | u16 seq_next; |
| 275 | u16 baw_size; |
| 276 | int tidno; |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 277 | int baw_head; /* first un-acked tx buffer */ |
| 278 | int baw_tail; /* next unused tx buffer slot */ |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 279 | int sched; |
| 280 | int paused; |
| 281 | u8 state; |
| 282 | int addba_exchangeattempts; |
| 283 | }; |
| 284 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 285 | struct ath_atx_ac { |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 286 | int sched; |
| 287 | int qnum; |
| 288 | struct list_head list; |
| 289 | struct list_head tid_q; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 290 | }; |
| 291 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 292 | struct ath_tx_control { |
| 293 | struct ath_txq *txq; |
| 294 | int if_id; |
Jouni Malinen | f0ed85c | 2009-03-03 19:23:31 +0200 | [diff] [blame] | 295 | enum ath9k_internal_frame_type frame_type; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 296 | }; |
| 297 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 298 | struct ath_xmit_status { |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 299 | int retries; |
| 300 | int flags; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 301 | #define ATH_TX_ERROR 0x01 |
| 302 | #define ATH_TX_XRETRY 0x02 |
| 303 | #define ATH_TX_BAR 0x04 |
| 304 | }; |
| 305 | |
| 306 | /* All RSSI values are noise floor adjusted */ |
| 307 | struct ath_tx_stat { |
| 308 | int rssi; |
| 309 | int rssictl[ATH_MAX_ANTENNA]; |
| 310 | int rssiextn[ATH_MAX_ANTENNA]; |
| 311 | int rateieee; |
| 312 | int rateKbps; |
| 313 | int ratecode; |
| 314 | int flags; |
| 315 | u32 airtime; /* time on air per final tx rate */ |
| 316 | }; |
| 317 | |
| 318 | struct aggr_rifs_param { |
| 319 | int param_max_frames; |
| 320 | int param_max_len; |
| 321 | int param_rl; |
| 322 | int param_al; |
| 323 | struct ath_rc_series *param_rcs; |
| 324 | }; |
| 325 | |
| 326 | struct ath_node { |
| 327 | struct ath_softc *an_sc; |
| 328 | struct ath_atx_tid tid[WME_NUM_TID]; |
| 329 | struct ath_atx_ac ac[WME_NUM_AC]; |
| 330 | u16 maxampdu; |
| 331 | u8 mpdudensity; |
| 332 | }; |
| 333 | |
| 334 | struct ath_tx { |
| 335 | u16 seq_no; |
| 336 | u32 txqsetup; |
| 337 | int hwq_map[ATH9K_WME_AC_VO+1]; |
| 338 | spinlock_t txbuflock; |
| 339 | struct list_head txbuf; |
| 340 | struct ath_txq txq[ATH9K_NUM_TX_QUEUES]; |
| 341 | struct ath_descdma txdma; |
| 342 | }; |
| 343 | |
| 344 | struct ath_rx { |
| 345 | u8 defant; |
| 346 | u8 rxotherant; |
| 347 | u32 *rxlink; |
| 348 | int bufsize; |
| 349 | unsigned int rxfilter; |
| 350 | spinlock_t rxflushlock; |
| 351 | spinlock_t rxbuflock; |
| 352 | struct list_head rxbuf; |
| 353 | struct ath_descdma rxdma; |
| 354 | }; |
| 355 | |
| 356 | int ath_startrecv(struct ath_softc *sc); |
| 357 | bool ath_stoprecv(struct ath_softc *sc); |
| 358 | void ath_flushrecv(struct ath_softc *sc); |
| 359 | u32 ath_calcrxfilter(struct ath_softc *sc); |
| 360 | int ath_rx_init(struct ath_softc *sc, int nbufs); |
| 361 | void ath_rx_cleanup(struct ath_softc *sc); |
| 362 | int ath_rx_tasklet(struct ath_softc *sc, int flush); |
| 363 | struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype); |
| 364 | void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq); |
| 365 | int ath_tx_setup(struct ath_softc *sc, int haltype); |
| 366 | void ath_drain_all_txq(struct ath_softc *sc, bool retry_tx); |
| 367 | void ath_draintxq(struct ath_softc *sc, |
| 368 | struct ath_txq *txq, bool retry_tx); |
| 369 | void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an); |
| 370 | void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an); |
| 371 | void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); |
| 372 | int ath_tx_init(struct ath_softc *sc, int nbufs); |
| 373 | int ath_tx_cleanup(struct ath_softc *sc); |
| 374 | struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb); |
| 375 | int ath_txq_update(struct ath_softc *sc, int qnum, |
| 376 | struct ath9k_tx_queue_info *q); |
Jouni Malinen | c52f33d | 2009-03-03 19:23:29 +0200 | [diff] [blame] | 377 | int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb, |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 378 | struct ath_tx_control *txctl); |
| 379 | void ath_tx_tasklet(struct ath_softc *sc); |
Jouni Malinen | c52f33d | 2009-03-03 19:23:29 +0200 | [diff] [blame] | 380 | void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb); |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 381 | bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno); |
| 382 | int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, |
| 383 | u16 tid, u16 *ssn); |
| 384 | int ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); |
| 385 | void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); |
| 386 | |
| 387 | /********/ |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 388 | /* VIFs */ |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 389 | /********/ |
| 390 | |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 391 | struct ath_vif { |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 392 | int av_bslot; |
| 393 | enum nl80211_iftype av_opmode; |
| 394 | struct ath_buf *av_bcbuf; |
| 395 | struct ath_tx_control av_btxctl; |
Jouni Malinen | f0ed85c | 2009-03-03 19:23:31 +0200 | [diff] [blame] | 396 | u8 bssid[ETH_ALEN]; /* current BSSID from config_interface */ |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 397 | }; |
| 398 | |
| 399 | /*******************/ |
| 400 | /* Beacon Handling */ |
| 401 | /*******************/ |
| 402 | |
| 403 | /* |
| 404 | * Regardless of the number of beacons we stagger, (i.e. regardless of the |
| 405 | * number of BSSIDs) if a given beacon does not go out even after waiting this |
| 406 | * number of beacon intervals, the game's up. |
| 407 | */ |
| 408 | #define BSTUCK_THRESH (9 * ATH_BCBUF) |
| 409 | #define ATH_BCBUF 1 |
| 410 | #define ATH_DEFAULT_BINTVAL 100 /* TU */ |
| 411 | #define ATH_DEFAULT_BMISS_LIMIT 10 |
| 412 | #define IEEE80211_MS_TO_TU(x) (((x) * 1000) / 1024) |
| 413 | |
| 414 | struct ath_beacon_config { |
| 415 | u16 beacon_interval; |
| 416 | u16 listen_interval; |
| 417 | u16 dtim_period; |
| 418 | u16 bmiss_timeout; |
| 419 | u8 dtim_count; |
Sujith | 86b89ee | 2008-08-07 10:54:57 +0530 | [diff] [blame] | 420 | }; |
| 421 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 422 | struct ath_beacon { |
| 423 | enum { |
| 424 | OK, /* no change needed */ |
| 425 | UPDATE, /* update pending */ |
| 426 | COMMIT /* beacon sent, commit change */ |
| 427 | } updateslot; /* slot time update fsm */ |
| 428 | |
| 429 | u32 beaconq; |
| 430 | u32 bmisscnt; |
| 431 | u32 ast_be_xmit; |
| 432 | u64 bc_tstamp; |
Jouni Malinen | 2c3db3d | 2009-03-03 19:23:26 +0200 | [diff] [blame] | 433 | struct ieee80211_vif *bslot[ATH_BCBUF]; |
Jouni Malinen | c52f33d | 2009-03-03 19:23:29 +0200 | [diff] [blame] | 434 | struct ath_wiphy *bslot_aphy[ATH_BCBUF]; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 435 | int slottime; |
| 436 | int slotupdate; |
| 437 | struct ath9k_tx_queue_info beacon_qi; |
| 438 | struct ath_descdma bdma; |
| 439 | struct ath_txq *cabq; |
| 440 | struct list_head bbuf; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 441 | }; |
| 442 | |
Sujith | 9fc9ab0 | 2009-03-03 10:16:51 +0530 | [diff] [blame] | 443 | void ath_beacon_tasklet(unsigned long data); |
Jouni Malinen | 2c3db3d | 2009-03-03 19:23:26 +0200 | [diff] [blame] | 444 | void ath_beacon_config(struct ath_softc *sc, struct ieee80211_vif *vif); |
Sujith | cbe61d8 | 2009-02-09 13:27:12 +0530 | [diff] [blame] | 445 | int ath_beaconq_setup(struct ath_hw *ah); |
Jouni Malinen | c52f33d | 2009-03-03 19:23:29 +0200 | [diff] [blame] | 446 | int ath_beacon_alloc(struct ath_wiphy *aphy, struct ieee80211_vif *vif); |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 447 | void ath_beacon_return(struct ath_softc *sc, struct ath_vif *avp); |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 448 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 449 | /*******/ |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 450 | /* ANI */ |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 451 | /*******/ |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 452 | |
Sujith | 20977d3 | 2009-02-20 15:13:28 +0530 | [diff] [blame] | 453 | #define ATH_STA_SHORT_CALINTERVAL 1000 /* 1 second */ |
| 454 | #define ATH_AP_SHORT_CALINTERVAL 100 /* 100 ms */ |
| 455 | #define ATH_ANI_POLLINTERVAL 100 /* 100 ms */ |
| 456 | #define ATH_LONG_CALINTERVAL 30000 /* 30 seconds */ |
| 457 | #define ATH_RESTART_CALINTERVAL 1200000 /* 20 minutes */ |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 458 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 459 | struct ath_ani { |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 460 | bool caldone; |
| 461 | int16_t noise_floor; |
| 462 | unsigned int longcal_timer; |
| 463 | unsigned int shortcal_timer; |
| 464 | unsigned int resetcal_timer; |
| 465 | unsigned int checkani_timer; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 466 | struct timer_list timer; |
| 467 | }; |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 468 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 469 | /********************/ |
| 470 | /* LED Control */ |
| 471 | /********************/ |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 472 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 473 | #define ATH_LED_PIN 1 |
| 474 | #define ATH_LED_ON_DURATION_IDLE 350 /* in msecs */ |
| 475 | #define ATH_LED_OFF_DURATION_IDLE 250 /* in msecs */ |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 476 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 477 | enum ath_led_type { |
| 478 | ATH_LED_RADIO, |
| 479 | ATH_LED_ASSOC, |
| 480 | ATH_LED_TX, |
| 481 | ATH_LED_RX |
| 482 | }; |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 483 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 484 | struct ath_led { |
| 485 | struct ath_softc *sc; |
| 486 | struct led_classdev led_cdev; |
| 487 | enum ath_led_type led_type; |
| 488 | char name[32]; |
| 489 | bool registered; |
| 490 | }; |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 491 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 492 | /* Rfkill */ |
| 493 | #define ATH_RFKILL_POLL_INTERVAL 2000 /* msecs */ |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 494 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 495 | struct ath_rfkill { |
| 496 | struct rfkill *rfkill; |
| 497 | struct delayed_work rfkill_poll; |
| 498 | char rfkill_name[32]; |
| 499 | }; |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 500 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 501 | /********************/ |
| 502 | /* Main driver core */ |
| 503 | /********************/ |
Sujith | f1dc560 | 2008-10-29 10:16:30 +0530 | [diff] [blame] | 504 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 505 | /* |
| 506 | * Default cache line size, in bytes. |
| 507 | * Used when PCI device not fully initialized by bootrom/BIOS |
| 508 | */ |
| 509 | #define DEFAULT_CACHELINE 32 |
| 510 | #define ATH_DEFAULT_NOISE_FLOOR -95 |
| 511 | #define ATH_REGCLASSIDS_MAX 10 |
| 512 | #define ATH_CABQ_READY_TIME 80 /* % of beacon interval */ |
| 513 | #define ATH_MAX_SW_RETRIES 10 |
| 514 | #define ATH_CHAN_MAX 255 |
| 515 | #define IEEE80211_WEP_NKID 4 /* number of key ids */ |
| 516 | |
| 517 | /* |
| 518 | * The key cache is used for h/w cipher state and also for |
| 519 | * tracking station state such as the current tx antenna. |
| 520 | * We also setup a mapping table between key cache slot indices |
| 521 | * and station state to short-circuit node lookups on rx. |
| 522 | * Different parts have different size key caches. We handle |
| 523 | * up to ATH_KEYMAX entries (could dynamically allocate state). |
| 524 | */ |
| 525 | #define ATH_KEYMAX 128 /* max key cache size we handle */ |
| 526 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 527 | #define ATH_TXPOWER_MAX 100 /* .5 dBm units */ |
| 528 | #define ATH_RSSI_DUMMY_MARKER 0x127 |
| 529 | #define ATH_RATE_DUMMY_MARKER 0 |
| 530 | |
Sujith | b238e90 | 2009-03-03 10:16:56 +0530 | [diff] [blame] | 531 | #define SC_OP_INVALID BIT(0) |
| 532 | #define SC_OP_BEACONS BIT(1) |
| 533 | #define SC_OP_RXAGGR BIT(2) |
| 534 | #define SC_OP_TXAGGR BIT(3) |
| 535 | #define SC_OP_CHAINMASK_UPDATE BIT(4) |
| 536 | #define SC_OP_FULL_RESET BIT(5) |
| 537 | #define SC_OP_PREAMBLE_SHORT BIT(6) |
| 538 | #define SC_OP_PROTECT_ENABLE BIT(7) |
| 539 | #define SC_OP_RXFLUSH BIT(8) |
| 540 | #define SC_OP_LED_ASSOCIATED BIT(9) |
| 541 | #define SC_OP_RFKILL_REGISTERED BIT(10) |
| 542 | #define SC_OP_RFKILL_SW_BLOCKED BIT(11) |
| 543 | #define SC_OP_RFKILL_HW_BLOCKED BIT(12) |
| 544 | #define SC_OP_WAIT_FOR_BEACON BIT(13) |
| 545 | #define SC_OP_LED_ON BIT(14) |
| 546 | #define SC_OP_SCANNING BIT(15) |
| 547 | #define SC_OP_TSF_RESET BIT(16) |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 548 | |
| 549 | struct ath_bus_ops { |
| 550 | void (*read_cachesize)(struct ath_softc *sc, int *csz); |
| 551 | void (*cleanup)(struct ath_softc *sc); |
Sujith | cbe61d8 | 2009-02-09 13:27:12 +0530 | [diff] [blame] | 552 | bool (*eeprom_read)(struct ath_hw *ah, u32 off, u16 *data); |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 553 | }; |
| 554 | |
Jouni Malinen | bce048d | 2009-03-03 19:23:28 +0200 | [diff] [blame] | 555 | struct ath_wiphy; |
| 556 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 557 | struct ath_softc { |
| 558 | struct ieee80211_hw *hw; |
| 559 | struct device *dev; |
Jouni Malinen | c52f33d | 2009-03-03 19:23:29 +0200 | [diff] [blame] | 560 | |
| 561 | spinlock_t wiphy_lock; /* spinlock to protect ath_wiphy data */ |
Jouni Malinen | bce048d | 2009-03-03 19:23:28 +0200 | [diff] [blame] | 562 | struct ath_wiphy *pri_wiphy; |
Jouni Malinen | c52f33d | 2009-03-03 19:23:29 +0200 | [diff] [blame] | 563 | struct ath_wiphy **sec_wiphy; /* secondary wiphys (virtual radios); may |
| 564 | * have NULL entries */ |
| 565 | int num_sec_wiphy; /* number of sec_wiphy pointers in the array */ |
Jouni Malinen | 0e2dedf | 2009-03-03 19:23:32 +0200 | [diff] [blame] | 566 | int chan_idx; |
| 567 | int chan_is_ht; |
| 568 | struct ath_wiphy *next_wiphy; |
| 569 | struct work_struct chan_work; |
Jouni Malinen | 7ec3e51 | 2009-03-03 19:23:37 +0200 | [diff] [blame] | 570 | int wiphy_select_failures; |
| 571 | unsigned long wiphy_select_first_fail; |
Jouni Malinen | f98c3bd | 2009-03-03 19:23:39 +0200 | [diff] [blame] | 572 | struct delayed_work wiphy_work; |
| 573 | unsigned long wiphy_scheduler_int; |
| 574 | int wiphy_scheduler_index; |
Jouni Malinen | 0e2dedf | 2009-03-03 19:23:32 +0200 | [diff] [blame] | 575 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 576 | struct tasklet_struct intr_tq; |
| 577 | struct tasklet_struct bcon_tasklet; |
Sujith | cbe61d8 | 2009-02-09 13:27:12 +0530 | [diff] [blame] | 578 | struct ath_hw *sc_ah; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 579 | void __iomem *mem; |
| 580 | int irq; |
| 581 | spinlock_t sc_resetlock; |
| 582 | struct mutex mutex; |
| 583 | |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 584 | u8 curbssid[ETH_ALEN]; |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 585 | u8 bssidmask[ETH_ALEN]; |
| 586 | u32 intrstatus; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 587 | u32 sc_flags; /* SC_OP_* */ |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 588 | u16 curtxpow; |
| 589 | u16 curaid; |
| 590 | u16 cachelsz; |
| 591 | u8 nbcnvifs; |
| 592 | u16 nvifs; |
| 593 | u8 tx_chainmask; |
| 594 | u8 rx_chainmask; |
| 595 | u32 keymax; |
| 596 | DECLARE_BITMAP(keymap, ATH_KEYMAX); |
| 597 | u8 splitmic; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 598 | atomic_t ps_usecount; |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 599 | enum ath9k_int imask; |
| 600 | enum ath9k_ht_extprotspacing ht_extprotspacing; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 601 | enum ath9k_ht_macmode tx_chan_width; |
| 602 | |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 603 | struct ath_config config; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 604 | struct ath_rx rx; |
| 605 | struct ath_tx tx; |
| 606 | struct ath_beacon beacon; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 607 | struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; |
| 608 | struct ath_rate_table *hw_rate_table[ATH9K_MODE_MAX]; |
| 609 | struct ath_rate_table *cur_rate_table; |
| 610 | struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; |
| 611 | |
| 612 | struct ath_led radio_led; |
| 613 | struct ath_led assoc_led; |
| 614 | struct ath_led tx_led; |
| 615 | struct ath_led rx_led; |
| 616 | struct delayed_work ath_led_blink_work; |
| 617 | int led_on_duration; |
| 618 | int led_off_duration; |
| 619 | int led_on_cnt; |
| 620 | int led_off_cnt; |
| 621 | |
| 622 | struct ath_rfkill rf_kill; |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 623 | struct ath_ani ani; |
| 624 | struct ath9k_node_stats nodestats; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 625 | #ifdef CONFIG_ATH9K_DEBUG |
Sujith | 17d7904 | 2009-02-09 13:27:03 +0530 | [diff] [blame] | 626 | struct ath9k_debug debug; |
Luis R. Rodriguez | f078f20 | 2008-08-04 00:16:41 -0700 | [diff] [blame] | 627 | #endif |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 628 | struct ath_bus_ops *bus_ops; |
| 629 | }; |
| 630 | |
Jouni Malinen | bce048d | 2009-03-03 19:23:28 +0200 | [diff] [blame] | 631 | struct ath_wiphy { |
| 632 | struct ath_softc *sc; /* shared for all virtual wiphys */ |
| 633 | struct ieee80211_hw *hw; |
Jouni Malinen | f0ed85c | 2009-03-03 19:23:31 +0200 | [diff] [blame] | 634 | enum ath_wiphy_state { |
Jouni Malinen | 9580a22 | 2009-03-03 19:23:33 +0200 | [diff] [blame] | 635 | ATH_WIPHY_INACTIVE, |
Jouni Malinen | f0ed85c | 2009-03-03 19:23:31 +0200 | [diff] [blame] | 636 | ATH_WIPHY_ACTIVE, |
| 637 | ATH_WIPHY_PAUSING, |
| 638 | ATH_WIPHY_PAUSED, |
Jouni Malinen | 8089cc4 | 2009-03-03 19:23:38 +0200 | [diff] [blame] | 639 | ATH_WIPHY_SCAN, |
Jouni Malinen | f0ed85c | 2009-03-03 19:23:31 +0200 | [diff] [blame] | 640 | } state; |
Jouni Malinen | 0e2dedf | 2009-03-03 19:23:32 +0200 | [diff] [blame] | 641 | int chan_idx; |
| 642 | int chan_is_ht; |
Jouni Malinen | bce048d | 2009-03-03 19:23:28 +0200 | [diff] [blame] | 643 | }; |
| 644 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 645 | int ath_reset(struct ath_softc *sc, bool retry_tx); |
| 646 | int ath_get_hal_qnum(u16 queue, struct ath_softc *sc); |
| 647 | int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc); |
| 648 | int ath_cabq_update(struct ath_softc *); |
| 649 | |
| 650 | static inline void ath_read_cachesize(struct ath_softc *sc, int *csz) |
| 651 | { |
| 652 | sc->bus_ops->read_cachesize(sc, csz); |
| 653 | } |
| 654 | |
| 655 | static inline void ath_bus_cleanup(struct ath_softc *sc) |
| 656 | { |
| 657 | sc->bus_ops->cleanup(sc); |
| 658 | } |
| 659 | |
| 660 | extern struct ieee80211_ops ath9k_ops; |
| 661 | |
| 662 | irqreturn_t ath_isr(int irq, void *dev); |
| 663 | void ath_cleanup(struct ath_softc *sc); |
| 664 | int ath_attach(u16 devid, struct ath_softc *sc); |
| 665 | void ath_detach(struct ath_softc *sc); |
| 666 | const char *ath_mac_bb_name(u32 mac_bb_version); |
| 667 | const char *ath_rf_name(u16 rf_version); |
Jouni Malinen | c52f33d | 2009-03-03 19:23:29 +0200 | [diff] [blame] | 668 | void ath_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw); |
Jouni Malinen | 0e2dedf | 2009-03-03 19:23:32 +0200 | [diff] [blame] | 669 | void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw, |
| 670 | struct ath9k_channel *ichan); |
| 671 | void ath_update_chainmask(struct ath_softc *sc, int is_ht); |
| 672 | int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw, |
| 673 | struct ath9k_channel *hchan); |
Jouni Malinen | 7ec3e51 | 2009-03-03 19:23:37 +0200 | [diff] [blame] | 674 | void ath_radio_enable(struct ath_softc *sc); |
| 675 | void ath_radio_disable(struct ath_softc *sc); |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 676 | |
| 677 | #ifdef CONFIG_PCI |
| 678 | int ath_pci_init(void); |
| 679 | void ath_pci_exit(void); |
| 680 | #else |
| 681 | static inline int ath_pci_init(void) { return 0; }; |
| 682 | static inline void ath_pci_exit(void) {}; |
| 683 | #endif |
| 684 | |
| 685 | #ifdef CONFIG_ATHEROS_AR71XX |
| 686 | int ath_ahb_init(void); |
| 687 | void ath_ahb_exit(void); |
| 688 | #else |
| 689 | static inline int ath_ahb_init(void) { return 0; }; |
| 690 | static inline void ath_ahb_exit(void) {}; |
| 691 | #endif |
| 692 | |
| 693 | static inline void ath9k_ps_wakeup(struct ath_softc *sc) |
| 694 | { |
| 695 | if (atomic_inc_return(&sc->ps_usecount) == 1) |
Sujith | 2660b81 | 2009-02-09 13:27:26 +0530 | [diff] [blame] | 696 | if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE) { |
| 697 | sc->sc_ah->restore_mode = sc->sc_ah->power_mode; |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 698 | ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE); |
| 699 | } |
| 700 | } |
| 701 | |
| 702 | static inline void ath9k_ps_restore(struct ath_softc *sc) |
| 703 | { |
| 704 | if (atomic_dec_and_test(&sc->ps_usecount)) |
Vivek Natarajan | 541d8dd | 2009-03-02 20:25:14 +0530 | [diff] [blame] | 705 | if ((sc->hw->conf.flags & IEEE80211_CONF_PS) && |
| 706 | !(sc->sc_flags & SC_OP_WAIT_FOR_BEACON)) |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 707 | ath9k_hw_setpower(sc->sc_ah, |
Sujith | 2660b81 | 2009-02-09 13:27:26 +0530 | [diff] [blame] | 708 | sc->sc_ah->restore_mode); |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 709 | } |
Sujith | 0c98de6 | 2009-03-03 10:16:45 +0530 | [diff] [blame] | 710 | |
Jouni Malinen | 8ca21f0 | 2009-03-03 19:23:27 +0200 | [diff] [blame] | 711 | |
| 712 | void ath9k_set_bssid_mask(struct ieee80211_hw *hw); |
Jouni Malinen | c52f33d | 2009-03-03 19:23:29 +0200 | [diff] [blame] | 713 | int ath9k_wiphy_add(struct ath_softc *sc); |
| 714 | int ath9k_wiphy_del(struct ath_wiphy *aphy); |
Jouni Malinen | f0ed85c | 2009-03-03 19:23:31 +0200 | [diff] [blame] | 715 | void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb); |
| 716 | int ath9k_wiphy_pause(struct ath_wiphy *aphy); |
| 717 | int ath9k_wiphy_unpause(struct ath_wiphy *aphy); |
Jouni Malinen | 0e2dedf | 2009-03-03 19:23:32 +0200 | [diff] [blame] | 718 | int ath9k_wiphy_select(struct ath_wiphy *aphy); |
Jouni Malinen | f98c3bd | 2009-03-03 19:23:39 +0200 | [diff] [blame] | 719 | void ath9k_wiphy_set_scheduler(struct ath_softc *sc, unsigned int msec_int); |
Jouni Malinen | 0e2dedf | 2009-03-03 19:23:32 +0200 | [diff] [blame] | 720 | void ath9k_wiphy_chan_work(struct work_struct *work); |
Jouni Malinen | 9580a22 | 2009-03-03 19:23:33 +0200 | [diff] [blame] | 721 | bool ath9k_wiphy_started(struct ath_softc *sc); |
Jouni Malinen | 18eb62f | 2009-03-03 19:23:35 +0200 | [diff] [blame] | 722 | void ath9k_wiphy_pause_all_forced(struct ath_softc *sc, |
| 723 | struct ath_wiphy *selected); |
Jouni Malinen | 8089cc4 | 2009-03-03 19:23:38 +0200 | [diff] [blame] | 724 | bool ath9k_wiphy_scanning(struct ath_softc *sc); |
Jouni Malinen | f98c3bd | 2009-03-03 19:23:39 +0200 | [diff] [blame] | 725 | void ath9k_wiphy_work(struct work_struct *work); |
Jouni Malinen | 8ca21f0 | 2009-03-03 19:23:27 +0200 | [diff] [blame] | 726 | |
Sujith | 394cf0a | 2009-02-09 13:26:54 +0530 | [diff] [blame] | 727 | #endif /* ATH9K_H */ |