Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 1 | /* |
| 2 | * pata_artop.c - ARTOP ATA controller driver |
| 3 | * |
| 4 | * (C) 2006 Red Hat <alan@redhat.com> |
| 5 | * |
| 6 | * Based in part on drivers/ide/pci/aec62xx.c |
| 7 | * Copyright (C) 1999-2002 Andre Hedrick <andre@linux-ide.org> |
| 8 | * 865/865R fixes for Macintosh card version from a patch to the old |
| 9 | * driver by Thibaut VARENE <varenet@parisc-linux.org> |
| 10 | * When setting the PCI latency we must set 0x80 or higher for burst |
| 11 | * performance Alessandro Zummo <alessandro.zummo@towertech.it> |
| 12 | * |
| 13 | * TODO |
| 14 | * 850 serialization once the core supports it |
| 15 | * Investigate no_dsc on 850R |
| 16 | * Clock detect |
| 17 | */ |
| 18 | |
| 19 | #include <linux/kernel.h> |
| 20 | #include <linux/module.h> |
| 21 | #include <linux/pci.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/blkdev.h> |
| 24 | #include <linux/delay.h> |
| 25 | #include <linux/device.h> |
| 26 | #include <scsi/scsi_host.h> |
| 27 | #include <linux/libata.h> |
| 28 | #include <linux/ata.h> |
| 29 | |
| 30 | #define DRV_NAME "pata_artop" |
Alan Cox | c961922 | 2006-09-26 17:53:38 +0100 | [diff] [blame] | 31 | #define DRV_VERSION "0.4.2" |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 32 | |
| 33 | /* |
| 34 | * The ARTOP has 33 Mhz and "over clocked" timing tables. Until we |
| 35 | * get PCI bus speed functionality we leave this as 0. Its a variable |
| 36 | * for when we get the functionality and also for folks wanting to |
| 37 | * test stuff. |
| 38 | */ |
| 39 | |
| 40 | static int clock = 0; |
| 41 | |
| 42 | static int artop6210_pre_reset(struct ata_port *ap) |
| 43 | { |
| 44 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 45 | const struct pci_bits artop_enable_bits[] = { |
| 46 | { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */ |
| 47 | { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */ |
| 48 | }; |
| 49 | |
Alan Cox | c961922 | 2006-09-26 17:53:38 +0100 | [diff] [blame] | 50 | if (!pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) |
| 51 | return -ENOENT; |
| 52 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 53 | ap->cbl = ATA_CBL_PATA40; |
| 54 | return ata_std_prereset(ap); |
| 55 | } |
| 56 | |
| 57 | /** |
| 58 | * artop6210_error_handler - Probe specified port on PATA host controller |
| 59 | * @ap: Port to probe |
| 60 | * |
| 61 | * LOCKING: |
| 62 | * None (inherited from caller). |
| 63 | */ |
| 64 | |
| 65 | static void artop6210_error_handler(struct ata_port *ap) |
| 66 | { |
| 67 | ata_bmdma_drive_eh(ap, artop6210_pre_reset, |
| 68 | ata_std_softreset, NULL, |
| 69 | ata_std_postreset); |
| 70 | } |
| 71 | |
| 72 | /** |
| 73 | * artop6260_pre_reset - check for 40/80 pin |
| 74 | * @ap: Port |
| 75 | * |
| 76 | * The ARTOP hardware reports the cable detect bits in register 0x49. |
| 77 | * Nothing complicated needed here. |
| 78 | */ |
| 79 | |
| 80 | static int artop6260_pre_reset(struct ata_port *ap) |
| 81 | { |
| 82 | static const struct pci_bits artop_enable_bits[] = { |
| 83 | { 0x4AU, 1U, 0x02UL, 0x02UL }, /* port 0 */ |
| 84 | { 0x4AU, 1U, 0x04UL, 0x04UL }, /* port 1 */ |
| 85 | }; |
| 86 | |
| 87 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 88 | u8 tmp; |
| 89 | |
| 90 | /* Odd numbered device ids are the units with enable bits (the -R cards) */ |
Alan Cox | c961922 | 2006-09-26 17:53:38 +0100 | [diff] [blame] | 91 | if (pdev->device % 1 && !pci_test_config_bits(pdev, &artop_enable_bits[ap->port_no])) |
| 92 | return -ENOENT; |
| 93 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 94 | pci_read_config_byte(pdev, 0x49, &tmp); |
| 95 | if (tmp & (1 >> ap->port_no)) |
| 96 | ap->cbl = ATA_CBL_PATA40; |
| 97 | else |
| 98 | ap->cbl = ATA_CBL_PATA80; |
| 99 | return ata_std_prereset(ap); |
| 100 | } |
| 101 | |
| 102 | /** |
| 103 | * artop6260_error_handler - Probe specified port on PATA host controller |
| 104 | * @ap: Port to probe |
| 105 | * |
| 106 | * LOCKING: |
| 107 | * None (inherited from caller). |
| 108 | */ |
| 109 | |
| 110 | static void artop6260_error_handler(struct ata_port *ap) |
| 111 | { |
| 112 | ata_bmdma_drive_eh(ap, artop6260_pre_reset, |
| 113 | ata_std_softreset, NULL, |
| 114 | ata_std_postreset); |
| 115 | } |
| 116 | |
| 117 | /** |
| 118 | * artop6210_load_piomode - Load a set of PATA PIO timings |
| 119 | * @ap: Port whose timings we are configuring |
| 120 | * @adev: Device |
| 121 | * @pio: PIO mode |
| 122 | * |
| 123 | * Set PIO mode for device, in host controller PCI config space. This |
| 124 | * is used both to set PIO timings in PIO mode and also to set the |
| 125 | * matching PIO clocking for UDMA, as well as the MWDMA timings. |
| 126 | * |
| 127 | * LOCKING: |
| 128 | * None (inherited from caller). |
| 129 | */ |
| 130 | |
| 131 | static void artop6210_load_piomode(struct ata_port *ap, struct ata_device *adev, unsigned int pio) |
| 132 | { |
| 133 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 134 | int dn = adev->devno + 2 * ap->port_no; |
| 135 | const u16 timing[2][5] = { |
| 136 | { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 }, |
| 137 | { 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 } |
| 138 | |
| 139 | }; |
| 140 | /* Load the PIO timing active/recovery bits */ |
| 141 | pci_write_config_word(pdev, 0x40 + 2 * dn, timing[clock][pio]); |
| 142 | } |
| 143 | |
| 144 | /** |
| 145 | * artop6210_set_piomode - Initialize host controller PATA PIO timings |
| 146 | * @ap: Port whose timings we are configuring |
| 147 | * @adev: Device we are configuring |
| 148 | * |
| 149 | * Set PIO mode for device, in host controller PCI config space. For |
| 150 | * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In |
| 151 | * the event UDMA is used the later call to set_dmamode will set the |
| 152 | * bits as required. |
| 153 | * |
| 154 | * LOCKING: |
| 155 | * None (inherited from caller). |
| 156 | */ |
| 157 | |
| 158 | static void artop6210_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 159 | { |
| 160 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 161 | int dn = adev->devno + 2 * ap->port_no; |
| 162 | u8 ultra; |
| 163 | |
| 164 | artop6210_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); |
| 165 | |
| 166 | /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */ |
| 167 | pci_read_config_byte(pdev, 0x54, &ultra); |
| 168 | ultra &= ~(3 << (2 * dn)); |
| 169 | pci_write_config_byte(pdev, 0x54, ultra); |
| 170 | } |
| 171 | |
| 172 | /** |
| 173 | * artop6260_load_piomode - Initialize host controller PATA PIO timings |
| 174 | * @ap: Port whose timings we are configuring |
| 175 | * @adev: Device we are configuring |
| 176 | * @pio: PIO mode |
| 177 | * |
| 178 | * Set PIO mode for device, in host controller PCI config space. The |
| 179 | * ARTOP6260 and relatives store the timing data differently. |
| 180 | * |
| 181 | * LOCKING: |
| 182 | * None (inherited from caller). |
| 183 | */ |
| 184 | |
| 185 | static void artop6260_load_piomode (struct ata_port *ap, struct ata_device *adev, unsigned int pio) |
| 186 | { |
| 187 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 188 | int dn = adev->devno + 2 * ap->port_no; |
| 189 | const u8 timing[2][5] = { |
| 190 | { 0x00, 0x0A, 0x08, 0x33, 0x31 }, |
| 191 | { 0x70, 0x7A, 0x78, 0x43, 0x41 } |
| 192 | |
| 193 | }; |
| 194 | /* Load the PIO timing active/recovery bits */ |
| 195 | pci_write_config_byte(pdev, 0x40 + dn, timing[clock][pio]); |
| 196 | } |
| 197 | |
| 198 | /** |
| 199 | * artop6260_set_piomode - Initialize host controller PATA PIO timings |
| 200 | * @ap: Port whose timings we are configuring |
| 201 | * @adev: Device we are configuring |
| 202 | * |
| 203 | * Set PIO mode for device, in host controller PCI config space. For |
| 204 | * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In |
| 205 | * the event UDMA is used the later call to set_dmamode will set the |
| 206 | * bits as required. |
| 207 | * |
| 208 | * LOCKING: |
| 209 | * None (inherited from caller). |
| 210 | */ |
| 211 | |
| 212 | static void artop6260_set_piomode(struct ata_port *ap, struct ata_device *adev) |
| 213 | { |
| 214 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 215 | u8 ultra; |
| 216 | |
| 217 | artop6260_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0); |
| 218 | |
| 219 | /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */ |
| 220 | pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra); |
| 221 | ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */ |
| 222 | pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra); |
| 223 | } |
| 224 | |
| 225 | /** |
| 226 | * artop6210_set_dmamode - Initialize host controller PATA PIO timings |
| 227 | * @ap: Port whose timings we are configuring |
| 228 | * @adev: um |
| 229 | * |
| 230 | * Set DMA mode for device, in host controller PCI config space. |
| 231 | * |
| 232 | * LOCKING: |
| 233 | * None (inherited from caller). |
| 234 | */ |
| 235 | |
| 236 | static void artop6210_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
| 237 | { |
| 238 | unsigned int pio; |
| 239 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 240 | int dn = adev->devno + 2 * ap->port_no; |
| 241 | u8 ultra; |
| 242 | |
| 243 | if (adev->dma_mode == XFER_MW_DMA_0) |
| 244 | pio = 1; |
| 245 | else |
| 246 | pio = 4; |
| 247 | |
| 248 | /* Load the PIO timing active/recovery bits */ |
| 249 | artop6210_load_piomode(ap, adev, pio); |
| 250 | |
| 251 | pci_read_config_byte(pdev, 0x54, &ultra); |
| 252 | ultra &= ~(3 << (2 * dn)); |
| 253 | |
| 254 | /* Add ultra DMA bits if in UDMA mode */ |
| 255 | if (adev->dma_mode >= XFER_UDMA_0) { |
| 256 | u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock; |
| 257 | if (mode == 0) |
| 258 | mode = 1; |
| 259 | ultra |= (mode << (2 * dn)); |
| 260 | } |
| 261 | pci_write_config_byte(pdev, 0x54, ultra); |
| 262 | } |
| 263 | |
| 264 | /** |
| 265 | * artop6260_set_dmamode - Initialize host controller PATA PIO timings |
| 266 | * @ap: Port whose timings we are configuring |
| 267 | * @adev: Device we are configuring |
| 268 | * |
| 269 | * Set DMA mode for device, in host controller PCI config space. The |
| 270 | * ARTOP6260 and relatives store the timing data differently. |
| 271 | * |
| 272 | * LOCKING: |
| 273 | * None (inherited from caller). |
| 274 | */ |
| 275 | |
| 276 | static void artop6260_set_dmamode (struct ata_port *ap, struct ata_device *adev) |
| 277 | { |
| 278 | unsigned int pio = adev->pio_mode - XFER_PIO_0; |
| 279 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
| 280 | u8 ultra; |
| 281 | |
| 282 | if (adev->dma_mode == XFER_MW_DMA_0) |
| 283 | pio = 1; |
| 284 | else |
| 285 | pio = 4; |
| 286 | |
| 287 | /* Load the PIO timing active/recovery bits */ |
| 288 | artop6260_load_piomode(ap, adev, pio); |
| 289 | |
| 290 | /* Add ultra DMA bits if in UDMA mode */ |
| 291 | pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra); |
| 292 | ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */ |
| 293 | if (adev->dma_mode >= XFER_UDMA_0) { |
| 294 | u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock; |
| 295 | if (mode == 0) |
| 296 | mode = 1; |
| 297 | ultra |= (mode << (4 * adev->devno)); |
| 298 | } |
| 299 | pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra); |
| 300 | } |
| 301 | |
| 302 | static struct scsi_host_template artop_sht = { |
| 303 | .module = THIS_MODULE, |
| 304 | .name = DRV_NAME, |
| 305 | .ioctl = ata_scsi_ioctl, |
| 306 | .queuecommand = ata_scsi_queuecmd, |
| 307 | .can_queue = ATA_DEF_QUEUE, |
| 308 | .this_id = ATA_SHT_THIS_ID, |
| 309 | .sg_tablesize = LIBATA_MAX_PRD, |
| 310 | .max_sectors = ATA_MAX_SECTORS, |
| 311 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
| 312 | .emulated = ATA_SHT_EMULATED, |
| 313 | .use_clustering = ATA_SHT_USE_CLUSTERING, |
| 314 | .proc_name = DRV_NAME, |
| 315 | .dma_boundary = ATA_DMA_BOUNDARY, |
| 316 | .slave_configure = ata_scsi_slave_config, |
| 317 | .bios_param = ata_std_bios_param, |
| 318 | }; |
| 319 | |
| 320 | static const struct ata_port_operations artop6210_ops = { |
| 321 | .port_disable = ata_port_disable, |
| 322 | .set_piomode = artop6210_set_piomode, |
| 323 | .set_dmamode = artop6210_set_dmamode, |
| 324 | .mode_filter = ata_pci_default_filter, |
| 325 | |
| 326 | .tf_load = ata_tf_load, |
| 327 | .tf_read = ata_tf_read, |
| 328 | .check_status = ata_check_status, |
| 329 | .exec_command = ata_exec_command, |
| 330 | .dev_select = ata_std_dev_select, |
| 331 | |
| 332 | .freeze = ata_bmdma_freeze, |
| 333 | .thaw = ata_bmdma_thaw, |
| 334 | .error_handler = artop6210_error_handler, |
| 335 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 336 | |
| 337 | .bmdma_setup = ata_bmdma_setup, |
| 338 | .bmdma_start = ata_bmdma_start, |
| 339 | .bmdma_stop = ata_bmdma_stop, |
| 340 | .bmdma_status = ata_bmdma_status, |
| 341 | .qc_prep = ata_qc_prep, |
| 342 | .qc_issue = ata_qc_issue_prot, |
Jeff Garzik | bda3028 | 2006-09-27 05:41:13 -0400 | [diff] [blame^] | 343 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 344 | .data_xfer = ata_pio_data_xfer, |
| 345 | |
| 346 | .irq_handler = ata_interrupt, |
| 347 | .irq_clear = ata_bmdma_irq_clear, |
| 348 | |
| 349 | .port_start = ata_port_start, |
| 350 | .port_stop = ata_port_stop, |
| 351 | .host_stop = ata_host_stop, |
| 352 | }; |
| 353 | |
| 354 | static const struct ata_port_operations artop6260_ops = { |
| 355 | .port_disable = ata_port_disable, |
| 356 | .set_piomode = artop6260_set_piomode, |
| 357 | .set_dmamode = artop6260_set_dmamode, |
| 358 | |
| 359 | .tf_load = ata_tf_load, |
| 360 | .tf_read = ata_tf_read, |
| 361 | .check_status = ata_check_status, |
| 362 | .exec_command = ata_exec_command, |
| 363 | .dev_select = ata_std_dev_select, |
| 364 | |
| 365 | .freeze = ata_bmdma_freeze, |
| 366 | .thaw = ata_bmdma_thaw, |
| 367 | .error_handler = artop6260_error_handler, |
| 368 | .post_internal_cmd = ata_bmdma_post_internal_cmd, |
| 369 | |
| 370 | .bmdma_setup = ata_bmdma_setup, |
| 371 | .bmdma_start = ata_bmdma_start, |
| 372 | .bmdma_stop = ata_bmdma_stop, |
| 373 | .bmdma_status = ata_bmdma_status, |
| 374 | .qc_prep = ata_qc_prep, |
| 375 | .qc_issue = ata_qc_issue_prot, |
| 376 | .data_xfer = ata_pio_data_xfer, |
| 377 | |
Jeff Garzik | 669a5db | 2006-08-29 18:12:40 -0400 | [diff] [blame] | 378 | .irq_handler = ata_interrupt, |
| 379 | .irq_clear = ata_bmdma_irq_clear, |
| 380 | |
| 381 | .port_start = ata_port_start, |
| 382 | .port_stop = ata_port_stop, |
| 383 | .host_stop = ata_host_stop, |
| 384 | }; |
| 385 | |
| 386 | |
| 387 | /** |
| 388 | * artop_init_one - Register ARTOP ATA PCI device with kernel services |
| 389 | * @pdev: PCI device to register |
| 390 | * @ent: Entry in artop_pci_tbl matching with @pdev |
| 391 | * |
| 392 | * Called from kernel PCI layer. |
| 393 | * |
| 394 | * LOCKING: |
| 395 | * Inherited from PCI layer (may sleep). |
| 396 | * |
| 397 | * RETURNS: |
| 398 | * Zero on success, or -ERRNO value. |
| 399 | */ |
| 400 | |
| 401 | static int artop_init_one (struct pci_dev *pdev, const struct pci_device_id *id) |
| 402 | { |
| 403 | static int printed_version; |
| 404 | static struct ata_port_info info_6210 = { |
| 405 | .sht = &artop_sht, |
| 406 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 407 | .pio_mask = 0x1f, /* pio0-4 */ |
| 408 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 409 | .udma_mask = ATA_UDMA2, |
| 410 | .port_ops = &artop6210_ops, |
| 411 | }; |
| 412 | static struct ata_port_info info_626x = { |
| 413 | .sht = &artop_sht, |
| 414 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 415 | .pio_mask = 0x1f, /* pio0-4 */ |
| 416 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 417 | .udma_mask = ATA_UDMA4, |
| 418 | .port_ops = &artop6260_ops, |
| 419 | }; |
| 420 | static struct ata_port_info info_626x_fast = { |
| 421 | .sht = &artop_sht, |
| 422 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, |
| 423 | .pio_mask = 0x1f, /* pio0-4 */ |
| 424 | .mwdma_mask = 0x07, /* mwdma0-2 */ |
| 425 | .udma_mask = ATA_UDMA5, |
| 426 | .port_ops = &artop6260_ops, |
| 427 | }; |
| 428 | struct ata_port_info *port_info[2]; |
| 429 | struct ata_port_info *info; |
| 430 | int ports = 2; |
| 431 | |
| 432 | if (!printed_version++) |
| 433 | dev_printk(KERN_DEBUG, &pdev->dev, |
| 434 | "version " DRV_VERSION "\n"); |
| 435 | |
| 436 | if (id->driver_data == 0) { /* 6210 variant */ |
| 437 | info = &info_6210; |
| 438 | /* BIOS may have left us in UDMA, clear it before libata probe */ |
| 439 | pci_write_config_byte(pdev, 0x54, 0); |
| 440 | /* For the moment (also lacks dsc) */ |
| 441 | printk(KERN_WARNING "ARTOP 6210 requires serialize functionality not yet supported by libata.\n"); |
| 442 | printk(KERN_WARNING "Secondary ATA ports will not be activated.\n"); |
| 443 | ports = 1; |
| 444 | } |
| 445 | else if (id->driver_data == 1) /* 6260 */ |
| 446 | info = &info_626x; |
| 447 | else if (id->driver_data == 2) { /* 6260 or 6260 + fast */ |
| 448 | unsigned long io = pci_resource_start(pdev, 4); |
| 449 | u8 reg; |
| 450 | |
| 451 | info = &info_626x; |
| 452 | if (inb(io) & 0x10) |
| 453 | info = &info_626x_fast; |
| 454 | /* Mac systems come up with some registers not set as we |
| 455 | will need them */ |
| 456 | |
| 457 | /* Clear reset & test bits */ |
| 458 | pci_read_config_byte(pdev, 0x49, ®); |
| 459 | pci_write_config_byte(pdev, 0x49, reg & ~ 0x30); |
| 460 | |
| 461 | /* PCI latency must be > 0x80 for burst mode, tweak it |
| 462 | * if required. |
| 463 | */ |
| 464 | pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®); |
| 465 | if (reg <= 0x80) |
| 466 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90); |
| 467 | |
| 468 | /* Enable IRQ output and burst mode */ |
| 469 | pci_read_config_byte(pdev, 0x4a, ®); |
| 470 | pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80); |
| 471 | |
| 472 | } |
| 473 | port_info[0] = port_info[1] = info; |
| 474 | return ata_pci_init_one(pdev, port_info, ports); |
| 475 | } |
| 476 | |
| 477 | static const struct pci_device_id artop_pci_tbl[] = { |
| 478 | { 0x1191, 0x0005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, |
| 479 | { 0x1191, 0x0006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, |
| 480 | { 0x1191, 0x0007, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1}, |
| 481 | { 0x1191, 0x0008, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, |
| 482 | { 0x1191, 0x0009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2}, |
| 483 | { } /* terminate list */ |
| 484 | }; |
| 485 | |
| 486 | static struct pci_driver artop_pci_driver = { |
| 487 | .name = DRV_NAME, |
| 488 | .id_table = artop_pci_tbl, |
| 489 | .probe = artop_init_one, |
| 490 | .remove = ata_pci_remove_one, |
| 491 | }; |
| 492 | |
| 493 | static int __init artop_init(void) |
| 494 | { |
| 495 | return pci_register_driver(&artop_pci_driver); |
| 496 | } |
| 497 | |
| 498 | static void __exit artop_exit(void) |
| 499 | { |
| 500 | pci_unregister_driver(&artop_pci_driver); |
| 501 | } |
| 502 | |
| 503 | |
| 504 | module_init(artop_init); |
| 505 | module_exit(artop_exit); |
| 506 | |
| 507 | MODULE_AUTHOR("Alan Cox"); |
| 508 | MODULE_DESCRIPTION("SCSI low-level driver for ARTOP PATA"); |
| 509 | MODULE_LICENSE("GPL"); |
| 510 | MODULE_DEVICE_TABLE(pci, artop_pci_tbl); |
| 511 | MODULE_VERSION(DRV_VERSION); |
| 512 | |