Masahiro Yamada | dd6fd4a | 2015-10-23 19:51:59 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License as published by |
| 6 | * the Free Software Foundation; either version 2 of the License, or |
| 7 | * (at your option) any later version. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | */ |
| 14 | |
| 15 | #include <linux/clk.h> |
| 16 | #include <linux/i2c.h> |
| 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/io.h> |
| 19 | #include <linux/module.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | |
| 22 | #define UNIPHIER_I2C_DTRM 0x00 /* TX register */ |
| 23 | #define UNIPHIER_I2C_DTRM_IRQEN BIT(11) /* enable interrupt */ |
| 24 | #define UNIPHIER_I2C_DTRM_STA BIT(10) /* start condition */ |
| 25 | #define UNIPHIER_I2C_DTRM_STO BIT(9) /* stop condition */ |
| 26 | #define UNIPHIER_I2C_DTRM_NACK BIT(8) /* do not return ACK */ |
| 27 | #define UNIPHIER_I2C_DTRM_RD BIT(0) /* read transaction */ |
| 28 | #define UNIPHIER_I2C_DREC 0x04 /* RX register */ |
| 29 | #define UNIPHIER_I2C_DREC_MST BIT(14) /* 1 = master, 0 = slave */ |
| 30 | #define UNIPHIER_I2C_DREC_TX BIT(13) /* 1 = transmit, 0 = receive */ |
| 31 | #define UNIPHIER_I2C_DREC_STS BIT(12) /* stop condition detected */ |
| 32 | #define UNIPHIER_I2C_DREC_LRB BIT(11) /* no ACK */ |
| 33 | #define UNIPHIER_I2C_DREC_LAB BIT(9) /* arbitration lost */ |
| 34 | #define UNIPHIER_I2C_DREC_BBN BIT(8) /* bus not busy */ |
| 35 | #define UNIPHIER_I2C_MYAD 0x08 /* slave address */ |
| 36 | #define UNIPHIER_I2C_CLK 0x0c /* clock frequency control */ |
| 37 | #define UNIPHIER_I2C_BRST 0x10 /* bus reset */ |
| 38 | #define UNIPHIER_I2C_BRST_FOEN BIT(1) /* normal operation */ |
| 39 | #define UNIPHIER_I2C_BRST_RSCL BIT(0) /* release SCL */ |
| 40 | #define UNIPHIER_I2C_HOLD 0x14 /* hold time control */ |
| 41 | #define UNIPHIER_I2C_BSTS 0x18 /* bus status monitor */ |
| 42 | #define UNIPHIER_I2C_BSTS_SDA BIT(1) /* readback of SDA line */ |
| 43 | #define UNIPHIER_I2C_BSTS_SCL BIT(0) /* readback of SCL line */ |
| 44 | #define UNIPHIER_I2C_NOISE 0x1c /* noise filter control */ |
| 45 | #define UNIPHIER_I2C_SETUP 0x20 /* setup time control */ |
| 46 | |
| 47 | #define UNIPHIER_I2C_DEFAULT_SPEED 100000 |
| 48 | #define UNIPHIER_I2C_MAX_SPEED 400000 |
| 49 | |
| 50 | struct uniphier_i2c_priv { |
| 51 | struct completion comp; |
| 52 | struct i2c_adapter adap; |
| 53 | void __iomem *membase; |
| 54 | struct clk *clk; |
| 55 | unsigned int busy_cnt; |
| 56 | }; |
| 57 | |
| 58 | static irqreturn_t uniphier_i2c_interrupt(int irq, void *dev_id) |
| 59 | { |
| 60 | struct uniphier_i2c_priv *priv = dev_id; |
| 61 | |
| 62 | /* |
| 63 | * This hardware uses edge triggered interrupt. Do not touch the |
| 64 | * hardware registers in this handler to make sure to catch the next |
| 65 | * interrupt edge. Just send a complete signal and return. |
| 66 | */ |
| 67 | complete(&priv->comp); |
| 68 | |
| 69 | return IRQ_HANDLED; |
| 70 | } |
| 71 | |
| 72 | static int uniphier_i2c_xfer_byte(struct i2c_adapter *adap, u32 txdata, |
| 73 | u32 *rxdatap) |
| 74 | { |
| 75 | struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); |
| 76 | unsigned long time_left; |
| 77 | u32 rxdata; |
| 78 | |
| 79 | reinit_completion(&priv->comp); |
| 80 | |
| 81 | txdata |= UNIPHIER_I2C_DTRM_IRQEN; |
| 82 | dev_dbg(&adap->dev, "write data: 0x%04x\n", txdata); |
| 83 | writel(txdata, priv->membase + UNIPHIER_I2C_DTRM); |
| 84 | |
| 85 | time_left = wait_for_completion_timeout(&priv->comp, adap->timeout); |
| 86 | if (unlikely(!time_left)) { |
| 87 | dev_err(&adap->dev, "transaction timeout\n"); |
| 88 | return -ETIMEDOUT; |
| 89 | } |
| 90 | |
| 91 | rxdata = readl(priv->membase + UNIPHIER_I2C_DREC); |
| 92 | dev_dbg(&adap->dev, "read data: 0x%04x\n", rxdata); |
| 93 | |
| 94 | if (rxdatap) |
| 95 | *rxdatap = rxdata; |
| 96 | |
| 97 | return 0; |
| 98 | } |
| 99 | |
| 100 | static int uniphier_i2c_send_byte(struct i2c_adapter *adap, u32 txdata) |
| 101 | { |
| 102 | u32 rxdata; |
| 103 | int ret; |
| 104 | |
| 105 | ret = uniphier_i2c_xfer_byte(adap, txdata, &rxdata); |
| 106 | if (ret) |
| 107 | return ret; |
| 108 | |
| 109 | if (unlikely(rxdata & UNIPHIER_I2C_DREC_LAB)) { |
| 110 | dev_dbg(&adap->dev, "arbitration lost\n"); |
| 111 | return -EAGAIN; |
| 112 | } |
| 113 | if (unlikely(rxdata & UNIPHIER_I2C_DREC_LRB)) { |
| 114 | dev_dbg(&adap->dev, "could not get ACK\n"); |
| 115 | return -ENXIO; |
| 116 | } |
| 117 | |
| 118 | return 0; |
| 119 | } |
| 120 | |
| 121 | static int uniphier_i2c_tx(struct i2c_adapter *adap, u16 addr, u16 len, |
| 122 | const u8 *buf) |
| 123 | { |
| 124 | int ret; |
| 125 | |
| 126 | dev_dbg(&adap->dev, "start condition\n"); |
| 127 | ret = uniphier_i2c_send_byte(adap, addr << 1 | |
| 128 | UNIPHIER_I2C_DTRM_STA | |
| 129 | UNIPHIER_I2C_DTRM_NACK); |
| 130 | if (ret) |
| 131 | return ret; |
| 132 | |
| 133 | while (len--) { |
| 134 | ret = uniphier_i2c_send_byte(adap, |
| 135 | UNIPHIER_I2C_DTRM_NACK | *buf++); |
| 136 | if (ret) |
| 137 | return ret; |
| 138 | } |
| 139 | |
| 140 | return 0; |
| 141 | } |
| 142 | |
| 143 | static int uniphier_i2c_rx(struct i2c_adapter *adap, u16 addr, u16 len, |
| 144 | u8 *buf) |
| 145 | { |
| 146 | int ret; |
| 147 | |
| 148 | dev_dbg(&adap->dev, "start condition\n"); |
| 149 | ret = uniphier_i2c_send_byte(adap, addr << 1 | |
| 150 | UNIPHIER_I2C_DTRM_STA | |
| 151 | UNIPHIER_I2C_DTRM_NACK | |
| 152 | UNIPHIER_I2C_DTRM_RD); |
| 153 | if (ret) |
| 154 | return ret; |
| 155 | |
| 156 | while (len--) { |
| 157 | u32 rxdata; |
| 158 | |
| 159 | ret = uniphier_i2c_xfer_byte(adap, |
| 160 | len ? 0 : UNIPHIER_I2C_DTRM_NACK, |
| 161 | &rxdata); |
| 162 | if (ret) |
| 163 | return ret; |
| 164 | *buf++ = rxdata; |
| 165 | } |
| 166 | |
| 167 | return 0; |
| 168 | } |
| 169 | |
| 170 | static int uniphier_i2c_stop(struct i2c_adapter *adap) |
| 171 | { |
| 172 | dev_dbg(&adap->dev, "stop condition\n"); |
| 173 | return uniphier_i2c_send_byte(adap, UNIPHIER_I2C_DTRM_STO | |
| 174 | UNIPHIER_I2C_DTRM_NACK); |
| 175 | } |
| 176 | |
| 177 | static int uniphier_i2c_master_xfer_one(struct i2c_adapter *adap, |
| 178 | struct i2c_msg *msg, bool stop) |
| 179 | { |
| 180 | bool is_read = msg->flags & I2C_M_RD; |
| 181 | bool recovery = false; |
| 182 | int ret; |
| 183 | |
| 184 | dev_dbg(&adap->dev, "%s: addr=0x%02x, len=%d, stop=%d\n", |
| 185 | is_read ? "receive" : "transmit", msg->addr, msg->len, stop); |
| 186 | |
| 187 | if (is_read) |
| 188 | ret = uniphier_i2c_rx(adap, msg->addr, msg->len, msg->buf); |
| 189 | else |
| 190 | ret = uniphier_i2c_tx(adap, msg->addr, msg->len, msg->buf); |
| 191 | |
| 192 | if (ret == -EAGAIN) /* could not acquire bus. bail out without STOP */ |
| 193 | return ret; |
| 194 | |
| 195 | if (ret == -ETIMEDOUT) { |
| 196 | /* This error is fatal. Needs recovery. */ |
| 197 | stop = false; |
| 198 | recovery = true; |
| 199 | } |
| 200 | |
| 201 | if (stop) { |
| 202 | int ret2 = uniphier_i2c_stop(adap); |
| 203 | |
| 204 | if (ret2) { |
| 205 | /* Failed to issue STOP. The bus needs recovery. */ |
| 206 | recovery = true; |
| 207 | ret = ret ?: ret2; |
| 208 | } |
| 209 | } |
| 210 | |
| 211 | if (recovery) |
| 212 | i2c_recover_bus(adap); |
| 213 | |
| 214 | return ret; |
| 215 | } |
| 216 | |
| 217 | static int uniphier_i2c_check_bus_busy(struct i2c_adapter *adap) |
| 218 | { |
| 219 | struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); |
| 220 | |
| 221 | if (!(readl(priv->membase + UNIPHIER_I2C_DREC) & |
| 222 | UNIPHIER_I2C_DREC_BBN)) { |
| 223 | if (priv->busy_cnt++ > 3) { |
| 224 | /* |
| 225 | * If bus busy continues too long, it is probably |
| 226 | * in a wrong state. Try bus recovery. |
| 227 | */ |
| 228 | i2c_recover_bus(adap); |
| 229 | priv->busy_cnt = 0; |
| 230 | } |
| 231 | |
| 232 | return -EAGAIN; |
| 233 | } |
| 234 | |
| 235 | priv->busy_cnt = 0; |
| 236 | return 0; |
| 237 | } |
| 238 | |
| 239 | static int uniphier_i2c_master_xfer(struct i2c_adapter *adap, |
| 240 | struct i2c_msg *msgs, int num) |
| 241 | { |
| 242 | struct i2c_msg *msg, *emsg = msgs + num; |
| 243 | int ret; |
| 244 | |
| 245 | ret = uniphier_i2c_check_bus_busy(adap); |
| 246 | if (ret) |
| 247 | return ret; |
| 248 | |
| 249 | for (msg = msgs; msg < emsg; msg++) { |
| 250 | /* If next message is read, skip the stop condition */ |
| 251 | bool stop = !(msg + 1 < emsg && msg[1].flags & I2C_M_RD); |
| 252 | /* but, force it if I2C_M_STOP is set */ |
| 253 | if (msg->flags & I2C_M_STOP) |
| 254 | stop = true; |
| 255 | |
| 256 | ret = uniphier_i2c_master_xfer_one(adap, msg, stop); |
| 257 | if (ret) |
| 258 | return ret; |
| 259 | } |
| 260 | |
| 261 | return num; |
| 262 | } |
| 263 | |
| 264 | static u32 uniphier_i2c_functionality(struct i2c_adapter *adap) |
| 265 | { |
| 266 | return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL; |
| 267 | } |
| 268 | |
| 269 | static const struct i2c_algorithm uniphier_i2c_algo = { |
| 270 | .master_xfer = uniphier_i2c_master_xfer, |
| 271 | .functionality = uniphier_i2c_functionality, |
| 272 | }; |
| 273 | |
| 274 | static void uniphier_i2c_reset(struct uniphier_i2c_priv *priv, bool reset_on) |
| 275 | { |
| 276 | u32 val = UNIPHIER_I2C_BRST_RSCL; |
| 277 | |
| 278 | val |= reset_on ? 0 : UNIPHIER_I2C_BRST_FOEN; |
| 279 | writel(val, priv->membase + UNIPHIER_I2C_BRST); |
| 280 | } |
| 281 | |
| 282 | static int uniphier_i2c_get_scl(struct i2c_adapter *adap) |
| 283 | { |
| 284 | struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); |
| 285 | |
| 286 | return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) & |
| 287 | UNIPHIER_I2C_BSTS_SCL); |
| 288 | } |
| 289 | |
| 290 | static void uniphier_i2c_set_scl(struct i2c_adapter *adap, int val) |
| 291 | { |
| 292 | struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); |
| 293 | |
| 294 | writel(val ? UNIPHIER_I2C_BRST_RSCL : 0, |
| 295 | priv->membase + UNIPHIER_I2C_BRST); |
| 296 | } |
| 297 | |
| 298 | static int uniphier_i2c_get_sda(struct i2c_adapter *adap) |
| 299 | { |
| 300 | struct uniphier_i2c_priv *priv = i2c_get_adapdata(adap); |
| 301 | |
| 302 | return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) & |
| 303 | UNIPHIER_I2C_BSTS_SDA); |
| 304 | } |
| 305 | |
| 306 | static void uniphier_i2c_unprepare_recovery(struct i2c_adapter *adap) |
| 307 | { |
| 308 | uniphier_i2c_reset(i2c_get_adapdata(adap), false); |
| 309 | } |
| 310 | |
| 311 | static struct i2c_bus_recovery_info uniphier_i2c_bus_recovery_info = { |
| 312 | .recover_bus = i2c_generic_scl_recovery, |
| 313 | .get_scl = uniphier_i2c_get_scl, |
| 314 | .set_scl = uniphier_i2c_set_scl, |
| 315 | .get_sda = uniphier_i2c_get_sda, |
| 316 | .unprepare_recovery = uniphier_i2c_unprepare_recovery, |
| 317 | }; |
| 318 | |
| 319 | static int uniphier_i2c_clk_init(struct device *dev, |
| 320 | struct uniphier_i2c_priv *priv) |
| 321 | { |
| 322 | struct device_node *np = dev->of_node; |
| 323 | unsigned long clk_rate; |
| 324 | u32 bus_speed; |
| 325 | int ret; |
| 326 | |
| 327 | if (of_property_read_u32(np, "clock-frequency", &bus_speed)) |
| 328 | bus_speed = UNIPHIER_I2C_DEFAULT_SPEED; |
| 329 | |
Masahiro Yamada | 2d5d23b | 2015-11-30 18:53:34 +0900 | [diff] [blame] | 330 | if (!bus_speed) { |
Masahiro Yamada | bca71ba | 2016-01-26 18:09:21 +0900 | [diff] [blame] | 331 | dev_err(dev, "clock-frequency should not be zero\n"); |
Masahiro Yamada | 2d5d23b | 2015-11-30 18:53:34 +0900 | [diff] [blame] | 332 | return -EINVAL; |
| 333 | } |
| 334 | |
Masahiro Yamada | dd6fd4a | 2015-10-23 19:51:59 +0900 | [diff] [blame] | 335 | if (bus_speed > UNIPHIER_I2C_MAX_SPEED) |
| 336 | bus_speed = UNIPHIER_I2C_MAX_SPEED; |
| 337 | |
| 338 | /* Get input clk rate through clk driver */ |
| 339 | priv->clk = devm_clk_get(dev, NULL); |
| 340 | if (IS_ERR(priv->clk)) { |
| 341 | dev_err(dev, "failed to get clock\n"); |
| 342 | return PTR_ERR(priv->clk); |
| 343 | } |
| 344 | |
| 345 | ret = clk_prepare_enable(priv->clk); |
| 346 | if (ret) |
| 347 | return ret; |
| 348 | |
| 349 | clk_rate = clk_get_rate(priv->clk); |
Masahiro Yamada | 1ff49b3 | 2015-11-30 18:53:33 +0900 | [diff] [blame] | 350 | if (!clk_rate) { |
| 351 | dev_err(dev, "input clock rate should not be zero\n"); |
| 352 | return -EINVAL; |
| 353 | } |
Masahiro Yamada | dd6fd4a | 2015-10-23 19:51:59 +0900 | [diff] [blame] | 354 | |
| 355 | uniphier_i2c_reset(priv, true); |
| 356 | |
| 357 | writel((clk_rate / bus_speed / 2 << 16) | (clk_rate / bus_speed), |
| 358 | priv->membase + UNIPHIER_I2C_CLK); |
| 359 | |
| 360 | uniphier_i2c_reset(priv, false); |
| 361 | |
| 362 | return 0; |
| 363 | } |
| 364 | |
| 365 | static int uniphier_i2c_probe(struct platform_device *pdev) |
| 366 | { |
| 367 | struct device *dev = &pdev->dev; |
| 368 | struct uniphier_i2c_priv *priv; |
| 369 | struct resource *regs; |
| 370 | int irq; |
| 371 | int ret; |
| 372 | |
| 373 | priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); |
| 374 | if (!priv) |
| 375 | return -ENOMEM; |
| 376 | |
| 377 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 378 | priv->membase = devm_ioremap_resource(dev, regs); |
| 379 | if (IS_ERR(priv->membase)) |
| 380 | return PTR_ERR(priv->membase); |
| 381 | |
| 382 | irq = platform_get_irq(pdev, 0); |
| 383 | if (irq < 0) { |
Masahiro Yamada | 8a35018 | 2016-04-21 15:12:44 +0900 | [diff] [blame] | 384 | dev_err(dev, "failed to get IRQ number\n"); |
Masahiro Yamada | dd6fd4a | 2015-10-23 19:51:59 +0900 | [diff] [blame] | 385 | return irq; |
| 386 | } |
| 387 | |
| 388 | init_completion(&priv->comp); |
| 389 | priv->adap.owner = THIS_MODULE; |
| 390 | priv->adap.algo = &uniphier_i2c_algo; |
| 391 | priv->adap.dev.parent = dev; |
| 392 | priv->adap.dev.of_node = dev->of_node; |
| 393 | strlcpy(priv->adap.name, "UniPhier I2C", sizeof(priv->adap.name)); |
| 394 | priv->adap.bus_recovery_info = &uniphier_i2c_bus_recovery_info; |
| 395 | i2c_set_adapdata(&priv->adap, priv); |
| 396 | platform_set_drvdata(pdev, priv); |
| 397 | |
| 398 | ret = uniphier_i2c_clk_init(dev, priv); |
| 399 | if (ret) |
Masahiro Yamada | 1ff49b3 | 2015-11-30 18:53:33 +0900 | [diff] [blame] | 400 | goto err; |
Masahiro Yamada | dd6fd4a | 2015-10-23 19:51:59 +0900 | [diff] [blame] | 401 | |
| 402 | ret = devm_request_irq(dev, irq, uniphier_i2c_interrupt, 0, pdev->name, |
| 403 | priv); |
| 404 | if (ret) { |
| 405 | dev_err(dev, "failed to request irq %d\n", irq); |
| 406 | goto err; |
| 407 | } |
| 408 | |
| 409 | ret = i2c_add_adapter(&priv->adap); |
| 410 | if (ret) { |
| 411 | dev_err(dev, "failed to add I2C adapter\n"); |
| 412 | goto err; |
| 413 | } |
| 414 | |
| 415 | err: |
| 416 | if (ret) |
| 417 | clk_disable_unprepare(priv->clk); |
| 418 | |
| 419 | return ret; |
| 420 | } |
| 421 | |
| 422 | static int uniphier_i2c_remove(struct platform_device *pdev) |
| 423 | { |
| 424 | struct uniphier_i2c_priv *priv = platform_get_drvdata(pdev); |
| 425 | |
| 426 | i2c_del_adapter(&priv->adap); |
| 427 | clk_disable_unprepare(priv->clk); |
| 428 | |
| 429 | return 0; |
| 430 | } |
| 431 | |
| 432 | static const struct of_device_id uniphier_i2c_match[] = { |
| 433 | { .compatible = "socionext,uniphier-i2c" }, |
| 434 | { /* sentinel */ } |
| 435 | }; |
| 436 | MODULE_DEVICE_TABLE(of, uniphier_i2c_match); |
| 437 | |
| 438 | static struct platform_driver uniphier_i2c_drv = { |
| 439 | .probe = uniphier_i2c_probe, |
| 440 | .remove = uniphier_i2c_remove, |
| 441 | .driver = { |
| 442 | .name = "uniphier-i2c", |
| 443 | .of_match_table = uniphier_i2c_match, |
| 444 | }, |
| 445 | }; |
| 446 | module_platform_driver(uniphier_i2c_drv); |
| 447 | |
| 448 | MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>"); |
| 449 | MODULE_DESCRIPTION("UniPhier I2C bus driver"); |
| 450 | MODULE_LICENSE("GPL"); |