Russell King | fa0fe48 | 2006-01-13 21:30:48 +0000 | [diff] [blame] | 1 | /* |
Russell King | 4baa992 | 2008-08-02 10:55:55 +0100 | [diff] [blame] | 2 | * arch/arm/include/asm/hardware/vic.h |
Russell King | fa0fe48 | 2006-01-13 21:30:48 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (c) ARM Limited 2003. All rights reserved. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | #ifndef __ASM_ARM_HARDWARE_VIC_H |
| 21 | #define __ASM_ARM_HARDWARE_VIC_H |
| 22 | |
| 23 | #define VIC_IRQ_STATUS 0x00 |
| 24 | #define VIC_FIQ_STATUS 0x04 |
| 25 | #define VIC_RAW_STATUS 0x08 |
| 26 | #define VIC_INT_SELECT 0x0c /* 1 = FIQ, 0 = IRQ */ |
| 27 | #define VIC_INT_ENABLE 0x10 /* 1 = enable, 0 = disable */ |
| 28 | #define VIC_INT_ENABLE_CLEAR 0x14 |
| 29 | #define VIC_INT_SOFT 0x18 |
| 30 | #define VIC_INT_SOFT_CLEAR 0x1c |
| 31 | #define VIC_PROTECT 0x20 |
Ben Dooks | a801cd6 | 2008-10-21 14:07:06 +0100 | [diff] [blame] | 32 | #define VIC_PL190_VECT_ADDR 0x30 /* PL190 only */ |
| 33 | #define VIC_PL190_DEF_VECT_ADDR 0x34 /* PL190 only */ |
Russell King | fa0fe48 | 2006-01-13 21:30:48 +0000 | [diff] [blame] | 34 | |
Ben Dooks | a801cd6 | 2008-10-21 14:07:06 +0100 | [diff] [blame] | 35 | #define VIC_VECT_ADDR0 0x100 /* 0 to 15 (0..31 PL192) */ |
| 36 | #define VIC_VECT_CNTL0 0x200 /* 0 to 15 (0..31 PL192) */ |
Russell King | fa0fe48 | 2006-01-13 21:30:48 +0000 | [diff] [blame] | 37 | #define VIC_ITCR 0x300 /* VIC test control register */ |
| 38 | |
| 39 | #define VIC_VECT_CNTL_ENABLE (1 << 5) |
| 40 | |
Ben Dooks | a801cd6 | 2008-10-21 14:07:06 +0100 | [diff] [blame] | 41 | #define VIC_PL192_VECT_ADDR 0xF00 |
| 42 | |
Russell King | fa0fe48 | 2006-01-13 21:30:48 +0000 | [diff] [blame] | 43 | #ifndef __ASSEMBLY__ |
Ben Dooks | c07f87f | 2009-03-24 15:30:07 +0000 | [diff] [blame^] | 44 | void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources); |
Russell King | fa0fe48 | 2006-01-13 21:30:48 +0000 | [diff] [blame] | 45 | #endif |
| 46 | |
| 47 | #endif |