blob: a3538493e3531463ec7f833345ccc115733576ab [file] [log] [blame]
Vineet Guptacfdbc2e2013-01-18 15:12:20 +05301#
2# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3#
4# This program is free software; you can redistribute it and/or modify
5# it under the terms of the GNU General Public License version 2 as
6# published by the Free Software Foundation.
7#
8
9config ARC
10 def_bool y
11 select ARCH_NO_VIRT_TO_BUS
Vineet Gupta4adeefe2013-01-18 15:12:18 +053012 select CLONE_BACKWARDS
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053013 # ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
14 select DEVTMPFS if !INITRAMFS_SOURCE=""
15 select GENERIC_ATOMIC64
16 select GENERIC_CLOCKEVENTS
17 select GENERIC_FIND_FIRST_BIT
18 # for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
19 select GENERIC_IRQ_SHOW
Vineet Guptabf90e1e2013-01-18 15:12:18 +053020 select GENERIC_KERNEL_EXECVE
21 select GENERIC_KERNEL_THREAD
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053022 select GENERIC_PENDING_IRQ if SMP
Vineet Guptac3581032013-01-18 15:12:19 +053023 select GENERIC_SIGALTSTACK
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053024 select GENERIC_SMP_IDLE_THREAD
25 select HAVE_GENERIC_HARDIRQS
Vineet Guptac121c502013-01-18 15:12:20 +053026 select HAVE_MEMBLOCK
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053027 select MODULES_USE_ELF_RELA
Vineet Guptac121c502013-01-18 15:12:20 +053028 select NO_BOOTMEM
Vineet Guptacfdbc2e2013-01-18 15:12:20 +053029
30config SCHED_OMIT_FRAME_POINTER
31 def_bool y
32
33config GENERIC_CSUM
34 def_bool y
35
36config RWSEM_GENERIC_SPINLOCK
37 def_bool y
38
39config ARCH_FLATMEM_ENABLE
40 def_bool y
41
42config MMU
43 def_bool y
44
45config NO_IOPORT
46 def_bool y
47
48config GENERIC_CALIBRATE_DELAY
49 def_bool y
50
51config GENERIC_HWEIGHT
52 def_bool y
53
54config BINFMT_ELF
55 def_bool y
56
57config HAVE_LATENCYTOP_SUPPORT
58 def_bool y
59
60config NO_DMA
61 def_bool n
62
63source "init/Kconfig"
64source "kernel/Kconfig.freezer"
65
66menu "ARC Architecture Configuration"
67
68choice
69 prompt "ARC Platform"
70 default ARC_PLAT_FPGA_LEGACY
71
72config ARC_PLAT_FPGA_LEGACY
73 bool "\"Legacy\" ARC FPGA dev platform"
74 help
75 Support for ARC development platforms, provided by Synopsys.
76 These are based on FPGA or ISS. e.g.
77 - ARCAngel4
78 - ML509
79 - MetaWare ISS
80
81#New platform adds here
82endchoice
83
84menu "ARC CPU Configuration"
85
86choice
87 prompt "ARC Core"
88 default ARC_CPU_770
89
90config ARC_CPU_750D
91 bool "ARC750D"
92 help
93 Support for ARC750 core
94
95config ARC_CPU_770
96 bool "ARC770"
97 select ARC_CPU_REL_4_10
98 help
99 Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
100 This core has a bunch of cool new features:
101 -MMU-v3: Variable Page Sz (4k, 8k, 16k), bigger J-TLB (128x4)
102 Shared Address Spaces (for sharing TLB entires in MMU)
103 -Caches: New Prog Model, Region Flush
104 -Insns: endian swap, load-locked/store-conditional, time-stamp-ctr
105
106endchoice
107
108config CPU_BIG_ENDIAN
109 bool "Enable Big Endian Mode"
110 default n
111 help
112 Build kernel for Big Endian Mode of ARC CPU
113
114menuconfig ARC_CACHE
115 bool "Enable Cache Support"
116 default y
117
118if ARC_CACHE
119
120config ARC_CACHE_LINE_SHIFT
121 int "Cache Line Length (as power of 2)"
122 range 5 7
123 default "6"
124 help
125 Starting with ARC700 4.9, Cache line length is configurable,
126 This option specifies "N", with Line-len = 2 power N
127 So line lengths of 32, 64, 128 are specified by 5,6,7, respectively
128 Linux only supports same line lengths for I and D caches.
129
130config ARC_HAS_ICACHE
131 bool "Use Instruction Cache"
132 default y
133
134config ARC_HAS_DCACHE
135 bool "Use Data Cache"
136 default y
137
138config ARC_CACHE_PAGES
139 bool "Per Page Cache Control"
140 default y
141 depends on ARC_HAS_ICACHE || ARC_HAS_DCACHE
142 help
143 This can be used to over-ride the global I/D Cache Enable on a
144 per-page basis (but only for pages accessed via MMU such as
145 Kernel Virtual address or User Virtual Address)
146 TLB entries have a per-page Cache Enable Bit.
147 Note that Global I/D ENABLE + Per Page DISABLE works but corollary
148 Global DISABLE + Per Page ENABLE won't work
149
150endif #ARC_CACHE
151
152config ARC_HAS_HW_MPY
153 bool "Use Hardware Multiplier (Normal or Faster XMAC)"
154 default y
155 help
156 Influences how gcc generates code for MPY operations.
157 If enabled, MPYxx insns are generated, provided by Standard/XMAC
158 Multipler. Otherwise software multipy lib is used
159
160choice
161 prompt "ARC700 MMU Version"
162 default ARC_MMU_V3 if ARC_CPU_770
163 default ARC_MMU_V2 if ARC_CPU_750D
164
165config ARC_MMU_V1
166 bool "MMU v1"
167 help
168 Orig ARC700 MMU
169
170config ARC_MMU_V2
171 bool "MMU v2"
172 help
173 Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio
174 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
175
176config ARC_MMU_V3
177 bool "MMU v3"
178 depends on ARC_CPU_770
179 help
180 Introduced with ARC700 4.10: New Features
181 Variable Page size (1k-16k), var JTLB size 128 x (2 or 4)
182 Shared Address Spaces (SASID)
183
184endchoice
185
186
187choice
188 prompt "MMU Page Size"
189 default ARC_PAGE_SIZE_8K
190
191config ARC_PAGE_SIZE_8K
192 bool "8KB"
193 help
194 Choose between 8k vs 16k
195
196config ARC_PAGE_SIZE_16K
197 bool "16KB"
198 depends on ARC_MMU_V3
199
200config ARC_PAGE_SIZE_4K
201 bool "4KB"
202 depends on ARC_MMU_V3
203
204endchoice
205
206config ARC_FPU_SAVE_RESTORE
207 bool "Enable FPU state persistence across context switch"
208 default n
209 help
210 Double Precision Floating Point unit had dedictaed regs which
211 need to be saved/restored across context-switch.
212 Note that ARC FPU is overly simplistic, unlike say x86, which has
213 hardware pieces to allow software to conditionally save/restore,
214 based on actual usage of FPU by a task. Thus our implemn does
215 this for all tasks in system.
216
217menuconfig ARC_CPU_REL_4_10
218 bool "Enable support for Rel 4.10 features"
219 default n
220 help
221 -ARC770 (and dependent features) enabled
222 -ARC750 also shares some of the new features with 770
223
224config ARC_HAS_LLSC
225 bool "Insn: LLOCK/SCOND (efficient atomic ops)"
226 default y
227 depends on ARC_CPU_770
228 # if SMP, enable LLSC ONLY if ARC implementation has coherent atomics
229 depends on !SMP || ARC_HAS_COH_LLSC
230
231config ARC_HAS_SWAPE
232 bool "Insn: SWAPE (endian-swap)"
233 default y
234 depends on ARC_CPU_REL_4_10
235
236config ARC_HAS_RTSC
237 bool "Insn: RTSC (64-bit r/o cycle counter)"
238 default y
239 depends on ARC_CPU_REL_4_10
240
241endmenu # "ARC CPU Configuration"
242
243menu "Platform Board Configuration"
244
245source "arch/arc/plat-arcfpga/Kconfig"
246
247#New platform adds here
248
249config ARC_PLAT_CLK
250 int "Clk speed in Hz"
251 default "80000000"
252
253config LINUX_LINK_BASE
254 hex "Linux Link Address"
255 default "0x80000000"
256 help
257 ARC700 divides the 32 bit phy address space into two equal halves
258 -Lower 2G (0 - 0x7FFF_FFFF ) is user virtual, translated by MMU
259 -Upper 2G (0x8000_0000 onwards) is untranslated, for kernel
260 Typically Linux kernel is linked at the start of untransalted addr,
261 hence the default value of 0x8zs.
262 However some customers have peripherals mapped at this addr, so
263 Linux needs to be scooted a bit.
264 If you don't know what the above means, leave this setting alone.
265
266config ARC_PLAT_SDRAM_SIZE
267 hex "SD RAM Size"
268 default "0x10000000"
269 help
270 Implies the amount of SDRAM/DRAM Linux is going to claim/own.
271 The actual memory itself could be larger than this number. But for
272 all software purposes, this is the amt of memory.
273
274endmenu # "Platform Board Configuration"
275
276config ARC_STACK_NONEXEC
277 bool "Make stack non-executable"
278 default n
279 help
280 To disable the execute permissions of stack/heap of processes
281 which are enabled by default.
282
283config HZ
284 int "Timer Frequency"
285 default 100
286
287menuconfig ARC_DBG
288 bool "ARC debugging"
289 default y
290
291config ARC_DBG_TLB_PARANOIA
292 bool "Paranoia Checks in Low Level TLB Handlers"
293 depends on ARC_DBG
294 default n
295
296config ARC_DBG_TLB_MISS_COUNT
297 bool "Profile TLB Misses"
298 default n
299 select DEBUG_FS
300 depends on ARC_DBG
301 help
302 Counts number of I and D TLB Misses and exports them via Debugfs
303 The counters can be cleared via Debugfs as well
304
305config CMDLINE
306 string "Kernel command line to built-in"
307 default "print-fatal-signals=1"
308 help
309 The default command line which will be appended to the optional
310 u-boot provided command line (see below)
311
312config CMDLINE_UBOOT
313 bool "Support U-boot kernel command line passing"
314 default n
315 help
316 If you are using U-boot (www.denx.de) and wish to pass the kernel
317 command line from the U-boot environment to the Linux kernel then
318 switch this option on.
319 ARC U-boot will setup the cmdline in RAM/flash and set r2 to point
320 to it. kernel startup code will copy the string into cmdline buffer
321 and also append CONFIG_CMDLINE.
322
323source "kernel/Kconfig.preempt"
324
325endmenu # "ARC Architecture Configuration"
326
327source "mm/Kconfig"
328source "net/Kconfig"
329source "drivers/Kconfig"
330source "fs/Kconfig"
331source "arch/arc/Kconfig.debug"
332source "security/Kconfig"
333source "crypto/Kconfig"
334source "lib/Kconfig"