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qipeng.zha0a8b8352015-06-27 00:32:15 +08001/*
2 * intel_pmc_ipc.c: Driver for the Intel PMC IPC mechanism
3 *
4 * (C) Copyright 2014-2015 Intel Corporation
5 *
6 * This driver is based on Intel SCU IPC driver(intel_scu_opc.c) by
7 * Sreedhara DS <sreedhara.ds@intel.com>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2
12 * of the License.
13 *
14 * PMC running in ARC processor communicates with other entity running in IA
15 * core through IPC mechanism which in turn messaging between IA core ad PMC.
16 */
17
18#include <linux/module.h>
19#include <linux/delay.h>
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/device.h>
23#include <linux/pm.h>
24#include <linux/pci.h>
25#include <linux/platform_device.h>
26#include <linux/interrupt.h>
27#include <linux/pm_qos.h>
28#include <linux/kernel.h>
29#include <linux/bitops.h>
30#include <linux/sched.h>
31#include <linux/atomic.h>
32#include <linux/notifier.h>
33#include <linux/suspend.h>
34#include <linux/acpi.h>
35#include <asm/intel_pmc_ipc.h>
Matt Fleming420b54d2015-08-06 13:46:24 +010036#include <linux/platform_data/itco_wdt.h>
qipeng.zha0a8b8352015-06-27 00:32:15 +080037
38/*
39 * IPC registers
40 * The IA write to IPC_CMD command register triggers an interrupt to the ARC,
41 * The ARC handles the interrupt and services it, writing optional data to
42 * the IPC1 registers, updates the IPC_STS response register with the status.
43 */
44#define IPC_CMD 0x0
45#define IPC_CMD_MSI 0x100
46#define IPC_CMD_SIZE 16
47#define IPC_CMD_SUBCMD 12
48#define IPC_STATUS 0x04
49#define IPC_STATUS_IRQ 0x4
50#define IPC_STATUS_ERR 0x2
51#define IPC_STATUS_BUSY 0x1
52#define IPC_SPTR 0x08
53#define IPC_DPTR 0x0C
54#define IPC_WRITE_BUFFER 0x80
55#define IPC_READ_BUFFER 0x90
56
57/*
58 * 16-byte buffer for sending data associated with IPC command.
59 */
60#define IPC_DATA_BUFFER_SIZE 16
61
62#define IPC_LOOP_CNT 3000000
63#define IPC_MAX_SEC 3
64
65#define IPC_TRIGGER_MODE_IRQ true
66
67/* exported resources from IFWI */
68#define PLAT_RESOURCE_IPC_INDEX 0
69#define PLAT_RESOURCE_IPC_SIZE 0x1000
Qipeng Zha1a2f25d2016-02-18 02:03:37 +080070#define PLAT_RESOURCE_GCR_OFFSET 0x1008
71#define PLAT_RESOURCE_GCR_SIZE 0x4
Qipeng Zha8cc7fb42015-12-11 22:44:59 +080072#define PLAT_RESOURCE_BIOS_DATA_INDEX 1
73#define PLAT_RESOURCE_BIOS_IFACE_INDEX 2
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +053074#define PLAT_RESOURCE_TELEM_SSRAM_INDEX 3
Qipeng Zha8cc7fb42015-12-11 22:44:59 +080075#define PLAT_RESOURCE_ISP_DATA_INDEX 4
76#define PLAT_RESOURCE_ISP_IFACE_INDEX 5
77#define PLAT_RESOURCE_GTD_DATA_INDEX 6
78#define PLAT_RESOURCE_GTD_IFACE_INDEX 7
qipeng.zha0a8b8352015-06-27 00:32:15 +080079#define PLAT_RESOURCE_ACPI_IO_INDEX 0
80
81/*
82 * BIOS does not create an ACPI device for each PMC function,
83 * but exports multiple resources from one ACPI device(IPC) for
84 * multiple functions. This driver is responsible to create a
85 * platform device and to export resources for those functions.
86 */
87#define TCO_DEVICE_NAME "iTCO_wdt"
Yong, Jonathan334da2d2016-06-17 00:33:32 +000088#define SMI_EN_OFFSET 0x40
qipeng.zha0a8b8352015-06-27 00:32:15 +080089#define SMI_EN_SIZE 4
90#define TCO_BASE_OFFSET 0x60
91#define TCO_REGS_SIZE 16
92#define PUNIT_DEVICE_NAME "intel_punit_ipc"
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +053093#define TELEMETRY_DEVICE_NAME "intel_telemetry"
94#define TELEM_SSRAM_SIZE 240
95#define TELEM_PMC_SSRAM_OFFSET 0x1B00
96#define TELEM_PUNIT_SSRAM_OFFSET 0x1A00
Yong, Jonathan334da2d2016-06-17 00:33:32 +000097#define TCO_PMC_OFFSET 0x8
98#define TCO_PMC_SIZE 0x4
qipeng.zha0a8b8352015-06-27 00:32:15 +080099
100static const int iTCO_version = 3;
101
102static struct intel_pmc_ipc_dev {
103 struct device *dev;
104 void __iomem *ipc_base;
105 bool irq_mode;
106 int irq;
107 int cmd;
108 struct completion cmd_complete;
109
110 /* The following PMC BARs share the same ACPI device with the IPC */
qipeng.zhab78fb512015-07-07 00:04:45 +0800111 resource_size_t acpi_io_base;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800112 int acpi_io_size;
113 struct platform_device *tco_dev;
114
115 /* gcr */
qipeng.zhab78fb512015-07-07 00:04:45 +0800116 resource_size_t gcr_base;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800117 int gcr_size;
118
119 /* punit */
qipeng.zha0a8b8352015-06-27 00:32:15 +0800120 struct platform_device *punit_dev;
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530121
122 /* Telemetry */
123 resource_size_t telem_pmc_ssram_base;
124 resource_size_t telem_punit_ssram_base;
125 int telem_pmc_ssram_size;
126 int telem_punit_ssram_size;
127 u8 telem_res_inval;
128 struct platform_device *telemetry_dev;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800129} ipcdev;
130
131static char *ipc_err_sources[] = {
132 [IPC_ERR_NONE] =
133 "no error",
134 [IPC_ERR_CMD_NOT_SUPPORTED] =
135 "command not supported",
136 [IPC_ERR_CMD_NOT_SERVICED] =
137 "command not serviced",
138 [IPC_ERR_UNABLE_TO_SERVICE] =
139 "unable to service",
140 [IPC_ERR_CMD_INVALID] =
141 "command invalid",
142 [IPC_ERR_CMD_FAILED] =
143 "command failed",
144 [IPC_ERR_EMSECURITY] =
145 "Invalid Battery",
146 [IPC_ERR_UNSIGNEDKERNEL] =
147 "Unsigned kernel",
148};
149
150/* Prevent concurrent calls to the PMC */
151static DEFINE_MUTEX(ipclock);
152
153static inline void ipc_send_command(u32 cmd)
154{
155 ipcdev.cmd = cmd;
156 if (ipcdev.irq_mode) {
157 reinit_completion(&ipcdev.cmd_complete);
158 cmd |= IPC_CMD_MSI;
159 }
160 writel(cmd, ipcdev.ipc_base + IPC_CMD);
161}
162
163static inline u32 ipc_read_status(void)
164{
165 return readl(ipcdev.ipc_base + IPC_STATUS);
166}
167
168static inline void ipc_data_writel(u32 data, u32 offset)
169{
170 writel(data, ipcdev.ipc_base + IPC_WRITE_BUFFER + offset);
171}
172
173static inline u8 ipc_data_readb(u32 offset)
174{
175 return readb(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
176}
177
178static inline u32 ipc_data_readl(u32 offset)
179{
180 return readl(ipcdev.ipc_base + IPC_READ_BUFFER + offset);
181}
182
183static int intel_pmc_ipc_check_status(void)
184{
185 int status;
186 int ret = 0;
187
188 if (ipcdev.irq_mode) {
189 if (0 == wait_for_completion_timeout(
190 &ipcdev.cmd_complete, IPC_MAX_SEC * HZ))
191 ret = -ETIMEDOUT;
192 } else {
193 int loop_count = IPC_LOOP_CNT;
194
195 while ((ipc_read_status() & IPC_STATUS_BUSY) && --loop_count)
196 udelay(1);
197 if (loop_count == 0)
198 ret = -ETIMEDOUT;
199 }
200
201 status = ipc_read_status();
202 if (ret == -ETIMEDOUT) {
203 dev_err(ipcdev.dev,
204 "IPC timed out, TS=0x%x, CMD=0x%x\n",
205 status, ipcdev.cmd);
206 return ret;
207 }
208
209 if (status & IPC_STATUS_ERR) {
210 int i;
211
212 ret = -EIO;
213 i = (status >> IPC_CMD_SIZE) & 0xFF;
214 if (i < ARRAY_SIZE(ipc_err_sources))
215 dev_err(ipcdev.dev,
216 "IPC failed: %s, STS=0x%x, CMD=0x%x\n",
217 ipc_err_sources[i], status, ipcdev.cmd);
218 else
219 dev_err(ipcdev.dev,
220 "IPC failed: unknown, STS=0x%x, CMD=0x%x\n",
221 status, ipcdev.cmd);
222 if ((i == IPC_ERR_UNSIGNEDKERNEL) || (i == IPC_ERR_EMSECURITY))
223 ret = -EACCES;
224 }
225
226 return ret;
227}
228
qipeng.zha02941002015-07-09 00:14:15 +0800229/**
230 * intel_pmc_ipc_simple_command() - Simple IPC command
231 * @cmd: IPC command code.
232 * @sub: IPC command sub type.
233 *
234 * Send a simple IPC command to PMC when don't need to specify
235 * input/output data and source/dest pointers.
236 *
237 * Return: an IPC error code or 0 on success.
qipeng.zha0a8b8352015-06-27 00:32:15 +0800238 */
239int intel_pmc_ipc_simple_command(int cmd, int sub)
240{
241 int ret;
242
243 mutex_lock(&ipclock);
244 if (ipcdev.dev == NULL) {
245 mutex_unlock(&ipclock);
246 return -ENODEV;
247 }
248 ipc_send_command(sub << IPC_CMD_SUBCMD | cmd);
249 ret = intel_pmc_ipc_check_status();
250 mutex_unlock(&ipclock);
251
252 return ret;
253}
254EXPORT_SYMBOL_GPL(intel_pmc_ipc_simple_command);
255
qipeng.zha02941002015-07-09 00:14:15 +0800256/**
257 * intel_pmc_ipc_raw_cmd() - IPC command with data and pointers
258 * @cmd: IPC command code.
259 * @sub: IPC command sub type.
260 * @in: input data of this IPC command.
261 * @inlen: input data length in bytes.
262 * @out: output data of this IPC command.
263 * @outlen: output data length in dwords.
264 * @sptr: data writing to SPTR register.
265 * @dptr: data writing to DPTR register.
266 *
267 * Send an IPC command to PMC with input/output data and source/dest pointers.
268 *
269 * Return: an IPC error code or 0 on success.
qipeng.zha0a8b8352015-06-27 00:32:15 +0800270 */
271int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen, u32 *out,
272 u32 outlen, u32 dptr, u32 sptr)
273{
274 u32 wbuf[4] = { 0 };
275 int ret;
276 int i;
277
278 if (inlen > IPC_DATA_BUFFER_SIZE || outlen > IPC_DATA_BUFFER_SIZE / 4)
279 return -EINVAL;
280
281 mutex_lock(&ipclock);
282 if (ipcdev.dev == NULL) {
283 mutex_unlock(&ipclock);
284 return -ENODEV;
285 }
286 memcpy(wbuf, in, inlen);
287 writel(dptr, ipcdev.ipc_base + IPC_DPTR);
288 writel(sptr, ipcdev.ipc_base + IPC_SPTR);
289 /* The input data register is 32bit register and inlen is in Byte */
290 for (i = 0; i < ((inlen + 3) / 4); i++)
291 ipc_data_writel(wbuf[i], 4 * i);
292 ipc_send_command((inlen << IPC_CMD_SIZE) |
293 (sub << IPC_CMD_SUBCMD) | cmd);
294 ret = intel_pmc_ipc_check_status();
295 if (!ret) {
296 /* out is read from 32bit register and outlen is in 32bit */
297 for (i = 0; i < outlen; i++)
298 *out++ = ipc_data_readl(4 * i);
299 }
300 mutex_unlock(&ipclock);
301
302 return ret;
303}
304EXPORT_SYMBOL_GPL(intel_pmc_ipc_raw_cmd);
305
qipeng.zha02941002015-07-09 00:14:15 +0800306/**
307 * intel_pmc_ipc_command() - IPC command with input/output data
308 * @cmd: IPC command code.
309 * @sub: IPC command sub type.
310 * @in: input data of this IPC command.
311 * @inlen: input data length in bytes.
312 * @out: output data of this IPC command.
313 * @outlen: output data length in dwords.
314 *
315 * Send an IPC command to PMC with input/output data.
316 *
317 * Return: an IPC error code or 0 on success.
qipeng.zha0a8b8352015-06-27 00:32:15 +0800318 */
319int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
320 u32 *out, u32 outlen)
321{
322 return intel_pmc_ipc_raw_cmd(cmd, sub, in, inlen, out, outlen, 0, 0);
323}
324EXPORT_SYMBOL_GPL(intel_pmc_ipc_command);
325
326static irqreturn_t ioc(int irq, void *dev_id)
327{
328 int status;
329
330 if (ipcdev.irq_mode) {
331 status = ipc_read_status();
332 writel(status | IPC_STATUS_IRQ, ipcdev.ipc_base + IPC_STATUS);
333 }
334 complete(&ipcdev.cmd_complete);
335
336 return IRQ_HANDLED;
337}
338
339static int ipc_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
340{
341 resource_size_t pci_resource;
342 int ret;
343 int len;
344
345 ipcdev.dev = &pci_dev_get(pdev)->dev;
346 ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;
347
348 ret = pci_enable_device(pdev);
349 if (ret)
350 return ret;
351
352 ret = pci_request_regions(pdev, "intel_pmc_ipc");
353 if (ret)
354 return ret;
355
356 pci_resource = pci_resource_start(pdev, 0);
357 len = pci_resource_len(pdev, 0);
358 if (!pci_resource || !len) {
359 dev_err(&pdev->dev, "Failed to get resource\n");
360 return -ENOMEM;
361 }
362
363 init_completion(&ipcdev.cmd_complete);
364
365 if (request_irq(pdev->irq, ioc, 0, "intel_pmc_ipc", &ipcdev)) {
366 dev_err(&pdev->dev, "Failed to request irq\n");
367 return -EBUSY;
368 }
369
370 ipcdev.ipc_base = ioremap_nocache(pci_resource, len);
371 if (!ipcdev.ipc_base) {
372 dev_err(&pdev->dev, "Failed to ioremap ipc base\n");
373 free_irq(pdev->irq, &ipcdev);
374 ret = -ENOMEM;
375 }
376
377 return ret;
378}
379
380static void ipc_pci_remove(struct pci_dev *pdev)
381{
382 free_irq(pdev->irq, &ipcdev);
383 pci_release_regions(pdev);
384 pci_dev_put(pdev);
385 iounmap(ipcdev.ipc_base);
386 ipcdev.dev = NULL;
387}
388
389static const struct pci_device_id ipc_pci_ids[] = {
390 {PCI_VDEVICE(INTEL, 0x0a94), 0},
391 {PCI_VDEVICE(INTEL, 0x1a94), 0},
392 { 0,}
393};
394MODULE_DEVICE_TABLE(pci, ipc_pci_ids);
395
396static struct pci_driver ipc_pci_driver = {
397 .name = "intel_pmc_ipc",
398 .id_table = ipc_pci_ids,
399 .probe = ipc_pci_probe,
400 .remove = ipc_pci_remove,
401};
402
403static ssize_t intel_pmc_ipc_simple_cmd_store(struct device *dev,
404 struct device_attribute *attr,
405 const char *buf, size_t count)
406{
407 int subcmd;
408 int cmd;
409 int ret;
410
411 ret = sscanf(buf, "%d %d", &cmd, &subcmd);
412 if (ret != 2) {
413 dev_err(dev, "Error args\n");
414 return -EINVAL;
415 }
416
417 ret = intel_pmc_ipc_simple_command(cmd, subcmd);
418 if (ret) {
419 dev_err(dev, "command %d error with %d\n", cmd, ret);
420 return ret;
421 }
422 return (ssize_t)count;
423}
424
425static ssize_t intel_pmc_ipc_northpeak_store(struct device *dev,
426 struct device_attribute *attr,
427 const char *buf, size_t count)
428{
429 unsigned long val;
430 int subcmd;
431 int ret;
432
433 if (kstrtoul(buf, 0, &val))
434 return -EINVAL;
435
436 if (val)
437 subcmd = 1;
438 else
439 subcmd = 0;
440 ret = intel_pmc_ipc_simple_command(PMC_IPC_NORTHPEAK_CTRL, subcmd);
441 if (ret) {
442 dev_err(dev, "command north %d error with %d\n", subcmd, ret);
443 return ret;
444 }
445 return (ssize_t)count;
446}
447
448static DEVICE_ATTR(simplecmd, S_IWUSR,
449 NULL, intel_pmc_ipc_simple_cmd_store);
450static DEVICE_ATTR(northpeak, S_IWUSR,
451 NULL, intel_pmc_ipc_northpeak_store);
452
453static struct attribute *intel_ipc_attrs[] = {
454 &dev_attr_northpeak.attr,
455 &dev_attr_simplecmd.attr,
456 NULL
457};
458
459static const struct attribute_group intel_ipc_group = {
460 .attrs = intel_ipc_attrs,
461};
462
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800463static struct resource punit_res_array[] = {
464 /* Punit BIOS */
465 {
466 .flags = IORESOURCE_MEM,
467 },
468 {
469 .flags = IORESOURCE_MEM,
470 },
471 /* Punit ISP */
472 {
473 .flags = IORESOURCE_MEM,
474 },
475 {
476 .flags = IORESOURCE_MEM,
477 },
478 /* Punit GTD */
qipeng.zha0a8b8352015-06-27 00:32:15 +0800479 {
480 .flags = IORESOURCE_MEM,
481 },
482 {
483 .flags = IORESOURCE_MEM,
484 },
485};
486
487#define TCO_RESOURCE_ACPI_IO 0
488#define TCO_RESOURCE_SMI_EN_IO 1
489#define TCO_RESOURCE_GCR_MEM 2
490static struct resource tco_res[] = {
491 /* ACPI - TCO */
492 {
493 .flags = IORESOURCE_IO,
494 },
495 /* ACPI - SMI */
496 {
497 .flags = IORESOURCE_IO,
498 },
499 /* GCS */
500 {
501 .flags = IORESOURCE_MEM,
502 },
503};
504
Matt Fleming420b54d2015-08-06 13:46:24 +0100505static struct itco_wdt_platform_data tco_info = {
qipeng.zha0a8b8352015-06-27 00:32:15 +0800506 .name = "Apollo Lake SoC",
Yong, Jonathan334da2d2016-06-17 00:33:32 +0000507 .version = 5,
qipeng.zha0a8b8352015-06-27 00:32:15 +0800508};
509
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530510#define TELEMETRY_RESOURCE_PUNIT_SSRAM 0
511#define TELEMETRY_RESOURCE_PMC_SSRAM 1
512static struct resource telemetry_res[] = {
513 /*Telemetry*/
514 {
515 .flags = IORESOURCE_MEM,
516 },
517 {
518 .flags = IORESOURCE_MEM,
519 },
520};
521
qipeng.zha0a8b8352015-06-27 00:32:15 +0800522static int ipc_create_punit_device(void)
523{
524 struct platform_device *pdev;
Axel Linea1a76b2016-09-24 11:54:08 +0800525 const struct platform_device_info pdevinfo = {
526 .parent = ipcdev.dev,
527 .name = PUNIT_DEVICE_NAME,
528 .id = -1,
529 .res = punit_res_array,
530 .num_res = ARRAY_SIZE(punit_res_array),
531 };
qipeng.zha0a8b8352015-06-27 00:32:15 +0800532
Axel Linea1a76b2016-09-24 11:54:08 +0800533 pdev = platform_device_register_full(&pdevinfo);
534 if (IS_ERR(pdev))
535 return PTR_ERR(pdev);
qipeng.zha0a8b8352015-06-27 00:32:15 +0800536
qipeng.zha0a8b8352015-06-27 00:32:15 +0800537 ipcdev.punit_dev = pdev;
538
539 return 0;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800540}
541
542static int ipc_create_tco_device(void)
543{
544 struct platform_device *pdev;
545 struct resource *res;
Axel Linea1a76b2016-09-24 11:54:08 +0800546 const struct platform_device_info pdevinfo = {
547 .parent = ipcdev.dev,
548 .name = TCO_DEVICE_NAME,
549 .id = -1,
550 .res = tco_res,
551 .num_res = ARRAY_SIZE(tco_res),
552 .data = &tco_info,
553 .size_data = sizeof(tco_info),
554 };
qipeng.zha0a8b8352015-06-27 00:32:15 +0800555
556 res = tco_res + TCO_RESOURCE_ACPI_IO;
qipeng.zhab78fb512015-07-07 00:04:45 +0800557 res->start = ipcdev.acpi_io_base + TCO_BASE_OFFSET;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800558 res->end = res->start + TCO_REGS_SIZE - 1;
559
560 res = tco_res + TCO_RESOURCE_SMI_EN_IO;
qipeng.zhab78fb512015-07-07 00:04:45 +0800561 res->start = ipcdev.acpi_io_base + SMI_EN_OFFSET;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800562 res->end = res->start + SMI_EN_SIZE - 1;
563
564 res = tco_res + TCO_RESOURCE_GCR_MEM;
Yong, Jonathan334da2d2016-06-17 00:33:32 +0000565 res->start = ipcdev.gcr_base + TCO_PMC_OFFSET;
566 res->end = res->start + TCO_PMC_SIZE - 1;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800567
Axel Linea1a76b2016-09-24 11:54:08 +0800568 pdev = platform_device_register_full(&pdevinfo);
569 if (IS_ERR(pdev))
570 return PTR_ERR(pdev);
qipeng.zha0a8b8352015-06-27 00:32:15 +0800571
qipeng.zha0a8b8352015-06-27 00:32:15 +0800572 ipcdev.tco_dev = pdev;
573
574 return 0;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800575}
576
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530577static int ipc_create_telemetry_device(void)
578{
579 struct platform_device *pdev;
580 struct resource *res;
Axel Linea1a76b2016-09-24 11:54:08 +0800581 const struct platform_device_info pdevinfo = {
582 .parent = ipcdev.dev,
583 .name = TELEMETRY_DEVICE_NAME,
584 .id = -1,
585 .res = telemetry_res,
586 .num_res = ARRAY_SIZE(telemetry_res),
587 };
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530588
589 res = telemetry_res + TELEMETRY_RESOURCE_PUNIT_SSRAM;
590 res->start = ipcdev.telem_punit_ssram_base;
591 res->end = res->start + ipcdev.telem_punit_ssram_size - 1;
592
593 res = telemetry_res + TELEMETRY_RESOURCE_PMC_SSRAM;
594 res->start = ipcdev.telem_pmc_ssram_base;
595 res->end = res->start + ipcdev.telem_pmc_ssram_size - 1;
596
Axel Linea1a76b2016-09-24 11:54:08 +0800597 pdev = platform_device_register_full(&pdevinfo);
598 if (IS_ERR(pdev))
599 return PTR_ERR(pdev);
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530600
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530601 ipcdev.telemetry_dev = pdev;
602
603 return 0;
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530604}
605
qipeng.zha0a8b8352015-06-27 00:32:15 +0800606static int ipc_create_pmc_devices(void)
607{
608 int ret;
609
Mika Westerbergbba65292016-09-20 15:30:54 +0300610 /* If we have ACPI based watchdog use that instead */
611 if (!acpi_has_watchdog()) {
612 ret = ipc_create_tco_device();
613 if (ret) {
614 dev_err(ipcdev.dev, "Failed to add tco platform device\n");
615 return ret;
616 }
qipeng.zha0a8b8352015-06-27 00:32:15 +0800617 }
Mika Westerbergbba65292016-09-20 15:30:54 +0300618
qipeng.zha0a8b8352015-06-27 00:32:15 +0800619 ret = ipc_create_punit_device();
620 if (ret) {
621 dev_err(ipcdev.dev, "Failed to add punit platform device\n");
622 platform_device_unregister(ipcdev.tco_dev);
Junxiao Chang7fddf0c2019-04-08 17:40:22 +0800623 return ret;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800624 }
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530625
626 if (!ipcdev.telem_res_inval) {
627 ret = ipc_create_telemetry_device();
Junxiao Chang7fddf0c2019-04-08 17:40:22 +0800628 if (ret) {
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530629 dev_warn(ipcdev.dev,
630 "Failed to add telemetry platform device\n");
Junxiao Chang7fddf0c2019-04-08 17:40:22 +0800631 platform_device_unregister(ipcdev.punit_dev);
632 platform_device_unregister(ipcdev.tco_dev);
633 }
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530634 }
635
qipeng.zha0a8b8352015-06-27 00:32:15 +0800636 return ret;
637}
638
639static int ipc_plat_get_res(struct platform_device *pdev)
640{
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800641 struct resource *res, *punit_res;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800642 void __iomem *addr;
643 int size;
644
645 res = platform_get_resource(pdev, IORESOURCE_IO,
646 PLAT_RESOURCE_ACPI_IO_INDEX);
647 if (!res) {
648 dev_err(&pdev->dev, "Failed to get io resource\n");
649 return -ENXIO;
650 }
651 size = resource_size(res);
qipeng.zhab78fb512015-07-07 00:04:45 +0800652 ipcdev.acpi_io_base = res->start;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800653 ipcdev.acpi_io_size = size;
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800654 dev_info(&pdev->dev, "io res: %pR\n", res);
qipeng.zha0a8b8352015-06-27 00:32:15 +0800655
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800656 punit_res = punit_res_array;
Aubrey Li5d071632016-03-31 14:28:09 -0500657 /* This is index 0 to cover BIOS data register */
qipeng.zha0a8b8352015-06-27 00:32:15 +0800658 res = platform_get_resource(pdev, IORESOURCE_MEM,
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800659 PLAT_RESOURCE_BIOS_DATA_INDEX);
qipeng.zha0a8b8352015-06-27 00:32:15 +0800660 if (!res) {
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800661 dev_err(&pdev->dev, "Failed to get res of punit BIOS data\n");
qipeng.zha0a8b8352015-06-27 00:32:15 +0800662 return -ENXIO;
663 }
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800664 *punit_res = *res;
665 dev_info(&pdev->dev, "punit BIOS data res: %pR\n", res);
qipeng.zha0a8b8352015-06-27 00:32:15 +0800666
Aubrey Li5d071632016-03-31 14:28:09 -0500667 /* This is index 1 to cover BIOS interface register */
qipeng.zha0a8b8352015-06-27 00:32:15 +0800668 res = platform_get_resource(pdev, IORESOURCE_MEM,
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800669 PLAT_RESOURCE_BIOS_IFACE_INDEX);
qipeng.zha0a8b8352015-06-27 00:32:15 +0800670 if (!res) {
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800671 dev_err(&pdev->dev, "Failed to get res of punit BIOS iface\n");
qipeng.zha0a8b8352015-06-27 00:32:15 +0800672 return -ENXIO;
673 }
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800674 *++punit_res = *res;
675 dev_info(&pdev->dev, "punit BIOS interface res: %pR\n", res);
676
Aubrey Li5d071632016-03-31 14:28:09 -0500677 /* This is index 2 to cover ISP data register, optional */
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800678 res = platform_get_resource(pdev, IORESOURCE_MEM,
679 PLAT_RESOURCE_ISP_DATA_INDEX);
Aubrey Li5d071632016-03-31 14:28:09 -0500680 ++punit_res;
681 if (res) {
682 *punit_res = *res;
683 dev_info(&pdev->dev, "punit ISP data res: %pR\n", res);
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800684 }
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800685
Aubrey Li5d071632016-03-31 14:28:09 -0500686 /* This is index 3 to cover ISP interface register, optional */
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800687 res = platform_get_resource(pdev, IORESOURCE_MEM,
688 PLAT_RESOURCE_ISP_IFACE_INDEX);
Aubrey Li5d071632016-03-31 14:28:09 -0500689 ++punit_res;
690 if (res) {
691 *punit_res = *res;
692 dev_info(&pdev->dev, "punit ISP interface res: %pR\n", res);
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800693 }
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800694
Aubrey Li5d071632016-03-31 14:28:09 -0500695 /* This is index 4 to cover GTD data register, optional */
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800696 res = platform_get_resource(pdev, IORESOURCE_MEM,
697 PLAT_RESOURCE_GTD_DATA_INDEX);
Aubrey Li5d071632016-03-31 14:28:09 -0500698 ++punit_res;
699 if (res) {
700 *punit_res = *res;
701 dev_info(&pdev->dev, "punit GTD data res: %pR\n", res);
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800702 }
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800703
Aubrey Li5d071632016-03-31 14:28:09 -0500704 /* This is index 5 to cover GTD interface register, optional */
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800705 res = platform_get_resource(pdev, IORESOURCE_MEM,
706 PLAT_RESOURCE_GTD_IFACE_INDEX);
Aubrey Li5d071632016-03-31 14:28:09 -0500707 ++punit_res;
708 if (res) {
709 *punit_res = *res;
710 dev_info(&pdev->dev, "punit GTD interface res: %pR\n", res);
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800711 }
qipeng.zha0a8b8352015-06-27 00:32:15 +0800712
713 res = platform_get_resource(pdev, IORESOURCE_MEM,
714 PLAT_RESOURCE_IPC_INDEX);
715 if (!res) {
716 dev_err(&pdev->dev, "Failed to get ipc resource\n");
717 return -ENXIO;
718 }
719 size = PLAT_RESOURCE_IPC_SIZE;
720 if (!request_mem_region(res->start, size, pdev->name)) {
721 dev_err(&pdev->dev, "Failed to request ipc resource\n");
722 return -EBUSY;
723 }
724 addr = ioremap_nocache(res->start, size);
725 if (!addr) {
726 dev_err(&pdev->dev, "I/O memory remapping failed\n");
727 release_mem_region(res->start, size);
728 return -ENOMEM;
729 }
730 ipcdev.ipc_base = addr;
731
Qipeng Zha1a2f25d2016-02-18 02:03:37 +0800732 ipcdev.gcr_base = res->start + PLAT_RESOURCE_GCR_OFFSET;
qipeng.zha0a8b8352015-06-27 00:32:15 +0800733 ipcdev.gcr_size = PLAT_RESOURCE_GCR_SIZE;
Qipeng Zha8cc7fb42015-12-11 22:44:59 +0800734 dev_info(&pdev->dev, "ipc res: %pR\n", res);
qipeng.zha0a8b8352015-06-27 00:32:15 +0800735
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530736 ipcdev.telem_res_inval = 0;
737 res = platform_get_resource(pdev, IORESOURCE_MEM,
738 PLAT_RESOURCE_TELEM_SSRAM_INDEX);
739 if (!res) {
740 dev_err(&pdev->dev, "Failed to get telemetry ssram resource\n");
741 ipcdev.telem_res_inval = 1;
742 } else {
743 ipcdev.telem_punit_ssram_base = res->start +
744 TELEM_PUNIT_SSRAM_OFFSET;
745 ipcdev.telem_punit_ssram_size = TELEM_SSRAM_SIZE;
746 ipcdev.telem_pmc_ssram_base = res->start +
747 TELEM_PMC_SSRAM_OFFSET;
748 ipcdev.telem_pmc_ssram_size = TELEM_SSRAM_SIZE;
749 dev_info(&pdev->dev, "telemetry ssram res: %pR\n", res);
750 }
751
qipeng.zha0a8b8352015-06-27 00:32:15 +0800752 return 0;
753}
754
755#ifdef CONFIG_ACPI
756static const struct acpi_device_id ipc_acpi_ids[] = {
757 { "INT34D2", 0},
758 { }
759};
760MODULE_DEVICE_TABLE(acpi, ipc_acpi_ids);
761#endif
762
763static int ipc_plat_probe(struct platform_device *pdev)
764{
765 struct resource *res;
766 int ret;
767
768 ipcdev.dev = &pdev->dev;
769 ipcdev.irq_mode = IPC_TRIGGER_MODE_IRQ;
770 init_completion(&ipcdev.cmd_complete);
771
772 ipcdev.irq = platform_get_irq(pdev, 0);
773 if (ipcdev.irq < 0) {
774 dev_err(&pdev->dev, "Failed to get irq\n");
775 return -EINVAL;
776 }
777
778 ret = ipc_plat_get_res(pdev);
779 if (ret) {
780 dev_err(&pdev->dev, "Failed to request resource\n");
781 return ret;
782 }
783
784 ret = ipc_create_pmc_devices();
785 if (ret) {
786 dev_err(&pdev->dev, "Failed to create pmc devices\n");
787 goto err_device;
788 }
789
Qipeng Zha1f1ae992016-02-18 02:03:38 +0800790 if (request_irq(ipcdev.irq, ioc, IRQF_NO_SUSPEND,
791 "intel_pmc_ipc", &ipcdev)) {
qipeng.zha0a8b8352015-06-27 00:32:15 +0800792 dev_err(&pdev->dev, "Failed to request irq\n");
793 ret = -EBUSY;
794 goto err_irq;
795 }
796
797 ret = sysfs_create_group(&pdev->dev.kobj, &intel_ipc_group);
798 if (ret) {
799 dev_err(&pdev->dev, "Failed to create sysfs group %d\n",
800 ret);
801 goto err_sys;
802 }
803
804 return 0;
805err_sys:
806 free_irq(ipcdev.irq, &ipcdev);
807err_irq:
808 platform_device_unregister(ipcdev.tco_dev);
809 platform_device_unregister(ipcdev.punit_dev);
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530810 platform_device_unregister(ipcdev.telemetry_dev);
qipeng.zha0a8b8352015-06-27 00:32:15 +0800811err_device:
812 iounmap(ipcdev.ipc_base);
813 res = platform_get_resource(pdev, IORESOURCE_MEM,
814 PLAT_RESOURCE_IPC_INDEX);
815 if (res)
816 release_mem_region(res->start, PLAT_RESOURCE_IPC_SIZE);
817 return ret;
818}
819
820static int ipc_plat_remove(struct platform_device *pdev)
821{
822 struct resource *res;
823
824 sysfs_remove_group(&pdev->dev.kobj, &intel_ipc_group);
825 free_irq(ipcdev.irq, &ipcdev);
826 platform_device_unregister(ipcdev.tco_dev);
827 platform_device_unregister(ipcdev.punit_dev);
Souvik Kumar Chakravarty48c19172016-01-12 16:02:54 +0530828 platform_device_unregister(ipcdev.telemetry_dev);
qipeng.zha0a8b8352015-06-27 00:32:15 +0800829 iounmap(ipcdev.ipc_base);
830 res = platform_get_resource(pdev, IORESOURCE_MEM,
831 PLAT_RESOURCE_IPC_INDEX);
832 if (res)
833 release_mem_region(res->start, PLAT_RESOURCE_IPC_SIZE);
834 ipcdev.dev = NULL;
835 return 0;
836}
837
838static struct platform_driver ipc_plat_driver = {
839 .remove = ipc_plat_remove,
840 .probe = ipc_plat_probe,
841 .driver = {
842 .name = "pmc-ipc-plat",
843 .acpi_match_table = ACPI_PTR(ipc_acpi_ids),
844 },
845};
846
847static int __init intel_pmc_ipc_init(void)
848{
849 int ret;
850
851 ret = platform_driver_register(&ipc_plat_driver);
852 if (ret) {
853 pr_err("Failed to register PMC ipc platform driver\n");
854 return ret;
855 }
856 ret = pci_register_driver(&ipc_pci_driver);
857 if (ret) {
858 pr_err("Failed to register PMC ipc pci driver\n");
859 platform_driver_unregister(&ipc_plat_driver);
860 return ret;
861 }
862 return ret;
863}
864
865static void __exit intel_pmc_ipc_exit(void)
866{
867 pci_unregister_driver(&ipc_pci_driver);
868 platform_driver_unregister(&ipc_plat_driver);
869}
870
871MODULE_AUTHOR("Zha Qipeng <qipeng.zha@intel.com>");
872MODULE_DESCRIPTION("Intel PMC IPC driver");
873MODULE_LICENSE("GPL");
874
875/* Some modules are dependent on this, so init earlier */
876fs_initcall(intel_pmc_ipc_init);
877module_exit(intel_pmc_ipc_exit);