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Jing Zhou8184f312017-01-31 14:06:30 -08001#ifndef __UAPI_CAM_ISP_H__
2#define __UAPI_CAM_ISP_H__
3
4#include "cam_defs.h"
5#include "cam_isp_vfe.h"
6#include "cam_isp_ife.h"
Raja Mallik477ca242019-06-21 14:23:32 +05307#include "cam_cpas.h"
Jing Zhou8184f312017-01-31 14:06:30 -08008
9/* ISP driver name */
10#define CAM_ISP_DEV_NAME "cam-isp"
11
12/* HW type */
13#define CAM_ISP_HW_BASE 0
14#define CAM_ISP_HW_CSID 1
15#define CAM_ISP_HW_VFE 2
16#define CAM_ISP_HW_IFE 3
17#define CAM_ISP_HW_ISPIF 4
18#define CAM_ISP_HW_MAX 5
19
20/* Color Pattern */
21#define CAM_ISP_PATTERN_BAYER_RGRGRG 0
22#define CAM_ISP_PATTERN_BAYER_GRGRGR 1
23#define CAM_ISP_PATTERN_BAYER_BGBGBG 2
24#define CAM_ISP_PATTERN_BAYER_GBGBGB 3
25#define CAM_ISP_PATTERN_YUV_YCBYCR 4
26#define CAM_ISP_PATTERN_YUV_YCRYCB 5
27#define CAM_ISP_PATTERN_YUV_CBYCRY 6
28#define CAM_ISP_PATTERN_YUV_CRYCBY 7
29#define CAM_ISP_PATTERN_MAX 8
30
31/* Usage Type */
32#define CAM_ISP_RES_USAGE_SINGLE 0
33#define CAM_ISP_RES_USAGE_DUAL 1
34#define CAM_ISP_RES_USAGE_MAX 2
35
36/* Resource ID */
37#define CAM_ISP_RES_ID_PORT 0
38#define CAM_ISP_RES_ID_CLK 1
39#define CAM_ISP_RES_ID_MAX 2
40
41/* Resource Type - Type of resource for the resource id
42 * defined in cam_isp_vfe.h, cam_isp_ife.h
43 */
44
45/* Lane Type in input resource for Port */
46#define CAM_ISP_LANE_TYPE_DPHY 0
47#define CAM_ISP_LANE_TYPE_CPHY 1
48#define CAM_ISP_LANE_TYPE_MAX 2
49
50/* ISP Resurce Composite Group ID */
51#define CAM_ISP_RES_COMP_GROUP_NONE 0
52#define CAM_ISP_RES_COMP_GROUP_ID_0 1
53#define CAM_ISP_RES_COMP_GROUP_ID_1 2
54#define CAM_ISP_RES_COMP_GROUP_ID_2 3
55#define CAM_ISP_RES_COMP_GROUP_ID_3 4
56#define CAM_ISP_RES_COMP_GROUP_ID_4 5
57#define CAM_ISP_RES_COMP_GROUP_ID_5 6
58#define CAM_ISP_RES_COMP_GROUP_ID_MAX 6
59
60/* ISP packet opcode for ISP */
61#define CAM_ISP_PACKET_OP_BASE 0
62#define CAM_ISP_PACKET_INIT_DEV 1
63#define CAM_ISP_PACKET_UPDATE_DEV 2
64#define CAM_ISP_PACKET_OP_MAX 3
65
66/* ISP packet meta_data type for command buffer */
67#define CAM_ISP_PACKET_META_BASE 0
68#define CAM_ISP_PACKET_META_LEFT 1
69#define CAM_ISP_PACKET_META_RIGHT 2
70#define CAM_ISP_PACKET_META_COMMON 3
71#define CAM_ISP_PACKET_META_DMI_LEFT 4
72#define CAM_ISP_PACKET_META_DMI_RIGHT 5
73#define CAM_ISP_PACKET_META_DMI_COMMON 6
74#define CAM_ISP_PACKET_META_CLOCK 7
75#define CAM_ISP_PACKET_META_CSID 8
Ravikishore Pampanaff6132e2017-07-27 15:32:31 +053076#define CAM_ISP_PACKET_META_DUAL_CONFIG 9
Harsh Shah9d676dd2017-08-30 16:30:04 -070077#define CAM_ISP_PACKET_META_GENERIC_BLOB_LEFT 10
78#define CAM_ISP_PACKET_META_GENERIC_BLOB_RIGHT 11
79#define CAM_ISP_PACKET_META_GENERIC_BLOB_COMMON 12
Jing Zhou8184f312017-01-31 14:06:30 -080080
Jing Zhou6562f692017-02-15 15:56:54 -080081/* DSP mode */
82#define CAM_ISP_DSP_MODE_NONE 0
83#define CAM_ISP_DSP_MODE_ONE_WAY 1
84#define CAM_ISP_DSP_MODE_ROUND 2
85
Pavan Kumar Chilamkurthi649cdf92017-08-15 01:40:57 -070086/* ISP Generic Cmd Buffer Blob types */
Raja Mallik70d8a932018-12-13 16:22:43 +053087#define CAM_ISP_GENERIC_BLOB_TYPE_HFR_CONFIG 0
88#define CAM_ISP_GENERIC_BLOB_TYPE_CLOCK_CONFIG 1
89#define CAM_ISP_GENERIC_BLOB_TYPE_BW_CONFIG 2
90#define CAM_ISP_GENERIC_BLOB_TYPE_UBWC_CONFIG 3
91#define CAM_ISP_GENERIC_BLOB_TYPE_CSID_CLOCK_CONFIG 4
Raja Mallikfe46d932019-02-12 20:34:07 +053092#define CAM_ISP_GENERIC_BLOB_TYPE_FE_CONFIG 5
Raja Mallik8b88b232019-04-04 14:32:27 +053093#define CAM_ISP_GENERIC_BLOB_TYPE_BW_CONFIG_V2 6
Raja Mallik477ca242019-06-21 14:23:32 +053094#define CAM_ISP_GENERIC_BLOB_TYPE_INIT_FRAME_DROP 10
95
96/* Per Path Usage Data */
97#define CAM_ISP_USAGE_INVALID 0
98#define CAM_ISP_USAGE_LEFT_PX 1
99#define CAM_ISP_USAGE_RIGHT_PX 2
100#define CAM_ISP_USAGE_RDI 3
Jing Zhou8184f312017-01-31 14:06:30 -0800101
102/* Query devices */
103/**
104 * struct cam_isp_dev_cap_info - A cap info for particular hw type
105 *
106 * @hw_type: Hardware type for the cap info
Jing Zhou6562f692017-02-15 15:56:54 -0800107 * @reserved: reserved field for alignment
Jing Zhou8184f312017-01-31 14:06:30 -0800108 * @hw_version: Hardware version
109 *
110 */
111struct cam_isp_dev_cap_info {
112 uint32_t hw_type;
Jing Zhou6562f692017-02-15 15:56:54 -0800113 uint32_t reserved;
Jing Zhou8184f312017-01-31 14:06:30 -0800114 struct cam_hw_version hw_version;
115};
116
117/**
118 * struct cam_isp_query_cap_cmd - ISP query device capability payload
119 *
120 * @device_iommu: returned iommu handles for device
121 * @cdm_iommu: returned iommu handles for cdm
122 * @num_dev: returned number of device capabilities
123 * @reserved: reserved field for alignment
124 * @dev_caps: returned device capability array
125 *
126 */
127struct cam_isp_query_cap_cmd {
128 struct cam_iommu_handle device_iommu;
129 struct cam_iommu_handle cdm_iommu;
130 int32_t num_dev;
131 uint32_t reserved;
132 struct cam_isp_dev_cap_info dev_caps[CAM_ISP_HW_MAX];
133};
134
135/* Acquire Device */
136/**
137 * struct cam_isp_out_port_info - An output port resource info
138 *
139 * @res_type: output resource type defined in file
140 * cam_isp_vfe.h or cam_isp_ife.h
141 * @format: output format of the resource
142 * @wdith: output width in pixels
143 * @height: output height in lines
144 * @comp_grp_id: composite group id for the resource.
145 * @split_point: split point in pixels for the dual VFE.
146 * @secure_mode: flag to tell if output should be run in secure
147 * mode or not. See cam_defs.h for definition
148 * @reserved: reserved field for alignment
149 *
150 */
151struct cam_isp_out_port_info {
152 uint32_t res_type;
153 uint32_t format;
154 uint32_t width;
155 uint32_t height;
156 uint32_t comp_grp_id;
157 uint32_t split_point;
158 uint32_t secure_mode;
159 uint32_t reserved;
160};
161
162/**
163 * struct cam_isp_in_port_info - An input port resource info
164 *
165 * @res_type: input resource type define in file
166 * cam_isp_vfe.h or cam_isp_ife.h
167 * @lane_type: lane type: c-phy or d-phy.
168 * @lane_num: active lane number
169 * @lane_cfg: lane configurations: 4 bits per lane
170 * @vc: input virtual channel number
171 * @dt: input data type number
172 * @format: input format
173 * @test_pattern: test pattern for the testgen
174 * @usage_type: whether dual vfe is required
175 * @left_start: left input start offset in pixels
176 * @left_stop: left input stop offset in pixels
177 * @left_width: left input width in pixels
178 * @right_start: right input start offset in pixels.
179 * Only for Dual VFE
180 * @right_stop: right input stop offset in pixels.
181 * Only for Dual VFE
182 * @right_width: right input width in pixels.
183 * Only for dual VFE
184 * @line_start: top of the line number
185 * @line_stop: bottome of the line number
186 * @height: input height in lines
187 * @pixel_clk; sensor output clock
188 * @batch_size: batch size for HFR mode
Jing Zhou6562f692017-02-15 15:56:54 -0800189 * @dsp_mode: DSP stream mode (Defines as CAM_ISP_DSP_MODE_*)
190 * @hbi_cnt: HBI count for the camif input
191 * @reserved: Reserved field for alignment
Jing Zhou8184f312017-01-31 14:06:30 -0800192 * @num_out_res: number of the output resource associated
193 * @data: payload that contains the output resources
194 *
195 */
196struct cam_isp_in_port_info {
197 uint32_t res_type;
198 uint32_t lane_type;
199 uint32_t lane_num;
200 uint32_t lane_cfg;
201 uint32_t vc;
202 uint32_t dt;
203 uint32_t format;
204 uint32_t test_pattern;
205 uint32_t usage_type;
206 uint32_t left_start;
207 uint32_t left_stop;
208 uint32_t left_width;
209 uint32_t right_start;
210 uint32_t right_stop;
211 uint32_t right_width;
212 uint32_t line_start;
213 uint32_t line_stop;
214 uint32_t height;
215 uint32_t pixel_clk;
216 uint32_t batch_size;
Jing Zhou6562f692017-02-15 15:56:54 -0800217 uint32_t dsp_mode;
218 uint32_t hbi_cnt;
Jing Zhou8184f312017-01-31 14:06:30 -0800219 uint32_t reserved;
220 uint32_t num_out_res;
221 struct cam_isp_out_port_info data[1];
222};
223
224/**
225 * struct cam_isp_resource - A resource bundle
226 *
227 * @resoruce_id: resource id for the resource bundle
228 * @length: length of the while resource blob
229 * @handle_type: type of the resource handle
230 * @reserved: reserved field for alignment
231 * @res_hdl: resource handle that points to the
232 * resource array;
233 *
234 */
235struct cam_isp_resource {
236 uint32_t resource_id;
237 uint32_t length;
238 uint32_t handle_type;
239 uint32_t reserved;
240 uint64_t res_hdl;
241};
242
Pavan Kumar Chilamkurthi649cdf92017-08-15 01:40:57 -0700243/**
244 * struct cam_isp_port_hfr_config - HFR configuration for this port
245 *
246 * @resource_type: Resource type
247 * @subsample_pattern: Subsample pattern. Used in HFR mode. It
248 * should be consistent with batchSize and
249 * CAMIF programming.
250 * @subsample_period: Subsample period. Used in HFR mode. It
251 * should be consistent with batchSize and
252 * CAMIF programming.
253 * @framedrop_pattern: Framedrop pattern
254 * @framedrop_period: Framedrop period
255 * @reserved: Reserved for alignment
256 */
257struct cam_isp_port_hfr_config {
258 uint32_t resource_type;
259 uint32_t subsample_pattern;
260 uint32_t subsample_period;
261 uint32_t framedrop_pattern;
262 uint32_t framedrop_period;
263 uint32_t reserved;
Harsh Shah29102392017-09-21 16:01:47 -0700264} __attribute__((packed));
Pavan Kumar Chilamkurthi649cdf92017-08-15 01:40:57 -0700265
266/**
267 * struct cam_isp_resource_hfr_config - Resource HFR configuration
268 *
Harsh Shah9d676dd2017-08-30 16:30:04 -0700269 * @num_ports: Number of ports
Pavan Kumar Chilamkurthi649cdf92017-08-15 01:40:57 -0700270 * @reserved: Reserved for alignment
Harsh Shah9d676dd2017-08-30 16:30:04 -0700271 * @port_hfr_config: HFR configuration for each IO port
Pavan Kumar Chilamkurthi649cdf92017-08-15 01:40:57 -0700272 */
273struct cam_isp_resource_hfr_config {
Harsh Shah9d676dd2017-08-30 16:30:04 -0700274 uint32_t num_ports;
Pavan Kumar Chilamkurthi649cdf92017-08-15 01:40:57 -0700275 uint32_t reserved;
Harsh Shah9d676dd2017-08-30 16:30:04 -0700276 struct cam_isp_port_hfr_config port_hfr_config[1];
Harsh Shah29102392017-09-21 16:01:47 -0700277} __attribute__((packed));
Pavan Kumar Chilamkurthi649cdf92017-08-15 01:40:57 -0700278
Ravikishore Pampanaff6132e2017-07-27 15:32:31 +0530279/**
280 * struct cam_isp_dual_split_params - dual isp spilt parameters
281 *
282 * @split_point: Split point information x, where (0 < x < width)
283 * left ISP's input ends at x + righ padding and
284 * Right ISP's input starts at x - left padding
285 * @right_padding: Padding added past the split point for left
286 * ISP's input
287 * @left_padding: Padding added before split point for right
288 * ISP's input
289 * @reserved: Reserved filed for alignment
290 *
291 */
292struct cam_isp_dual_split_params {
293 uint32_t split_point;
294 uint32_t right_padding;
295 uint32_t left_padding;
296 uint32_t reserved;
297};
298
299/**
300 * struct cam_isp_dual_stripe_config - stripe config per bus client
301 *
302 * @offset: Start horizontal offset relative to
303 * output buffer
304 * In UBWC mode, this value indicates the H_INIT
305 * value in pixel
306 * @width: Width of the stripe in bytes
307 * @tileconfig Ubwc meta tile config. Contain the partial
308 * tile info
309 * @port_id: port id of ISP output
310 *
311 */
312struct cam_isp_dual_stripe_config {
313 uint32_t offset;
314 uint32_t width;
315 uint32_t tileconfig;
316 uint32_t port_id;
317};
318
319/**
320 * struct cam_isp_dual_config - dual isp configuration
321 *
322 * @num_ports Number of isp output ports
323 * @reserved Reserved field for alignment
324 * @split_params: Inpput split parameters
325 * @stripes: Stripe information
326 *
327 */
328struct cam_isp_dual_config {
329 uint32_t num_ports;
330 uint32_t reserved;
331 struct cam_isp_dual_split_params split_params;
332 struct cam_isp_dual_stripe_config stripes[1];
Harsh Shah29102392017-09-21 16:01:47 -0700333} __attribute__((packed));
334
335/**
336 * struct cam_isp_clock_config - Clock configuration
337 *
338 * @usage_type: Usage type (Single/Dual)
339 * @num_rdi: Number of RDI votes
340 * @left_pix_hz: Pixel Clock for Left ISP
341 * @right_pix_hz: Pixel Clock for Right ISP, valid only if Dual
342 * @rdi_hz: RDI Clock. ISP clock will be max of RDI and
343 * PIX clocks. For a particular context which ISP
344 * HW the RDI is allocated to is not known to UMD.
345 * Hence pass the clock and let KMD decide.
346 */
347struct cam_isp_clock_config {
348 uint32_t usage_type;
349 uint32_t num_rdi;
350 uint64_t left_pix_hz;
351 uint64_t right_pix_hz;
352 uint64_t rdi_hz[1];
353} __attribute__((packed));
354
355/**
Raja Mallik70d8a932018-12-13 16:22:43 +0530356 * struct cam_isp_csid_clock_config - CSID clock configuration
357 *
358 * @csid_clock CSID clock
359 */
360struct cam_isp_csid_clock_config {
361 uint64_t csid_clock;
362} __attribute__((packed));
363
364/**
Harsh Shah29102392017-09-21 16:01:47 -0700365 * struct cam_isp_bw_vote - Bandwidth vote information
366 *
367 * @resource_id: Resource ID
368 * @reserved: Reserved field for alignment
369 * @cam_bw_bps: Bandwidth vote for CAMNOC
370 * @ext_bw_bps: Bandwidth vote for path-to-DDR after CAMNOC
371 */
Harsh Shah29102392017-09-21 16:01:47 -0700372struct cam_isp_bw_vote {
373 uint32_t resource_id;
374 uint32_t reserved;
375 uint64_t cam_bw_bps;
376 uint64_t ext_bw_bps;
377} __attribute__((packed));
378
379/**
380 * struct cam_isp_bw_config - Bandwidth configuration
381 *
382 * @usage_type: Usage type (Single/Dual)
383 * @num_rdi: Number of RDI votes
384 * @left_pix_vote: Bandwidth vote for left ISP
385 * @right_pix_vote: Bandwidth vote for right ISP
386 * @rdi_vote: RDI bandwidth requirements
387 */
Harsh Shah29102392017-09-21 16:01:47 -0700388struct cam_isp_bw_config {
389 uint32_t usage_type;
390 uint32_t num_rdi;
391 struct cam_isp_bw_vote left_pix_vote;
392 struct cam_isp_bw_vote right_pix_vote;
393 struct cam_isp_bw_vote rdi_vote[1];
394} __attribute__((packed));
Ravikishore Pampanaff6132e2017-07-27 15:32:31 +0530395
Raja Mallik8b88b232019-04-04 14:32:27 +0530396
397/**
398 * struct cam_isp_bw_config_ab - Bandwidth configuration
399 *
400 * @usage_type: Usage type (Single/Dual)
401 * @num_rdi: Number of RDI votes
402 * @left_pix_vote_ab: AB Bandwidth vote for left ISP
403 * @right_pix_vote_ab: AB Bandwidth vote for right ISP
404 * @rdi_vote_ab: AB RDI bandwidth requirements
405 */
406
407struct cam_isp_bw_config_ab {
408 uint32_t usage_type;
409 uint32_t num_rdi;
410 uint64_t left_pix_vote_ab;
411 uint64_t right_pix_vote_ab;
412 uint64_t rdi_vote_ab[1];
413} __attribute__((packed));
414
Raja Mallikfe46d932019-02-12 20:34:07 +0530415/**
Raja Mallik477ca242019-06-21 14:23:32 +0530416 * struct cam_isp_bw_config_v2 - Bandwidth configuration
417 *
418 * @usage_type: Usage type (Single/Dual)
419 * @num_paths: Number of axi data paths
420 * @axi_path Per path vote info
421 */
422struct cam_isp_bw_config_v2 {
423 uint32_t usage_type;
424 uint32_t num_paths;
425 struct cam_axi_per_path_bw_vote axi_path[1];
426} __attribute__((packed));
427
428/**
Raja Mallikfe46d932019-02-12 20:34:07 +0530429 * struct cam_fe_config - Fetch Engine configuration
430 *
431 * @version: fetch engine veriosn
432 * @min_vbi: require min vbi
433 * @fs_mode: indicates if fs mode enabled
434 * @fs_line_sync_en: frame level sync or line level
435 * sync for fetch engine
436 * @hbi_count: hbi count
437 * @fs_sync_enable: indicates if fetch engine working
438 * wokring in sync with write engine
439 * @go_cmd_sel: softwrae go_cmd or hw go_cmd
440 * @client_enable: enable read engine
441 * @source_addr: adrress of buffer to read from
442 * @width: buffer width
443 * @height: buffer height
444 * @stride: buffer stride (here equal to width)
445 * @format: format of image in buffer
446 * @unpacker_cfg: unpacker config type
447 * @latency_buf_size: latency buffer for read engine
448 */
449struct cam_fe_config {
450 uint64_t version;
451 uint32_t min_vbi;
452 uint32_t fs_mode;
453 uint32_t fs_line_sync_en;
454 uint32_t hbi_count;
455 uint32_t fs_sync_enable;
456 uint32_t go_cmd_sel;
457 uint32_t client_enable;
458 uint32_t source_addr;
459 uint32_t width;
460 uint32_t height;
461 uint32_t stride;
462 uint32_t format;
463 uint32_t unpacker_cfg;
464 uint32_t latency_buf_size;
465} __attribute__((packed));
Raja Mallik70d8a932018-12-13 16:22:43 +0530466
467/* Acquire Device/HW v2 */
468
469/**
470 * struct cam_isp_acquire_hw_info - ISP acquire HW params
471 *
472 * @common_info_version : Version of common info struct used
473 * @common_info_size : Size of common info struct used
474 * @common_info_offset : Offset of common info from start of data
475 * @num_inputs : Number of inputs
476 * @input_info_version : Version of input info struct used
477 * @input_info_size : Size of input info struct used
478 * @input_info_offset : Offset of input info from start of data
479 * @data : Start of data region
480 */
481struct cam_isp_acquire_hw_info {
482 uint16_t common_info_version;
483 uint16_t common_info_size;
484 uint32_t common_info_offset;
485 uint32_t num_inputs;
486 uint32_t input_info_version;
487 uint32_t input_info_size;
488 uint32_t input_info_offset;
489 uint64_t data;
490};
491
492#define CAM_ISP_ACQUIRE_COMMON_VER0 0x1000
493
494#define CAM_ISP_ACQUIRE_COMMON_SIZE_VER0 0x0
495
496#define CAM_ISP_ACQUIRE_INPUT_VER0 0x2000
497
498#define CAM_ISP_ACQUIRE_OUT_VER0 0x3000
499
Raja Mallik477ca242019-06-21 14:23:32 +0530500/**
501 * struct cam_isp_init_frame_drop_config - init frame drop configuration
502 *
503 * @init_frame_drop: Initial number of frames needs to drop
504 */
505
506struct cam_isp_init_frame_drop_config {
507 uint32_t init_frame_drop;
508} __attribute__((packed));
509
Jing Zhou8184f312017-01-31 14:06:30 -0800510#endif /* __UAPI_CAM_ISP_H__ */