Amir Levy | 9659e59 | 2016-10-27 18:08:27 +0300 | [diff] [blame] | 1 | /* Copyright (c) 2012-2016, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef _IPA3_I_H_ |
| 14 | #define _IPA3_I_H_ |
| 15 | |
| 16 | #include <linux/bitops.h> |
| 17 | #include <linux/cdev.h> |
| 18 | #include <linux/export.h> |
| 19 | #include <linux/idr.h> |
| 20 | #include <linux/list.h> |
| 21 | #include <linux/mutex.h> |
| 22 | #include <linux/skbuff.h> |
| 23 | #include <linux/slab.h> |
| 24 | #include <linux/ipa.h> |
| 25 | #include <linux/ipa_usb.h> |
| 26 | #include <linux/msm-sps.h> |
| 27 | #include <asm/dma-iommu.h> |
| 28 | #include <linux/iommu.h> |
| 29 | #include <linux/platform_device.h> |
| 30 | #include <linux/firmware.h> |
| 31 | #include "ipa_hw_defs.h" |
| 32 | #include "ipa_qmi_service.h" |
| 33 | #include "../ipa_api.h" |
| 34 | #include "ipahal/ipahal_reg.h" |
| 35 | #include "ipahal/ipahal.h" |
| 36 | #include "ipahal/ipahal_fltrt.h" |
| 37 | #include "../ipa_common_i.h" |
| 38 | #include "ipa_uc_offload_i.h" |
| 39 | |
| 40 | #define DRV_NAME "ipa" |
| 41 | #define NAT_DEV_NAME "ipaNatTable" |
| 42 | #define IPA_COOKIE 0x57831603 |
| 43 | #define MTU_BYTE 1500 |
| 44 | |
| 45 | #define IPA3_MAX_NUM_PIPES 31 |
| 46 | #define IPA_WAN_CONS_DESC_FIFO_SZ 0x5E80 |
| 47 | #define IPA_WAN_NAPI_CONS_RX_POOL_SZ 3000 |
| 48 | #define IPA_SYS_DESC_FIFO_SZ 0x800 |
| 49 | #define IPA_SYS_TX_DATA_DESC_FIFO_SZ 0x1000 |
| 50 | #define IPA_LAN_RX_HEADER_LENGTH (2) |
| 51 | #define IPA_QMAP_HEADER_LENGTH (4) |
| 52 | #define IPA_DL_CHECKSUM_LENGTH (8) |
| 53 | #define IPA_NUM_DESC_PER_SW_TX (3) |
| 54 | #define IPA_GENERIC_RX_POOL_SZ 192 |
| 55 | #define IPA_UC_FINISH_MAX 6 |
| 56 | #define IPA_UC_WAIT_MIN_SLEEP 1000 |
| 57 | #define IPA_UC_WAII_MAX_SLEEP 1200 |
| 58 | |
| 59 | #define IPA_MAX_STATUS_STAT_NUM 30 |
| 60 | |
| 61 | #define IPA_IPC_LOG_PAGES 50 |
| 62 | |
| 63 | #define IPADBG(fmt, args...) \ |
| 64 | do { \ |
| 65 | pr_debug(DRV_NAME " %s:%d " fmt, __func__, __LINE__, ## args);\ |
| 66 | if (ipa3_ctx) { \ |
| 67 | IPA_IPC_LOGGING(ipa3_ctx->logbuf, \ |
| 68 | DRV_NAME " %s:%d " fmt, ## args); \ |
| 69 | IPA_IPC_LOGGING(ipa3_ctx->logbuf_low, \ |
| 70 | DRV_NAME " %s:%d " fmt, ## args); \ |
| 71 | } \ |
| 72 | } while (0) |
| 73 | |
| 74 | #define IPADBG_LOW(fmt, args...) \ |
| 75 | do { \ |
| 76 | pr_debug(DRV_NAME " %s:%d " fmt, __func__, __LINE__, ## args);\ |
| 77 | if (ipa3_ctx) \ |
| 78 | IPA_IPC_LOGGING(ipa3_ctx->logbuf_low, \ |
| 79 | DRV_NAME " %s:%d " fmt, ## args); \ |
| 80 | } while (0) |
| 81 | |
| 82 | #define IPAERR(fmt, args...) \ |
| 83 | do { \ |
| 84 | pr_err(DRV_NAME " %s:%d " fmt, __func__, __LINE__, ## args);\ |
| 85 | if (ipa3_ctx) { \ |
| 86 | IPA_IPC_LOGGING(ipa3_ctx->logbuf, \ |
| 87 | DRV_NAME " %s:%d " fmt, ## args); \ |
| 88 | IPA_IPC_LOGGING(ipa3_ctx->logbuf_low, \ |
| 89 | DRV_NAME " %s:%d " fmt, ## args); \ |
| 90 | } \ |
| 91 | } while (0) |
| 92 | |
| 93 | #define WLAN_AMPDU_TX_EP 15 |
| 94 | #define WLAN_PROD_TX_EP 19 |
| 95 | #define WLAN1_CONS_RX_EP 14 |
| 96 | #define WLAN2_CONS_RX_EP 16 |
| 97 | #define WLAN3_CONS_RX_EP 17 |
| 98 | #define WLAN4_CONS_RX_EP 18 |
| 99 | |
| 100 | #define IPA_RAM_NAT_OFST 0 |
| 101 | #define IPA_RAM_NAT_SIZE 0 |
| 102 | #define IPA_MEM_CANARY_VAL 0xdeadbeef |
| 103 | |
| 104 | #define IPA_STATS |
| 105 | |
| 106 | #ifdef IPA_STATS |
| 107 | #define IPA_STATS_INC_CNT(val) (++val) |
| 108 | #define IPA_STATS_DEC_CNT(val) (--val) |
| 109 | #define IPA_STATS_EXCP_CNT(__excp, __base) do { \ |
| 110 | if (__excp < 0 || __excp >= IPAHAL_PKT_STATUS_EXCEPTION_MAX) \ |
| 111 | break; \ |
| 112 | ++__base[__excp]; \ |
| 113 | } while (0) |
| 114 | #else |
| 115 | #define IPA_STATS_INC_CNT(x) do { } while (0) |
| 116 | #define IPA_STATS_DEC_CNT(x) |
| 117 | #define IPA_STATS_EXCP_CNT(__excp, __base) do { } while (0) |
| 118 | #endif |
| 119 | |
| 120 | #define IPA_HDR_BIN0 0 |
| 121 | #define IPA_HDR_BIN1 1 |
| 122 | #define IPA_HDR_BIN2 2 |
| 123 | #define IPA_HDR_BIN3 3 |
| 124 | #define IPA_HDR_BIN4 4 |
| 125 | #define IPA_HDR_BIN_MAX 5 |
| 126 | |
| 127 | #define IPA_HDR_PROC_CTX_BIN0 0 |
| 128 | #define IPA_HDR_PROC_CTX_BIN1 1 |
| 129 | #define IPA_HDR_PROC_CTX_BIN_MAX 2 |
| 130 | |
| 131 | #define IPA_EVENT_THRESHOLD 0x10 |
| 132 | |
| 133 | /* |
| 134 | * Due to ZLT issue with USB 3.0 core, IPA BAM threashold need to be set |
| 135 | * to max packet size + 1. After setting the threshold, USB core |
| 136 | * will not be notified on ZLTs |
| 137 | */ |
| 138 | #define IPA_USB_EVENT_THRESHOLD 0x4001 |
| 139 | |
| 140 | #define IPA_RX_POOL_CEIL 32 |
| 141 | #define IPA_RX_SKB_SIZE 1792 |
| 142 | |
| 143 | #define IPA_A5_MUX_HDR_NAME "ipa_excp_hdr" |
| 144 | #define IPA_LAN_RX_HDR_NAME "ipa_lan_hdr" |
| 145 | #define IPA_INVALID_L4_PROTOCOL 0xFF |
| 146 | |
| 147 | #define IPA_CLIENT_IS_PROD(x) (x >= IPA_CLIENT_PROD && x < IPA_CLIENT_CONS) |
| 148 | #define IPA_CLIENT_IS_CONS(x) (x >= IPA_CLIENT_CONS && x < IPA_CLIENT_MAX) |
| 149 | |
| 150 | #define IPA_PIPE_MEM_START_OFST_ALIGNMENT(start_ofst) \ |
| 151 | (((start_ofst) + 127) & ~127) |
| 152 | |
| 153 | #define IPA_HDR_PROC_CTX_TABLE_ALIGNMENT_BYTE 8 |
| 154 | #define IPA_HDR_PROC_CTX_TABLE_ALIGNMENT(start_ofst) \ |
| 155 | (((start_ofst) + IPA_HDR_PROC_CTX_TABLE_ALIGNMENT_BYTE - 1) & \ |
| 156 | ~(IPA_HDR_PROC_CTX_TABLE_ALIGNMENT_BYTE - 1)) |
| 157 | |
| 158 | #define MAX_RESOURCE_TO_CLIENTS (IPA_CLIENT_MAX) |
| 159 | #define IPA_MEM_PART(x_) (ipa3_ctx->ctrl->mem_partition.x_) |
| 160 | |
| 161 | #define IPA_GSI_CHANNEL_STOP_MAX_RETRY 10 |
| 162 | #define IPA_GSI_CHANNEL_STOP_PKT_SIZE 1 |
| 163 | |
| 164 | #define IPA_GSI_CHANNEL_EMPTY_MAX_RETRY 15 |
| 165 | #define IPA_GSI_CHANNEL_EMPTY_SLEEP_MIN_USEC (1000) |
| 166 | #define IPA_GSI_CHANNEL_EMPTY_SLEEP_MAX_USEC (2000) |
| 167 | |
| 168 | #define IPA_SLEEP_CLK_RATE_KHZ (32) |
| 169 | |
| 170 | #define IPA3_ACTIVE_CLIENTS_LOG_BUFFER_SIZE_LINES 120 |
| 171 | #define IPA3_ACTIVE_CLIENTS_LOG_LINE_LEN 96 |
| 172 | #define IPA3_ACTIVE_CLIENTS_LOG_HASHTABLE_SIZE 50 |
| 173 | #define IPA3_ACTIVE_CLIENTS_LOG_NAME_LEN 40 |
| 174 | |
| 175 | struct ipa3_active_client_htable_entry { |
| 176 | struct hlist_node list; |
| 177 | char id_string[IPA3_ACTIVE_CLIENTS_LOG_NAME_LEN]; |
| 178 | int count; |
| 179 | enum ipa_active_client_log_type type; |
| 180 | }; |
| 181 | |
| 182 | struct ipa3_active_clients_log_ctx { |
| 183 | char *log_buffer[IPA3_ACTIVE_CLIENTS_LOG_BUFFER_SIZE_LINES]; |
| 184 | int log_head; |
| 185 | int log_tail; |
| 186 | bool log_rdy; |
| 187 | struct hlist_head htable[IPA3_ACTIVE_CLIENTS_LOG_HASHTABLE_SIZE]; |
| 188 | }; |
| 189 | |
| 190 | struct ipa3_client_names { |
| 191 | enum ipa_client_type names[MAX_RESOURCE_TO_CLIENTS]; |
| 192 | int length; |
| 193 | }; |
| 194 | |
| 195 | struct ipa_smmu_cb_ctx { |
| 196 | bool valid; |
| 197 | struct device *dev; |
| 198 | struct dma_iommu_mapping *mapping; |
| 199 | struct iommu_domain *iommu; |
| 200 | unsigned long next_addr; |
| 201 | u32 va_start; |
| 202 | u32 va_size; |
| 203 | u32 va_end; |
| 204 | }; |
| 205 | |
| 206 | /** |
| 207 | * struct ipa3_flt_entry - IPA filtering table entry |
| 208 | * @link: entry's link in global filtering enrties list |
| 209 | * @rule: filter rule |
| 210 | * @cookie: cookie used for validity check |
| 211 | * @tbl: filter table |
| 212 | * @rt_tbl: routing table |
| 213 | * @hw_len: entry's size |
| 214 | * @id: rule handle - globally unique |
| 215 | * @prio: rule 10bit priority which defines the order of the rule |
| 216 | * among other rules at the same integrated table |
| 217 | * @rule_id: rule 10bit ID to be returned in packet status |
| 218 | */ |
| 219 | struct ipa3_flt_entry { |
| 220 | struct list_head link; |
| 221 | struct ipa_flt_rule rule; |
| 222 | u32 cookie; |
| 223 | struct ipa3_flt_tbl *tbl; |
| 224 | struct ipa3_rt_tbl *rt_tbl; |
| 225 | u32 hw_len; |
| 226 | int id; |
| 227 | u16 prio; |
| 228 | u16 rule_id; |
| 229 | }; |
| 230 | |
| 231 | /** |
| 232 | * struct ipa3_rt_tbl - IPA routing table |
| 233 | * @link: table's link in global routing tables list |
| 234 | * @head_rt_rule_list: head of routing rules list |
| 235 | * @name: routing table name |
| 236 | * @idx: routing table index |
| 237 | * @rule_cnt: number of rules in routing table |
| 238 | * @ref_cnt: reference counter of routing table |
| 239 | * @set: collection of routing tables |
| 240 | * @cookie: cookie used for validity check |
| 241 | * @in_sys: flag indicating if the table is located in system memory |
| 242 | * @sz: the size of the routing table |
| 243 | * @curr_mem: current routing tables block in sys memory |
| 244 | * @prev_mem: previous routing table block in sys memory |
| 245 | * @id: routing table id |
| 246 | * @rule_ids: idr structure that holds the rule_id for each rule |
| 247 | */ |
| 248 | struct ipa3_rt_tbl { |
| 249 | struct list_head link; |
| 250 | struct list_head head_rt_rule_list; |
| 251 | char name[IPA_RESOURCE_NAME_MAX]; |
| 252 | u32 idx; |
| 253 | u32 rule_cnt; |
| 254 | u32 ref_cnt; |
| 255 | struct ipa3_rt_tbl_set *set; |
| 256 | u32 cookie; |
| 257 | bool in_sys[IPA_RULE_TYPE_MAX]; |
| 258 | u32 sz[IPA_RULE_TYPE_MAX]; |
| 259 | struct ipa_mem_buffer curr_mem[IPA_RULE_TYPE_MAX]; |
| 260 | struct ipa_mem_buffer prev_mem[IPA_RULE_TYPE_MAX]; |
| 261 | int id; |
| 262 | struct idr rule_ids; |
| 263 | }; |
| 264 | |
| 265 | /** |
| 266 | * struct ipa3_hdr_entry - IPA header table entry |
| 267 | * @link: entry's link in global header table entries list |
| 268 | * @hdr: the header |
| 269 | * @hdr_len: header length |
| 270 | * @name: name of header table entry |
| 271 | * @type: l2 header type |
| 272 | * @is_partial: flag indicating if header table entry is partial |
| 273 | * @is_hdr_proc_ctx: false - hdr entry resides in hdr table, |
| 274 | * true - hdr entry resides in DDR and pointed to by proc ctx |
| 275 | * @phys_base: physical address of entry in DDR when is_hdr_proc_ctx is true, |
| 276 | * else 0 |
| 277 | * @proc_ctx: processing context header |
| 278 | * @offset_entry: entry's offset |
| 279 | * @cookie: cookie used for validity check |
| 280 | * @ref_cnt: reference counter of routing table |
| 281 | * @id: header entry id |
| 282 | * @is_eth2_ofst_valid: is eth2_ofst field valid? |
| 283 | * @eth2_ofst: offset to start of Ethernet-II/802.3 header |
| 284 | */ |
| 285 | struct ipa3_hdr_entry { |
| 286 | struct list_head link; |
| 287 | u8 hdr[IPA_HDR_MAX_SIZE]; |
| 288 | u32 hdr_len; |
| 289 | char name[IPA_RESOURCE_NAME_MAX]; |
| 290 | enum ipa_hdr_l2_type type; |
| 291 | u8 is_partial; |
| 292 | bool is_hdr_proc_ctx; |
| 293 | dma_addr_t phys_base; |
| 294 | struct ipa3_hdr_proc_ctx_entry *proc_ctx; |
| 295 | struct ipa_hdr_offset_entry *offset_entry; |
| 296 | u32 cookie; |
| 297 | u32 ref_cnt; |
| 298 | int id; |
| 299 | u8 is_eth2_ofst_valid; |
| 300 | u16 eth2_ofst; |
| 301 | }; |
| 302 | |
| 303 | /** |
| 304 | * struct ipa3_hdr_tbl - IPA header table |
| 305 | * @head_hdr_entry_list: header entries list |
| 306 | * @head_offset_list: header offset list |
| 307 | * @head_free_offset_list: header free offset list |
| 308 | * @hdr_cnt: number of headers |
| 309 | * @end: the last header index |
| 310 | */ |
| 311 | struct ipa3_hdr_tbl { |
| 312 | struct list_head head_hdr_entry_list; |
| 313 | struct list_head head_offset_list[IPA_HDR_BIN_MAX]; |
| 314 | struct list_head head_free_offset_list[IPA_HDR_BIN_MAX]; |
| 315 | u32 hdr_cnt; |
| 316 | u32 end; |
| 317 | }; |
| 318 | |
| 319 | /** |
| 320 | * struct ipa3_hdr_offset_entry - IPA header offset entry |
| 321 | * @link: entry's link in global processing context header offset entries list |
| 322 | * @offset: the offset |
| 323 | * @bin: bin |
| 324 | */ |
| 325 | struct ipa3_hdr_proc_ctx_offset_entry { |
| 326 | struct list_head link; |
| 327 | u32 offset; |
| 328 | u32 bin; |
| 329 | }; |
| 330 | |
| 331 | /** |
| 332 | * struct ipa3_hdr_proc_ctx_entry - IPA processing context header table entry |
| 333 | * @link: entry's link in global header table entries list |
| 334 | * @type: |
| 335 | * @offset_entry: entry's offset |
| 336 | * @hdr: the header |
| 337 | * @cookie: cookie used for validity check |
| 338 | * @ref_cnt: reference counter of routing table |
| 339 | * @id: processing context header entry id |
| 340 | */ |
| 341 | struct ipa3_hdr_proc_ctx_entry { |
| 342 | struct list_head link; |
| 343 | enum ipa_hdr_proc_type type; |
| 344 | struct ipa3_hdr_proc_ctx_offset_entry *offset_entry; |
| 345 | struct ipa3_hdr_entry *hdr; |
| 346 | u32 cookie; |
| 347 | u32 ref_cnt; |
| 348 | int id; |
| 349 | }; |
| 350 | |
| 351 | /** |
| 352 | * struct ipa3_hdr_proc_ctx_tbl - IPA processing context header table |
| 353 | * @head_proc_ctx_entry_list: header entries list |
| 354 | * @head_offset_list: header offset list |
| 355 | * @head_free_offset_list: header free offset list |
| 356 | * @proc_ctx_cnt: number of processing context headers |
| 357 | * @end: the last processing context header index |
| 358 | * @start_offset: offset in words of processing context header table |
| 359 | */ |
| 360 | struct ipa3_hdr_proc_ctx_tbl { |
| 361 | struct list_head head_proc_ctx_entry_list; |
| 362 | struct list_head head_offset_list[IPA_HDR_PROC_CTX_BIN_MAX]; |
| 363 | struct list_head head_free_offset_list[IPA_HDR_PROC_CTX_BIN_MAX]; |
| 364 | u32 proc_ctx_cnt; |
| 365 | u32 end; |
| 366 | u32 start_offset; |
| 367 | }; |
| 368 | |
| 369 | /** |
| 370 | * struct ipa3_flt_tbl - IPA filter table |
| 371 | * @head_flt_rule_list: filter rules list |
| 372 | * @rule_cnt: number of filter rules |
| 373 | * @in_sys: flag indicating if filter table is located in system memory |
| 374 | * @sz: the size of the filter tables |
| 375 | * @end: the last header index |
| 376 | * @curr_mem: current filter tables block in sys memory |
| 377 | * @prev_mem: previous filter table block in sys memory |
| 378 | * @rule_ids: idr structure that holds the rule_id for each rule |
| 379 | */ |
| 380 | struct ipa3_flt_tbl { |
| 381 | struct list_head head_flt_rule_list; |
| 382 | u32 rule_cnt; |
| 383 | bool in_sys[IPA_RULE_TYPE_MAX]; |
| 384 | u32 sz[IPA_RULE_TYPE_MAX]; |
| 385 | struct ipa_mem_buffer curr_mem[IPA_RULE_TYPE_MAX]; |
| 386 | struct ipa_mem_buffer prev_mem[IPA_RULE_TYPE_MAX]; |
| 387 | bool sticky_rear; |
| 388 | struct idr rule_ids; |
| 389 | }; |
| 390 | |
| 391 | /** |
| 392 | * struct ipa3_rt_entry - IPA routing table entry |
| 393 | * @link: entry's link in global routing table entries list |
| 394 | * @rule: routing rule |
| 395 | * @cookie: cookie used for validity check |
| 396 | * @tbl: routing table |
| 397 | * @hdr: header table |
| 398 | * @proc_ctx: processing context table |
| 399 | * @hw_len: the length of the table |
| 400 | * @id: rule handle - globaly unique |
| 401 | * @prio: rule 10bit priority which defines the order of the rule |
| 402 | * among other rules at the integrated same table |
| 403 | * @rule_id: rule 10bit ID to be returned in packet status |
| 404 | */ |
| 405 | struct ipa3_rt_entry { |
| 406 | struct list_head link; |
| 407 | struct ipa_rt_rule rule; |
| 408 | u32 cookie; |
| 409 | struct ipa3_rt_tbl *tbl; |
| 410 | struct ipa3_hdr_entry *hdr; |
| 411 | struct ipa3_hdr_proc_ctx_entry *proc_ctx; |
| 412 | u32 hw_len; |
| 413 | int id; |
| 414 | u16 prio; |
| 415 | u16 rule_id; |
| 416 | }; |
| 417 | |
| 418 | /** |
| 419 | * struct ipa3_rt_tbl_set - collection of routing tables |
| 420 | * @head_rt_tbl_list: collection of routing tables |
| 421 | * @tbl_cnt: number of routing tables |
| 422 | */ |
| 423 | struct ipa3_rt_tbl_set { |
| 424 | struct list_head head_rt_tbl_list; |
| 425 | u32 tbl_cnt; |
| 426 | }; |
| 427 | |
| 428 | /** |
| 429 | * struct ipa3_wlan_stats - Wlan stats for each wlan endpoint |
| 430 | * @rx_pkts_rcvd: Packets sent by wlan driver |
| 431 | * @rx_pkts_status_rcvd: Status packets received from ipa hw |
| 432 | * @rx_hd_processed: Data Descriptors processed by IPA Driver |
| 433 | * @rx_hd_reply: Data Descriptors recycled by wlan driver |
| 434 | * @rx_hd_rcvd: Data Descriptors sent by wlan driver |
| 435 | * @rx_pkt_leak: Packet count that are not recycled |
| 436 | * @rx_dp_fail: Packets failed to transfer to IPA HW |
| 437 | * @tx_pkts_rcvd: SKB Buffers received from ipa hw |
| 438 | * @tx_pkts_sent: SKB Buffers sent to wlan driver |
| 439 | * @tx_pkts_dropped: Dropped packets count |
| 440 | */ |
| 441 | struct ipa3_wlan_stats { |
| 442 | u32 rx_pkts_rcvd; |
| 443 | u32 rx_pkts_status_rcvd; |
| 444 | u32 rx_hd_processed; |
| 445 | u32 rx_hd_reply; |
| 446 | u32 rx_hd_rcvd; |
| 447 | u32 rx_pkt_leak; |
| 448 | u32 rx_dp_fail; |
| 449 | u32 tx_pkts_rcvd; |
| 450 | u32 tx_pkts_sent; |
| 451 | u32 tx_pkts_dropped; |
| 452 | }; |
| 453 | |
| 454 | /** |
| 455 | * struct ipa3_wlan_comm_memb - Wlan comm members |
| 456 | * @wlan_spinlock: protects wlan comm buff list and its size |
| 457 | * @ipa_tx_mul_spinlock: protects tx dp mul transfer |
| 458 | * @wlan_comm_total_cnt: wlan common skb buffers allocated count |
| 459 | * @wlan_comm_free_cnt: wlan common skb buffer free count |
| 460 | * @total_tx_pkts_freed: Recycled Buffer count |
| 461 | * @wlan_comm_desc_list: wlan common skb buffer list |
| 462 | */ |
| 463 | struct ipa3_wlan_comm_memb { |
| 464 | spinlock_t wlan_spinlock; |
| 465 | spinlock_t ipa_tx_mul_spinlock; |
| 466 | u32 wlan_comm_total_cnt; |
| 467 | u32 wlan_comm_free_cnt; |
| 468 | u32 total_tx_pkts_freed; |
| 469 | struct list_head wlan_comm_desc_list; |
| 470 | atomic_t active_clnt_cnt; |
| 471 | }; |
| 472 | |
| 473 | struct ipa_gsi_ep_mem_info { |
| 474 | u16 evt_ring_len; |
| 475 | u64 evt_ring_base_addr; |
| 476 | void *evt_ring_base_vaddr; |
| 477 | u16 chan_ring_len; |
| 478 | u64 chan_ring_base_addr; |
| 479 | void *chan_ring_base_vaddr; |
| 480 | }; |
| 481 | |
| 482 | struct ipa3_status_stats { |
| 483 | struct ipahal_pkt_status status[IPA_MAX_STATUS_STAT_NUM]; |
| 484 | int curr; |
| 485 | }; |
| 486 | |
| 487 | /** |
| 488 | * struct ipa3_ep_context - IPA end point context |
| 489 | * @valid: flag indicating id EP context is valid |
| 490 | * @client: EP client type |
| 491 | * @ep_hdl: EP's client SPS handle |
| 492 | * @gsi_chan_hdl: EP's GSI channel handle |
| 493 | * @gsi_evt_ring_hdl: EP's GSI channel event ring handle |
| 494 | * @gsi_mem_info: EP's GSI channel rings info |
| 495 | * @chan_scratch: EP's GSI channel scratch info |
| 496 | * @cfg: EP cionfiguration |
| 497 | * @dst_pipe_index: destination pipe index |
| 498 | * @rt_tbl_idx: routing table index |
| 499 | * @connect: SPS connect |
| 500 | * @priv: user provided information which will forwarded once the user is |
| 501 | * notified for new data avail |
| 502 | * @client_notify: user provided CB for EP events notification, the event is |
| 503 | * data revived. |
| 504 | * @desc_fifo_in_pipe_mem: flag indicating if descriptors FIFO uses pipe memory |
| 505 | * @data_fifo_in_pipe_mem: flag indicating if data FIFO uses pipe memory |
| 506 | * @desc_fifo_pipe_mem_ofst: descriptors FIFO pipe memory offset |
| 507 | * @data_fifo_pipe_mem_ofst: data FIFO pipe memory offset |
| 508 | * @desc_fifo_client_allocated: if descriptors FIFO was allocated by a client |
| 509 | * @data_fifo_client_allocated: if data FIFO was allocated by a client |
| 510 | * @skip_ep_cfg: boolean field that determines if EP should be configured |
| 511 | * by IPA driver |
| 512 | * @keep_ipa_awake: when true, IPA will not be clock gated |
| 513 | * @disconnect_in_progress: Indicates client disconnect in progress. |
| 514 | * @qmi_request_sent: Indicates whether QMI request to enable clear data path |
| 515 | * request is sent or not. |
| 516 | * @napi_enabled: when true, IPA call client callback to start polling |
| 517 | */ |
| 518 | struct ipa3_ep_context { |
| 519 | int valid; |
| 520 | enum ipa_client_type client; |
| 521 | struct sps_pipe *ep_hdl; |
| 522 | unsigned long gsi_chan_hdl; |
| 523 | unsigned long gsi_evt_ring_hdl; |
| 524 | struct ipa_gsi_ep_mem_info gsi_mem_info; |
| 525 | union __packed gsi_channel_scratch chan_scratch; |
| 526 | bool bytes_xfered_valid; |
| 527 | u16 bytes_xfered; |
| 528 | dma_addr_t phys_base; |
| 529 | struct ipa_ep_cfg cfg; |
| 530 | struct ipa_ep_cfg_holb holb; |
| 531 | struct ipahal_reg_ep_cfg_status status; |
| 532 | u32 dst_pipe_index; |
| 533 | u32 rt_tbl_idx; |
| 534 | struct sps_connect connect; |
| 535 | void *priv; |
| 536 | void (*client_notify)(void *priv, enum ipa_dp_evt_type evt, |
| 537 | unsigned long data); |
| 538 | bool desc_fifo_in_pipe_mem; |
| 539 | bool data_fifo_in_pipe_mem; |
| 540 | u32 desc_fifo_pipe_mem_ofst; |
| 541 | u32 data_fifo_pipe_mem_ofst; |
| 542 | bool desc_fifo_client_allocated; |
| 543 | bool data_fifo_client_allocated; |
| 544 | atomic_t avail_fifo_desc; |
| 545 | u32 dflt_flt4_rule_hdl; |
| 546 | u32 dflt_flt6_rule_hdl; |
| 547 | bool skip_ep_cfg; |
| 548 | bool keep_ipa_awake; |
| 549 | struct ipa3_wlan_stats wstats; |
| 550 | u32 uc_offload_state; |
| 551 | bool disconnect_in_progress; |
| 552 | u32 qmi_request_sent; |
| 553 | bool napi_enabled; |
| 554 | bool switch_to_intr; |
| 555 | int inactive_cycles; |
| 556 | u32 eot_in_poll_err; |
| 557 | |
| 558 | /* sys MUST be the last element of this struct */ |
| 559 | struct ipa3_sys_context *sys; |
| 560 | }; |
| 561 | |
| 562 | /** |
| 563 | * ipa_usb_xdci_chan_params - xDCI channel related properties |
| 564 | * |
| 565 | * @ipa_ep_cfg: IPA EP configuration |
| 566 | * @client: type of "client" |
| 567 | * @priv: callback cookie |
| 568 | * @notify: callback |
| 569 | * priv - callback cookie evt - type of event data - data relevant |
| 570 | * to event. May not be valid. See event_type enum for valid |
| 571 | * cases. |
| 572 | * @skip_ep_cfg: boolean field that determines if EP should be |
| 573 | * configured by IPA driver |
| 574 | * @keep_ipa_awake: when true, IPA will not be clock gated |
| 575 | * @evt_ring_params: parameters for the channel's event ring |
| 576 | * @evt_scratch: parameters for the channel's event ring scratch |
| 577 | * @chan_params: parameters for the channel |
| 578 | * @chan_scratch: parameters for the channel's scratch |
| 579 | * |
| 580 | */ |
| 581 | struct ipa_request_gsi_channel_params { |
| 582 | struct ipa_ep_cfg ipa_ep_cfg; |
| 583 | enum ipa_client_type client; |
| 584 | void *priv; |
| 585 | ipa_notify_cb notify; |
| 586 | bool skip_ep_cfg; |
| 587 | bool keep_ipa_awake; |
| 588 | struct gsi_evt_ring_props evt_ring_params; |
| 589 | union __packed gsi_evt_scratch evt_scratch; |
| 590 | struct gsi_chan_props chan_params; |
| 591 | union __packed gsi_channel_scratch chan_scratch; |
| 592 | }; |
| 593 | |
| 594 | enum ipa3_sys_pipe_policy { |
| 595 | IPA_POLICY_INTR_MODE, |
| 596 | IPA_POLICY_NOINTR_MODE, |
| 597 | IPA_POLICY_INTR_POLL_MODE, |
| 598 | }; |
| 599 | |
| 600 | struct ipa3_repl_ctx { |
| 601 | struct ipa3_rx_pkt_wrapper **cache; |
| 602 | atomic_t head_idx; |
| 603 | atomic_t tail_idx; |
| 604 | u32 capacity; |
| 605 | }; |
| 606 | |
| 607 | /** |
| 608 | * struct ipa3_sys_context - IPA endpoint context for system to BAM pipes |
| 609 | * @head_desc_list: header descriptors list |
| 610 | * @len: the size of the above list |
| 611 | * @spinlock: protects the list and its size |
| 612 | * @event: used to request CALLBACK mode from SPS driver |
| 613 | * @ep: IPA EP context |
| 614 | * |
| 615 | * IPA context specific to the system-bam pipes a.k.a LAN IN/OUT and WAN |
| 616 | */ |
| 617 | struct ipa3_sys_context { |
| 618 | u32 len; |
| 619 | struct sps_register_event event; |
| 620 | atomic_t curr_polling_state; |
| 621 | struct delayed_work switch_to_intr_work; |
| 622 | enum ipa3_sys_pipe_policy policy; |
| 623 | int (*pyld_hdlr)(struct sk_buff *skb, struct ipa3_sys_context *sys); |
| 624 | struct sk_buff * (*get_skb)(unsigned int len, gfp_t flags); |
| 625 | void (*free_skb)(struct sk_buff *skb); |
| 626 | void (*free_rx_wrapper)(struct ipa3_rx_pkt_wrapper *rk_pkt); |
| 627 | u32 rx_buff_sz; |
| 628 | u32 rx_pool_sz; |
| 629 | struct sk_buff *prev_skb; |
| 630 | unsigned int len_rem; |
| 631 | unsigned int len_pad; |
| 632 | unsigned int len_partial; |
| 633 | bool drop_packet; |
| 634 | struct work_struct work; |
| 635 | void (*sps_callback)(struct sps_event_notify *notify); |
| 636 | enum sps_option sps_option; |
| 637 | struct delayed_work replenish_rx_work; |
| 638 | struct work_struct repl_work; |
| 639 | void (*repl_hdlr)(struct ipa3_sys_context *sys); |
| 640 | struct ipa3_repl_ctx repl; |
| 641 | |
| 642 | /* ordering is important - mutable fields go above */ |
| 643 | struct ipa3_ep_context *ep; |
| 644 | struct list_head head_desc_list; |
| 645 | struct list_head rcycl_list; |
| 646 | spinlock_t spinlock; |
| 647 | struct workqueue_struct *wq; |
| 648 | struct workqueue_struct *repl_wq; |
| 649 | struct ipa3_status_stats *status_stat; |
| 650 | /* ordering is important - other immutable fields go below */ |
| 651 | }; |
| 652 | |
| 653 | /** |
| 654 | * enum ipa3_desc_type - IPA decriptors type |
| 655 | * |
| 656 | * IPA decriptors type, IPA supports DD and ICD but no CD |
| 657 | */ |
| 658 | enum ipa3_desc_type { |
| 659 | IPA_DATA_DESC, |
| 660 | IPA_DATA_DESC_SKB, |
| 661 | IPA_DATA_DESC_SKB_PAGED, |
| 662 | IPA_IMM_CMD_DESC, |
| 663 | }; |
| 664 | |
| 665 | /** |
| 666 | * struct ipa3_tx_pkt_wrapper - IPA Tx packet wrapper |
| 667 | * @type: specify if this packet is for the skb or immediate command |
| 668 | * @mem: memory buffer used by this Tx packet |
| 669 | * @work: work struct for current Tx packet |
| 670 | * @link: linked to the wrappers on that pipe |
| 671 | * @callback: IPA client provided callback |
| 672 | * @user1: cookie1 for above callback |
| 673 | * @user2: cookie2 for above callback |
| 674 | * @sys: corresponding IPA sys context |
| 675 | * @mult: valid only for first of a "multiple" transfer, |
| 676 | * holds info for the "sps_transfer" buffer |
| 677 | * @cnt: 1 for single transfers, |
| 678 | * >1 and <0xFFFF for first of a "multiple" transfer, |
| 679 | * 0xFFFF for last desc, 0 for rest of "multiple' transfer |
| 680 | * @bounce: va of bounce buffer |
| 681 | * @unmap_dma: in case this is true, the buffer will not be dma unmapped |
| 682 | * |
| 683 | * This struct can wrap both data packet and immediate command packet. |
| 684 | */ |
| 685 | struct ipa3_tx_pkt_wrapper { |
| 686 | enum ipa3_desc_type type; |
| 687 | struct ipa_mem_buffer mem; |
| 688 | struct work_struct work; |
| 689 | struct list_head link; |
| 690 | void (*callback)(void *user1, int user2); |
| 691 | void *user1; |
| 692 | int user2; |
| 693 | struct ipa3_sys_context *sys; |
| 694 | struct ipa_mem_buffer mult; |
| 695 | u32 cnt; |
| 696 | void *bounce; |
| 697 | bool no_unmap_dma; |
| 698 | }; |
| 699 | |
| 700 | /** |
| 701 | * struct ipa3_dma_xfer_wrapper - IPADMA transfer descr wrapper |
| 702 | * @phys_addr_src: physical address of the source data to copy |
| 703 | * @phys_addr_dest: physical address to store the copied data |
| 704 | * @len: len in bytes to copy |
| 705 | * @link: linked to the wrappers list on the proper(sync/async) cons pipe |
| 706 | * @xfer_done: completion object for sync_memcpy completion |
| 707 | * @callback: IPADMA client provided completion callback |
| 708 | * @user1: cookie1 for above callback |
| 709 | * |
| 710 | * This struct can wrap both sync and async memcpy transfers descriptors. |
| 711 | */ |
| 712 | struct ipa3_dma_xfer_wrapper { |
| 713 | u64 phys_addr_src; |
| 714 | u64 phys_addr_dest; |
| 715 | u16 len; |
| 716 | struct list_head link; |
| 717 | struct completion xfer_done; |
| 718 | void (*callback)(void *user1); |
| 719 | void *user1; |
| 720 | }; |
| 721 | |
| 722 | /** |
| 723 | * struct ipa3_desc - IPA descriptor |
| 724 | * @type: skb or immediate command or plain old data |
| 725 | * @pyld: points to skb |
| 726 | * @frag: points to paged fragment |
| 727 | * or kmalloc'ed immediate command parameters/plain old data |
| 728 | * @dma_address: dma mapped address of pyld |
| 729 | * @dma_address_valid: valid field for dma_address |
| 730 | * @len: length of the pyld |
| 731 | * @opcode: for immediate commands |
| 732 | * @callback: IPA client provided completion callback |
| 733 | * @user1: cookie1 for above callback |
| 734 | * @user2: cookie2 for above callback |
| 735 | * @xfer_done: completion object for sync completion |
| 736 | */ |
| 737 | struct ipa3_desc { |
| 738 | enum ipa3_desc_type type; |
| 739 | void *pyld; |
| 740 | skb_frag_t *frag; |
| 741 | dma_addr_t dma_address; |
| 742 | bool dma_address_valid; |
| 743 | u16 len; |
| 744 | u16 opcode; |
| 745 | void (*callback)(void *user1, int user2); |
| 746 | void *user1; |
| 747 | int user2; |
| 748 | struct completion xfer_done; |
| 749 | }; |
| 750 | |
| 751 | /** |
| 752 | * struct ipa3_rx_pkt_wrapper - IPA Rx packet wrapper |
| 753 | * @skb: skb |
| 754 | * @dma_address: DMA address of this Rx packet |
| 755 | * @link: linked to the Rx packets on that pipe |
| 756 | * @len: how many bytes are copied into skb's flat buffer |
| 757 | */ |
| 758 | struct ipa3_rx_pkt_wrapper { |
| 759 | struct list_head link; |
| 760 | struct ipa_rx_data data; |
| 761 | u32 len; |
| 762 | struct work_struct work; |
| 763 | struct ipa3_sys_context *sys; |
| 764 | }; |
| 765 | |
| 766 | /** |
| 767 | * struct ipa3_nat_mem - IPA NAT memory description |
| 768 | * @class: pointer to the struct class |
| 769 | * @dev: the dev_t of the device |
| 770 | * @cdev: cdev of the device |
| 771 | * @dev_num: device number |
| 772 | * @vaddr: virtual address |
| 773 | * @dma_handle: DMA handle |
| 774 | * @size: NAT memory size |
| 775 | * @is_mapped: flag indicating if NAT memory is mapped |
| 776 | * @is_sys_mem: flag indicating if NAT memory is sys memory |
| 777 | * @is_dev_init: flag indicating if NAT device is initialized |
| 778 | * @lock: NAT memory mutex |
| 779 | * @nat_base_address: nat table virutal address |
| 780 | * @ipv4_rules_addr: base nat table address |
| 781 | * @ipv4_expansion_rules_addr: expansion table address |
| 782 | * @index_table_addr: index table address |
| 783 | * @index_table_expansion_addr: index expansion table address |
| 784 | * @size_base_tables: base table size |
| 785 | * @size_expansion_tables: expansion table size |
| 786 | * @public_ip_addr: ip address of nat table |
| 787 | */ |
| 788 | struct ipa3_nat_mem { |
| 789 | struct class *class; |
| 790 | struct device *dev; |
| 791 | struct cdev cdev; |
| 792 | dev_t dev_num; |
| 793 | void *vaddr; |
| 794 | dma_addr_t dma_handle; |
| 795 | size_t size; |
| 796 | bool is_mapped; |
| 797 | bool is_sys_mem; |
| 798 | bool is_dev_init; |
| 799 | bool is_dev; |
| 800 | struct mutex lock; |
| 801 | void *nat_base_address; |
| 802 | char *ipv4_rules_addr; |
| 803 | char *ipv4_expansion_rules_addr; |
| 804 | char *index_table_addr; |
| 805 | char *index_table_expansion_addr; |
| 806 | u32 size_base_tables; |
| 807 | u32 size_expansion_tables; |
| 808 | u32 public_ip_addr; |
| 809 | void *tmp_vaddr; |
| 810 | dma_addr_t tmp_dma_handle; |
| 811 | bool is_tmp_mem; |
| 812 | }; |
| 813 | |
| 814 | /** |
| 815 | * enum ipa3_hw_mode - IPA hardware mode |
| 816 | * @IPA_HW_Normal: Regular IPA hardware |
| 817 | * @IPA_HW_Virtual: IPA hardware supporting virtual memory allocation |
| 818 | * @IPA_HW_PCIE: IPA hardware supporting memory allocation over PCIE Bridge |
| 819 | */ |
| 820 | enum ipa3_hw_mode { |
| 821 | IPA_HW_MODE_NORMAL = 0, |
| 822 | IPA_HW_MODE_VIRTUAL = 1, |
| 823 | IPA_HW_MODE_PCIE = 2 |
| 824 | }; |
| 825 | |
| 826 | enum ipa3_config_this_ep { |
| 827 | IPA_CONFIGURE_THIS_EP, |
| 828 | IPA_DO_NOT_CONFIGURE_THIS_EP, |
| 829 | }; |
| 830 | |
| 831 | struct ipa3_stats { |
| 832 | u32 tx_sw_pkts; |
| 833 | u32 tx_hw_pkts; |
| 834 | u32 rx_pkts; |
| 835 | u32 rx_excp_pkts[IPAHAL_PKT_STATUS_EXCEPTION_MAX]; |
| 836 | u32 rx_repl_repost; |
| 837 | u32 tx_pkts_compl; |
| 838 | u32 rx_q_len; |
| 839 | u32 msg_w[IPA_EVENT_MAX_NUM]; |
| 840 | u32 msg_r[IPA_EVENT_MAX_NUM]; |
| 841 | u32 stat_compl; |
| 842 | u32 aggr_close; |
| 843 | u32 wan_aggr_close; |
| 844 | u32 wan_rx_empty; |
| 845 | u32 wan_repl_rx_empty; |
| 846 | u32 lan_rx_empty; |
| 847 | u32 lan_repl_rx_empty; |
| 848 | u32 flow_enable; |
| 849 | u32 flow_disable; |
| 850 | u32 tx_non_linear; |
| 851 | }; |
| 852 | |
| 853 | struct ipa3_active_clients { |
| 854 | struct mutex mutex; |
| 855 | spinlock_t spinlock; |
| 856 | bool mutex_locked; |
| 857 | int cnt; |
| 858 | }; |
| 859 | |
| 860 | struct ipa3_wakelock_ref_cnt { |
| 861 | spinlock_t spinlock; |
| 862 | int cnt; |
| 863 | }; |
| 864 | |
| 865 | struct ipa3_tag_completion { |
| 866 | struct completion comp; |
| 867 | atomic_t cnt; |
| 868 | }; |
| 869 | |
| 870 | struct ipa3_controller; |
| 871 | |
| 872 | /** |
| 873 | * struct ipa3_uc_hdlrs - IPA uC callback functions |
| 874 | * @ipa_uc_loaded_hdlr: Function handler when uC is loaded |
| 875 | * @ipa_uc_event_hdlr: Event handler function |
| 876 | * @ipa3_uc_response_hdlr: Response handler function |
| 877 | * @ipa_uc_event_log_info_hdlr: Log event handler function |
| 878 | */ |
| 879 | struct ipa3_uc_hdlrs { |
| 880 | void (*ipa_uc_loaded_hdlr)(void); |
| 881 | |
| 882 | void (*ipa_uc_event_hdlr) |
| 883 | (struct IpaHwSharedMemCommonMapping_t *uc_sram_mmio); |
| 884 | |
| 885 | int (*ipa3_uc_response_hdlr) |
| 886 | (struct IpaHwSharedMemCommonMapping_t *uc_sram_mmio, |
| 887 | u32 *uc_status); |
| 888 | |
| 889 | void (*ipa_uc_event_log_info_hdlr) |
| 890 | (struct IpaHwEventLogInfoData_t *uc_event_top_mmio); |
| 891 | }; |
| 892 | |
| 893 | /** |
| 894 | * enum ipa3_hw_flags - flags which defines the behavior of HW |
| 895 | * |
| 896 | * @IPA_HW_FLAG_HALT_SYSTEM_ON_ASSERT_FAILURE: Halt system in case of assert |
| 897 | * failure. |
| 898 | * @IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_ERORR: Channel error would be reported |
| 899 | * in the event ring only. No event to CPU. |
| 900 | * @IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_WAKE_UP: No need to report event |
| 901 | * IPA_HW_2_CPU_EVENT_MHI_WAKE_UP_REQUEST |
| 902 | * @IPA_HW_FLAG_WORK_OVER_DDR: Perform all transaction to external addresses by |
| 903 | * QMB (avoid memcpy) |
| 904 | * @IPA_HW_FLAG_NO_REPORT_OOB: If set do not report that the device is OOB in |
| 905 | * IN Channel |
| 906 | * @IPA_HW_FLAG_NO_REPORT_DB_MODE: If set, do not report that the device is |
| 907 | * entering a mode where it expects a doorbell to be rung for OUT Channel |
| 908 | * @IPA_HW_FLAG_NO_START_OOB_TIMER |
| 909 | */ |
| 910 | enum ipa3_hw_flags { |
| 911 | IPA_HW_FLAG_HALT_SYSTEM_ON_ASSERT_FAILURE = 0x01, |
| 912 | IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_ERORR = 0x02, |
| 913 | IPA_HW_FLAG_NO_REPORT_MHI_CHANNEL_WAKE_UP = 0x04, |
| 914 | IPA_HW_FLAG_WORK_OVER_DDR = 0x08, |
| 915 | IPA_HW_FLAG_NO_REPORT_OOB = 0x10, |
| 916 | IPA_HW_FLAG_NO_REPORT_DB_MODE = 0x20, |
| 917 | IPA_HW_FLAG_NO_START_OOB_TIMER = 0x40 |
| 918 | }; |
| 919 | |
| 920 | /** |
| 921 | * struct ipa3_uc_ctx - IPA uC context |
| 922 | * @uc_inited: Indicates if uC interface has been initialized |
| 923 | * @uc_loaded: Indicates if uC has loaded |
| 924 | * @uc_failed: Indicates if uC has failed / returned an error |
| 925 | * @uc_lock: uC interface lock to allow only one uC interaction at a time |
| 926 | * @uc_spinlock: same as uc_lock but for irq contexts |
| 927 | * @uc_completation: Completion mechanism to wait for uC commands |
| 928 | * @uc_sram_mmio: Pointer to uC mapped memory |
| 929 | * @pending_cmd: The last command sent waiting to be ACKed |
| 930 | * @uc_status: The last status provided by the uC |
| 931 | * @uc_error_type: error type from uC error event |
| 932 | * @uc_error_timestamp: tag timer sampled after uC crashed |
| 933 | */ |
| 934 | struct ipa3_uc_ctx { |
| 935 | bool uc_inited; |
| 936 | bool uc_loaded; |
| 937 | bool uc_failed; |
| 938 | struct mutex uc_lock; |
| 939 | spinlock_t uc_spinlock; |
| 940 | struct completion uc_completion; |
| 941 | struct IpaHwSharedMemCommonMapping_t *uc_sram_mmio; |
| 942 | struct IpaHwEventLogInfoData_t *uc_event_top_mmio; |
| 943 | u32 uc_event_top_ofst; |
| 944 | u32 pending_cmd; |
| 945 | u32 uc_status; |
| 946 | u32 uc_error_type; |
| 947 | u32 uc_error_timestamp; |
| 948 | phys_addr_t rdy_ring_base_pa; |
| 949 | phys_addr_t rdy_ring_rp_pa; |
| 950 | u32 rdy_ring_size; |
| 951 | phys_addr_t rdy_comp_ring_base_pa; |
| 952 | phys_addr_t rdy_comp_ring_wp_pa; |
| 953 | u32 rdy_comp_ring_size; |
| 954 | u32 *rdy_ring_rp_va; |
| 955 | u32 *rdy_comp_ring_wp_va; |
| 956 | }; |
| 957 | |
| 958 | /** |
| 959 | * struct ipa3_uc_wdi_ctx |
| 960 | * @wdi_uc_top_ofst: |
| 961 | * @wdi_uc_top_mmio: |
| 962 | * @wdi_uc_stats_ofst: |
| 963 | * @wdi_uc_stats_mmio: |
| 964 | */ |
| 965 | struct ipa3_uc_wdi_ctx { |
| 966 | /* WDI specific fields */ |
| 967 | u32 wdi_uc_stats_ofst; |
| 968 | struct IpaHwStatsWDIInfoData_t *wdi_uc_stats_mmio; |
| 969 | void *priv; |
| 970 | ipa_uc_ready_cb uc_ready_cb; |
| 971 | }; |
| 972 | |
| 973 | /** |
| 974 | * struct ipa3_transport_pm - transport power management related members |
| 975 | * @lock: lock for ensuring atomic operations |
| 976 | * @res_granted: true if SPS requested IPA resource and IPA granted it |
| 977 | * @res_rel_in_prog: true if releasing IPA resource is in progress |
| 978 | */ |
| 979 | struct ipa3_transport_pm { |
| 980 | spinlock_t lock; |
| 981 | bool res_granted; |
| 982 | bool res_rel_in_prog; |
| 983 | atomic_t dec_clients; |
| 984 | atomic_t eot_activity; |
| 985 | }; |
| 986 | |
| 987 | /** |
| 988 | * struct ipa3cm_client_info - the client-info indicated from IPACM |
| 989 | * @ipacm_client_enum: the enum to indicate tether-client |
| 990 | * @ipacm_client_uplink: the bool to indicate pipe for uplink |
| 991 | */ |
| 992 | struct ipa3cm_client_info { |
| 993 | enum ipacm_client_enum client_enum; |
| 994 | bool uplink; |
| 995 | }; |
| 996 | |
| 997 | struct ipa3_smp2p_info { |
| 998 | u32 out_base_id; |
| 999 | u32 in_base_id; |
| 1000 | bool res_sent; |
| 1001 | }; |
| 1002 | |
| 1003 | /** |
| 1004 | * struct ipa3_ready_cb_info - A list of all the registrations |
| 1005 | * for an indication of IPA driver readiness |
| 1006 | * |
| 1007 | * @link: linked list link |
| 1008 | * @ready_cb: callback |
| 1009 | * @user_data: User data |
| 1010 | * |
| 1011 | */ |
| 1012 | struct ipa3_ready_cb_info { |
| 1013 | struct list_head link; |
| 1014 | ipa_ready_cb ready_cb; |
| 1015 | void *user_data; |
| 1016 | }; |
| 1017 | |
| 1018 | /** |
| 1019 | * struct ipa3_context - IPA context |
| 1020 | * @class: pointer to the struct class |
| 1021 | * @dev_num: device number |
| 1022 | * @dev: the dev_t of the device |
| 1023 | * @cdev: cdev of the device |
| 1024 | * @bam_handle: IPA driver's BAM handle |
| 1025 | * @ep: list of all end points |
| 1026 | * @skip_ep_cfg_shadow: state to update filter table correctly across |
| 1027 | power-save |
| 1028 | * @ep_flt_bitmap: End-points supporting filtering bitmap |
| 1029 | * @ep_flt_num: End-points supporting filtering number |
| 1030 | * @resume_on_connect: resume ep on ipa3_connect |
| 1031 | * @flt_tbl: list of all IPA filter tables |
| 1032 | * @mode: IPA operating mode |
| 1033 | * @mmio: iomem |
| 1034 | * @ipa_wrapper_base: IPA wrapper base address |
| 1035 | * @hdr_tbl: IPA header table |
| 1036 | * @hdr_proc_ctx_tbl: IPA processing context table |
| 1037 | * @rt_tbl_set: list of routing tables each of which is a list of rules |
| 1038 | * @reap_rt_tbl_set: list of sys mem routing tables waiting to be reaped |
| 1039 | * @flt_rule_cache: filter rule cache |
| 1040 | * @rt_rule_cache: routing rule cache |
| 1041 | * @hdr_cache: header cache |
| 1042 | * @hdr_offset_cache: header offset cache |
| 1043 | * @hdr_proc_ctx_cache: processing context cache |
| 1044 | * @hdr_proc_ctx_offset_cache: processing context offset cache |
| 1045 | * @rt_tbl_cache: routing table cache |
| 1046 | * @tx_pkt_wrapper_cache: Tx packets cache |
| 1047 | * @rx_pkt_wrapper_cache: Rx packets cache |
| 1048 | * @rt_idx_bitmap: routing table index bitmap |
| 1049 | * @lock: this does NOT protect the linked lists within ipa3_sys_context |
| 1050 | * @smem_sz: shared memory size available for SW use starting |
| 1051 | * from non-restricted bytes |
| 1052 | * @smem_restricted_bytes: the bytes that SW should not use in the shared mem |
| 1053 | * @nat_mem: NAT memory |
| 1054 | * @excp_hdr_hdl: exception header handle |
| 1055 | * @dflt_v4_rt_rule_hdl: default v4 routing rule handle |
| 1056 | * @dflt_v6_rt_rule_hdl: default v6 routing rule handle |
| 1057 | * @aggregation_type: aggregation type used on USB client endpoint |
| 1058 | * @aggregation_byte_limit: aggregation byte limit used on USB client endpoint |
| 1059 | * @aggregation_time_limit: aggregation time limit used on USB client endpoint |
| 1060 | * @hdr_tbl_lcl: where hdr tbl resides 1-local, 0-system |
| 1061 | * @hdr_proc_ctx_tbl_lcl: where proc_ctx tbl resides true-local, false-system |
| 1062 | * @hdr_mem: header memory |
| 1063 | * @hdr_proc_ctx_mem: processing context memory |
| 1064 | * @ip4_rt_tbl_lcl: where ip4 rt tables reside 1-local; 0-system |
| 1065 | * @ip6_rt_tbl_lcl: where ip6 rt tables reside 1-local; 0-system |
| 1066 | * @ip4_flt_tbl_lcl: where ip4 flt tables reside 1-local; 0-system |
| 1067 | * @ip6_flt_tbl_lcl: where ip6 flt tables reside 1-local; 0-system |
| 1068 | * @power_mgmt_wq: workqueue for power management |
| 1069 | * @transport_power_mgmt_wq: workqueue transport related power management |
| 1070 | * @tag_process_before_gating: indicates whether to start tag process before |
| 1071 | * gating IPA clocks |
| 1072 | * @transport_pm: transport power management related information |
| 1073 | * @disconnect_lock: protects LAN_CONS packet receive notification CB |
| 1074 | * @pipe_mem_pool: pipe memory pool |
| 1075 | * @dma_pool: special purpose DMA pool |
| 1076 | * @ipa3_active_clients: structure for reference counting connected IPA clients |
| 1077 | * @ipa_hw_type: type of IPA HW type (e.g. IPA 1.0, IPA 1.1 etc') |
| 1078 | * @ipa3_hw_mode: mode of IPA HW mode (e.g. Normal, Virtual or over PCIe) |
| 1079 | * @use_ipa_teth_bridge: use tethering bridge driver |
| 1080 | * @ipa_bam_remote_mode: ipa bam is in remote mode |
| 1081 | * @modem_cfg_emb_pipe_flt: modem configure embedded pipe filtering rules |
| 1082 | * @logbuf: ipc log buffer for high priority messages |
| 1083 | * @logbuf_low: ipc log buffer for low priority messages |
| 1084 | * @ipa_wdi2: using wdi-2.0 |
| 1085 | * @use_64_bit_dma_mask: using 64bits dma mask |
| 1086 | * @ipa_bus_hdl: msm driver handle for the data path bus |
| 1087 | * @ctrl: holds the core specific operations based on |
| 1088 | * core version (vtable like) |
| 1089 | * @enable_clock_scaling: clock scaling is enabled ? |
| 1090 | * @curr_ipa_clk_rate: ipa3_clk current rate |
| 1091 | * @wcstats: wlan common buffer stats |
| 1092 | * @uc_ctx: uC interface context |
| 1093 | * @uc_wdi_ctx: WDI specific fields for uC interface |
| 1094 | * @ipa_num_pipes: The number of pipes used by IPA HW |
| 1095 | * @skip_uc_pipe_reset: Indicates whether pipe reset via uC needs to be avoided |
| 1096 | * @ipa_client_apps_wan_cons_agg_gro: RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA |
| 1097 | * @apply_rg10_wa: Indicates whether to use register group 10 workaround |
| 1098 | * @gsi_ch20_wa: Indicates whether to apply GSI physical channel 20 workaround |
| 1099 | * @w_lock: Indicates the wakeup source. |
| 1100 | * @wakelock_ref_cnt: Indicates the number of times wakelock is acquired |
| 1101 | * @ipa_initialization_complete: Indicates that IPA is fully initialized |
| 1102 | * @ipa_ready_cb_list: A list of all the clients who require a CB when IPA |
| 1103 | * driver is ready/initialized. |
| 1104 | * @init_completion_obj: Completion object to be used in case IPA driver hasn't |
| 1105 | * finished initializing. Example of use - IOCTLs to /dev/ipa |
| 1106 | * IPA context - holds all relevant info about IPA driver and its state |
| 1107 | */ |
| 1108 | struct ipa3_context { |
| 1109 | struct class *class; |
| 1110 | dev_t dev_num; |
| 1111 | struct device *dev; |
| 1112 | struct cdev cdev; |
| 1113 | unsigned long bam_handle; |
| 1114 | struct ipa3_ep_context ep[IPA3_MAX_NUM_PIPES]; |
| 1115 | bool skip_ep_cfg_shadow[IPA3_MAX_NUM_PIPES]; |
| 1116 | u32 ep_flt_bitmap; |
| 1117 | u32 ep_flt_num; |
| 1118 | bool resume_on_connect[IPA_CLIENT_MAX]; |
| 1119 | struct ipa3_flt_tbl flt_tbl[IPA3_MAX_NUM_PIPES][IPA_IP_MAX]; |
| 1120 | void __iomem *mmio; |
| 1121 | u32 ipa_wrapper_base; |
| 1122 | u32 ipa_wrapper_size; |
| 1123 | struct ipa3_hdr_tbl hdr_tbl; |
| 1124 | struct ipa3_hdr_proc_ctx_tbl hdr_proc_ctx_tbl; |
| 1125 | struct ipa3_rt_tbl_set rt_tbl_set[IPA_IP_MAX]; |
| 1126 | struct ipa3_rt_tbl_set reap_rt_tbl_set[IPA_IP_MAX]; |
| 1127 | struct kmem_cache *flt_rule_cache; |
| 1128 | struct kmem_cache *rt_rule_cache; |
| 1129 | struct kmem_cache *hdr_cache; |
| 1130 | struct kmem_cache *hdr_offset_cache; |
| 1131 | struct kmem_cache *hdr_proc_ctx_cache; |
| 1132 | struct kmem_cache *hdr_proc_ctx_offset_cache; |
| 1133 | struct kmem_cache *rt_tbl_cache; |
| 1134 | struct kmem_cache *tx_pkt_wrapper_cache; |
| 1135 | struct kmem_cache *rx_pkt_wrapper_cache; |
| 1136 | unsigned long rt_idx_bitmap[IPA_IP_MAX]; |
| 1137 | struct mutex lock; |
| 1138 | u16 smem_sz; |
| 1139 | u16 smem_restricted_bytes; |
| 1140 | u16 smem_reqd_sz; |
| 1141 | struct ipa3_nat_mem nat_mem; |
| 1142 | u32 excp_hdr_hdl; |
| 1143 | u32 dflt_v4_rt_rule_hdl; |
| 1144 | u32 dflt_v6_rt_rule_hdl; |
| 1145 | uint aggregation_type; |
| 1146 | uint aggregation_byte_limit; |
| 1147 | uint aggregation_time_limit; |
| 1148 | bool hdr_tbl_lcl; |
| 1149 | bool hdr_proc_ctx_tbl_lcl; |
| 1150 | struct ipa_mem_buffer hdr_mem; |
| 1151 | struct ipa_mem_buffer hdr_proc_ctx_mem; |
| 1152 | bool ip4_rt_tbl_hash_lcl; |
| 1153 | bool ip4_rt_tbl_nhash_lcl; |
| 1154 | bool ip6_rt_tbl_hash_lcl; |
| 1155 | bool ip6_rt_tbl_nhash_lcl; |
| 1156 | bool ip4_flt_tbl_hash_lcl; |
| 1157 | bool ip4_flt_tbl_nhash_lcl; |
| 1158 | bool ip6_flt_tbl_hash_lcl; |
| 1159 | bool ip6_flt_tbl_nhash_lcl; |
| 1160 | struct gen_pool *pipe_mem_pool; |
| 1161 | struct dma_pool *dma_pool; |
| 1162 | struct ipa3_active_clients ipa3_active_clients; |
| 1163 | struct ipa3_active_clients_log_ctx ipa3_active_clients_logging; |
| 1164 | struct workqueue_struct *power_mgmt_wq; |
| 1165 | struct workqueue_struct *transport_power_mgmt_wq; |
| 1166 | bool tag_process_before_gating; |
| 1167 | struct ipa3_transport_pm transport_pm; |
| 1168 | u32 clnt_hdl_cmd; |
| 1169 | u32 clnt_hdl_data_in; |
| 1170 | u32 clnt_hdl_data_out; |
| 1171 | spinlock_t disconnect_lock; |
| 1172 | u8 a5_pipe_index; |
| 1173 | struct list_head intf_list; |
| 1174 | struct list_head msg_list; |
| 1175 | struct list_head pull_msg_list; |
| 1176 | struct mutex msg_lock; |
| 1177 | wait_queue_head_t msg_waitq; |
| 1178 | enum ipa_hw_type ipa_hw_type; |
| 1179 | enum ipa3_hw_mode ipa3_hw_mode; |
| 1180 | bool use_ipa_teth_bridge; |
| 1181 | bool ipa_bam_remote_mode; |
| 1182 | bool modem_cfg_emb_pipe_flt; |
| 1183 | bool ipa_wdi2; |
| 1184 | bool use_64_bit_dma_mask; |
| 1185 | /* featurize if memory footprint becomes a concern */ |
| 1186 | struct ipa3_stats stats; |
| 1187 | void *smem_pipe_mem; |
| 1188 | void *logbuf; |
| 1189 | void *logbuf_low; |
| 1190 | u32 ipa_bus_hdl; |
| 1191 | struct ipa3_controller *ctrl; |
| 1192 | struct idr ipa_idr; |
| 1193 | struct device *pdev; |
| 1194 | struct device *uc_pdev; |
| 1195 | spinlock_t idr_lock; |
| 1196 | u32 enable_clock_scaling; |
| 1197 | u32 curr_ipa_clk_rate; |
| 1198 | bool q6_proxy_clk_vote_valid; |
| 1199 | u32 ipa_num_pipes; |
| 1200 | |
| 1201 | struct ipa3_wlan_comm_memb wc_memb; |
| 1202 | |
| 1203 | struct ipa3_uc_ctx uc_ctx; |
| 1204 | |
| 1205 | struct ipa3_uc_wdi_ctx uc_wdi_ctx; |
| 1206 | struct ipa3_uc_ntn_ctx uc_ntn_ctx; |
| 1207 | u32 wan_rx_ring_size; |
| 1208 | u32 lan_rx_ring_size; |
| 1209 | bool skip_uc_pipe_reset; |
| 1210 | enum ipa_transport_type transport_prototype; |
| 1211 | unsigned long gsi_dev_hdl; |
| 1212 | u32 ee; |
| 1213 | bool apply_rg10_wa; |
| 1214 | bool gsi_ch20_wa; |
| 1215 | bool smmu_present; |
| 1216 | bool smmu_s1_bypass; |
| 1217 | unsigned long peer_bam_iova; |
| 1218 | phys_addr_t peer_bam_pa; |
| 1219 | u32 peer_bam_map_size; |
| 1220 | unsigned long peer_bam_dev; |
| 1221 | u32 peer_bam_map_cnt; |
| 1222 | u32 wdi_map_cnt; |
| 1223 | struct wakeup_source w_lock; |
| 1224 | struct ipa3_wakelock_ref_cnt wakelock_ref_cnt; |
| 1225 | /* RMNET_IOCTL_INGRESS_FORMAT_AGG_DATA */ |
| 1226 | bool ipa_client_apps_wan_cons_agg_gro; |
| 1227 | /* M-release support to know client pipes */ |
| 1228 | struct ipa3cm_client_info ipacm_client[IPA3_MAX_NUM_PIPES]; |
| 1229 | bool tethered_flow_control; |
| 1230 | bool ipa_initialization_complete; |
| 1231 | struct list_head ipa_ready_cb_list; |
| 1232 | struct completion init_completion_obj; |
| 1233 | struct ipa3_smp2p_info smp2p_info; |
| 1234 | }; |
| 1235 | |
| 1236 | /** |
| 1237 | * enum ipa3_pipe_mem_type - IPA pipe memory type |
| 1238 | * @IPA_SPS_PIPE_MEM: Default, SPS dedicated pipe memory |
| 1239 | * @IPA_PRIVATE_MEM: IPA's private memory |
| 1240 | * @IPA_SYSTEM_MEM: System RAM, requires allocation |
| 1241 | */ |
| 1242 | enum ipa3_pipe_mem_type { |
| 1243 | IPA_SPS_PIPE_MEM = 0, |
| 1244 | IPA_PRIVATE_MEM = 1, |
| 1245 | IPA_SYSTEM_MEM = 2, |
| 1246 | }; |
| 1247 | |
| 1248 | struct ipa3_plat_drv_res { |
| 1249 | bool use_ipa_teth_bridge; |
| 1250 | u32 ipa_mem_base; |
| 1251 | u32 ipa_mem_size; |
| 1252 | u32 transport_mem_base; |
| 1253 | u32 transport_mem_size; |
| 1254 | u32 ipa_irq; |
| 1255 | u32 transport_irq; |
| 1256 | u32 ipa_pipe_mem_start_ofst; |
| 1257 | u32 ipa_pipe_mem_size; |
| 1258 | enum ipa_hw_type ipa_hw_type; |
| 1259 | enum ipa3_hw_mode ipa3_hw_mode; |
| 1260 | u32 ee; |
| 1261 | bool ipa_bam_remote_mode; |
| 1262 | bool modem_cfg_emb_pipe_flt; |
| 1263 | bool ipa_wdi2; |
| 1264 | bool use_64_bit_dma_mask; |
| 1265 | u32 wan_rx_ring_size; |
| 1266 | u32 lan_rx_ring_size; |
| 1267 | bool skip_uc_pipe_reset; |
| 1268 | enum ipa_transport_type transport_prototype; |
| 1269 | bool apply_rg10_wa; |
| 1270 | bool gsi_ch20_wa; |
| 1271 | bool tethered_flow_control; |
| 1272 | }; |
| 1273 | |
| 1274 | /** |
| 1275 | * struct ipa3_mem_partition - represents IPA RAM Map as read from DTS |
| 1276 | * Order and type of members should not be changed without a suitable change |
| 1277 | * to DTS file or the code that reads it. |
| 1278 | * |
| 1279 | * IPA v3.0 SRAM memory layout: |
| 1280 | * +-------------------------+ |
| 1281 | * | UC INFO | |
| 1282 | * +-------------------------+ |
| 1283 | * | CANARY | |
| 1284 | * +-------------------------+ |
| 1285 | * | CANARY | |
| 1286 | * +-------------------------+ |
| 1287 | * | V4 FLT HDR HASHABLE | |
| 1288 | * +-------------------------+ |
| 1289 | * | CANARY | |
| 1290 | * +-------------------------+ |
| 1291 | * | CANARY | |
| 1292 | * +-------------------------+ |
| 1293 | * | V4 FLT HDR NON-HASHABLE | |
| 1294 | * +-------------------------+ |
| 1295 | * | CANARY | |
| 1296 | * +-------------------------+ |
| 1297 | * | CANARY | |
| 1298 | * +-------------------------+ |
| 1299 | * | V6 FLT HDR HASHABLE | |
| 1300 | * +-------------------------+ |
| 1301 | * | CANARY | |
| 1302 | * +-------------------------+ |
| 1303 | * | CANARY | |
| 1304 | * +-------------------------+ |
| 1305 | * | V6 FLT HDR NON-HASHABLE | |
| 1306 | * +-------------------------+ |
| 1307 | * | CANARY | |
| 1308 | * +-------------------------+ |
| 1309 | * | CANARY | |
| 1310 | * +-------------------------+ |
| 1311 | * | V4 RT HDR HASHABLE | |
| 1312 | * +-------------------------+ |
| 1313 | * | CANARY | |
| 1314 | * +-------------------------+ |
| 1315 | * | CANARY | |
| 1316 | * +-------------------------+ |
| 1317 | * | V4 RT HDR NON-HASHABLE | |
| 1318 | * +-------------------------+ |
| 1319 | * | CANARY | |
| 1320 | * +-------------------------+ |
| 1321 | * | CANARY | |
| 1322 | * +-------------------------+ |
| 1323 | * | V6 RT HDR HASHABLE | |
| 1324 | * +-------------------------+ |
| 1325 | * | CANARY | |
| 1326 | * +-------------------------+ |
| 1327 | * | CANARY | |
| 1328 | * +-------------------------+ |
| 1329 | * | V6 RT HDR NON-HASHABLE | |
| 1330 | * +-------------------------+ |
| 1331 | * | CANARY | |
| 1332 | * +-------------------------+ |
| 1333 | * | CANARY | |
| 1334 | * +-------------------------+ |
| 1335 | * | MODEM HDR | |
| 1336 | * +-------------------------+ |
| 1337 | * | CANARY | |
| 1338 | * +-------------------------+ |
| 1339 | * | CANARY | |
| 1340 | * +-------------------------+ |
| 1341 | * | MODEM PROC CTX | |
| 1342 | * +-------------------------+ |
| 1343 | * | APPS PROC CTX | |
| 1344 | * +-------------------------+ |
| 1345 | * | CANARY | |
| 1346 | * +-------------------------+ |
| 1347 | * | MODEM MEM | |
| 1348 | * +-------------------------+ |
| 1349 | * | CANARY | |
| 1350 | * +-------------------------+ |
| 1351 | */ |
| 1352 | struct ipa3_mem_partition { |
| 1353 | u32 ofst_start; |
| 1354 | u32 nat_ofst; |
| 1355 | u32 nat_size; |
| 1356 | u32 v4_flt_hash_ofst; |
| 1357 | u32 v4_flt_hash_size; |
| 1358 | u32 v4_flt_hash_size_ddr; |
| 1359 | u32 v4_flt_nhash_ofst; |
| 1360 | u32 v4_flt_nhash_size; |
| 1361 | u32 v4_flt_nhash_size_ddr; |
| 1362 | u32 v6_flt_hash_ofst; |
| 1363 | u32 v6_flt_hash_size; |
| 1364 | u32 v6_flt_hash_size_ddr; |
| 1365 | u32 v6_flt_nhash_ofst; |
| 1366 | u32 v6_flt_nhash_size; |
| 1367 | u32 v6_flt_nhash_size_ddr; |
| 1368 | u32 v4_rt_num_index; |
| 1369 | u32 v4_modem_rt_index_lo; |
| 1370 | u32 v4_modem_rt_index_hi; |
| 1371 | u32 v4_apps_rt_index_lo; |
| 1372 | u32 v4_apps_rt_index_hi; |
| 1373 | u32 v4_rt_hash_ofst; |
| 1374 | u32 v4_rt_hash_size; |
| 1375 | u32 v4_rt_hash_size_ddr; |
| 1376 | u32 v4_rt_nhash_ofst; |
| 1377 | u32 v4_rt_nhash_size; |
| 1378 | u32 v4_rt_nhash_size_ddr; |
| 1379 | u32 v6_rt_num_index; |
| 1380 | u32 v6_modem_rt_index_lo; |
| 1381 | u32 v6_modem_rt_index_hi; |
| 1382 | u32 v6_apps_rt_index_lo; |
| 1383 | u32 v6_apps_rt_index_hi; |
| 1384 | u32 v6_rt_hash_ofst; |
| 1385 | u32 v6_rt_hash_size; |
| 1386 | u32 v6_rt_hash_size_ddr; |
| 1387 | u32 v6_rt_nhash_ofst; |
| 1388 | u32 v6_rt_nhash_size; |
| 1389 | u32 v6_rt_nhash_size_ddr; |
| 1390 | u32 modem_hdr_ofst; |
| 1391 | u32 modem_hdr_size; |
| 1392 | u32 apps_hdr_ofst; |
| 1393 | u32 apps_hdr_size; |
| 1394 | u32 apps_hdr_size_ddr; |
| 1395 | u32 modem_hdr_proc_ctx_ofst; |
| 1396 | u32 modem_hdr_proc_ctx_size; |
| 1397 | u32 apps_hdr_proc_ctx_ofst; |
| 1398 | u32 apps_hdr_proc_ctx_size; |
| 1399 | u32 apps_hdr_proc_ctx_size_ddr; |
| 1400 | u32 modem_comp_decomp_ofst; |
| 1401 | u32 modem_comp_decomp_size; |
| 1402 | u32 modem_ofst; |
| 1403 | u32 modem_size; |
| 1404 | u32 apps_v4_flt_hash_ofst; |
| 1405 | u32 apps_v4_flt_hash_size; |
| 1406 | u32 apps_v4_flt_nhash_ofst; |
| 1407 | u32 apps_v4_flt_nhash_size; |
| 1408 | u32 apps_v6_flt_hash_ofst; |
| 1409 | u32 apps_v6_flt_hash_size; |
| 1410 | u32 apps_v6_flt_nhash_ofst; |
| 1411 | u32 apps_v6_flt_nhash_size; |
| 1412 | u32 uc_info_ofst; |
| 1413 | u32 uc_info_size; |
| 1414 | u32 end_ofst; |
| 1415 | u32 apps_v4_rt_hash_ofst; |
| 1416 | u32 apps_v4_rt_hash_size; |
| 1417 | u32 apps_v4_rt_nhash_ofst; |
| 1418 | u32 apps_v4_rt_nhash_size; |
| 1419 | u32 apps_v6_rt_hash_ofst; |
| 1420 | u32 apps_v6_rt_hash_size; |
| 1421 | u32 apps_v6_rt_nhash_ofst; |
| 1422 | u32 apps_v6_rt_nhash_size; |
| 1423 | }; |
| 1424 | |
| 1425 | struct ipa3_controller { |
| 1426 | struct ipa3_mem_partition mem_partition; |
| 1427 | u32 ipa_clk_rate_turbo; |
| 1428 | u32 ipa_clk_rate_nominal; |
| 1429 | u32 ipa_clk_rate_svs; |
| 1430 | u32 clock_scaling_bw_threshold_turbo; |
| 1431 | u32 clock_scaling_bw_threshold_nominal; |
| 1432 | u32 ipa_reg_base_ofst; |
| 1433 | u32 max_holb_tmr_val; |
| 1434 | void (*ipa_sram_read_settings)(void); |
| 1435 | int (*ipa_init_sram)(void); |
| 1436 | int (*ipa_init_hdr)(void); |
| 1437 | int (*ipa_init_rt4)(void); |
| 1438 | int (*ipa_init_rt6)(void); |
| 1439 | int (*ipa_init_flt4)(void); |
| 1440 | int (*ipa_init_flt6)(void); |
| 1441 | int (*ipa3_read_ep_reg)(char *buff, int max_len, int pipe); |
| 1442 | int (*ipa3_commit_flt)(enum ipa_ip_type ip); |
| 1443 | int (*ipa3_commit_rt)(enum ipa_ip_type ip); |
| 1444 | int (*ipa3_commit_hdr)(void); |
| 1445 | void (*ipa3_enable_clks)(void); |
| 1446 | void (*ipa3_disable_clks)(void); |
| 1447 | struct msm_bus_scale_pdata *msm_bus_data_ptr; |
| 1448 | }; |
| 1449 | |
| 1450 | extern struct ipa3_context *ipa3_ctx; |
| 1451 | |
| 1452 | /* public APIs */ |
| 1453 | /* |
| 1454 | * Connect / Disconnect |
| 1455 | */ |
| 1456 | int ipa3_connect(const struct ipa_connect_params *in, |
| 1457 | struct ipa_sps_params *sps, |
| 1458 | u32 *clnt_hdl); |
| 1459 | int ipa3_disconnect(u32 clnt_hdl); |
| 1460 | |
| 1461 | /* Generic GSI channels functions */ |
| 1462 | int ipa3_request_gsi_channel(struct ipa_request_gsi_channel_params *params, |
| 1463 | struct ipa_req_chan_out_params *out_params); |
| 1464 | |
| 1465 | int ipa3_release_gsi_channel(u32 clnt_hdl); |
| 1466 | |
| 1467 | int ipa3_start_gsi_channel(u32 clnt_hdl); |
| 1468 | |
| 1469 | int ipa3_stop_gsi_channel(u32 clnt_hdl); |
| 1470 | |
| 1471 | int ipa3_reset_gsi_channel(u32 clnt_hdl); |
| 1472 | |
| 1473 | int ipa3_reset_gsi_event_ring(u32 clnt_hdl); |
| 1474 | |
| 1475 | /* Specific xDCI channels functions */ |
| 1476 | int ipa3_set_usb_max_packet_size( |
| 1477 | enum ipa_usb_max_usb_packet_size usb_max_packet_size); |
| 1478 | |
| 1479 | int ipa3_xdci_connect(u32 clnt_hdl, u8 xferrscidx, bool xferrscidx_valid); |
| 1480 | |
| 1481 | int ipa3_xdci_disconnect(u32 clnt_hdl, bool should_force_clear, u32 qmi_req_id); |
| 1482 | |
| 1483 | int ipa3_xdci_suspend(u32 ul_clnt_hdl, u32 dl_clnt_hdl, |
| 1484 | bool should_force_clear, u32 qmi_req_id, bool is_dpl); |
| 1485 | |
| 1486 | int ipa3_xdci_resume(u32 ul_clnt_hdl, u32 dl_clnt_hdl, bool is_dpl); |
| 1487 | |
| 1488 | /* |
| 1489 | * Resume / Suspend |
| 1490 | */ |
| 1491 | int ipa3_reset_endpoint(u32 clnt_hdl); |
| 1492 | |
| 1493 | /* |
| 1494 | * Remove ep delay |
| 1495 | */ |
| 1496 | int ipa3_clear_endpoint_delay(u32 clnt_hdl); |
| 1497 | |
| 1498 | /* |
| 1499 | * Configuration |
| 1500 | */ |
| 1501 | int ipa3_cfg_ep(u32 clnt_hdl, const struct ipa_ep_cfg *ipa_ep_cfg); |
| 1502 | |
| 1503 | int ipa3_cfg_ep_nat(u32 clnt_hdl, const struct ipa_ep_cfg_nat *ipa_ep_cfg); |
| 1504 | |
| 1505 | int ipa3_cfg_ep_hdr(u32 clnt_hdl, const struct ipa_ep_cfg_hdr *ipa_ep_cfg); |
| 1506 | |
| 1507 | int ipa3_cfg_ep_hdr_ext(u32 clnt_hdl, |
| 1508 | const struct ipa_ep_cfg_hdr_ext *ipa_ep_cfg); |
| 1509 | |
| 1510 | int ipa3_cfg_ep_mode(u32 clnt_hdl, const struct ipa_ep_cfg_mode *ipa_ep_cfg); |
| 1511 | |
| 1512 | int ipa3_cfg_ep_aggr(u32 clnt_hdl, const struct ipa_ep_cfg_aggr *ipa_ep_cfg); |
| 1513 | |
| 1514 | int ipa3_cfg_ep_deaggr(u32 clnt_hdl, |
| 1515 | const struct ipa_ep_cfg_deaggr *ipa_ep_cfg); |
| 1516 | |
| 1517 | int ipa3_cfg_ep_route(u32 clnt_hdl, const struct ipa_ep_cfg_route *ipa_ep_cfg); |
| 1518 | |
| 1519 | int ipa3_cfg_ep_holb(u32 clnt_hdl, const struct ipa_ep_cfg_holb *ipa_ep_cfg); |
| 1520 | |
| 1521 | int ipa3_cfg_ep_cfg(u32 clnt_hdl, const struct ipa_ep_cfg_cfg *ipa_ep_cfg); |
| 1522 | |
| 1523 | int ipa3_cfg_ep_metadata_mask(u32 clnt_hdl, |
| 1524 | const struct ipa_ep_cfg_metadata_mask *ipa_ep_cfg); |
| 1525 | |
| 1526 | int ipa3_cfg_ep_holb_by_client(enum ipa_client_type client, |
| 1527 | const struct ipa_ep_cfg_holb *ipa_ep_cfg); |
| 1528 | |
| 1529 | int ipa3_cfg_ep_ctrl(u32 clnt_hdl, const struct ipa_ep_cfg_ctrl *ep_ctrl); |
| 1530 | |
| 1531 | /* |
| 1532 | * Header removal / addition |
| 1533 | */ |
| 1534 | int ipa3_add_hdr(struct ipa_ioc_add_hdr *hdrs); |
| 1535 | |
| 1536 | int ipa3_del_hdr(struct ipa_ioc_del_hdr *hdls); |
| 1537 | |
| 1538 | int ipa3_commit_hdr(void); |
| 1539 | |
| 1540 | int ipa3_reset_hdr(void); |
| 1541 | |
| 1542 | int ipa3_get_hdr(struct ipa_ioc_get_hdr *lookup); |
| 1543 | |
| 1544 | int ipa3_put_hdr(u32 hdr_hdl); |
| 1545 | |
| 1546 | int ipa3_copy_hdr(struct ipa_ioc_copy_hdr *copy); |
| 1547 | |
| 1548 | /* |
| 1549 | * Header Processing Context |
| 1550 | */ |
| 1551 | int ipa3_add_hdr_proc_ctx(struct ipa_ioc_add_hdr_proc_ctx *proc_ctxs); |
| 1552 | |
| 1553 | int ipa3_del_hdr_proc_ctx(struct ipa_ioc_del_hdr_proc_ctx *hdls); |
| 1554 | |
| 1555 | /* |
| 1556 | * Routing |
| 1557 | */ |
| 1558 | int ipa3_add_rt_rule(struct ipa_ioc_add_rt_rule *rules); |
| 1559 | |
| 1560 | int ipa3_add_rt_rule_after(struct ipa_ioc_add_rt_rule_after *rules); |
| 1561 | |
| 1562 | int ipa3_del_rt_rule(struct ipa_ioc_del_rt_rule *hdls); |
| 1563 | |
| 1564 | int ipa3_commit_rt(enum ipa_ip_type ip); |
| 1565 | |
| 1566 | int ipa3_reset_rt(enum ipa_ip_type ip); |
| 1567 | |
| 1568 | int ipa3_get_rt_tbl(struct ipa_ioc_get_rt_tbl *lookup); |
| 1569 | |
| 1570 | int ipa3_put_rt_tbl(u32 rt_tbl_hdl); |
| 1571 | |
| 1572 | int ipa3_query_rt_index(struct ipa_ioc_get_rt_tbl_indx *in); |
| 1573 | |
| 1574 | int ipa3_mdfy_rt_rule(struct ipa_ioc_mdfy_rt_rule *rules); |
| 1575 | |
| 1576 | /* |
| 1577 | * Filtering |
| 1578 | */ |
| 1579 | int ipa3_add_flt_rule(struct ipa_ioc_add_flt_rule *rules); |
| 1580 | |
| 1581 | int ipa3_add_flt_rule_after(struct ipa_ioc_add_flt_rule_after *rules); |
| 1582 | |
| 1583 | int ipa3_del_flt_rule(struct ipa_ioc_del_flt_rule *hdls); |
| 1584 | |
| 1585 | int ipa3_mdfy_flt_rule(struct ipa_ioc_mdfy_flt_rule *rules); |
| 1586 | |
| 1587 | int ipa3_commit_flt(enum ipa_ip_type ip); |
| 1588 | |
| 1589 | int ipa3_reset_flt(enum ipa_ip_type ip); |
| 1590 | |
| 1591 | /* |
| 1592 | * NAT |
| 1593 | */ |
| 1594 | int ipa3_allocate_nat_device(struct ipa_ioc_nat_alloc_mem *mem); |
| 1595 | |
| 1596 | int ipa3_nat_init_cmd(struct ipa_ioc_v4_nat_init *init); |
| 1597 | |
| 1598 | int ipa3_nat_dma_cmd(struct ipa_ioc_nat_dma_cmd *dma); |
| 1599 | |
| 1600 | int ipa3_nat_del_cmd(struct ipa_ioc_v4_nat_del *del); |
| 1601 | |
| 1602 | /* |
| 1603 | * Messaging |
| 1604 | */ |
| 1605 | int ipa3_send_msg(struct ipa_msg_meta *meta, void *buff, |
| 1606 | ipa_msg_free_fn callback); |
| 1607 | int ipa3_register_pull_msg(struct ipa_msg_meta *meta, ipa_msg_pull_fn callback); |
| 1608 | int ipa3_deregister_pull_msg(struct ipa_msg_meta *meta); |
| 1609 | |
| 1610 | /* |
| 1611 | * Interface |
| 1612 | */ |
| 1613 | int ipa3_register_intf(const char *name, const struct ipa_tx_intf *tx, |
| 1614 | const struct ipa_rx_intf *rx); |
| 1615 | int ipa3_register_intf_ext(const char *name, const struct ipa_tx_intf *tx, |
| 1616 | const struct ipa_rx_intf *rx, |
| 1617 | const struct ipa_ext_intf *ext); |
| 1618 | int ipa3_deregister_intf(const char *name); |
| 1619 | |
| 1620 | /* |
| 1621 | * Aggregation |
| 1622 | */ |
| 1623 | int ipa3_set_aggr_mode(enum ipa_aggr_mode mode); |
| 1624 | |
| 1625 | int ipa3_set_qcncm_ndp_sig(char sig[3]); |
| 1626 | |
| 1627 | int ipa3_set_single_ndp_per_mbim(bool enable); |
| 1628 | |
| 1629 | /* |
| 1630 | * Data path |
| 1631 | */ |
| 1632 | int ipa3_tx_dp(enum ipa_client_type dst, struct sk_buff *skb, |
| 1633 | struct ipa_tx_meta *metadata); |
| 1634 | |
| 1635 | /* |
| 1636 | * To transfer multiple data packets |
| 1637 | * While passing the data descriptor list, the anchor node |
| 1638 | * should be of type struct ipa_tx_data_desc not list_head |
| 1639 | */ |
| 1640 | int ipa3_tx_dp_mul(enum ipa_client_type dst, |
| 1641 | struct ipa_tx_data_desc *data_desc); |
| 1642 | |
| 1643 | void ipa3_free_skb(struct ipa_rx_data *); |
| 1644 | |
| 1645 | /* |
| 1646 | * System pipes |
| 1647 | */ |
| 1648 | int ipa3_setup_sys_pipe(struct ipa_sys_connect_params *sys_in, u32 *clnt_hdl); |
| 1649 | |
| 1650 | int ipa3_teardown_sys_pipe(u32 clnt_hdl); |
| 1651 | |
| 1652 | int ipa3_sys_setup(struct ipa_sys_connect_params *sys_in, |
| 1653 | unsigned long *ipa_bam_hdl, |
| 1654 | u32 *ipa_pipe_num, u32 *clnt_hdl, bool en_status); |
| 1655 | |
| 1656 | int ipa3_sys_teardown(u32 clnt_hdl); |
| 1657 | |
| 1658 | int ipa3_sys_update_gsi_hdls(u32 clnt_hdl, unsigned long gsi_ch_hdl, |
| 1659 | unsigned long gsi_ev_hdl); |
| 1660 | |
| 1661 | int ipa3_connect_wdi_pipe(struct ipa_wdi_in_params *in, |
| 1662 | struct ipa_wdi_out_params *out); |
| 1663 | int ipa3_disconnect_wdi_pipe(u32 clnt_hdl); |
| 1664 | int ipa3_enable_wdi_pipe(u32 clnt_hdl); |
| 1665 | int ipa3_disable_wdi_pipe(u32 clnt_hdl); |
| 1666 | int ipa3_resume_wdi_pipe(u32 clnt_hdl); |
| 1667 | int ipa3_suspend_wdi_pipe(u32 clnt_hdl); |
| 1668 | int ipa3_get_wdi_stats(struct IpaHwStatsWDIInfoData_t *stats); |
| 1669 | u16 ipa3_get_smem_restr_bytes(void); |
| 1670 | int ipa3_setup_uc_ntn_pipes(struct ipa_ntn_conn_in_params *in, |
| 1671 | ipa_notify_cb notify, void *priv, u8 hdr_len, |
| 1672 | struct ipa_ntn_conn_out_params *outp); |
| 1673 | int ipa3_tear_down_uc_offload_pipes(int ipa_ep_idx_ul, int ipa_ep_idx_dl); |
| 1674 | |
| 1675 | /* |
| 1676 | * To retrieve doorbell physical address of |
| 1677 | * wlan pipes |
| 1678 | */ |
| 1679 | int ipa3_uc_wdi_get_dbpa(struct ipa_wdi_db_params *out); |
| 1680 | |
| 1681 | /* |
| 1682 | * To register uC ready callback if uC not ready |
| 1683 | * and also check uC readiness |
| 1684 | * if uC not ready only, register callback |
| 1685 | */ |
| 1686 | int ipa3_uc_reg_rdyCB(struct ipa_wdi_uc_ready_params *param); |
| 1687 | /* |
| 1688 | * To de-register uC ready callback |
| 1689 | */ |
| 1690 | int ipa3_uc_dereg_rdyCB(void); |
| 1691 | |
| 1692 | /* |
| 1693 | * Tethering bridge (Rmnet / MBIM) |
| 1694 | */ |
| 1695 | int ipa3_teth_bridge_init(struct teth_bridge_init_params *params); |
| 1696 | |
| 1697 | int ipa3_teth_bridge_disconnect(enum ipa_client_type client); |
| 1698 | |
| 1699 | int ipa3_teth_bridge_connect(struct teth_bridge_connect_params *connect_params); |
| 1700 | |
| 1701 | /* |
| 1702 | * Tethering client info |
| 1703 | */ |
| 1704 | void ipa3_set_client(int index, enum ipacm_client_enum client, bool uplink); |
| 1705 | |
| 1706 | enum ipacm_client_enum ipa3_get_client(int pipe_idx); |
| 1707 | |
| 1708 | bool ipa3_get_client_uplink(int pipe_idx); |
| 1709 | |
| 1710 | /* |
| 1711 | * IPADMA |
| 1712 | */ |
| 1713 | int ipa3_dma_init(void); |
| 1714 | |
| 1715 | int ipa3_dma_enable(void); |
| 1716 | |
| 1717 | int ipa3_dma_disable(void); |
| 1718 | |
| 1719 | int ipa3_dma_sync_memcpy(u64 dest, u64 src, int len); |
| 1720 | |
| 1721 | int ipa3_dma_async_memcpy(u64 dest, u64 src, int len, |
| 1722 | void (*user_cb)(void *user1), void *user_param); |
| 1723 | |
| 1724 | int ipa3_dma_uc_memcpy(phys_addr_t dest, phys_addr_t src, int len); |
| 1725 | |
| 1726 | void ipa3_dma_destroy(void); |
| 1727 | |
| 1728 | /* |
| 1729 | * MHI |
| 1730 | */ |
| 1731 | |
| 1732 | int ipa3_mhi_init_engine(struct ipa_mhi_init_engine *params); |
| 1733 | |
| 1734 | int ipa3_connect_mhi_pipe( |
| 1735 | struct ipa_mhi_connect_params_internal *in, |
| 1736 | u32 *clnt_hdl); |
| 1737 | |
| 1738 | int ipa3_disconnect_mhi_pipe(u32 clnt_hdl); |
| 1739 | |
| 1740 | bool ipa3_mhi_stop_gsi_channel(enum ipa_client_type client); |
| 1741 | |
| 1742 | int ipa3_mhi_reset_channel_internal(enum ipa_client_type client); |
| 1743 | |
| 1744 | int ipa3_mhi_start_channel_internal(enum ipa_client_type client); |
| 1745 | |
| 1746 | bool ipa3_has_open_aggr_frame(enum ipa_client_type client); |
| 1747 | |
| 1748 | int ipa3_mhi_resume_channels_internal(enum ipa_client_type client, |
| 1749 | bool LPTransitionRejected, bool brstmode_enabled, |
| 1750 | union __packed gsi_channel_scratch ch_scratch, u8 index); |
| 1751 | |
| 1752 | int ipa3_mhi_destroy_channel(enum ipa_client_type client); |
| 1753 | |
| 1754 | /* |
| 1755 | * mux id |
| 1756 | */ |
| 1757 | int ipa3_write_qmap_id(struct ipa_ioc_write_qmapid *param_in); |
| 1758 | |
| 1759 | /* |
| 1760 | * interrupts |
| 1761 | */ |
| 1762 | int ipa3_add_interrupt_handler(enum ipa_irq_type interrupt, |
| 1763 | ipa_irq_handler_t handler, |
| 1764 | bool deferred_flag, |
| 1765 | void *private_data); |
| 1766 | |
| 1767 | int ipa3_remove_interrupt_handler(enum ipa_irq_type interrupt); |
| 1768 | |
| 1769 | /* |
| 1770 | * Miscellaneous |
| 1771 | */ |
| 1772 | void ipa3_bam_reg_dump(void); |
| 1773 | |
| 1774 | int ipa3_get_ep_mapping(enum ipa_client_type client); |
| 1775 | |
| 1776 | bool ipa3_is_ready(void); |
| 1777 | |
| 1778 | void ipa3_proxy_clk_vote(void); |
| 1779 | void ipa3_proxy_clk_unvote(void); |
| 1780 | |
| 1781 | bool ipa3_is_client_handle_valid(u32 clnt_hdl); |
| 1782 | |
| 1783 | enum ipa_client_type ipa3_get_client_mapping(int pipe_idx); |
| 1784 | |
| 1785 | void ipa_init_ep_flt_bitmap(void); |
| 1786 | |
| 1787 | bool ipa_is_ep_support_flt(int pipe_idx); |
| 1788 | |
| 1789 | enum ipa_rm_resource_name ipa3_get_rm_resource_from_ep(int pipe_idx); |
| 1790 | |
| 1791 | bool ipa3_get_modem_cfg_emb_pipe_flt(void); |
| 1792 | |
| 1793 | u8 ipa3_get_qmb_master_sel(enum ipa_client_type client); |
| 1794 | |
| 1795 | /* internal functions */ |
| 1796 | |
| 1797 | int ipa3_bind_api_controller(enum ipa_hw_type ipa_hw_type, |
| 1798 | struct ipa_api_controller *api_ctrl); |
| 1799 | |
| 1800 | bool ipa_is_modem_pipe(int pipe_idx); |
| 1801 | |
| 1802 | int ipa3_send_one(struct ipa3_sys_context *sys, struct ipa3_desc *desc, |
| 1803 | bool in_atomic); |
| 1804 | int ipa3_send(struct ipa3_sys_context *sys, |
| 1805 | u32 num_desc, |
| 1806 | struct ipa3_desc *desc, |
| 1807 | bool in_atomic); |
| 1808 | int ipa3_get_ep_mapping(enum ipa_client_type client); |
| 1809 | int ipa_get_ep_group(enum ipa_client_type client); |
| 1810 | |
| 1811 | int ipa3_generate_hw_rule(enum ipa_ip_type ip, |
| 1812 | const struct ipa_rule_attrib *attrib, |
| 1813 | u8 **buf, |
| 1814 | u16 *en_rule); |
| 1815 | int ipa3_init_hw(void); |
| 1816 | struct ipa3_rt_tbl *__ipa3_find_rt_tbl(enum ipa_ip_type ip, const char *name); |
| 1817 | int ipa3_set_single_ndp_per_mbim(bool); |
| 1818 | void ipa3_debugfs_init(void); |
| 1819 | void ipa3_debugfs_remove(void); |
| 1820 | |
| 1821 | void ipa3_dump_buff_internal(void *base, dma_addr_t phy_base, u32 size); |
| 1822 | #ifdef IPA_DEBUG |
| 1823 | #define IPA_DUMP_BUFF(base, phy_base, size) \ |
| 1824 | ipa3_dump_buff_internal(base, phy_base, size) |
| 1825 | #else |
| 1826 | #define IPA_DUMP_BUFF(base, phy_base, size) |
| 1827 | #endif |
| 1828 | int ipa3_init_mem_partition(struct device_node *dev_node); |
| 1829 | int ipa3_controller_static_bind(struct ipa3_controller *controller, |
| 1830 | enum ipa_hw_type ipa_hw_type); |
| 1831 | int ipa3_cfg_route(struct ipahal_reg_route *route); |
| 1832 | int ipa3_send_cmd(u16 num_desc, struct ipa3_desc *descr); |
| 1833 | int ipa3_cfg_filter(u32 disable); |
| 1834 | int ipa3_pipe_mem_init(u32 start_ofst, u32 size); |
| 1835 | int ipa3_pipe_mem_alloc(u32 *ofst, u32 size); |
| 1836 | int ipa3_pipe_mem_free(u32 ofst, u32 size); |
| 1837 | int ipa3_straddle_boundary(u32 start, u32 end, u32 boundary); |
| 1838 | struct ipa3_context *ipa3_get_ctx(void); |
| 1839 | void ipa3_enable_clks(void); |
| 1840 | void ipa3_disable_clks(void); |
| 1841 | void ipa3_inc_client_enable_clks(struct ipa_active_client_logging_info *id); |
| 1842 | int ipa3_inc_client_enable_clks_no_block(struct ipa_active_client_logging_info |
| 1843 | *id); |
| 1844 | void ipa3_dec_client_disable_clks(struct ipa_active_client_logging_info *id); |
| 1845 | void ipa3_active_clients_log_dec(struct ipa_active_client_logging_info *id, |
| 1846 | bool int_ctx); |
| 1847 | void ipa3_active_clients_log_inc(struct ipa_active_client_logging_info *id, |
| 1848 | bool int_ctx); |
| 1849 | int ipa3_active_clients_log_print_buffer(char *buf, int size); |
| 1850 | int ipa3_active_clients_log_print_table(char *buf, int size); |
| 1851 | void ipa3_active_clients_log_clear(void); |
| 1852 | int ipa3_interrupts_init(u32 ipa_irq, u32 ee, struct device *ipa_dev); |
| 1853 | int __ipa3_del_rt_rule(u32 rule_hdl); |
| 1854 | int __ipa3_del_hdr(u32 hdr_hdl); |
| 1855 | int __ipa3_release_hdr(u32 hdr_hdl); |
| 1856 | int __ipa3_release_hdr_proc_ctx(u32 proc_ctx_hdl); |
| 1857 | int _ipa_read_ep_reg_v3_0(char *buf, int max_len, int pipe); |
| 1858 | void _ipa_enable_clks_v3_0(void); |
| 1859 | void _ipa_disable_clks_v3_0(void); |
| 1860 | struct device *ipa3_get_dma_dev(void); |
| 1861 | void ipa3_suspend_active_aggr_wa(u32 clnt_hdl); |
| 1862 | void ipa3_suspend_handler(enum ipa_irq_type interrupt, |
| 1863 | void *private_data, |
| 1864 | void *interrupt_data); |
| 1865 | |
| 1866 | |
| 1867 | int ipa_bridge_init(void); |
| 1868 | void ipa_bridge_cleanup(void); |
| 1869 | |
| 1870 | ssize_t ipa3_read(struct file *filp, char __user *buf, size_t count, |
| 1871 | loff_t *f_pos); |
| 1872 | int ipa3_pull_msg(struct ipa_msg_meta *meta, char *buff, size_t count); |
| 1873 | int ipa3_query_intf(struct ipa_ioc_query_intf *lookup); |
| 1874 | int ipa3_query_intf_tx_props(struct ipa_ioc_query_intf_tx_props *tx); |
| 1875 | int ipa3_query_intf_rx_props(struct ipa_ioc_query_intf_rx_props *rx); |
| 1876 | int ipa3_query_intf_ext_props(struct ipa_ioc_query_intf_ext_props *ext); |
| 1877 | |
| 1878 | void wwan_cleanup(void); |
| 1879 | |
| 1880 | int ipa3_teth_bridge_driver_init(void); |
| 1881 | void ipa3_lan_rx_cb(void *priv, enum ipa_dp_evt_type evt, unsigned long data); |
| 1882 | |
| 1883 | int _ipa_init_sram_v3_0(void); |
| 1884 | int _ipa_init_hdr_v3_0(void); |
| 1885 | int _ipa_init_rt4_v3(void); |
| 1886 | int _ipa_init_rt6_v3(void); |
| 1887 | int _ipa_init_flt4_v3(void); |
| 1888 | int _ipa_init_flt6_v3(void); |
| 1889 | |
| 1890 | int __ipa_commit_flt_v3(enum ipa_ip_type ip); |
| 1891 | int __ipa_commit_rt_v3(enum ipa_ip_type ip); |
| 1892 | |
| 1893 | int __ipa_commit_hdr_v3_0(void); |
| 1894 | void ipa3_skb_recycle(struct sk_buff *skb); |
| 1895 | void ipa3_install_dflt_flt_rules(u32 ipa_ep_idx); |
| 1896 | void ipa3_delete_dflt_flt_rules(u32 ipa_ep_idx); |
| 1897 | |
| 1898 | int ipa3_enable_data_path(u32 clnt_hdl); |
| 1899 | int ipa3_disable_data_path(u32 clnt_hdl); |
| 1900 | int ipa3_alloc_rule_id(struct idr *rule_ids); |
| 1901 | int ipa3_id_alloc(void *ptr); |
| 1902 | void *ipa3_id_find(u32 id); |
| 1903 | void ipa3_id_remove(u32 id); |
| 1904 | |
| 1905 | int ipa3_set_required_perf_profile(enum ipa_voltage_level floor_voltage, |
| 1906 | u32 bandwidth_mbps); |
| 1907 | |
| 1908 | int ipa3_cfg_ep_status(u32 clnt_hdl, |
| 1909 | const struct ipahal_reg_ep_cfg_status *ipa_ep_cfg); |
| 1910 | |
| 1911 | int ipa3_suspend_resource_no_block(enum ipa_rm_resource_name name); |
| 1912 | int ipa3_suspend_resource_sync(enum ipa_rm_resource_name name); |
| 1913 | int ipa3_resume_resource(enum ipa_rm_resource_name name); |
| 1914 | bool ipa3_should_pipe_be_suspended(enum ipa_client_type client); |
| 1915 | int ipa3_tag_aggr_force_close(int pipe_num); |
| 1916 | |
| 1917 | void ipa3_active_clients_lock(void); |
| 1918 | int ipa3_active_clients_trylock(unsigned long *flags); |
| 1919 | void ipa3_active_clients_unlock(void); |
| 1920 | void ipa3_active_clients_trylock_unlock(unsigned long *flags); |
| 1921 | int ipa3_wdi_init(void); |
| 1922 | int ipa3_write_qmapid_wdi_pipe(u32 clnt_hdl, u8 qmap_id); |
| 1923 | int ipa3_tag_process(struct ipa3_desc *desc, int num_descs, |
| 1924 | unsigned long timeout); |
| 1925 | |
| 1926 | void ipa3_q6_pre_shutdown_cleanup(void); |
| 1927 | void ipa3_q6_post_shutdown_cleanup(void); |
| 1928 | int ipa3_init_q6_smem(void); |
| 1929 | |
| 1930 | int ipa3_sps_connect_safe(struct sps_pipe *h, struct sps_connect *connect, |
| 1931 | enum ipa_client_type ipa_client); |
| 1932 | |
| 1933 | int ipa3_mhi_handle_ipa_config_req(struct ipa_config_req_msg_v01 *config_req); |
| 1934 | int ipa3_mhi_query_ch_info(enum ipa_client_type client, |
| 1935 | struct gsi_chan_info *ch_info); |
| 1936 | |
| 1937 | int ipa3_uc_interface_init(void); |
| 1938 | int ipa3_uc_reset_pipe(enum ipa_client_type ipa_client); |
| 1939 | int ipa3_uc_is_gsi_channel_empty(enum ipa_client_type ipa_client); |
| 1940 | int ipa3_uc_state_check(void); |
| 1941 | int ipa3_uc_loaded_check(void); |
| 1942 | void ipa3_uc_load_notify(void); |
| 1943 | int ipa3_uc_send_cmd(u32 cmd, u32 opcode, u32 expected_status, |
| 1944 | bool polling_mode, unsigned long timeout_jiffies); |
| 1945 | void ipa3_uc_register_handlers(enum ipa3_hw_features feature, |
| 1946 | struct ipa3_uc_hdlrs *hdlrs); |
| 1947 | int ipa3_create_nat_device(void); |
| 1948 | int ipa3_uc_notify_clk_state(bool enabled); |
| 1949 | void ipa3_dma_async_memcpy_notify_cb(void *priv, |
| 1950 | enum ipa_dp_evt_type evt, unsigned long data); |
| 1951 | |
| 1952 | int ipa3_uc_update_hw_flags(u32 flags); |
| 1953 | |
| 1954 | int ipa3_uc_mhi_init(void (*ready_cb)(void), void (*wakeup_request_cb)(void)); |
| 1955 | void ipa3_uc_mhi_cleanup(void); |
| 1956 | int ipa3_uc_mhi_send_dl_ul_sync_info(union IpaHwMhiDlUlSyncCmdData_t *cmd); |
| 1957 | int ipa3_uc_mhi_init_engine(struct ipa_mhi_msi_info *msi, u32 mmio_addr, |
| 1958 | u32 host_ctrl_addr, u32 host_data_addr, u32 first_ch_idx, |
| 1959 | u32 first_evt_idx); |
| 1960 | int ipa3_uc_mhi_init_channel(int ipa_ep_idx, int channelHandle, |
| 1961 | int contexArrayIndex, int channelDirection); |
| 1962 | int ipa3_uc_mhi_reset_channel(int channelHandle); |
| 1963 | int ipa3_uc_mhi_suspend_channel(int channelHandle); |
| 1964 | int ipa3_uc_mhi_resume_channel(int channelHandle, bool LPTransitionRejected); |
| 1965 | int ipa3_uc_mhi_stop_event_update_channel(int channelHandle); |
| 1966 | int ipa3_uc_mhi_print_stats(char *dbg_buff, int size); |
| 1967 | int ipa3_uc_memcpy(phys_addr_t dest, phys_addr_t src, int len); |
| 1968 | void ipa3_tag_destroy_imm(void *user1, int user2); |
| 1969 | struct ipa_gsi_ep_config *ipa3_get_gsi_ep_info(int ipa_ep_idx); |
| 1970 | void ipa3_uc_rg10_write_reg(enum ipahal_reg_name reg, u32 n, u32 val); |
| 1971 | |
| 1972 | u32 ipa3_get_num_pipes(void); |
| 1973 | struct ipa_smmu_cb_ctx *ipa3_get_smmu_ctx(void); |
| 1974 | struct ipa_smmu_cb_ctx *ipa3_get_wlan_smmu_ctx(void); |
| 1975 | struct ipa_smmu_cb_ctx *ipa3_get_uc_smmu_ctx(void); |
| 1976 | struct iommu_domain *ipa3_get_smmu_domain(void); |
| 1977 | struct iommu_domain *ipa3_get_uc_smmu_domain(void); |
| 1978 | struct iommu_domain *ipa3_get_wlan_smmu_domain(void); |
| 1979 | int ipa3_iommu_map(struct iommu_domain *domain, unsigned long iova, |
| 1980 | phys_addr_t paddr, size_t size, int prot); |
| 1981 | int ipa3_ap_suspend(struct device *dev); |
| 1982 | int ipa3_ap_resume(struct device *dev); |
| 1983 | int ipa3_init_interrupts(void); |
| 1984 | struct iommu_domain *ipa3_get_smmu_domain(void); |
| 1985 | int ipa3_release_wdi_mapping(u32 num_buffers, struct ipa_wdi_buffer_info *info); |
| 1986 | int ipa3_create_wdi_mapping(u32 num_buffers, struct ipa_wdi_buffer_info *info); |
| 1987 | int ipa3_set_flt_tuple_mask(int pipe_idx, struct ipahal_reg_hash_tuple *tuple); |
| 1988 | int ipa3_set_rt_tuple_mask(int tbl_idx, struct ipahal_reg_hash_tuple *tuple); |
| 1989 | void ipa3_set_resorce_groups_min_max_limits(void); |
| 1990 | void ipa3_suspend_apps_pipes(bool suspend); |
| 1991 | void ipa3_flow_control(enum ipa_client_type ipa_client, bool enable, |
| 1992 | uint32_t qmap_id); |
| 1993 | int ipa3_flt_read_tbl_from_hw(u32 pipe_idx, |
| 1994 | enum ipa_ip_type ip_type, |
| 1995 | bool hashable, |
| 1996 | struct ipahal_flt_rule_entry entry[], |
| 1997 | int *num_entry); |
| 1998 | int ipa3_rt_read_tbl_from_hw(u32 tbl_idx, |
| 1999 | enum ipa_ip_type ip_type, |
| 2000 | bool hashable, |
| 2001 | struct ipahal_rt_rule_entry entry[], |
| 2002 | int *num_entry); |
| 2003 | int ipa3_restore_suspend_handler(void); |
| 2004 | int ipa3_inject_dma_task_for_gsi(void); |
| 2005 | int ipa3_uc_panic_notifier(struct notifier_block *this, |
| 2006 | unsigned long event, void *ptr); |
| 2007 | void ipa3_inc_acquire_wakelock(void); |
| 2008 | void ipa3_dec_release_wakelock(void); |
| 2009 | int ipa3_load_fws(const struct firmware *firmware); |
| 2010 | int ipa3_register_ipa_ready_cb(void (*ipa_ready_cb)(void *), void *user_data); |
| 2011 | const char *ipa_hw_error_str(enum ipa3_hw_errors err_type); |
| 2012 | int ipa_gsi_ch20_wa(void); |
| 2013 | int ipa3_rx_poll(u32 clnt_hdl, int budget); |
| 2014 | void ipa3_recycle_wan_skb(struct sk_buff *skb); |
| 2015 | int ipa3_smmu_map_peer_reg(phys_addr_t phys_addr, bool map); |
| 2016 | int ipa3_smmu_map_peer_buff(u64 iova, phys_addr_t phys_addr, |
| 2017 | u32 size, bool map); |
| 2018 | int ipa3_ntn_init(void); |
| 2019 | int ipa3_get_ntn_stats(struct Ipa3HwStatsNTNInfoData_t *stats); |
| 2020 | struct dentry *ipa_debugfs_get_root(void); |
| 2021 | bool ipa3_is_msm_device(void); |
| 2022 | #endif /* _IPA3_I_H_ */ |