Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-realview/realview_eb.c |
| 3 | * |
| 4 | * Copyright (C) 2004 ARM Limited |
| 5 | * Copyright (C) 2000 Deep Blue Solutions Ltd |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | */ |
| 21 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 22 | #include <linux/init.h> |
Russell King | 1be7228 | 2005-10-31 16:57:06 +0000 | [diff] [blame] | 23 | #include <linux/platform_device.h> |
Kay Sievers | edbaa60 | 2011-12-21 16:26:03 -0800 | [diff] [blame] | 24 | #include <linux/device.h> |
Russell King | a62c80e | 2006-01-07 13:52:45 +0000 | [diff] [blame] | 25 | #include <linux/amba/bus.h> |
Russell King | eb7fffa | 2009-07-05 22:41:31 +0100 | [diff] [blame] | 26 | #include <linux/amba/pl061.h> |
Linus Walleij | 6ef297f | 2009-09-22 14:29:36 +0100 | [diff] [blame] | 27 | #include <linux/amba/mmci.h> |
Linus Walleij | d6ada86 | 2010-07-14 23:58:38 +0100 | [diff] [blame] | 28 | #include <linux/amba/pl022.h> |
Russell King | fced80c | 2008-09-06 12:10:45 +0100 | [diff] [blame] | 29 | #include <linux/io.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 30 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 31 | #include <mach/hardware.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 32 | #include <asm/irq.h> |
| 33 | #include <asm/leds.h> |
| 34 | #include <asm/mach-types.h> |
Will Deacon | f417cba | 2010-04-15 10:16:26 +0100 | [diff] [blame] | 35 | #include <asm/pmu.h> |
Catalin Marinas | cc9897d | 2010-06-21 15:12:40 +0100 | [diff] [blame] | 36 | #include <asm/pgtable.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 37 | #include <asm/hardware/gic.h> |
Catalin Marinas | 7770bdd | 2007-02-05 14:48:24 +0100 | [diff] [blame] | 38 | #include <asm/hardware/cache-l2x0.h> |
Russell King | f32f4ce | 2009-05-16 12:14:21 +0100 | [diff] [blame] | 39 | #include <asm/localtimer.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 40 | |
| 41 | #include <asm/mach/arch.h> |
| 42 | #include <asm/mach/map.h> |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 43 | #include <asm/mach/time.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 44 | |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 45 | #include <mach/board-eb.h> |
| 46 | #include <mach/irqs.h> |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 47 | |
| 48 | #include "core.h" |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 49 | |
| 50 | static struct map_desc realview_eb_io_desc[] __initdata = { |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 51 | { |
| 52 | .virtual = IO_ADDRESS(REALVIEW_SYS_BASE), |
| 53 | .pfn = __phys_to_pfn(REALVIEW_SYS_BASE), |
| 54 | .length = SZ_4K, |
| 55 | .type = MT_DEVICE, |
| 56 | }, { |
Catalin Marinas | 073b6ff | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 57 | .virtual = IO_ADDRESS(REALVIEW_EB_GIC_CPU_BASE), |
| 58 | .pfn = __phys_to_pfn(REALVIEW_EB_GIC_CPU_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 59 | .length = SZ_4K, |
| 60 | .type = MT_DEVICE, |
| 61 | }, { |
Catalin Marinas | 073b6ff | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 62 | .virtual = IO_ADDRESS(REALVIEW_EB_GIC_DIST_BASE), |
| 63 | .pfn = __phys_to_pfn(REALVIEW_EB_GIC_DIST_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 64 | .length = SZ_4K, |
| 65 | .type = MT_DEVICE, |
| 66 | }, { |
| 67 | .virtual = IO_ADDRESS(REALVIEW_SCTL_BASE), |
| 68 | .pfn = __phys_to_pfn(REALVIEW_SCTL_BASE), |
| 69 | .length = SZ_4K, |
| 70 | .type = MT_DEVICE, |
| 71 | }, { |
Catalin Marinas | 8019273 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 72 | .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE), |
| 73 | .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 74 | .length = SZ_4K, |
| 75 | .type = MT_DEVICE, |
| 76 | }, { |
Catalin Marinas | 8019273 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 77 | .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE), |
| 78 | .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 79 | .length = SZ_4K, |
| 80 | .type = MT_DEVICE, |
| 81 | }, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 82 | #ifdef CONFIG_DEBUG_LL |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 83 | { |
Catalin Marinas | 9a386f0 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 84 | .virtual = IO_ADDRESS(REALVIEW_EB_UART0_BASE), |
| 85 | .pfn = __phys_to_pfn(REALVIEW_EB_UART0_BASE), |
Russell King | 1ffedce | 2005-11-02 14:14:37 +0000 | [diff] [blame] | 86 | .length = SZ_4K, |
| 87 | .type = MT_DEVICE, |
| 88 | } |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 89 | #endif |
| 90 | }; |
| 91 | |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 92 | static struct map_desc realview_eb11mp_io_desc[] __initdata = { |
| 93 | { |
Marc Zyngier | 34ae6c9 | 2012-01-24 11:56:02 +0100 | [diff] [blame] | 94 | .virtual = IO_ADDRESS(REALVIEW_EB11MP_PRIV_MEM_BASE), |
| 95 | .pfn = __phys_to_pfn(REALVIEW_EB11MP_PRIV_MEM_BASE), |
| 96 | .length = REALVIEW_EB11MP_PRIV_MEM_SIZE, |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 97 | .type = MT_DEVICE, |
| 98 | }, { |
| 99 | .virtual = IO_ADDRESS(REALVIEW_EB11MP_L220_BASE), |
| 100 | .pfn = __phys_to_pfn(REALVIEW_EB11MP_L220_BASE), |
| 101 | .length = SZ_8K, |
| 102 | .type = MT_DEVICE, |
| 103 | } |
| 104 | }; |
| 105 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 106 | static void __init realview_eb_map_io(void) |
| 107 | { |
| 108 | iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc)); |
Jon Callan | 4c3ea37 | 2008-12-01 14:54:56 +0000 | [diff] [blame] | 109 | if (core_tile_eb11mp() || core_tile_a9mp()) |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 110 | iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc)); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 111 | } |
| 112 | |
Russell King | eb7fffa | 2009-07-05 22:41:31 +0100 | [diff] [blame] | 113 | static struct pl061_platform_data gpio0_plat_data = { |
| 114 | .gpio_base = 0, |
Russell King | eb7fffa | 2009-07-05 22:41:31 +0100 | [diff] [blame] | 115 | }; |
| 116 | |
| 117 | static struct pl061_platform_data gpio1_plat_data = { |
| 118 | .gpio_base = 8, |
Russell King | eb7fffa | 2009-07-05 22:41:31 +0100 | [diff] [blame] | 119 | }; |
| 120 | |
| 121 | static struct pl061_platform_data gpio2_plat_data = { |
| 122 | .gpio_base = 16, |
Russell King | eb7fffa | 2009-07-05 22:41:31 +0100 | [diff] [blame] | 123 | }; |
| 124 | |
Linus Walleij | d6ada86 | 2010-07-14 23:58:38 +0100 | [diff] [blame] | 125 | static struct pl022_ssp_controller ssp0_plat_data = { |
| 126 | .bus_id = 0, |
| 127 | .enable_dma = 0, |
| 128 | .num_chipselect = 1, |
| 129 | }; |
| 130 | |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 131 | /* |
| 132 | * RealView EB AMBA devices |
| 133 | */ |
| 134 | |
| 135 | /* |
| 136 | * These devices are connected via the core APB bridge |
| 137 | */ |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 138 | #define GPIO2_IRQ { IRQ_EB_GPIO2 } |
| 139 | #define GPIO3_IRQ { IRQ_EB_GPIO3 } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 140 | |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 141 | #define AACI_IRQ { IRQ_EB_AACI } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 142 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 143 | #define KMI0_IRQ { IRQ_EB_KMI0 } |
| 144 | #define KMI1_IRQ { IRQ_EB_KMI1 } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 145 | |
| 146 | /* |
| 147 | * These devices are connected directly to the multi-layer AHB switch |
| 148 | */ |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 149 | #define EB_SMC_IRQ { } |
| 150 | #define MPMC_IRQ { } |
| 151 | #define EB_CLCD_IRQ { IRQ_EB_CLCD } |
| 152 | #define DMAC_IRQ { IRQ_EB_DMA } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 153 | |
| 154 | /* |
| 155 | * These devices are connected via the core APB bridge |
| 156 | */ |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 157 | #define SCTL_IRQ { } |
| 158 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } |
| 159 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } |
| 160 | #define GPIO1_IRQ { IRQ_EB_GPIO1 } |
| 161 | #define EB_RTC_IRQ { IRQ_EB_RTC } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 162 | |
| 163 | /* |
| 164 | * These devices are connected via the DMA APB bridge |
| 165 | */ |
Russell King | 0dada61 | 2011-12-18 11:40:46 +0000 | [diff] [blame] | 166 | #define SCI_IRQ { IRQ_EB_SCI } |
| 167 | #define EB_UART0_IRQ { IRQ_EB_UART0 } |
| 168 | #define EB_UART1_IRQ { IRQ_EB_UART1 } |
| 169 | #define EB_UART2_IRQ { IRQ_EB_UART2 } |
| 170 | #define EB_UART3_IRQ { IRQ_EB_UART3 } |
| 171 | #define EB_SSP_IRQ { IRQ_EB_SSP } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 172 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 173 | /* FPGA Primecells */ |
Russell King | 9199340b | 2011-12-18 13:38:49 +0000 | [diff] [blame] | 174 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
| 175 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
| 176 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
| 177 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
| 178 | APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 179 | |
| 180 | /* DevChip Primecells */ |
Russell King | 9199340b | 2011-12-18 13:38:49 +0000 | [diff] [blame] | 181 | AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL); |
| 182 | AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); |
| 183 | AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL); |
| 184 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
| 185 | APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); |
| 186 | APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); |
| 187 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
| 188 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
| 189 | APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); |
| 190 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
| 191 | APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); |
| 192 | APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); |
| 193 | APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); |
| 194 | APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 195 | |
| 196 | static struct amba_device *amba_devs[] __initdata = { |
| 197 | &dmac_device, |
| 198 | &uart0_device, |
| 199 | &uart1_device, |
| 200 | &uart2_device, |
| 201 | &uart3_device, |
| 202 | &smc_device, |
| 203 | &clcd_device, |
| 204 | &sctl_device, |
| 205 | &wdog_device, |
| 206 | &gpio0_device, |
| 207 | &gpio1_device, |
| 208 | &gpio2_device, |
| 209 | &rtc_device, |
| 210 | &sci0_device, |
| 211 | &ssp0_device, |
| 212 | &aaci_device, |
| 213 | &mmc0_device, |
| 214 | &kmi0_device, |
| 215 | &kmi1_device, |
| 216 | }; |
| 217 | |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 218 | /* |
| 219 | * RealView EB platform devices |
| 220 | */ |
Catalin Marinas | a44ddfd | 2008-04-18 22:43:10 +0100 | [diff] [blame] | 221 | static struct resource realview_eb_flash_resource = { |
| 222 | .start = REALVIEW_EB_FLASH_BASE, |
| 223 | .end = REALVIEW_EB_FLASH_BASE + REALVIEW_EB_FLASH_SIZE - 1, |
| 224 | .flags = IORESOURCE_MEM, |
| 225 | }; |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 226 | |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 227 | static struct resource realview_eb_eth_resources[] = { |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 228 | [0] = { |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 229 | .start = REALVIEW_EB_ETH_BASE, |
| 230 | .end = REALVIEW_EB_ETH_BASE + SZ_64K - 1, |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 231 | .flags = IORESOURCE_MEM, |
| 232 | }, |
| 233 | [1] = { |
| 234 | .start = IRQ_EB_ETH, |
| 235 | .end = IRQ_EB_ETH, |
| 236 | .flags = IORESOURCE_IRQ, |
| 237 | }, |
| 238 | }; |
| 239 | |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 240 | /* |
| 241 | * Detect and register the correct Ethernet device. RealView/EB rev D |
| 242 | * platforms use the newer SMSC LAN9118 Ethernet chip |
| 243 | */ |
| 244 | static int eth_device_register(void) |
| 245 | { |
Catalin Marinas | 393538e | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 246 | void __iomem *eth_addr = ioremap(REALVIEW_EB_ETH_BASE, SZ_4K); |
Catalin Marinas | 0a38133 | 2008-12-01 14:54:58 +0000 | [diff] [blame] | 247 | const char *name = NULL; |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 248 | u32 idrev; |
| 249 | |
| 250 | if (!eth_addr) |
| 251 | return -ENOMEM; |
| 252 | |
| 253 | idrev = readl(eth_addr + 0x50); |
Catalin Marinas | 0a38133 | 2008-12-01 14:54:58 +0000 | [diff] [blame] | 254 | if ((idrev & 0xFFFF0000) != 0x01180000) |
| 255 | /* SMSC LAN9118 not present, use LAN91C111 instead */ |
| 256 | name = "smc91x"; |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 257 | |
| 258 | iounmap(eth_addr); |
Catalin Marinas | 0a38133 | 2008-12-01 14:54:58 +0000 | [diff] [blame] | 259 | return realview_eth_register(name, realview_eb_eth_resources); |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 260 | } |
| 261 | |
Catalin Marinas | 7db2171 | 2009-02-12 16:00:21 +0100 | [diff] [blame] | 262 | static struct resource realview_eb_isp1761_resources[] = { |
| 263 | [0] = { |
| 264 | .start = REALVIEW_EB_USB_BASE, |
| 265 | .end = REALVIEW_EB_USB_BASE + SZ_128K - 1, |
| 266 | .flags = IORESOURCE_MEM, |
| 267 | }, |
| 268 | [1] = { |
| 269 | .start = IRQ_EB_USB, |
| 270 | .end = IRQ_EB_USB, |
| 271 | .flags = IORESOURCE_IRQ, |
| 272 | }, |
| 273 | }; |
| 274 | |
Will Deacon | f417cba | 2010-04-15 10:16:26 +0100 | [diff] [blame] | 275 | static struct resource pmu_resources[] = { |
| 276 | [0] = { |
| 277 | .start = IRQ_EB11MP_PMU_CPU0, |
| 278 | .end = IRQ_EB11MP_PMU_CPU0, |
| 279 | .flags = IORESOURCE_IRQ, |
| 280 | }, |
| 281 | [1] = { |
| 282 | .start = IRQ_EB11MP_PMU_CPU1, |
| 283 | .end = IRQ_EB11MP_PMU_CPU1, |
| 284 | .flags = IORESOURCE_IRQ, |
| 285 | }, |
| 286 | [2] = { |
| 287 | .start = IRQ_EB11MP_PMU_CPU2, |
| 288 | .end = IRQ_EB11MP_PMU_CPU2, |
| 289 | .flags = IORESOURCE_IRQ, |
| 290 | }, |
| 291 | [3] = { |
| 292 | .start = IRQ_EB11MP_PMU_CPU3, |
| 293 | .end = IRQ_EB11MP_PMU_CPU3, |
| 294 | .flags = IORESOURCE_IRQ, |
| 295 | }, |
| 296 | }; |
| 297 | |
| 298 | static struct platform_device pmu_device = { |
| 299 | .name = "arm-pmu", |
| 300 | .id = ARM_PMU_DEVICE_CPU, |
| 301 | .num_resources = ARRAY_SIZE(pmu_resources), |
| 302 | .resource = pmu_resources, |
| 303 | }; |
| 304 | |
Linus Walleij | d161edf | 2010-07-17 12:34:25 +0100 | [diff] [blame] | 305 | static struct resource char_lcd_resources[] = { |
| 306 | { |
| 307 | .start = REALVIEW_CHAR_LCD_BASE, |
| 308 | .end = (REALVIEW_CHAR_LCD_BASE + SZ_4K - 1), |
| 309 | .flags = IORESOURCE_MEM, |
| 310 | }, |
| 311 | { |
| 312 | .start = IRQ_EB_CHARLCD, |
| 313 | .end = IRQ_EB_CHARLCD, |
| 314 | .flags = IORESOURCE_IRQ, |
| 315 | }, |
| 316 | }; |
| 317 | |
| 318 | static struct platform_device char_lcd_device = { |
| 319 | .name = "arm-charlcd", |
| 320 | .id = -1, |
| 321 | .num_resources = ARRAY_SIZE(char_lcd_resources), |
| 322 | .resource = char_lcd_resources, |
| 323 | }; |
| 324 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 325 | static void __init gic_init_irq(void) |
| 326 | { |
Jon Callan | 4c3ea37 | 2008-12-01 14:54:56 +0000 | [diff] [blame] | 327 | if (core_tile_eb11mp() || core_tile_a9mp()) { |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 328 | unsigned int pldctrl; |
| 329 | |
| 330 | /* new irq mode */ |
| 331 | writel(0x0000a05f, __io_address(REALVIEW_SYS_LOCK)); |
| 332 | pldctrl = readl(__io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1); |
| 333 | pldctrl |= 0x00800000; |
| 334 | writel(pldctrl, __io_address(REALVIEW_SYS_BASE) + REALVIEW_EB11MP_SYS_PLD_CTRL1); |
| 335 | writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); |
| 336 | |
| 337 | /* core tile GIC, primary */ |
Russell King | b580b89 | 2010-12-04 15:55:14 +0000 | [diff] [blame] | 338 | gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), |
Russell King | ff2e27a | 2010-12-04 16:13:29 +0000 | [diff] [blame] | 339 | __io_address(REALVIEW_EB11MP_GIC_CPU_BASE)); |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 340 | |
Catalin Marinas | 41579f4 | 2008-02-04 17:47:04 +0100 | [diff] [blame] | 341 | #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 342 | /* board GIC, secondary */ |
Pawel Moll | 0efc48e | 2011-03-17 13:10:22 +0100 | [diff] [blame] | 343 | gic_init(1, 96, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
Russell King | b580b89 | 2010-12-04 15:55:14 +0000 | [diff] [blame] | 344 | __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 345 | gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1); |
Russell King | 9b1283b | 2005-11-07 21:01:06 +0000 | [diff] [blame] | 346 | #endif |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 347 | } else { |
| 348 | /* board GIC, primary */ |
Russell King | b580b89 | 2010-12-04 15:55:14 +0000 | [diff] [blame] | 349 | gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE), |
Russell King | ff2e27a | 2010-12-04 16:13:29 +0000 | [diff] [blame] | 350 | __io_address(REALVIEW_EB_GIC_CPU_BASE)); |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 351 | } |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 352 | } |
| 353 | |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 354 | /* |
| 355 | * Fix up the IRQ numbers for the RealView EB/ARM11MPCore tile |
| 356 | */ |
| 357 | static void realview_eb11mp_fixup(void) |
| 358 | { |
| 359 | /* AMBA devices */ |
| 360 | dmac_device.irq[0] = IRQ_EB11MP_DMA; |
| 361 | uart0_device.irq[0] = IRQ_EB11MP_UART0; |
| 362 | uart1_device.irq[0] = IRQ_EB11MP_UART1; |
| 363 | uart2_device.irq[0] = IRQ_EB11MP_UART2; |
| 364 | uart3_device.irq[0] = IRQ_EB11MP_UART3; |
| 365 | clcd_device.irq[0] = IRQ_EB11MP_CLCD; |
| 366 | wdog_device.irq[0] = IRQ_EB11MP_WDOG; |
| 367 | gpio0_device.irq[0] = IRQ_EB11MP_GPIO0; |
| 368 | gpio1_device.irq[0] = IRQ_EB11MP_GPIO1; |
| 369 | gpio2_device.irq[0] = IRQ_EB11MP_GPIO2; |
| 370 | rtc_device.irq[0] = IRQ_EB11MP_RTC; |
| 371 | sci0_device.irq[0] = IRQ_EB11MP_SCI; |
| 372 | ssp0_device.irq[0] = IRQ_EB11MP_SSP; |
| 373 | aaci_device.irq[0] = IRQ_EB11MP_AACI; |
| 374 | mmc0_device.irq[0] = IRQ_EB11MP_MMCI0A; |
| 375 | mmc0_device.irq[1] = IRQ_EB11MP_MMCI0B; |
| 376 | kmi0_device.irq[0] = IRQ_EB11MP_KMI0; |
| 377 | kmi1_device.irq[0] = IRQ_EB11MP_KMI1; |
| 378 | |
| 379 | /* platform devices */ |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 380 | realview_eb_eth_resources[1].start = IRQ_EB11MP_ETH; |
| 381 | realview_eb_eth_resources[1].end = IRQ_EB11MP_ETH; |
Catalin Marinas | 7db2171 | 2009-02-12 16:00:21 +0100 | [diff] [blame] | 382 | realview_eb_isp1761_resources[1].start = IRQ_EB11MP_USB; |
| 383 | realview_eb_isp1761_resources[1].end = IRQ_EB11MP_USB; |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 384 | } |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 385 | |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 386 | static void __init realview_eb_timer_init(void) |
| 387 | { |
| 388 | unsigned int timer_irq; |
| 389 | |
Catalin Marinas | 8019273 | 2008-04-18 22:43:11 +0100 | [diff] [blame] | 390 | timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE); |
| 391 | timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20; |
| 392 | timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE); |
| 393 | timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20; |
| 394 | |
Jon Callan | 4c3ea37 | 2008-12-01 14:54:56 +0000 | [diff] [blame] | 395 | if (core_tile_eb11mp() || core_tile_a9mp()) { |
Catalin Marinas | 39e823e | 2008-02-04 17:45:03 +0100 | [diff] [blame] | 396 | #ifdef CONFIG_LOCAL_TIMERS |
Catalin Marinas | ebac654 | 2008-12-01 14:54:57 +0000 | [diff] [blame] | 397 | twd_base = __io_address(REALVIEW_EB11MP_TWD_BASE); |
Catalin Marinas | 39e823e | 2008-02-04 17:45:03 +0100 | [diff] [blame] | 398 | #endif |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 399 | timer_irq = IRQ_EB11MP_TIMER0_1; |
Catalin Marinas | 39e823e | 2008-02-04 17:45:03 +0100 | [diff] [blame] | 400 | } else |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 401 | timer_irq = IRQ_EB_TIMER0_1; |
| 402 | |
| 403 | realview_timer_init(timer_irq); |
| 404 | } |
| 405 | |
| 406 | static struct sys_timer realview_eb_timer = { |
| 407 | .init = realview_eb_timer_init, |
| 408 | }; |
| 409 | |
Russell King | 47cacdd4 | 2011-11-03 14:00:13 +0000 | [diff] [blame] | 410 | static void realview_eb_restart(char mode, const char *cmd) |
Colin Tuckley | 4c9f8be | 2010-01-11 11:09:15 +0100 | [diff] [blame] | 411 | { |
| 412 | void __iomem *reset_ctrl = __io_address(REALVIEW_SYS_RESETCTL); |
| 413 | void __iomem *lock_ctrl = __io_address(REALVIEW_SYS_LOCK); |
| 414 | |
| 415 | /* |
| 416 | * To reset, we hit the on-board reset register |
| 417 | * in the system FPGA |
| 418 | */ |
| 419 | __raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl); |
| 420 | if (core_tile_eb11mp()) |
| 421 | __raw_writel(0x0008, reset_ctrl); |
Russell King | 47cacdd4 | 2011-11-03 14:00:13 +0000 | [diff] [blame] | 422 | dsb(); |
Colin Tuckley | 4c9f8be | 2010-01-11 11:09:15 +0100 | [diff] [blame] | 423 | } |
| 424 | |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 425 | static void __init realview_eb_init(void) |
| 426 | { |
| 427 | int i; |
| 428 | |
Jon Callan | 4c3ea37 | 2008-12-01 14:54:56 +0000 | [diff] [blame] | 429 | if (core_tile_eb11mp() || core_tile_a9mp()) { |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 430 | realview_eb11mp_fixup(); |
Catalin Marinas | 0fc2a16 | 2008-02-04 17:36:59 +0100 | [diff] [blame] | 431 | |
Catalin Marinas | ba92795 | 2008-04-18 22:43:17 +0100 | [diff] [blame] | 432 | #ifdef CONFIG_CACHE_L2X0 |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 433 | /* 1MB (128KB/way), 8-way associativity, evmon/parity/share enabled |
| 434 | * Bits: .... ...0 0111 1001 0000 .... .... .... */ |
| 435 | l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff); |
Catalin Marinas | ba92795 | 2008-04-18 22:43:17 +0100 | [diff] [blame] | 436 | #endif |
Will Deacon | f417cba | 2010-04-15 10:16:26 +0100 | [diff] [blame] | 437 | platform_device_register(&pmu_device); |
Catalin Marinas | 7dd19e7 | 2008-02-04 17:39:00 +0100 | [diff] [blame] | 438 | } |
| 439 | |
Catalin Marinas | a44ddfd | 2008-04-18 22:43:10 +0100 | [diff] [blame] | 440 | realview_flash_register(&realview_eb_flash_resource, 1); |
Russell King | 6b65cd7 | 2006-12-10 21:21:32 +0100 | [diff] [blame] | 441 | platform_device_register(&realview_i2c_device); |
Linus Walleij | d161edf | 2010-07-17 12:34:25 +0100 | [diff] [blame] | 442 | platform_device_register(&char_lcd_device); |
Catalin Marinas | be4f3c8 | 2008-04-18 22:43:09 +0100 | [diff] [blame] | 443 | eth_device_register(); |
Catalin Marinas | 7db2171 | 2009-02-12 16:00:21 +0100 | [diff] [blame] | 444 | realview_usb_register(realview_eb_isp1761_resources); |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 445 | |
| 446 | for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { |
| 447 | struct amba_device *d = amba_devs[i]; |
| 448 | amba_device_register(d, &iomem_resource); |
| 449 | } |
| 450 | |
| 451 | #ifdef CONFIG_LEDS |
| 452 | leds_event = realview_leds_event; |
| 453 | #endif |
| 454 | } |
| 455 | |
| 456 | MACHINE_START(REALVIEW_EB, "ARM-RealView EB") |
| 457 | /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ |
Nicolas Pitre | 9ddea57 | 2011-07-05 22:38:16 -0400 | [diff] [blame] | 458 | .atag_offset = 0x100, |
Catalin Marinas | 5b39d15 | 2009-11-04 12:19:04 +0000 | [diff] [blame] | 459 | .fixup = realview_fixup, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 460 | .map_io = realview_eb_map_io, |
Russell King | 631e55f | 2011-01-11 13:05:01 +0000 | [diff] [blame] | 461 | .init_early = realview_init_early, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 462 | .init_irq = gic_init_irq, |
Catalin Marinas | 8cc4c54 | 2008-02-04 17:43:02 +0100 | [diff] [blame] | 463 | .timer = &realview_eb_timer, |
Marc Zyngier | 1b99d9c | 2011-09-06 10:23:45 +0100 | [diff] [blame] | 464 | .handle_irq = gic_handle_irq, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 465 | .init_machine = realview_eb_init, |
Nicolas Pitre | 00e9125 | 2011-07-05 22:28:09 -0400 | [diff] [blame] | 466 | #ifdef CONFIG_ZONE_DMA |
| 467 | .dma_zone_size = SZ_256M, |
| 468 | #endif |
Russell King | 47cacdd4 | 2011-11-03 14:00:13 +0000 | [diff] [blame] | 469 | .restart = realview_eb_restart, |
Catalin Marinas | 8ad68bb | 2005-10-31 14:25:02 +0000 | [diff] [blame] | 470 | MACHINE_END |