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Tony Lindgren1dbae812005-11-10 14:26:51 +00001/*
2 * linux/arch/arm/mach-omap2/id.c
3 *
4 * OMAP2 CPU identification code
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *
Nishant Kamate49c4d22011-02-17 09:55:03 -08009 * Copyright (C) 2009-11 Texas Instruments
Santosh Shilimkar44169072009-05-28 14:16:04 -070010 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
11 *
Tony Lindgren1dbae812005-11-10 14:26:51 +000012 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
Tony Lindgren1dbae812005-11-10 14:26:51 +000017#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010020#include <linux/io.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000021
Russell King0ba8b9b2008-08-10 18:08:10 +010022#include <asm/cputype.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000023
Tony Lindgrence491cf2009-10-20 09:40:47 -070024#include <plat/common.h>
Tony Lindgrence491cf2009-10-20 09:40:47 -070025#include <plat/cpu.h>
Syed Mohammed Khasim72d0f1c2006-12-06 17:14:05 -080026
Kan-Ru Chen2e130fc2010-08-02 14:21:41 +030027#include <mach/id.h>
28
Paul Walmsley4814ced2010-10-08 11:40:20 -060029#include "control.h"
30
Lauri Leukkunen84a34342008-12-10 17:36:31 -080031static unsigned int omap_revision;
32
Aneesh Vcc0170b2011-07-02 08:00:22 +053033u32 omap_features;
Lauri Leukkunen84a34342008-12-10 17:36:31 -080034
35unsigned int omap_rev(void)
36{
37 return omap_revision;
38}
39EXPORT_SYMBOL(omap_rev);
Paul Walmsley097c5842008-07-03 12:24:45 +030040
Kevin Hilman8e25ad92009-06-23 13:30:23 +030041int omap_type(void)
42{
43 u32 val = 0;
44
Felipe Balbiedeae652009-11-22 10:11:24 -080045 if (cpu_is_omap24xx()) {
Kevin Hilman8e25ad92009-06-23 13:30:23 +030046 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
Felipe Balbiedeae652009-11-22 10:11:24 -080047 } else if (cpu_is_omap34xx()) {
Kevin Hilman8e25ad92009-06-23 13:30:23 +030048 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
Santosh Shilimkar737daa02010-02-18 08:59:10 +000049 } else if (cpu_is_omap44xx()) {
Santosh Shilimkardcf5ef32010-09-27 14:02:58 -060050 val = omap_ctrl_readl(OMAP4_CTRL_MODULE_CORE_STATUS);
Felipe Balbiedeae652009-11-22 10:11:24 -080051 } else {
Kevin Hilman8e25ad92009-06-23 13:30:23 +030052 pr_err("Cannot detect omap type!\n");
53 goto out;
54 }
55
56 val &= OMAP2_DEVICETYPE_MASK;
57 val >>= 8;
58
59out:
60 return val;
61}
62EXPORT_SYMBOL(omap_type);
63
64
Tony Lindgrena8823142008-12-10 17:36:30 -080065/*----------------------------------------------------------------------------*/
Paul Walmsley097c5842008-07-03 12:24:45 +030066
Tony Lindgrena8823142008-12-10 17:36:30 -080067#define OMAP_TAP_IDCODE 0x0204
68#define OMAP_TAP_DIE_ID_0 0x0218
69#define OMAP_TAP_DIE_ID_1 0x021C
70#define OMAP_TAP_DIE_ID_2 0x0220
71#define OMAP_TAP_DIE_ID_3 0x0224
Paul Walmsley097c5842008-07-03 12:24:45 +030072
Andy Greenb235e002011-03-12 22:50:54 +000073#define OMAP_TAP_DIE_ID_44XX_0 0x0200
74#define OMAP_TAP_DIE_ID_44XX_1 0x0208
75#define OMAP_TAP_DIE_ID_44XX_2 0x020c
76#define OMAP_TAP_DIE_ID_44XX_3 0x0210
77
Tony Lindgrena8823142008-12-10 17:36:30 -080078#define read_tap_reg(reg) __raw_readl(tap_base + (reg))
Tony Lindgren0e564842008-10-06 15:49:16 +030079
Tony Lindgrena8823142008-12-10 17:36:30 -080080struct omap_id {
81 u16 hawkeye; /* Silicon type (Hawkeye id) */
82 u8 dev; /* Device type from production_id reg */
Lauri Leukkunen84a34342008-12-10 17:36:31 -080083 u32 type; /* Combined type id copied to omap_revision */
Tony Lindgrena8823142008-12-10 17:36:30 -080084};
Tony Lindgren0e564842008-10-06 15:49:16 +030085
Tony Lindgrena8823142008-12-10 17:36:30 -080086/* Register values to detect the OMAP version */
87static struct omap_id omap_ids[] __initdata = {
88 { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
89 { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
90 { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
91 { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
92 { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
93 { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
94};
Paul Walmsley097c5842008-07-03 12:24:45 +030095
Tony Lindgrena8823142008-12-10 17:36:30 -080096static void __iomem *tap_base;
97static u16 tap_prod_id;
Tony Lindgren1dbae812005-11-10 14:26:51 +000098
Kan-Ru Chen2e130fc2010-08-02 14:21:41 +030099void omap_get_die_id(struct omap_die_id *odi)
100{
Andy Greenb235e002011-03-12 22:50:54 +0000101 if (cpu_is_omap44xx()) {
102 odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_0);
103 odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_1);
104 odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_2);
105 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_44XX_3);
106
107 return;
108 }
Kan-Ru Chen2e130fc2010-08-02 14:21:41 +0300109 odi->id_0 = read_tap_reg(OMAP_TAP_DIE_ID_0);
110 odi->id_1 = read_tap_reg(OMAP_TAP_DIE_ID_1);
111 odi->id_2 = read_tap_reg(OMAP_TAP_DIE_ID_2);
112 odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
113}
114
Nishanth Menon5ebc0d52010-08-02 14:21:40 +0300115static void __init omap24xx_check_revision(void)
Tony Lindgren1dbae812005-11-10 14:26:51 +0000116{
117 int i, j;
Tony Lindgrena8823142008-12-10 17:36:30 -0800118 u32 idcode, prod_id;
Tony Lindgren1dbae812005-11-10 14:26:51 +0000119 u16 hawkeye;
Tony Lindgrena8823142008-12-10 17:36:30 -0800120 u8 dev_type, rev;
Kan-Ru Chenc46732b2010-08-02 14:21:41 +0300121 struct omap_die_id odi;
Tony Lindgren1dbae812005-11-10 14:26:51 +0000122
123 idcode = read_tap_reg(OMAP_TAP_IDCODE);
Tony Lindgren0e564842008-10-06 15:49:16 +0300124 prod_id = read_tap_reg(tap_prod_id);
Tony Lindgren1dbae812005-11-10 14:26:51 +0000125 hawkeye = (idcode >> 12) & 0xffff;
126 rev = (idcode >> 28) & 0x0f;
127 dev_type = (prod_id >> 16) & 0x0f;
Kan-Ru Chenc46732b2010-08-02 14:21:41 +0300128 omap_get_die_id(&odi);
Tony Lindgren1dbae812005-11-10 14:26:51 +0000129
Paul Walmsley097c5842008-07-03 12:24:45 +0300130 pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
131 idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
Kan-Ru Chenc46732b2010-08-02 14:21:41 +0300132 pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n", odi.id_0);
Paul Walmsley097c5842008-07-03 12:24:45 +0300133 pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
Kan-Ru Chenc46732b2010-08-02 14:21:41 +0300134 odi.id_1, (odi.id_1 >> 28) & 0xf);
135 pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n", odi.id_2);
136 pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n", odi.id_3);
Paul Walmsley097c5842008-07-03 12:24:45 +0300137 pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
138 prod_id, dev_type);
139
Tony Lindgren1dbae812005-11-10 14:26:51 +0000140 /* Check hawkeye ids */
141 for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
142 if (hawkeye == omap_ids[i].hawkeye)
143 break;
144 }
145
146 if (i == ARRAY_SIZE(omap_ids)) {
147 printk(KERN_ERR "Unknown OMAP CPU id\n");
148 return;
149 }
150
151 for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
152 if (dev_type == omap_ids[j].dev)
153 break;
154 }
155
156 if (j == ARRAY_SIZE(omap_ids)) {
157 printk(KERN_ERR "Unknown OMAP device type. "
158 "Handling it as OMAP%04x\n",
159 omap_ids[i].type >> 16);
160 j = i;
161 }
Tony Lindgren1dbae812005-11-10 14:26:51 +0000162
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800163 pr_info("OMAP%04x", omap_rev() >> 16);
164 if ((omap_rev() >> 8) & 0x0f)
165 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
Paul Walmsley097c5842008-07-03 12:24:45 +0300166 pr_info("\n");
Tony Lindgren1dbae812005-11-10 14:26:51 +0000167}
168
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800169#define OMAP3_CHECK_FEATURE(status,feat) \
170 if (((status & OMAP3_ ##feat## _MASK) \
171 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) { \
Aneesh Vcc0170b2011-07-02 08:00:22 +0530172 omap_features |= OMAP3_HAS_ ##feat; \
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800173 }
174
Nishanth Menon5ebc0d52010-08-02 14:21:40 +0300175static void __init omap3_check_features(void)
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800176{
177 u32 status;
178
Aneesh Vcc0170b2011-07-02 08:00:22 +0530179 omap_features = 0;
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800180
181 status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
182
183 OMAP3_CHECK_FEATURE(status, L2CACHE);
184 OMAP3_CHECK_FEATURE(status, IVA);
185 OMAP3_CHECK_FEATURE(status, SGX);
186 OMAP3_CHECK_FEATURE(status, NEON);
187 OMAP3_CHECK_FEATURE(status, ISP);
Vishwanath BS7356f0b2010-02-22 22:09:10 -0700188 if (cpu_is_omap3630())
Aneesh Vcc0170b2011-07-02 08:00:22 +0530189 omap_features |= OMAP3_HAS_192MHZ_CLK;
Paul Walmsleyb02b9172011-10-06 17:18:45 -0600190 if (cpu_is_omap3430() || cpu_is_omap3630())
Aneesh Vcc0170b2011-07-02 08:00:22 +0530191 omap_features |= OMAP3_HAS_IO_WAKEUP;
Paul Walmsleyb02b9172011-10-06 17:18:45 -0600192 if (cpu_is_omap3630() || omap_rev() == OMAP3430_REV_ES3_1 ||
193 omap_rev() == OMAP3430_REV_ES3_1_2)
194 omap_features |= OMAP3_HAS_IO_CHAIN_CTRL;
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800195
Aneesh Vcc0170b2011-07-02 08:00:22 +0530196 omap_features |= OMAP3_HAS_SDRC;
Hemant Pedanekar01001712011-02-16 08:31:39 -0800197
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800198 /*
199 * TODO: Get additional info (where applicable)
200 * e.g. Size of L2 cache.
201 */
202}
203
Aneesh Vcc0170b2011-07-02 08:00:22 +0530204static void __init omap4_check_features(void)
205{
206 u32 si_type;
207
208 if (cpu_is_omap443x())
209 omap_features |= OMAP4_HAS_MPU_1GHZ;
210
211
212 if (cpu_is_omap446x()) {
213 si_type =
214 read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1);
215 switch ((si_type & (3 << 16)) >> 16) {
216 case 2:
217 /* High performance device */
218 omap_features |= OMAP4_HAS_MPU_1_5GHZ;
219 break;
220 case 1:
221 default:
222 /* Standard device */
223 omap_features |= OMAP4_HAS_MPU_1_2GHZ;
224 break;
225 }
226 }
227}
228
Hemant Pedanekar01001712011-02-16 08:31:39 -0800229static void __init ti816x_check_features(void)
230{
Aneesh Vcc0170b2011-07-02 08:00:22 +0530231 omap_features = OMAP3_HAS_NEON;
Hemant Pedanekar01001712011-02-16 08:31:39 -0800232}
233
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600234static void __init omap3_check_revision(const char **cpu_rev)
Tony Lindgrena8823142008-12-10 17:36:30 -0800235{
236 u32 cpuid, idcode;
237 u16 hawkeye;
238 u8 rev;
Tony Lindgrena8823142008-12-10 17:36:30 -0800239
240 /*
241 * We cannot access revision registers on ES1.0.
242 * If the processor type is Cortex-A8 and the revision is 0x0
243 * it means its Cortex r0p0 which is 3430 ES1.0.
244 */
245 cpuid = read_cpuid(CPUID_ID);
246 if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800247 omap_revision = OMAP3430_REV_ES1_0;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600248 *cpu_rev = "1.0";
Sanjeev Premi048f4bd2009-11-22 10:10:54 -0800249 return;
Tony Lindgrena8823142008-12-10 17:36:30 -0800250 }
251
252 /*
253 * Detection for 34xx ES2.0 and above can be done with just
254 * hawkeye and rev. See TRM 1.5.2 Device Identification.
255 * Note that rev does not map directly to our defined processor
256 * revision numbers as ES1.0 uses value 0.
257 */
258 idcode = read_tap_reg(OMAP_TAP_IDCODE);
259 hawkeye = (idcode >> 12) & 0xffff;
260 rev = (idcode >> 28) & 0xff;
261
Nishanth Menon2456a102009-11-22 10:10:56 -0800262 switch (hawkeye) {
263 case 0xb7ae:
264 /* Handle 34xx/35xx devices */
Tony Lindgrena8823142008-12-10 17:36:30 -0800265 switch (rev) {
Sanjeev Premi048f4bd2009-11-22 10:10:54 -0800266 case 0: /* Take care of early samples */
267 case 1:
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800268 omap_revision = OMAP3430_REV_ES2_0;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600269 *cpu_rev = "2.0";
Tony Lindgrena8823142008-12-10 17:36:30 -0800270 break;
271 case 2:
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800272 omap_revision = OMAP3430_REV_ES2_1;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600273 *cpu_rev = "2.1";
Tony Lindgrena8823142008-12-10 17:36:30 -0800274 break;
275 case 3:
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800276 omap_revision = OMAP3430_REV_ES3_0;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600277 *cpu_rev = "3.0";
Tony Lindgrena8823142008-12-10 17:36:30 -0800278 break;
Tony Lindgren187e6882009-01-29 08:57:16 -0800279 case 4:
Tony Lindgrene9acb9b2010-01-19 15:40:26 -0800280 omap_revision = OMAP3430_REV_ES3_1;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600281 *cpu_rev = "3.1";
Tony Lindgrene9acb9b2010-01-19 15:40:26 -0800282 break;
283 case 7:
Felipe Balbiedeae652009-11-22 10:11:24 -0800284 /* FALLTHROUGH */
Tony Lindgrena8823142008-12-10 17:36:30 -0800285 default:
286 /* Use the latest known revision as default */
Tony Lindgrene9acb9b2010-01-19 15:40:26 -0800287 omap_revision = OMAP3430_REV_ES3_1_2;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600288 *cpu_rev = "3.1.2";
Tony Lindgrena8823142008-12-10 17:36:30 -0800289 }
Nishanth Menon2456a102009-11-22 10:10:56 -0800290 break;
Sanjeev Premi4cac6012009-11-22 10:10:58 -0800291 case 0xb868:
Paul Walmsley1f1b0352011-09-13 19:52:13 -0600292 /*
293 * Handle OMAP/AM 3505/3517 devices
Sanjeev Premi4cac6012009-11-22 10:10:58 -0800294 *
Paul Walmsley1f1b0352011-09-13 19:52:13 -0600295 * Set the device to be OMAP3517 here. Actual device
Sanjeev Premi4cac6012009-11-22 10:10:58 -0800296 * is identified later based on the features.
297 */
Paul Walmsley9ed2ba72011-09-13 19:52:14 -0600298 switch (rev) {
299 case 0:
300 omap_revision = OMAP3517_REV_ES1_0;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600301 *cpu_rev = "1.0";
Paul Walmsley9ed2ba72011-09-13 19:52:14 -0600302 break;
303 case 1:
304 /* FALLTHROUGH */
305 default:
306 omap_revision = OMAP3517_REV_ES1_1;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600307 *cpu_rev = "1.1";
Paul Walmsley9ed2ba72011-09-13 19:52:14 -0600308 }
Sanjeev Premi4cac6012009-11-22 10:10:58 -0800309 break;
Felipe Balbiedeae652009-11-22 10:11:24 -0800310 case 0xb891:
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000311 /* Handle 36xx devices */
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000312
313 switch(rev) {
314 case 0: /* Take care of early samples */
315 omap_revision = OMAP3630_REV_ES1_0;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600316 *cpu_rev = "1.0";
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000317 break;
318 case 1:
319 omap_revision = OMAP3630_REV_ES1_1;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600320 *cpu_rev = "1.1";
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000321 break;
322 case 2:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600323 /* FALLTHROUGH */
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000324 default:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600325 omap_revision = OMAP3630_REV_ES1_2;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600326 *cpu_rev = "1.2";
Anand Gadiyarb0a1a6c2010-08-03 19:59:24 +0000327 }
Nishanth Menon77c08702010-08-16 09:21:19 +0300328 break;
Hemant Pedanekar01001712011-02-16 08:31:39 -0800329 case 0xb81e:
Hemant Pedanekar01001712011-02-16 08:31:39 -0800330 switch (rev) {
331 case 0:
332 omap_revision = TI8168_REV_ES1_0;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600333 *cpu_rev = "1.0";
Hemant Pedanekar01001712011-02-16 08:31:39 -0800334 break;
335 case 1:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600336 /* FALLTHROUGH */
Hemant Pedanekar01001712011-02-16 08:31:39 -0800337 default:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600338 omap_revision = TI8168_REV_ES1_1;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600339 *cpu_rev = "1.1";
340 break;
Hemant Pedanekar01001712011-02-16 08:31:39 -0800341 }
342 break;
Nishanth Menon2456a102009-11-22 10:10:56 -0800343 default:
Paul Walmsley51ec8112011-09-13 19:52:15 -0600344 /* Unknown default to latest silicon rev as default */
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600345 omap_revision = OMAP3630_REV_ES1_2;
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600346 *cpu_rev = "1.2";
Paul Walmsley51ec8112011-09-13 19:52:15 -0600347 pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
Tony Lindgrena8823142008-12-10 17:36:30 -0800348 }
Tony Lindgrena8823142008-12-10 17:36:30 -0800349}
350
Nishanth Menon5ebc0d52010-08-02 14:21:40 +0300351static void __init omap4_check_revision(void)
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800352{
353 u32 idcode;
354 u16 hawkeye;
355 u8 rev;
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800356
357 /*
358 * The IC rev detection is done with hawkeye and rev.
359 * Note that rev does not map directly to defined processor
360 * revision numbers as ES1.0 uses value 0.
361 */
362 idcode = read_tap_reg(OMAP_TAP_IDCODE);
363 hawkeye = (idcode >> 12) & 0xffff;
Nishant Kamate49c4d22011-02-17 09:55:03 -0800364 rev = (idcode >> 28) & 0xf;
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800365
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530366 /*
Aneesh Vfa54dcc2011-07-02 08:00:21 +0530367 * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530368 * Use ARM register to detect the correct ES version
369 */
Aneesh Vfa54dcc2011-07-02 08:00:21 +0530370 if (!rev && (hawkeye != 0xb94e)) {
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530371 idcode = read_cpuid(CPUID_ID);
372 rev = (idcode & 0xf) - 1;
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800373 }
374
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530375 switch (hawkeye) {
376 case 0xb852:
377 switch (rev) {
378 case 0:
379 omap_revision = OMAP4430_REV_ES1_0;
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530380 break;
381 case 1:
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530382 default:
383 omap_revision = OMAP4430_REV_ES2_0;
Nishant Kamate49c4d22011-02-17 09:55:03 -0800384 }
385 break;
386 case 0xb95c:
387 switch (rev) {
388 case 3:
389 omap_revision = OMAP4430_REV_ES2_1;
Nishant Kamate49c4d22011-02-17 09:55:03 -0800390 break;
391 case 4:
392 default:
393 omap_revision = OMAP4430_REV_ES2_2;
Nishant Kamate49c4d22011-02-17 09:55:03 -0800394 }
395 break;
Aneesh Vfa54dcc2011-07-02 08:00:21 +0530396 case 0xb94e:
397 switch (rev) {
398 case 0:
399 default:
400 omap_revision = OMAP4460_REV_ES1_0;
Aneesh Vfa54dcc2011-07-02 08:00:21 +0530401 break;
402 }
403 break;
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530404 default:
Nishant Kamate49c4d22011-02-17 09:55:03 -0800405 /* Unknown default to latest silicon rev as default */
406 omap_revision = OMAP4430_REV_ES2_2;
Santosh Shilimkared6be0b2010-09-16 18:44:46 +0530407 }
408
Nishant Kamate49c4d22011-02-17 09:55:03 -0800409 pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
410 ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf));
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800411}
412
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800413#define OMAP3_SHOW_FEATURE(feat) \
Kevin Hilmancedf9002009-11-22 10:11:13 -0800414 if (omap3_has_ ##feat()) \
415 printk(#feat" ");
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800416
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600417static void __init omap3_cpuinfo(const char *cpu_rev)
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800418{
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600419 const char *cpu_name;
Sanjeev Premi048f4bd2009-11-22 10:10:54 -0800420
Paul Walmsley91d92d62011-09-13 19:52:14 -0600421 /*
422 * OMAP3430 and OMAP3530 are assumed to be same.
Sanjeev Premi048f4bd2009-11-22 10:10:54 -0800423 *
424 * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
425 * on available features. Upon detection, update the CPU id
426 * and CPU class bits.
427 */
Felipe Balbiedeae652009-11-22 10:11:24 -0800428 if (cpu_is_omap3630()) {
Paul Walmsley91d92d62011-09-13 19:52:14 -0600429 cpu_name = "OMAP3630";
Paul Walmsley1f1b0352011-09-13 19:52:13 -0600430 } else if (cpu_is_omap3517()) {
Paul Walmsley91d92d62011-09-13 19:52:14 -0600431 /* AM35xx devices */
432 cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
Hemant Pedanekar01001712011-02-16 08:31:39 -0800433 } else if (cpu_is_ti816x()) {
Paul Walmsley91d92d62011-09-13 19:52:14 -0600434 cpu_name = "TI816X";
Felipe Balbiedeae652009-11-22 10:11:24 -0800435 } else if (omap3_has_iva() && omap3_has_sgx()) {
436 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
Paul Walmsley91d92d62011-09-13 19:52:14 -0600437 cpu_name = "OMAP3430/3530";
Sergey Lapin0712fb32009-12-11 16:16:37 -0800438 } else if (omap3_has_iva()) {
Paul Walmsley91d92d62011-09-13 19:52:14 -0600439 cpu_name = "OMAP3525";
Sergey Lapin0712fb32009-12-11 16:16:37 -0800440 } else if (omap3_has_sgx()) {
Paul Walmsley91d92d62011-09-13 19:52:14 -0600441 cpu_name = "OMAP3515";
Felipe Balbiedeae652009-11-22 10:11:24 -0800442 } else {
Paul Walmsley91d92d62011-09-13 19:52:14 -0600443 cpu_name = "OMAP3503";
Sanjeev Premi048f4bd2009-11-22 10:10:54 -0800444 }
445
Felipe Balbiedeae652009-11-22 10:11:24 -0800446 /* Print verbose information */
Kevin Hilmancedf9002009-11-22 10:11:13 -0800447 pr_info("%s ES%s (", cpu_name, cpu_rev);
Sanjeev Premi048f4bd2009-11-22 10:10:54 -0800448
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800449 OMAP3_SHOW_FEATURE(l2cache);
450 OMAP3_SHOW_FEATURE(iva);
451 OMAP3_SHOW_FEATURE(sgx);
452 OMAP3_SHOW_FEATURE(neon);
453 OMAP3_SHOW_FEATURE(isp);
Vishwanath BS7356f0b2010-02-22 22:09:10 -0700454 OMAP3_SHOW_FEATURE(192mhz_clk);
Kevin Hilmancedf9002009-11-22 10:11:13 -0800455
456 printk(")\n");
Sanjeev Premi8384ce02009-11-22 10:10:53 -0800457}
458
Tony Lindgrena8823142008-12-10 17:36:30 -0800459/*
460 * Try to detect the exact revision of the omap we're running on
461 */
Tony Lindgren5ba02dc2008-12-10 17:36:30 -0800462void __init omap2_check_revision(void)
463{
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600464 const char *cpu_rev;
465
Tony Lindgrena8823142008-12-10 17:36:30 -0800466 /*
467 * At this point we have an idea about the processor revision set
468 * earlier with omap2_set_globals_tap().
469 */
Felipe Balbiedeae652009-11-22 10:11:24 -0800470 if (cpu_is_omap24xx()) {
Tony Lindgrena8823142008-12-10 17:36:30 -0800471 omap24xx_check_revision();
Felipe Balbiedeae652009-11-22 10:11:24 -0800472 } else if (cpu_is_omap34xx()) {
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600473 omap3_check_revision(&cpu_rev);
Hemant Pedanekar01001712011-02-16 08:31:39 -0800474
475 /* TI816X doesn't have feature register */
476 if (!cpu_is_ti816x())
477 omap3_check_features();
478 else
479 ti816x_check_features();
480
Paul Walmsley3b32b7d2011-09-13 19:52:15 -0600481 omap3_cpuinfo(cpu_rev);
Tony Lindgrene9acb9b2010-01-19 15:40:26 -0800482 return;
Felipe Balbiedeae652009-11-22 10:11:24 -0800483 } else if (cpu_is_omap44xx()) {
Santosh Shilimkarb570e0e2009-12-11 16:16:34 -0800484 omap4_check_revision();
Aneesh Vcc0170b2011-07-02 08:00:22 +0530485 omap4_check_features();
Santosh Shilimkar44169072009-05-28 14:16:04 -0700486 return;
Felipe Balbiedeae652009-11-22 10:11:24 -0800487 } else {
Tony Lindgrena8823142008-12-10 17:36:30 -0800488 pr_err("OMAP revision unknown, please fix!\n");
Felipe Balbiedeae652009-11-22 10:11:24 -0800489 }
Tony Lindgren5ba02dc2008-12-10 17:36:30 -0800490}
491
Tony Lindgrena8823142008-12-10 17:36:30 -0800492/*
493 * Set up things for map_io and processor detection later on. Gets called
494 * pretty much first thing from board init. For multi-omap, this gets
495 * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
496 * detect the exact revision later on in omap2_detect_revision() once map_io
497 * is done.
498 */
Tony Lindgren0e564842008-10-06 15:49:16 +0300499void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
500{
Lauri Leukkunen84a34342008-12-10 17:36:31 -0800501 omap_revision = omap2_globals->class;
Tony Lindgren0e564842008-10-06 15:49:16 +0300502 tap_base = omap2_globals->tap;
503
Tony Lindgrena8823142008-12-10 17:36:30 -0800504 if (cpu_is_omap34xx())
Tony Lindgren0e564842008-10-06 15:49:16 +0300505 tap_prod_id = 0x0210;
506 else
507 tap_prod_id = 0x0208;
508}