H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 1 | #ifndef _ASM_X86_APIC_H |
| 2 | #define _ASM_X86_APIC_H |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 3 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 4 | #include <linux/cpumask.h> |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 5 | #include <linux/delay.h> |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 6 | #include <linux/pm.h> |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 7 | |
| 8 | #include <asm/alternative.h> |
Suresh Siddha | 13c88fb5 | 2008-07-10 11:16:52 -0700 | [diff] [blame] | 9 | #include <asm/cpufeature.h> |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 10 | #include <asm/processor.h> |
| 11 | #include <asm/apicdef.h> |
| 12 | #include <asm/atomic.h> |
| 13 | #include <asm/fixmap.h> |
| 14 | #include <asm/mpspec.h> |
| 15 | #include <asm/system.h> |
Suresh Siddha | 13c88fb5 | 2008-07-10 11:16:52 -0700 | [diff] [blame] | 16 | #include <asm/msr.h> |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 17 | |
| 18 | #define ARCH_APICTIMER_STOPS_ON_C3 1 |
| 19 | |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 20 | /* |
| 21 | * Debugging macros |
| 22 | */ |
| 23 | #define APIC_QUIET 0 |
| 24 | #define APIC_VERBOSE 1 |
| 25 | #define APIC_DEBUG 2 |
| 26 | |
| 27 | /* |
| 28 | * Define the default level of output to be very little |
| 29 | * This can be turned up by using apic=verbose for more |
| 30 | * information and apic=debug for _lots_ of information. |
| 31 | * apic_verbosity is defined in apic.c |
| 32 | */ |
| 33 | #define apic_printk(v, s, a...) do { \ |
| 34 | if ((v) <= apic_verbosity) \ |
| 35 | printk(s, ##a); \ |
| 36 | } while (0) |
| 37 | |
| 38 | |
Ingo Molnar | 160d8da | 2009-02-11 11:27:39 +0100 | [diff] [blame] | 39 | #if defined(CONFIG_X86_LOCAL_APIC) && defined(CONFIG_X86_32) |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 40 | extern void generic_apic_probe(void); |
Ingo Molnar | 160d8da | 2009-02-11 11:27:39 +0100 | [diff] [blame] | 41 | #else |
| 42 | static inline void generic_apic_probe(void) |
| 43 | { |
| 44 | } |
| 45 | #endif |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 46 | |
| 47 | #ifdef CONFIG_X86_LOCAL_APIC |
| 48 | |
Maciej W. Rozycki | baa1318 | 2008-07-14 18:44:51 +0100 | [diff] [blame] | 49 | extern unsigned int apic_verbosity; |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 50 | extern int local_apic_timer_c2_ok; |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 51 | |
Yinghai Lu | 3c999f1 | 2008-06-20 16:11:20 -0700 | [diff] [blame] | 52 | extern int disable_apic; |
Ingo Molnar | 0939e4f | 2009-01-28 17:16:25 +0100 | [diff] [blame] | 53 | |
| 54 | #ifdef CONFIG_SMP |
| 55 | extern void __inquire_remote_apic(int apicid); |
| 56 | #else /* CONFIG_SMP */ |
| 57 | static inline void __inquire_remote_apic(int apicid) |
| 58 | { |
| 59 | } |
| 60 | #endif /* CONFIG_SMP */ |
| 61 | |
| 62 | static inline void default_inquire_remote_apic(int apicid) |
| 63 | { |
| 64 | if (apic_verbosity >= APIC_DEBUG) |
| 65 | __inquire_remote_apic(apicid); |
| 66 | } |
| 67 | |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 68 | /* |
Cyrill Gorcunov | 8312136 | 2009-09-15 11:12:30 +0400 | [diff] [blame] | 69 | * With 82489DX we can't rely on apic feature bit |
| 70 | * retrieved via cpuid but still have to deal with |
| 71 | * such an apic chip so we assume that SMP configuration |
| 72 | * is found from MP table (64bit case uses ACPI mostly |
| 73 | * which set smp presence flag as well so we are safe |
| 74 | * to use this helper too). |
| 75 | */ |
| 76 | static inline bool apic_from_smp_config(void) |
| 77 | { |
| 78 | return smp_found_config && !disable_apic; |
| 79 | } |
| 80 | |
| 81 | /* |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 82 | * Basic functions accessing APICs. |
| 83 | */ |
| 84 | #ifdef CONFIG_PARAVIRT |
| 85 | #include <asm/paravirt.h> |
Thomas Gleixner | 96a388d | 2007-10-11 11:20:03 +0200 | [diff] [blame] | 86 | #endif |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 87 | |
Ravikiran G Thirumalai | 7051113 | 2009-03-23 23:14:29 -0700 | [diff] [blame] | 88 | #ifdef CONFIG_X86_64 |
Ravikiran G Thirumalai | aa7d8e25e | 2008-03-20 00:41:16 -0700 | [diff] [blame] | 89 | extern int is_vsmp_box(void); |
Yinghai Lu | 129d8bc | 2009-02-25 21:20:50 -0800 | [diff] [blame] | 90 | #else |
| 91 | static inline int is_vsmp_box(void) |
| 92 | { |
| 93 | return 0; |
| 94 | } |
| 95 | #endif |
Jaswinder Singh | 2b97df0 | 2008-07-23 17:13:14 +0530 | [diff] [blame] | 96 | extern void xapic_wait_icr_idle(void); |
| 97 | extern u32 safe_xapic_wait_icr_idle(void); |
Jaswinder Singh | 2b97df0 | 2008-07-23 17:13:14 +0530 | [diff] [blame] | 98 | extern void xapic_icr_write(u32, u32); |
| 99 | extern int setup_profiling_timer(unsigned int); |
Ravikiran G Thirumalai | aa7d8e25e | 2008-03-20 00:41:16 -0700 | [diff] [blame] | 100 | |
Suresh Siddha | 1b374e4 | 2008-07-10 11:16:49 -0700 | [diff] [blame] | 101 | static inline void native_apic_mem_write(u32 reg, u32 v) |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 102 | { |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 103 | volatile u32 *addr = (volatile u32 *)(APIC_BASE + reg); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 104 | |
Maciej W. Rozycki | 593f4a7 | 2008-07-16 19:15:30 +0100 | [diff] [blame] | 105 | alternative_io("movl %0, %1", "xchgl %0, %1", X86_FEATURE_11AP, |
| 106 | ASM_OUTPUT2("=r" (v), "=m" (*addr)), |
| 107 | ASM_OUTPUT2("0" (v), "m" (*addr))); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 108 | } |
| 109 | |
Suresh Siddha | 1b374e4 | 2008-07-10 11:16:49 -0700 | [diff] [blame] | 110 | static inline u32 native_apic_mem_read(u32 reg) |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 111 | { |
| 112 | return *((volatile u32 *)(APIC_BASE + reg)); |
| 113 | } |
| 114 | |
Yinghai Lu | c1eeb2d | 2009-02-16 23:02:14 -0800 | [diff] [blame] | 115 | extern void native_apic_wait_icr_idle(void); |
| 116 | extern u32 native_safe_apic_wait_icr_idle(void); |
| 117 | extern void native_apic_icr_write(u32 low, u32 id); |
| 118 | extern u64 native_apic_icr_read(void); |
| 119 | |
Suresh Siddha | fc1edaf | 2009-04-20 13:02:27 -0700 | [diff] [blame] | 120 | extern int x2apic_mode; |
Fenghua Yu | b24696b | 2009-03-27 14:22:44 -0700 | [diff] [blame] | 121 | |
Han, Weidong | d0b03bd | 2009-04-03 17:15:50 +0800 | [diff] [blame] | 122 | #ifdef CONFIG_X86_X2APIC |
Suresh Siddha | ce4e240 | 2009-03-17 10:16:54 -0800 | [diff] [blame] | 123 | /* |
| 124 | * Make previous memory operations globally visible before |
| 125 | * sending the IPI through x2apic wrmsr. We need a serializing instruction or |
| 126 | * mfence for this. |
| 127 | */ |
| 128 | static inline void x2apic_wrmsr_fence(void) |
| 129 | { |
| 130 | asm volatile("mfence" : : : "memory"); |
| 131 | } |
| 132 | |
Suresh Siddha | 13c88fb5 | 2008-07-10 11:16:52 -0700 | [diff] [blame] | 133 | static inline void native_apic_msr_write(u32 reg, u32 v) |
| 134 | { |
| 135 | if (reg == APIC_DFR || reg == APIC_ID || reg == APIC_LDR || |
| 136 | reg == APIC_LVR) |
| 137 | return; |
| 138 | |
| 139 | wrmsr(APIC_BASE_MSR + (reg >> 4), v, 0); |
| 140 | } |
| 141 | |
| 142 | static inline u32 native_apic_msr_read(u32 reg) |
| 143 | { |
| 144 | u32 low, high; |
| 145 | |
| 146 | if (reg == APIC_DFR) |
| 147 | return -1; |
| 148 | |
| 149 | rdmsr(APIC_BASE_MSR + (reg >> 4), low, high); |
| 150 | return low; |
| 151 | } |
| 152 | |
Yinghai Lu | c1eeb2d | 2009-02-16 23:02:14 -0800 | [diff] [blame] | 153 | static inline void native_x2apic_wait_icr_idle(void) |
| 154 | { |
| 155 | /* no need to wait for icr idle in x2apic */ |
| 156 | return; |
| 157 | } |
| 158 | |
| 159 | static inline u32 native_safe_x2apic_wait_icr_idle(void) |
| 160 | { |
| 161 | /* no need to wait for icr idle in x2apic */ |
| 162 | return 0; |
| 163 | } |
| 164 | |
| 165 | static inline void native_x2apic_icr_write(u32 low, u32 id) |
| 166 | { |
| 167 | wrmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), ((__u64) id) << 32 | low); |
| 168 | } |
| 169 | |
| 170 | static inline u64 native_x2apic_icr_read(void) |
| 171 | { |
| 172 | unsigned long val; |
| 173 | |
| 174 | rdmsrl(APIC_BASE_MSR + (APIC_ICR >> 4), val); |
| 175 | return val; |
| 176 | } |
| 177 | |
Suresh Siddha | fc1edaf | 2009-04-20 13:02:27 -0700 | [diff] [blame] | 178 | extern int x2apic_phys; |
Suresh Siddha | 6e1cb38 | 2008-07-10 11:16:58 -0700 | [diff] [blame] | 179 | extern void check_x2apic(void); |
| 180 | extern void enable_x2apic(void); |
Suresh Siddha | 6e1cb38 | 2008-07-10 11:16:58 -0700 | [diff] [blame] | 181 | extern void x2apic_icr_write(u32 low, u32 id); |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 182 | static inline int x2apic_enabled(void) |
| 183 | { |
| 184 | int msr, msr2; |
| 185 | |
| 186 | if (!cpu_has_x2apic) |
| 187 | return 0; |
| 188 | |
| 189 | rdmsr(MSR_IA32_APICBASE, msr, msr2); |
| 190 | if (msr & X2APIC_ENABLE) |
| 191 | return 1; |
| 192 | return 0; |
| 193 | } |
Suresh Siddha | fc1edaf | 2009-04-20 13:02:27 -0700 | [diff] [blame] | 194 | |
| 195 | #define x2apic_supported() (cpu_has_x2apic) |
Gleb Natapov | ce69a78 | 2009-07-20 15:24:17 +0300 | [diff] [blame] | 196 | static inline void x2apic_force_phys(void) |
| 197 | { |
| 198 | x2apic_phys = 1; |
| 199 | } |
Yinghai Lu | a11b5ab | 2008-09-03 16:58:31 -0700 | [diff] [blame] | 200 | #else |
Yinghai Lu | 06cd9a7 | 2009-02-16 17:29:58 -0800 | [diff] [blame] | 201 | static inline void check_x2apic(void) |
| 202 | { |
| 203 | } |
| 204 | static inline void enable_x2apic(void) |
| 205 | { |
| 206 | } |
Yinghai Lu | 06cd9a7 | 2009-02-16 17:29:58 -0800 | [diff] [blame] | 207 | static inline int x2apic_enabled(void) |
| 208 | { |
| 209 | return 0; |
| 210 | } |
Gleb Natapov | ce69a78 | 2009-07-20 15:24:17 +0300 | [diff] [blame] | 211 | static inline void x2apic_force_phys(void) |
| 212 | { |
| 213 | } |
Suresh Siddha | cf6567f | 2009-03-16 17:05:00 -0700 | [diff] [blame] | 214 | |
Weidong Han | 9375823 | 2009-04-17 16:42:14 +0800 | [diff] [blame] | 215 | #define x2apic_preenabled 0 |
Suresh Siddha | fc1edaf | 2009-04-20 13:02:27 -0700 | [diff] [blame] | 216 | #define x2apic_supported() 0 |
Yinghai Lu | c535b6a | 2008-07-11 18:41:54 -0700 | [diff] [blame] | 217 | #endif |
Suresh Siddha | 1b374e4 | 2008-07-10 11:16:49 -0700 | [diff] [blame] | 218 | |
Weidong Han | 9375823 | 2009-04-17 16:42:14 +0800 | [diff] [blame] | 219 | extern void enable_IR_x2apic(void); |
| 220 | |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 221 | extern int get_physical_broadcast(void); |
| 222 | |
Cyrill Gorcunov | 08306ce | 2009-04-12 20:47:41 +0400 | [diff] [blame] | 223 | extern void apic_disable(void); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 224 | extern int lapic_get_maxlvt(void); |
| 225 | extern void clear_local_APIC(void); |
| 226 | extern void connect_bsp_APIC(void); |
| 227 | extern void disconnect_bsp_APIC(int virt_wire_setup); |
| 228 | extern void disable_local_APIC(void); |
| 229 | extern void lapic_shutdown(void); |
| 230 | extern int verify_local_APIC(void); |
| 231 | extern void cache_APIC_registers(void); |
| 232 | extern void sync_Arb_IDs(void); |
| 233 | extern void init_bsp_APIC(void); |
| 234 | extern void setup_local_APIC(void); |
Andi Kleen | 739f33b | 2008-01-30 13:30:40 +0100 | [diff] [blame] | 235 | extern void end_local_APIC_setup(void); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 236 | extern void init_apic_mappings(void); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 237 | extern void setup_boot_APIC_clock(void); |
| 238 | extern void setup_secondary_APIC_clock(void); |
| 239 | extern int APIC_init_uniprocessor(void); |
Jan Beulich | e942710 | 2008-01-30 13:31:24 +0100 | [diff] [blame] | 240 | extern void enable_NMI_through_LVT0(void); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 241 | |
| 242 | /* |
| 243 | * On 32bit this is mach-xxx local |
| 244 | */ |
| 245 | #ifdef CONFIG_X86_64 |
Yinghai Lu | 8643f9d | 2008-02-19 03:21:06 -0800 | [diff] [blame] | 246 | extern void early_init_lapic_mapping(void); |
Alok Kataria | 8fbbc4b | 2008-07-01 11:43:34 -0700 | [diff] [blame] | 247 | extern int apic_is_clustered_box(void); |
| 248 | #else |
| 249 | static inline int apic_is_clustered_box(void) |
| 250 | { |
| 251 | return 0; |
| 252 | } |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 253 | #endif |
| 254 | |
Robert Richter | 7b83dae | 2008-01-30 13:30:40 +0100 | [diff] [blame] | 255 | extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); |
| 256 | extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 257 | |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 258 | |
| 259 | #else /* !CONFIG_X86_LOCAL_APIC */ |
| 260 | static inline void lapic_shutdown(void) { } |
| 261 | #define local_apic_timer_c2_ok 1 |
Yinghai Lu | f3294a3 | 2008-06-27 01:41:56 -0700 | [diff] [blame] | 262 | static inline void init_apic_mappings(void) { } |
Ivan Vecera | d3ec5ca | 2008-11-11 14:33:44 +0100 | [diff] [blame] | 263 | static inline void disable_local_APIC(void) { } |
Cyrill Gorcunov | 08306ce | 2009-04-12 20:47:41 +0400 | [diff] [blame] | 264 | static inline void apic_disable(void) { } |
Thomas Gleixner | 736deca | 2009-08-19 12:35:53 +0200 | [diff] [blame] | 265 | # define setup_boot_APIC_clock x86_init_noop |
| 266 | # define setup_secondary_APIC_clock x86_init_noop |
Thomas Gleixner | 67c5fc5 | 2008-01-30 13:30:15 +0100 | [diff] [blame] | 267 | #endif /* !CONFIG_X86_LOCAL_APIC */ |
| 268 | |
Ingo Molnar | 1f75ed0 | 2009-01-28 17:36:56 +0100 | [diff] [blame] | 269 | #ifdef CONFIG_X86_64 |
| 270 | #define SET_APIC_ID(x) (apic->set_apic_id(x)) |
| 271 | #else |
| 272 | |
Ingo Molnar | 1f75ed0 | 2009-01-28 17:36:56 +0100 | [diff] [blame] | 273 | #endif |
| 274 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 275 | /* |
| 276 | * Copyright 2004 James Cleverdon, IBM. |
| 277 | * Subject to the GNU Public License, v.2 |
| 278 | * |
| 279 | * Generic APIC sub-arch data struct. |
| 280 | * |
| 281 | * Hacked for x86-64 by James Cleverdon from i386 architecture code by |
| 282 | * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and |
| 283 | * James Cleverdon. |
| 284 | */ |
Ingo Molnar | be163a1 | 2009-02-17 16:28:46 +0100 | [diff] [blame] | 285 | struct apic { |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 286 | char *name; |
| 287 | |
| 288 | int (*probe)(void); |
| 289 | int (*acpi_madt_oem_check)(char *oem_id, char *oem_table_id); |
| 290 | int (*apic_id_registered)(void); |
| 291 | |
| 292 | u32 irq_delivery_mode; |
| 293 | u32 irq_dest_mode; |
| 294 | |
| 295 | const struct cpumask *(*target_cpus)(void); |
| 296 | |
| 297 | int disable_esr; |
| 298 | |
| 299 | int dest_logical; |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 300 | unsigned long (*check_apicid_used)(physid_mask_t *map, int apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 301 | unsigned long (*check_apicid_present)(int apicid); |
| 302 | |
| 303 | void (*vector_allocation_domain)(int cpu, struct cpumask *retmask); |
| 304 | void (*init_apic_ldr)(void); |
| 305 | |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 306 | void (*ioapic_phys_id_map)(physid_mask_t *phys_map, physid_mask_t *retmap); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 307 | |
| 308 | void (*setup_apic_routing)(void); |
| 309 | int (*multi_timer_check)(int apic, int irq); |
| 310 | int (*apicid_to_node)(int logical_apicid); |
| 311 | int (*cpu_to_logical_apicid)(int cpu); |
| 312 | int (*cpu_present_to_apicid)(int mps_cpu); |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 313 | void (*apicid_to_cpu_present)(int phys_apicid, physid_mask_t *retmap); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 314 | void (*setup_portio_remap)(void); |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 315 | int (*check_phys_apicid_present)(int phys_apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 316 | void (*enable_apic_mode)(void); |
| 317 | int (*phys_pkg_id)(int cpuid_apic, int index_msb); |
| 318 | |
| 319 | /* |
Ingo Molnar | be163a1 | 2009-02-17 16:28:46 +0100 | [diff] [blame] | 320 | * When one of the next two hooks returns 1 the apic |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 321 | * is switched to this. Essentially they are additional |
| 322 | * probe functions: |
| 323 | */ |
| 324 | int (*mps_oem_check)(struct mpc_table *mpc, char *oem, char *productid); |
| 325 | |
| 326 | unsigned int (*get_apic_id)(unsigned long x); |
| 327 | unsigned long (*set_apic_id)(unsigned int id); |
| 328 | unsigned long apic_id_mask; |
| 329 | |
| 330 | unsigned int (*cpu_mask_to_apicid)(const struct cpumask *cpumask); |
| 331 | unsigned int (*cpu_mask_to_apicid_and)(const struct cpumask *cpumask, |
| 332 | const struct cpumask *andmask); |
| 333 | |
| 334 | /* ipi */ |
| 335 | void (*send_IPI_mask)(const struct cpumask *mask, int vector); |
| 336 | void (*send_IPI_mask_allbutself)(const struct cpumask *mask, |
| 337 | int vector); |
| 338 | void (*send_IPI_allbutself)(int vector); |
| 339 | void (*send_IPI_all)(int vector); |
| 340 | void (*send_IPI_self)(int vector); |
| 341 | |
| 342 | /* wakeup_secondary_cpu */ |
Ingo Molnar | 1f5bcab | 2009-02-26 13:51:40 +0100 | [diff] [blame] | 343 | int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 344 | |
| 345 | int trampoline_phys_low; |
| 346 | int trampoline_phys_high; |
| 347 | |
| 348 | void (*wait_for_init_deassert)(atomic_t *deassert); |
| 349 | void (*smp_callin_clear_local_apic)(void); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 350 | void (*inquire_remote_apic)(int apicid); |
| 351 | |
| 352 | /* apic ops */ |
| 353 | u32 (*read)(u32 reg); |
| 354 | void (*write)(u32 reg, u32 v); |
| 355 | u64 (*icr_read)(void); |
| 356 | void (*icr_write)(u32 low, u32 high); |
| 357 | void (*wait_icr_idle)(void); |
| 358 | u32 (*safe_wait_icr_idle)(void); |
| 359 | }; |
| 360 | |
Ingo Molnar | 0917c01 | 2009-02-26 12:47:40 +0100 | [diff] [blame] | 361 | /* |
| 362 | * Pointer to the local APIC driver in use on this system (there's |
| 363 | * always just one such driver in use - the kernel decides via an |
| 364 | * early probing process which one it picks - and then sticks to it): |
| 365 | */ |
Ingo Molnar | be163a1 | 2009-02-17 16:28:46 +0100 | [diff] [blame] | 366 | extern struct apic *apic; |
Ingo Molnar | 0917c01 | 2009-02-26 12:47:40 +0100 | [diff] [blame] | 367 | |
| 368 | /* |
| 369 | * APIC functionality to boot other CPUs - only used on SMP: |
| 370 | */ |
| 371 | #ifdef CONFIG_SMP |
Yinghai Lu | 2b6163b | 2009-02-25 20:50:49 -0800 | [diff] [blame] | 372 | extern atomic_t init_deasserted; |
| 373 | extern int wakeup_secondary_cpu_via_nmi(int apicid, unsigned long start_eip); |
Ingo Molnar | 0917c01 | 2009-02-26 12:47:40 +0100 | [diff] [blame] | 374 | #endif |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 375 | |
Cyrill Gorcunov | d674cd1 | 2010-03-17 13:37:00 +0300 | [diff] [blame] | 376 | #ifdef CONFIG_X86_LOCAL_APIC |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 377 | static inline u32 apic_read(u32 reg) |
| 378 | { |
| 379 | return apic->read(reg); |
| 380 | } |
| 381 | |
| 382 | static inline void apic_write(u32 reg, u32 val) |
| 383 | { |
| 384 | apic->write(reg, val); |
| 385 | } |
| 386 | |
| 387 | static inline u64 apic_icr_read(void) |
| 388 | { |
| 389 | return apic->icr_read(); |
| 390 | } |
| 391 | |
| 392 | static inline void apic_icr_write(u32 low, u32 high) |
| 393 | { |
| 394 | apic->icr_write(low, high); |
| 395 | } |
| 396 | |
| 397 | static inline void apic_wait_icr_idle(void) |
| 398 | { |
| 399 | apic->wait_icr_idle(); |
| 400 | } |
| 401 | |
| 402 | static inline u32 safe_apic_wait_icr_idle(void) |
| 403 | { |
| 404 | return apic->safe_wait_icr_idle(); |
| 405 | } |
| 406 | |
Cyrill Gorcunov | d674cd1 | 2010-03-17 13:37:00 +0300 | [diff] [blame] | 407 | #else /* CONFIG_X86_LOCAL_APIC */ |
| 408 | |
| 409 | static inline u32 apic_read(u32 reg) { return 0; } |
| 410 | static inline void apic_write(u32 reg, u32 val) { } |
| 411 | static inline u64 apic_icr_read(void) { return 0; } |
| 412 | static inline void apic_icr_write(u32 low, u32 high) { } |
| 413 | static inline void apic_wait_icr_idle(void) { } |
| 414 | static inline u32 safe_apic_wait_icr_idle(void) { return 0; } |
| 415 | |
| 416 | #endif /* CONFIG_X86_LOCAL_APIC */ |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 417 | |
| 418 | static inline void ack_APIC_irq(void) |
| 419 | { |
| 420 | /* |
| 421 | * ack_APIC_irq() actually gets compiled as a single instruction |
| 422 | * ... yummie. |
| 423 | */ |
| 424 | |
| 425 | /* Docs say use 0 for future compatibility */ |
| 426 | apic_write(APIC_EOI, 0); |
| 427 | } |
| 428 | |
| 429 | static inline unsigned default_get_apic_id(unsigned long x) |
| 430 | { |
| 431 | unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR)); |
| 432 | |
Andreas Herrmann | 42937e8 | 2009-06-08 15:55:09 +0200 | [diff] [blame] | 433 | if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID)) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 434 | return (x >> 24) & 0xFF; |
| 435 | else |
| 436 | return (x >> 24) & 0x0F; |
| 437 | } |
| 438 | |
| 439 | /* |
| 440 | * Warm reset vector default position: |
| 441 | */ |
| 442 | #define DEFAULT_TRAMPOLINE_PHYS_LOW 0x467 |
| 443 | #define DEFAULT_TRAMPOLINE_PHYS_HIGH 0x469 |
| 444 | |
Yinghai Lu | 2b6163b | 2009-02-25 20:50:49 -0800 | [diff] [blame] | 445 | #ifdef CONFIG_X86_64 |
Ingo Molnar | be163a1 | 2009-02-17 16:28:46 +0100 | [diff] [blame] | 446 | extern struct apic apic_flat; |
| 447 | extern struct apic apic_physflat; |
| 448 | extern struct apic apic_x2apic_cluster; |
| 449 | extern struct apic apic_x2apic_phys; |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 450 | extern int default_acpi_madt_oem_check(char *, char *); |
| 451 | |
| 452 | extern void apic_send_IPI_self(int vector); |
| 453 | |
Ingo Molnar | be163a1 | 2009-02-17 16:28:46 +0100 | [diff] [blame] | 454 | extern struct apic apic_x2apic_uv_x; |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 455 | DECLARE_PER_CPU(int, x2apic_extra_bits); |
| 456 | |
| 457 | extern int default_cpu_present_to_apicid(int mps_cpu); |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 458 | extern int default_check_phys_apicid_present(int phys_apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 459 | #endif |
| 460 | |
| 461 | static inline void default_wait_for_init_deassert(atomic_t *deassert) |
| 462 | { |
| 463 | while (!atomic_read(deassert)) |
| 464 | cpu_relax(); |
| 465 | return; |
| 466 | } |
| 467 | |
| 468 | extern void generic_bigsmp_probe(void); |
| 469 | |
| 470 | |
| 471 | #ifdef CONFIG_X86_LOCAL_APIC |
| 472 | |
| 473 | #include <asm/smp.h> |
| 474 | |
| 475 | #define APIC_DFR_VALUE (APIC_DFR_FLAT) |
| 476 | |
| 477 | static inline const struct cpumask *default_target_cpus(void) |
| 478 | { |
| 479 | #ifdef CONFIG_SMP |
| 480 | return cpu_online_mask; |
| 481 | #else |
| 482 | return cpumask_of(0); |
| 483 | #endif |
| 484 | } |
| 485 | |
| 486 | DECLARE_EARLY_PER_CPU(u16, x86_bios_cpu_apicid); |
| 487 | |
| 488 | |
| 489 | static inline unsigned int read_apic_id(void) |
| 490 | { |
| 491 | unsigned int reg; |
| 492 | |
| 493 | reg = apic_read(APIC_ID); |
| 494 | |
| 495 | return apic->get_apic_id(reg); |
| 496 | } |
| 497 | |
| 498 | extern void default_setup_apic_routing(void); |
| 499 | |
Cyrill Gorcunov | 9844ab1 | 2009-10-14 00:07:03 +0400 | [diff] [blame] | 500 | extern struct apic apic_noop; |
| 501 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 502 | #ifdef CONFIG_X86_32 |
Jaswinder Singh Rajput | 2c1b284 | 2009-04-11 00:03:10 +0530 | [diff] [blame] | 503 | |
| 504 | extern struct apic apic_default; |
| 505 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 506 | /* |
| 507 | * Set up the logical destination ID. |
| 508 | * |
| 509 | * Intel recommends to set DFR, LDR and TPR before enabling |
| 510 | * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel |
| 511 | * document number 292116). So here it goes... |
| 512 | */ |
| 513 | extern void default_init_apic_ldr(void); |
| 514 | |
| 515 | static inline int default_apic_id_registered(void) |
| 516 | { |
| 517 | return physid_isset(read_apic_id(), phys_cpu_present_map); |
| 518 | } |
| 519 | |
Yinghai Lu | f56e503 | 2009-03-24 14:16:30 -0700 | [diff] [blame] | 520 | static inline int default_phys_pkg_id(int cpuid_apic, int index_msb) |
| 521 | { |
| 522 | return cpuid_apic >> index_msb; |
| 523 | } |
| 524 | |
| 525 | extern int default_apicid_to_node(int logical_apicid); |
| 526 | |
| 527 | #endif |
| 528 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 529 | static inline unsigned int |
| 530 | default_cpu_mask_to_apicid(const struct cpumask *cpumask) |
| 531 | { |
Yinghai Lu | f56e503 | 2009-03-24 14:16:30 -0700 | [diff] [blame] | 532 | return cpumask_bits(cpumask)[0] & APIC_ALL_CPUS; |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 533 | } |
| 534 | |
| 535 | static inline unsigned int |
| 536 | default_cpu_mask_to_apicid_and(const struct cpumask *cpumask, |
| 537 | const struct cpumask *andmask) |
| 538 | { |
| 539 | unsigned long mask1 = cpumask_bits(cpumask)[0]; |
| 540 | unsigned long mask2 = cpumask_bits(andmask)[0]; |
| 541 | unsigned long mask3 = cpumask_bits(cpu_online_mask)[0]; |
| 542 | |
| 543 | return (unsigned int)(mask1 & mask2 & mask3); |
| 544 | } |
| 545 | |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 546 | static inline unsigned long default_check_apicid_used(physid_mask_t *map, int apicid) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 547 | { |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 548 | return physid_isset(apicid, *map); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 549 | } |
| 550 | |
| 551 | static inline unsigned long default_check_apicid_present(int bit) |
| 552 | { |
| 553 | return physid_isset(bit, phys_cpu_present_map); |
| 554 | } |
| 555 | |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 556 | static inline void default_ioapic_phys_id_map(physid_mask_t *phys_map, physid_mask_t *retmap) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 557 | { |
Cyrill Gorcunov | 7abc075 | 2009-11-10 01:06:59 +0300 | [diff] [blame] | 558 | *retmap = *phys_map; |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 559 | } |
| 560 | |
| 561 | /* Mapping from cpu number to logical apicid */ |
| 562 | static inline int default_cpu_to_logical_apicid(int cpu) |
| 563 | { |
| 564 | return 1 << cpu; |
| 565 | } |
| 566 | |
| 567 | static inline int __default_cpu_present_to_apicid(int mps_cpu) |
| 568 | { |
| 569 | if (mps_cpu < nr_cpu_ids && cpu_present(mps_cpu)) |
| 570 | return (int)per_cpu(x86_bios_cpu_apicid, mps_cpu); |
| 571 | else |
| 572 | return BAD_APICID; |
| 573 | } |
| 574 | |
| 575 | static inline int |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 576 | __default_check_phys_apicid_present(int phys_apicid) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 577 | { |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 578 | return physid_isset(phys_apicid, phys_cpu_present_map); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 579 | } |
| 580 | |
| 581 | #ifdef CONFIG_X86_32 |
| 582 | static inline int default_cpu_present_to_apicid(int mps_cpu) |
| 583 | { |
| 584 | return __default_cpu_present_to_apicid(mps_cpu); |
| 585 | } |
| 586 | |
| 587 | static inline int |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 588 | default_check_phys_apicid_present(int phys_apicid) |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 589 | { |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 590 | return __default_check_phys_apicid_present(phys_apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 591 | } |
| 592 | #else |
| 593 | extern int default_cpu_present_to_apicid(int mps_cpu); |
Thomas Gleixner | e11dada | 2009-08-31 15:18:40 +0200 | [diff] [blame] | 594 | extern int default_check_phys_apicid_present(int phys_apicid); |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 595 | #endif |
| 596 | |
Ingo Molnar | e2780a6 | 2009-02-17 13:52:29 +0100 | [diff] [blame] | 597 | #endif /* CONFIG_X86_LOCAL_APIC */ |
| 598 | |
Ingo Molnar | 2f205bc | 2009-02-17 14:45:30 +0100 | [diff] [blame] | 599 | #ifdef CONFIG_X86_32 |
| 600 | extern u8 cpu_2_logical_apicid[NR_CPUS]; |
| 601 | #endif |
| 602 | |
H. Peter Anvin | 1965aae | 2008-10-22 22:26:29 -0700 | [diff] [blame] | 603 | #endif /* _ASM_X86_APIC_H */ |