Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / c4efd6b569b2646e1346a08a4c40286f8bcb5f11 / . / arch / x86 / include / asm / gart.h
blob: 4ac5b0f33fc1017b3760eb01b1a4ed7f7155dbce [file] [log] [blame]
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700[diff] [blame]1#ifndef _ASM_X86_GART_H
2#define _ASM_X86_GART_H
Joerg Roedel395624f2007-10-24 12:49:47 +0200[diff] [blame]3
Pavel Machek0abbc782008-05-20 16:27:17 +0200[diff] [blame]4#include <asm/e820.h>
5
Rafael J. Wysocki6703f6d2008-06-10 00:10:48 +0200[diff] [blame]6extern void set_up_gart_resume(u32, u32);
FUJITA Tomonorie93be882008-07-10 08:27:49 +0900[diff] [blame]7
Joerg Roedel395624f2007-10-24 12:49:47 +0200[diff] [blame]8extern int fallback_aper_order;
9extern int fallback_aper_force;
Joerg Roedel395624f2007-10-24 12:49:47 +0200[diff] [blame]10extern int fix_aperture;
Joerg Roedel395624f2007-10-24 12:49:47 +0200[diff] [blame]11
Pavel Machekaa134f12008-04-08 10:49:03 +0200[diff] [blame]12/* PTE bits. */
13#define GPTE_VALID 1
14#define GPTE_COHERENT 2
15
16/* Aperture control register bits. */
17#define GARTEN (1<<0)
18#define DISGARTCPU (1<<4)
19#define DISGARTIO (1<<5)
20
21/* GART cache control register bits. */
22#define INVGART (1<<0)
23#define GARTPTEERR (1<<1)
24
25/* K8 On-cpu GART registers */
26#define AMD64_GARTAPERTURECTL 0x90
27#define AMD64_GARTAPERTUREBASE 0x94
28#define AMD64_GARTTABLEBASE 0x98
29#define AMD64_GARTCACHECTL 0x9c
30#define AMD64_GARTEN (1<<0)
31
Joerg Roedel1d9b16d2008-11-27 18:39:15 +0100[diff] [blame]32#ifdef CONFIG_GART_IOMMU
33extern int gart_iommu_aperture;
34extern int gart_iommu_aperture_allowed;
35extern int gart_iommu_aperture_disabled;
36
37extern void early_gart_iommu_check(void);
FUJITA Tomonoride957622009-11-10 19:46:14 +0900[diff] [blame]38extern int gart_iommu_init(void);
Joerg Roedel1d9b16d2008-11-27 18:39:15 +0100[diff] [blame]39extern void __init gart_parse_options(char *);
40extern void gart_iommu_hole_init(void);
41
42#else
43#define gart_iommu_aperture 0
44#define gart_iommu_aperture_allowed 0
45#define gart_iommu_aperture_disabled 1
46
47static inline void early_gart_iommu_check(void)
48{
49}
Joerg Roedel1d9b16d2008-11-27 18:39:15 +0100[diff] [blame]50static inline void gart_parse_options(char *options)
51{
52}
53static inline void gart_iommu_hole_init(void)
54{
55}
56#endif
57
Joerg Roedel237a6222008-09-25 12:13:53 +0200[diff] [blame]58extern int agp_amd64_init(void);
59
Pavel Machek3bb6fbf2008-04-15 12:43:57 +0200[diff] [blame]60static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
61{
62 u32 tmp, ctl;
63
64 /* address of the mappings table */
65 addr >>= 12;
66 tmp = (u32) addr<<4;
67 tmp &= ~0xf;
68 pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
69
70 /* Enable GART translation for this hammer. */
71 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
72 ctl |= GARTEN;
73 ctl &= ~(DISGARTCPU | DISGARTIO);
74 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
75}
76
Pavel Machek0abbc782008-05-20 16:27:17 +0200[diff] [blame]77static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
78{
79 if (!aper_base)
80 return 0;
81
82 if (aper_base + aper_size > 0x100000000ULL) {
Adam Jackson9b156842008-09-29 14:52:03 -0400[diff] [blame]83 printk(KERN_INFO "Aperture beyond 4GB. Ignoring.\n");
Pavel Machek0abbc782008-05-20 16:27:17 +0200[diff] [blame]84 return 0;
85 }
86 if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
Adam Jackson9b156842008-09-29 14:52:03 -0400[diff] [blame]87 printk(KERN_INFO "Aperture pointing to e820 RAM. Ignoring.\n");
Pavel Machek0abbc782008-05-20 16:27:17 +0200[diff] [blame]88 return 0;
89 }
90 if (aper_size < min_size) {
Adam Jackson9b156842008-09-29 14:52:03 -0400[diff] [blame]91 printk(KERN_INFO "Aperture too small (%d MB) than (%d MB)\n",
Pavel Machek0abbc782008-05-20 16:27:17 +0200[diff] [blame]92 aper_size>>20, min_size>>20);
93 return 0;
94 }
95
96 return 1;
97}
98
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700[diff] [blame]99#endif /* _ASM_X86_GART_H */