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Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001/*
2 * Atmel MACB Ethernet Controller driver
3 *
4 * Copyright (C) 2004-2006 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/clk.h>
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/slab.h>
17#include <linux/init.h>
18#include <linux/netdevice.h>
19#include <linux/etherdevice.h>
Haavard Skinnemoen89e57852006-11-09 14:51:17 +010020#include <linux/dma-mapping.h>
Haavard Skinnemoen89e57852006-11-09 14:51:17 +010021#include <linux/platform_device.h>
frederic RODO6c36a702007-07-12 19:07:24 +020022#include <linux/phy.h>
Haavard Skinnemoen89e57852006-11-09 14:51:17 +010023
24#include <asm/arch/board.h>
frederic RODO6c36a702007-07-12 19:07:24 +020025#include <asm/arch/cpu.h>
Haavard Skinnemoen89e57852006-11-09 14:51:17 +010026
27#include "macb.h"
28
Haavard Skinnemoen89e57852006-11-09 14:51:17 +010029#define RX_BUFFER_SIZE 128
30#define RX_RING_SIZE 512
31#define RX_RING_BYTES (sizeof(struct dma_desc) * RX_RING_SIZE)
32
33/* Make the IP header word-aligned (the ethernet header is 14 bytes) */
34#define RX_OFFSET 2
35
36#define TX_RING_SIZE 128
37#define DEF_TX_RING_PENDING (TX_RING_SIZE - 1)
38#define TX_RING_BYTES (sizeof(struct dma_desc) * TX_RING_SIZE)
39
40#define TX_RING_GAP(bp) \
41 (TX_RING_SIZE - (bp)->tx_pending)
42#define TX_BUFFS_AVAIL(bp) \
43 (((bp)->tx_tail <= (bp)->tx_head) ? \
44 (bp)->tx_tail + (bp)->tx_pending - (bp)->tx_head : \
45 (bp)->tx_tail - (bp)->tx_head - TX_RING_GAP(bp))
46#define NEXT_TX(n) (((n) + 1) & (TX_RING_SIZE - 1))
47
48#define NEXT_RX(n) (((n) + 1) & (RX_RING_SIZE - 1))
49
50/* minimum number of free TX descriptors before waking up TX process */
51#define MACB_TX_WAKEUP_THRESH (TX_RING_SIZE / 4)
52
53#define MACB_RX_INT_FLAGS (MACB_BIT(RCOMP) | MACB_BIT(RXUBR) \
54 | MACB_BIT(ISR_ROVR))
55
56static void __macb_set_hwaddr(struct macb *bp)
57{
58 u32 bottom;
59 u16 top;
60
61 bottom = cpu_to_le32(*((u32 *)bp->dev->dev_addr));
62 macb_writel(bp, SA1B, bottom);
63 top = cpu_to_le16(*((u16 *)(bp->dev->dev_addr + 4)));
64 macb_writel(bp, SA1T, top);
65}
66
67static void __init macb_get_hwaddr(struct macb *bp)
68{
69 u32 bottom;
70 u16 top;
71 u8 addr[6];
72
73 bottom = macb_readl(bp, SA1B);
74 top = macb_readl(bp, SA1T);
75
76 addr[0] = bottom & 0xff;
77 addr[1] = (bottom >> 8) & 0xff;
78 addr[2] = (bottom >> 16) & 0xff;
79 addr[3] = (bottom >> 24) & 0xff;
80 addr[4] = top & 0xff;
81 addr[5] = (top >> 8) & 0xff;
82
83 if (is_valid_ether_addr(addr))
84 memcpy(bp->dev->dev_addr, addr, sizeof(addr));
85}
86
frederic RODO6c36a702007-07-12 19:07:24 +020087static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
Haavard Skinnemoen89e57852006-11-09 14:51:17 +010088{
frederic RODO6c36a702007-07-12 19:07:24 +020089 struct macb *bp = bus->priv;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +010090 int value;
91
Haavard Skinnemoen89e57852006-11-09 14:51:17 +010092 macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
93 | MACB_BF(RW, MACB_MAN_READ)
frederic RODO6c36a702007-07-12 19:07:24 +020094 | MACB_BF(PHYA, mii_id)
95 | MACB_BF(REGA, regnum)
Haavard Skinnemoen89e57852006-11-09 14:51:17 +010096 | MACB_BF(CODE, MACB_MAN_CODE)));
97
frederic RODO6c36a702007-07-12 19:07:24 +020098 /* wait for end of transfer */
99 while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
100 cpu_relax();
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100101
102 value = MACB_BFEXT(DATA, macb_readl(bp, MAN));
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100103
104 return value;
105}
106
frederic RODO6c36a702007-07-12 19:07:24 +0200107static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
108 u16 value)
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100109{
frederic RODO6c36a702007-07-12 19:07:24 +0200110 struct macb *bp = bus->priv;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100111
112 macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
113 | MACB_BF(RW, MACB_MAN_WRITE)
frederic RODO6c36a702007-07-12 19:07:24 +0200114 | MACB_BF(PHYA, mii_id)
115 | MACB_BF(REGA, regnum)
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100116 | MACB_BF(CODE, MACB_MAN_CODE)
frederic RODO6c36a702007-07-12 19:07:24 +0200117 | MACB_BF(DATA, value)));
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100118
frederic RODO6c36a702007-07-12 19:07:24 +0200119 /* wait for end of transfer */
120 while (!MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
121 cpu_relax();
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100122
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100123 return 0;
124}
125
frederic RODO6c36a702007-07-12 19:07:24 +0200126static int macb_mdio_reset(struct mii_bus *bus)
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100127{
frederic RODO6c36a702007-07-12 19:07:24 +0200128 return 0;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100129}
130
frederic RODO6c36a702007-07-12 19:07:24 +0200131static void macb_handle_link_change(struct net_device *dev)
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100132{
frederic RODO6c36a702007-07-12 19:07:24 +0200133 struct macb *bp = netdev_priv(dev);
134 struct phy_device *phydev = bp->phy_dev;
135 unsigned long flags;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100136
frederic RODO6c36a702007-07-12 19:07:24 +0200137 int status_change = 0;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100138
frederic RODO6c36a702007-07-12 19:07:24 +0200139 spin_lock_irqsave(&bp->lock, flags);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100140
frederic RODO6c36a702007-07-12 19:07:24 +0200141 if (phydev->link) {
142 if ((bp->speed != phydev->speed) ||
143 (bp->duplex != phydev->duplex)) {
144 u32 reg;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100145
frederic RODO6c36a702007-07-12 19:07:24 +0200146 reg = macb_readl(bp, NCFGR);
147 reg &= ~(MACB_BIT(SPD) | MACB_BIT(FD));
148
149 if (phydev->duplex)
150 reg |= MACB_BIT(FD);
151 if (phydev->speed)
152 reg |= MACB_BIT(SPD);
153
154 macb_writel(bp, NCFGR, reg);
155
156 bp->speed = phydev->speed;
157 bp->duplex = phydev->duplex;
158 status_change = 1;
159 }
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100160 }
161
frederic RODO6c36a702007-07-12 19:07:24 +0200162 if (phydev->link != bp->link) {
163 if (phydev->link)
164 netif_schedule(dev);
165 else {
166 bp->speed = 0;
167 bp->duplex = -1;
168 }
169 bp->link = phydev->link;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100170
frederic RODO6c36a702007-07-12 19:07:24 +0200171 status_change = 1;
172 }
173
174 spin_unlock_irqrestore(&bp->lock, flags);
175
176 if (status_change) {
177 if (phydev->link)
178 printk(KERN_INFO "%s: link up (%d/%s)\n",
179 dev->name, phydev->speed,
180 DUPLEX_FULL == phydev->duplex ? "Full":"Half");
181 else
182 printk(KERN_INFO "%s: link down\n", dev->name);
183 }
184}
185
186/* based on au1000_eth. c*/
187static int macb_mii_probe(struct net_device *dev)
188{
189 struct macb *bp = netdev_priv(dev);
190 struct phy_device *phydev = NULL;
191 struct eth_platform_data *pdata;
192 int phy_addr;
193
194 /* find the first phy */
195 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
196 if (bp->mii_bus.phy_map[phy_addr]) {
197 phydev = bp->mii_bus.phy_map[phy_addr];
198 break;
199 }
200 }
201
202 if (!phydev) {
203 printk (KERN_ERR "%s: no PHY found\n", dev->name);
204 return -1;
205 }
206
207 pdata = bp->pdev->dev.platform_data;
208 /* TODO : add pin_irq */
209
210 /* attach the mac to the phy */
211 if (pdata && pdata->is_rmii) {
212 phydev = phy_connect(dev, phydev->dev.bus_id,
213 &macb_handle_link_change, 0, PHY_INTERFACE_MODE_RMII);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100214 } else {
frederic RODO6c36a702007-07-12 19:07:24 +0200215 phydev = phy_connect(dev, phydev->dev.bus_id,
216 &macb_handle_link_change, 0, PHY_INTERFACE_MODE_MII);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100217 }
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100218
frederic RODO6c36a702007-07-12 19:07:24 +0200219 if (IS_ERR(phydev)) {
220 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
221 return PTR_ERR(phydev);
222 }
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100223
frederic RODO6c36a702007-07-12 19:07:24 +0200224 /* mask with MAC supported features */
225 phydev->supported &= PHY_BASIC_FEATURES;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100226
frederic RODO6c36a702007-07-12 19:07:24 +0200227 phydev->advertising = phydev->supported;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100228
frederic RODO6c36a702007-07-12 19:07:24 +0200229 bp->link = 0;
230 bp->speed = 0;
231 bp->duplex = -1;
232 bp->phy_dev = phydev;
233
234 return 0;
235}
236
237static int macb_mii_init(struct macb *bp)
238{
239 struct eth_platform_data *pdata;
240 int err = -ENXIO, i;
241
242 /* Enable managment port */
243 macb_writel(bp, NCR, MACB_BIT(MPE));
244
245 bp->mii_bus.name = "MACB_mii_bus",
246 bp->mii_bus.read = &macb_mdio_read,
247 bp->mii_bus.write = &macb_mdio_write,
248 bp->mii_bus.reset = &macb_mdio_reset,
249 bp->mii_bus.id = bp->pdev->id,
250 bp->mii_bus.priv = bp,
251 bp->mii_bus.dev = &bp->dev->dev;
252 pdata = bp->pdev->dev.platform_data;
253
254 if (pdata)
255 bp->mii_bus.phy_mask = pdata->phy_mask;
256
257 bp->mii_bus.irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
258 if (!bp->mii_bus.irq) {
259 err = -ENOMEM;
260 goto err_out;
261 }
262
263 for (i = 0; i < PHY_MAX_ADDR; i++)
264 bp->mii_bus.irq[i] = PHY_POLL;
265
266 platform_set_drvdata(bp->dev, &bp->mii_bus);
267
268 if (mdiobus_register(&bp->mii_bus))
269 goto err_out_free_mdio_irq;
270
271 if (macb_mii_probe(bp->dev) != 0) {
272 goto err_out_unregister_bus;
273 }
274
275 return 0;
276
277err_out_unregister_bus:
278 mdiobus_unregister(&bp->mii_bus);
279err_out_free_mdio_irq:
280 kfree(bp->mii_bus.irq);
281err_out:
282 return err;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100283}
284
285static void macb_update_stats(struct macb *bp)
286{
287 u32 __iomem *reg = bp->regs + MACB_PFR;
288 u32 *p = &bp->hw_stats.rx_pause_frames;
289 u32 *end = &bp->hw_stats.tx_pause_frames + 1;
290
291 WARN_ON((unsigned long)(end - p - 1) != (MACB_TPF - MACB_PFR) / 4);
292
293 for(; p < end; p++, reg++)
Haavard Skinnemoen0f0d84e2006-12-08 14:38:30 +0100294 *p += __raw_readl(reg);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100295}
296
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100297static void macb_tx(struct macb *bp)
298{
299 unsigned int tail;
300 unsigned int head;
301 u32 status;
302
303 status = macb_readl(bp, TSR);
304 macb_writel(bp, TSR, status);
305
306 dev_dbg(&bp->pdev->dev, "macb_tx status = %02lx\n",
307 (unsigned long)status);
308
309 if (status & MACB_BIT(UND)) {
310 printk(KERN_ERR "%s: TX underrun, resetting buffers\n",
311 bp->dev->name);
312 bp->tx_head = bp->tx_tail = 0;
313 }
314
315 if (!(status & MACB_BIT(COMP)))
316 /*
317 * This may happen when a buffer becomes complete
318 * between reading the ISR and scanning the
319 * descriptors. Nothing to worry about.
320 */
321 return;
322
323 head = bp->tx_head;
324 for (tail = bp->tx_tail; tail != head; tail = NEXT_TX(tail)) {
325 struct ring_info *rp = &bp->tx_skb[tail];
326 struct sk_buff *skb = rp->skb;
327 u32 bufstat;
328
329 BUG_ON(skb == NULL);
330
331 rmb();
332 bufstat = bp->tx_ring[tail].ctrl;
333
334 if (!(bufstat & MACB_BIT(TX_USED)))
335 break;
336
337 dev_dbg(&bp->pdev->dev, "skb %u (data %p) TX complete\n",
338 tail, skb->data);
339 dma_unmap_single(&bp->pdev->dev, rp->mapping, skb->len,
340 DMA_TO_DEVICE);
341 bp->stats.tx_packets++;
342 bp->stats.tx_bytes += skb->len;
343 rp->skb = NULL;
344 dev_kfree_skb_irq(skb);
345 }
346
347 bp->tx_tail = tail;
348 if (netif_queue_stopped(bp->dev) &&
349 TX_BUFFS_AVAIL(bp) > MACB_TX_WAKEUP_THRESH)
350 netif_wake_queue(bp->dev);
351}
352
353static int macb_rx_frame(struct macb *bp, unsigned int first_frag,
354 unsigned int last_frag)
355{
356 unsigned int len;
357 unsigned int frag;
358 unsigned int offset = 0;
359 struct sk_buff *skb;
360
361 len = MACB_BFEXT(RX_FRMLEN, bp->rx_ring[last_frag].ctrl);
362
363 dev_dbg(&bp->pdev->dev, "macb_rx_frame frags %u - %u (len %u)\n",
364 first_frag, last_frag, len);
365
366 skb = dev_alloc_skb(len + RX_OFFSET);
367 if (!skb) {
368 bp->stats.rx_dropped++;
369 for (frag = first_frag; ; frag = NEXT_RX(frag)) {
370 bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
371 if (frag == last_frag)
372 break;
373 }
374 wmb();
375 return 1;
376 }
377
378 skb_reserve(skb, RX_OFFSET);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100379 skb->ip_summed = CHECKSUM_NONE;
380 skb_put(skb, len);
381
382 for (frag = first_frag; ; frag = NEXT_RX(frag)) {
383 unsigned int frag_len = RX_BUFFER_SIZE;
384
385 if (offset + frag_len > len) {
386 BUG_ON(frag != last_frag);
387 frag_len = len - offset;
388 }
Arnaldo Carvalho de Melo27d7ff42007-03-31 11:55:19 -0300389 skb_copy_to_linear_data_offset(skb, offset,
390 (bp->rx_buffers +
391 (RX_BUFFER_SIZE * frag)),
392 frag_len);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100393 offset += RX_BUFFER_SIZE;
394 bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
395 wmb();
396
397 if (frag == last_frag)
398 break;
399 }
400
401 skb->protocol = eth_type_trans(skb, bp->dev);
402
403 bp->stats.rx_packets++;
404 bp->stats.rx_bytes += len;
405 bp->dev->last_rx = jiffies;
406 dev_dbg(&bp->pdev->dev, "received skb of length %u, csum: %08x\n",
407 skb->len, skb->csum);
408 netif_receive_skb(skb);
409
410 return 0;
411}
412
413/* Mark DMA descriptors from begin up to and not including end as unused */
414static void discard_partial_frame(struct macb *bp, unsigned int begin,
415 unsigned int end)
416{
417 unsigned int frag;
418
419 for (frag = begin; frag != end; frag = NEXT_RX(frag))
420 bp->rx_ring[frag].addr &= ~MACB_BIT(RX_USED);
421 wmb();
422
423 /*
424 * When this happens, the hardware stats registers for
425 * whatever caused this is updated, so we don't have to record
426 * anything.
427 */
428}
429
430static int macb_rx(struct macb *bp, int budget)
431{
432 int received = 0;
433 unsigned int tail = bp->rx_tail;
434 int first_frag = -1;
435
436 for (; budget > 0; tail = NEXT_RX(tail)) {
437 u32 addr, ctrl;
438
439 rmb();
440 addr = bp->rx_ring[tail].addr;
441 ctrl = bp->rx_ring[tail].ctrl;
442
443 if (!(addr & MACB_BIT(RX_USED)))
444 break;
445
446 if (ctrl & MACB_BIT(RX_SOF)) {
447 if (first_frag != -1)
448 discard_partial_frame(bp, first_frag, tail);
449 first_frag = tail;
450 }
451
452 if (ctrl & MACB_BIT(RX_EOF)) {
453 int dropped;
454 BUG_ON(first_frag == -1);
455
456 dropped = macb_rx_frame(bp, first_frag, tail);
457 first_frag = -1;
458 if (!dropped) {
459 received++;
460 budget--;
461 }
462 }
463 }
464
465 if (first_frag != -1)
466 bp->rx_tail = first_frag;
467 else
468 bp->rx_tail = tail;
469
470 return received;
471}
472
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700473static int macb_poll(struct napi_struct *napi, int budget)
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100474{
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700475 struct macb *bp = container_of(napi, struct macb, napi);
476 struct net_device *dev = bp->dev;
477 int work_done;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100478 u32 status;
479
480 status = macb_readl(bp, RSR);
481 macb_writel(bp, RSR, status);
482
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700483 work_done = 0;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100484 if (!status) {
485 /*
486 * This may happen if an interrupt was pending before
487 * this function was called last time, and no packets
488 * have been received since.
489 */
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700490 netif_rx_complete(dev, napi);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100491 goto out;
492 }
493
494 dev_dbg(&bp->pdev->dev, "poll: status = %08lx, budget = %d\n",
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700495 (unsigned long)status, budget);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100496
497 if (!(status & MACB_BIT(REC))) {
498 dev_warn(&bp->pdev->dev,
499 "No RX buffers complete, status = %02lx\n",
500 (unsigned long)status);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700501 netif_rx_complete(dev, napi);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100502 goto out;
503 }
504
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700505 work_done = macb_rx(bp, budget);
506 if (work_done < budget)
507 netif_rx_complete(dev, napi);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100508
509 /*
510 * We've done what we can to clean the buffers. Make sure we
511 * get notified when new packets arrive.
512 */
513out:
514 macb_writel(bp, IER, MACB_RX_INT_FLAGS);
515
516 /* TODO: Handle errors */
517
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700518 return work_done;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100519}
520
521static irqreturn_t macb_interrupt(int irq, void *dev_id)
522{
523 struct net_device *dev = dev_id;
524 struct macb *bp = netdev_priv(dev);
525 u32 status;
526
527 status = macb_readl(bp, ISR);
528
529 if (unlikely(!status))
530 return IRQ_NONE;
531
532 spin_lock(&bp->lock);
533
534 while (status) {
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100535 /* close possible race with dev_close */
536 if (unlikely(!netif_running(dev))) {
537 macb_writel(bp, IDR, ~0UL);
538 break;
539 }
540
541 if (status & MACB_RX_INT_FLAGS) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700542 if (netif_rx_schedule_prep(dev, &bp->napi)) {
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100543 /*
544 * There's no point taking any more interrupts
545 * until we have processed the buffers
546 */
547 macb_writel(bp, IDR, MACB_RX_INT_FLAGS);
frederic RODO6c36a702007-07-12 19:07:24 +0200548 dev_dbg(&bp->pdev->dev,
549 "scheduling RX softirq\n");
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700550 __netif_rx_schedule(dev, &bp->napi);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100551 }
552 }
553
554 if (status & (MACB_BIT(TCOMP) | MACB_BIT(ISR_TUND)))
555 macb_tx(bp);
556
557 /*
558 * Link change detection isn't possible with RMII, so we'll
559 * add that if/when we get our hands on a full-blown MII PHY.
560 */
561
562 if (status & MACB_BIT(HRESP)) {
563 /*
564 * TODO: Reset the hardware, and maybe move the printk
565 * to a lower-priority context as well (work queue?)
566 */
567 printk(KERN_ERR "%s: DMA bus error: HRESP not OK\n",
568 dev->name);
569 }
570
571 status = macb_readl(bp, ISR);
572 }
573
574 spin_unlock(&bp->lock);
575
576 return IRQ_HANDLED;
577}
578
579static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
580{
581 struct macb *bp = netdev_priv(dev);
582 dma_addr_t mapping;
583 unsigned int len, entry;
584 u32 ctrl;
585
586#ifdef DEBUG
587 int i;
588 dev_dbg(&bp->pdev->dev,
589 "start_xmit: len %u head %p data %p tail %p end %p\n",
Arnaldo Carvalho de Melo27a884d2007-04-19 20:29:13 -0700590 skb->len, skb->head, skb->data,
Arnaldo Carvalho de Melo4305b542007-04-19 20:43:29 -0700591 skb_tail_pointer(skb), skb_end_pointer(skb));
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100592 dev_dbg(&bp->pdev->dev,
593 "data:");
594 for (i = 0; i < 16; i++)
595 printk(" %02x", (unsigned int)skb->data[i]);
596 printk("\n");
597#endif
598
599 len = skb->len;
600 spin_lock_irq(&bp->lock);
601
602 /* This is a hard error, log it. */
603 if (TX_BUFFS_AVAIL(bp) < 1) {
604 netif_stop_queue(dev);
605 spin_unlock_irq(&bp->lock);
606 dev_err(&bp->pdev->dev,
607 "BUG! Tx Ring full when queue awake!\n");
608 dev_dbg(&bp->pdev->dev, "tx_head = %u, tx_tail = %u\n",
609 bp->tx_head, bp->tx_tail);
610 return 1;
611 }
612
613 entry = bp->tx_head;
614 dev_dbg(&bp->pdev->dev, "Allocated ring entry %u\n", entry);
615 mapping = dma_map_single(&bp->pdev->dev, skb->data,
616 len, DMA_TO_DEVICE);
617 bp->tx_skb[entry].skb = skb;
618 bp->tx_skb[entry].mapping = mapping;
619 dev_dbg(&bp->pdev->dev, "Mapped skb data %p to DMA addr %08lx\n",
620 skb->data, (unsigned long)mapping);
621
622 ctrl = MACB_BF(TX_FRMLEN, len);
623 ctrl |= MACB_BIT(TX_LAST);
624 if (entry == (TX_RING_SIZE - 1))
625 ctrl |= MACB_BIT(TX_WRAP);
626
627 bp->tx_ring[entry].addr = mapping;
628 bp->tx_ring[entry].ctrl = ctrl;
629 wmb();
630
631 entry = NEXT_TX(entry);
632 bp->tx_head = entry;
633
634 macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
635
636 if (TX_BUFFS_AVAIL(bp) < 1)
637 netif_stop_queue(dev);
638
639 spin_unlock_irq(&bp->lock);
640
641 dev->trans_start = jiffies;
642
643 return 0;
644}
645
646static void macb_free_consistent(struct macb *bp)
647{
648 if (bp->tx_skb) {
649 kfree(bp->tx_skb);
650 bp->tx_skb = NULL;
651 }
652 if (bp->rx_ring) {
653 dma_free_coherent(&bp->pdev->dev, RX_RING_BYTES,
654 bp->rx_ring, bp->rx_ring_dma);
655 bp->rx_ring = NULL;
656 }
657 if (bp->tx_ring) {
658 dma_free_coherent(&bp->pdev->dev, TX_RING_BYTES,
659 bp->tx_ring, bp->tx_ring_dma);
660 bp->tx_ring = NULL;
661 }
662 if (bp->rx_buffers) {
663 dma_free_coherent(&bp->pdev->dev,
664 RX_RING_SIZE * RX_BUFFER_SIZE,
665 bp->rx_buffers, bp->rx_buffers_dma);
666 bp->rx_buffers = NULL;
667 }
668}
669
670static int macb_alloc_consistent(struct macb *bp)
671{
672 int size;
673
674 size = TX_RING_SIZE * sizeof(struct ring_info);
675 bp->tx_skb = kmalloc(size, GFP_KERNEL);
676 if (!bp->tx_skb)
677 goto out_err;
678
679 size = RX_RING_BYTES;
680 bp->rx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
681 &bp->rx_ring_dma, GFP_KERNEL);
682 if (!bp->rx_ring)
683 goto out_err;
684 dev_dbg(&bp->pdev->dev,
685 "Allocated RX ring of %d bytes at %08lx (mapped %p)\n",
686 size, (unsigned long)bp->rx_ring_dma, bp->rx_ring);
687
688 size = TX_RING_BYTES;
689 bp->tx_ring = dma_alloc_coherent(&bp->pdev->dev, size,
690 &bp->tx_ring_dma, GFP_KERNEL);
691 if (!bp->tx_ring)
692 goto out_err;
693 dev_dbg(&bp->pdev->dev,
694 "Allocated TX ring of %d bytes at %08lx (mapped %p)\n",
695 size, (unsigned long)bp->tx_ring_dma, bp->tx_ring);
696
697 size = RX_RING_SIZE * RX_BUFFER_SIZE;
698 bp->rx_buffers = dma_alloc_coherent(&bp->pdev->dev, size,
699 &bp->rx_buffers_dma, GFP_KERNEL);
700 if (!bp->rx_buffers)
701 goto out_err;
702 dev_dbg(&bp->pdev->dev,
703 "Allocated RX buffers of %d bytes at %08lx (mapped %p)\n",
704 size, (unsigned long)bp->rx_buffers_dma, bp->rx_buffers);
705
706 return 0;
707
708out_err:
709 macb_free_consistent(bp);
710 return -ENOMEM;
711}
712
713static void macb_init_rings(struct macb *bp)
714{
715 int i;
716 dma_addr_t addr;
717
718 addr = bp->rx_buffers_dma;
719 for (i = 0; i < RX_RING_SIZE; i++) {
720 bp->rx_ring[i].addr = addr;
721 bp->rx_ring[i].ctrl = 0;
722 addr += RX_BUFFER_SIZE;
723 }
724 bp->rx_ring[RX_RING_SIZE - 1].addr |= MACB_BIT(RX_WRAP);
725
726 for (i = 0; i < TX_RING_SIZE; i++) {
727 bp->tx_ring[i].addr = 0;
728 bp->tx_ring[i].ctrl = MACB_BIT(TX_USED);
729 }
730 bp->tx_ring[TX_RING_SIZE - 1].ctrl |= MACB_BIT(TX_WRAP);
731
732 bp->rx_tail = bp->tx_head = bp->tx_tail = 0;
733}
734
735static void macb_reset_hw(struct macb *bp)
736{
737 /* Make sure we have the write buffer for ourselves */
738 wmb();
739
740 /*
741 * Disable RX and TX (XXX: Should we halt the transmission
742 * more gracefully?)
743 */
744 macb_writel(bp, NCR, 0);
745
746 /* Clear the stats registers (XXX: Update stats first?) */
747 macb_writel(bp, NCR, MACB_BIT(CLRSTAT));
748
749 /* Clear all status flags */
750 macb_writel(bp, TSR, ~0UL);
751 macb_writel(bp, RSR, ~0UL);
752
753 /* Disable all interrupts */
754 macb_writel(bp, IDR, ~0UL);
755 macb_readl(bp, ISR);
756}
757
758static void macb_init_hw(struct macb *bp)
759{
760 u32 config;
761
762 macb_reset_hw(bp);
763 __macb_set_hwaddr(bp);
764
765 config = macb_readl(bp, NCFGR) & MACB_BF(CLK, -1L);
766 config |= MACB_BIT(PAE); /* PAuse Enable */
767 config |= MACB_BIT(DRFCS); /* Discard Rx FCS */
768 if (bp->dev->flags & IFF_PROMISC)
769 config |= MACB_BIT(CAF); /* Copy All Frames */
770 if (!(bp->dev->flags & IFF_BROADCAST))
771 config |= MACB_BIT(NBC); /* No BroadCast */
772 macb_writel(bp, NCFGR, config);
773
774 /* Initialize TX and RX buffers */
775 macb_writel(bp, RBQP, bp->rx_ring_dma);
776 macb_writel(bp, TBQP, bp->tx_ring_dma);
777
778 /* Enable TX and RX */
frederic RODO6c36a702007-07-12 19:07:24 +0200779 macb_writel(bp, NCR, MACB_BIT(RE) | MACB_BIT(TE) | MACB_BIT(MPE));
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100780
781 /* Enable interrupts */
782 macb_writel(bp, IER, (MACB_BIT(RCOMP)
783 | MACB_BIT(RXUBR)
784 | MACB_BIT(ISR_TUND)
785 | MACB_BIT(ISR_RLE)
786 | MACB_BIT(TXERR)
787 | MACB_BIT(TCOMP)
788 | MACB_BIT(ISR_ROVR)
789 | MACB_BIT(HRESP)));
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100790
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100791}
792
Patrice Vilchez446ebd02007-07-12 19:07:25 +0200793/*
794 * The hash address register is 64 bits long and takes up two
795 * locations in the memory map. The least significant bits are stored
796 * in EMAC_HSL and the most significant bits in EMAC_HSH.
797 *
798 * The unicast hash enable and the multicast hash enable bits in the
799 * network configuration register enable the reception of hash matched
800 * frames. The destination address is reduced to a 6 bit index into
801 * the 64 bit hash register using the following hash function. The
802 * hash function is an exclusive or of every sixth bit of the
803 * destination address.
804 *
805 * hi[5] = da[5] ^ da[11] ^ da[17] ^ da[23] ^ da[29] ^ da[35] ^ da[41] ^ da[47]
806 * hi[4] = da[4] ^ da[10] ^ da[16] ^ da[22] ^ da[28] ^ da[34] ^ da[40] ^ da[46]
807 * hi[3] = da[3] ^ da[09] ^ da[15] ^ da[21] ^ da[27] ^ da[33] ^ da[39] ^ da[45]
808 * hi[2] = da[2] ^ da[08] ^ da[14] ^ da[20] ^ da[26] ^ da[32] ^ da[38] ^ da[44]
809 * hi[1] = da[1] ^ da[07] ^ da[13] ^ da[19] ^ da[25] ^ da[31] ^ da[37] ^ da[43]
810 * hi[0] = da[0] ^ da[06] ^ da[12] ^ da[18] ^ da[24] ^ da[30] ^ da[36] ^ da[42]
811 *
812 * da[0] represents the least significant bit of the first byte
813 * received, that is, the multicast/unicast indicator, and da[47]
814 * represents the most significant bit of the last byte received. If
815 * the hash index, hi[n], points to a bit that is set in the hash
816 * register then the frame will be matched according to whether the
817 * frame is multicast or unicast. A multicast match will be signalled
818 * if the multicast hash enable bit is set, da[0] is 1 and the hash
819 * index points to a bit set in the hash register. A unicast match
820 * will be signalled if the unicast hash enable bit is set, da[0] is 0
821 * and the hash index points to a bit set in the hash register. To
822 * receive all multicast frames, the hash register should be set with
823 * all ones and the multicast hash enable bit should be set in the
824 * network configuration register.
825 */
826
827static inline int hash_bit_value(int bitnr, __u8 *addr)
828{
829 if (addr[bitnr / 8] & (1 << (bitnr % 8)))
830 return 1;
831 return 0;
832}
833
834/*
835 * Return the hash index value for the specified address.
836 */
837static int hash_get_index(__u8 *addr)
838{
839 int i, j, bitval;
840 int hash_index = 0;
841
842 for (j = 0; j < 6; j++) {
843 for (i = 0, bitval = 0; i < 8; i++)
844 bitval ^= hash_bit_value(i*6 + j, addr);
845
846 hash_index |= (bitval << j);
847 }
848
849 return hash_index;
850}
851
852/*
853 * Add multicast addresses to the internal multicast-hash table.
854 */
855static void macb_sethashtable(struct net_device *dev)
856{
857 struct dev_mc_list *curr;
858 unsigned long mc_filter[2];
859 unsigned int i, bitnr;
860 struct macb *bp = netdev_priv(dev);
861
862 mc_filter[0] = mc_filter[1] = 0;
863
864 curr = dev->mc_list;
865 for (i = 0; i < dev->mc_count; i++, curr = curr->next) {
866 if (!curr) break; /* unexpected end of list */
867
868 bitnr = hash_get_index(curr->dmi_addr);
869 mc_filter[bitnr >> 5] |= 1 << (bitnr & 31);
870 }
871
872 macb_writel(bp, HRB, mc_filter[0]);
873 macb_writel(bp, HRT, mc_filter[1]);
874}
875
876/*
877 * Enable/Disable promiscuous and multicast modes.
878 */
879static void macb_set_rx_mode(struct net_device *dev)
880{
881 unsigned long cfg;
882 struct macb *bp = netdev_priv(dev);
883
884 cfg = macb_readl(bp, NCFGR);
885
886 if (dev->flags & IFF_PROMISC)
887 /* Enable promiscuous mode */
888 cfg |= MACB_BIT(CAF);
889 else if (dev->flags & (~IFF_PROMISC))
890 /* Disable promiscuous mode */
891 cfg &= ~MACB_BIT(CAF);
892
893 if (dev->flags & IFF_ALLMULTI) {
894 /* Enable all multicast mode */
895 macb_writel(bp, HRB, -1);
896 macb_writel(bp, HRT, -1);
897 cfg |= MACB_BIT(NCFGR_MTI);
898 } else if (dev->mc_count > 0) {
899 /* Enable specific multicasts */
900 macb_sethashtable(dev);
901 cfg |= MACB_BIT(NCFGR_MTI);
902 } else if (dev->flags & (~IFF_ALLMULTI)) {
903 /* Disable all multicast mode */
904 macb_writel(bp, HRB, 0);
905 macb_writel(bp, HRT, 0);
906 cfg &= ~MACB_BIT(NCFGR_MTI);
907 }
908
909 macb_writel(bp, NCFGR, cfg);
910}
911
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100912static int macb_open(struct net_device *dev)
913{
914 struct macb *bp = netdev_priv(dev);
915 int err;
916
917 dev_dbg(&bp->pdev->dev, "open\n");
918
frederic RODO6c36a702007-07-12 19:07:24 +0200919 /* if the phy is not yet register, retry later*/
920 if (!bp->phy_dev)
921 return -EAGAIN;
922
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100923 if (!is_valid_ether_addr(dev->dev_addr))
924 return -EADDRNOTAVAIL;
925
926 err = macb_alloc_consistent(bp);
927 if (err) {
928 printk(KERN_ERR
929 "%s: Unable to allocate DMA memory (error %d)\n",
930 dev->name, err);
931 return err;
932 }
933
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700934 napi_enable(&bp->napi);
935
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100936 macb_init_rings(bp);
937 macb_init_hw(bp);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100938
frederic RODO6c36a702007-07-12 19:07:24 +0200939 /* schedule a link state check */
940 phy_start(bp->phy_dev);
941
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100942 netif_start_queue(dev);
943
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100944 return 0;
945}
946
947static int macb_close(struct net_device *dev)
948{
949 struct macb *bp = netdev_priv(dev);
950 unsigned long flags;
951
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100952 netif_stop_queue(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700953 napi_disable(&bp->napi);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100954
frederic RODO6c36a702007-07-12 19:07:24 +0200955 if (bp->phy_dev)
956 phy_stop(bp->phy_dev);
957
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100958 spin_lock_irqsave(&bp->lock, flags);
959 macb_reset_hw(bp);
960 netif_carrier_off(dev);
961 spin_unlock_irqrestore(&bp->lock, flags);
962
963 macb_free_consistent(bp);
964
965 return 0;
966}
967
968static struct net_device_stats *macb_get_stats(struct net_device *dev)
969{
970 struct macb *bp = netdev_priv(dev);
971 struct net_device_stats *nstat = &bp->stats;
972 struct macb_stats *hwstat = &bp->hw_stats;
973
frederic RODO6c36a702007-07-12 19:07:24 +0200974 /* read stats from hardware */
975 macb_update_stats(bp);
976
Haavard Skinnemoen89e57852006-11-09 14:51:17 +0100977 /* Convert HW stats into netdevice stats */
978 nstat->rx_errors = (hwstat->rx_fcs_errors +
979 hwstat->rx_align_errors +
980 hwstat->rx_resource_errors +
981 hwstat->rx_overruns +
982 hwstat->rx_oversize_pkts +
983 hwstat->rx_jabbers +
984 hwstat->rx_undersize_pkts +
985 hwstat->sqe_test_errors +
986 hwstat->rx_length_mismatch);
987 nstat->tx_errors = (hwstat->tx_late_cols +
988 hwstat->tx_excessive_cols +
989 hwstat->tx_underruns +
990 hwstat->tx_carrier_errors);
991 nstat->collisions = (hwstat->tx_single_cols +
992 hwstat->tx_multiple_cols +
993 hwstat->tx_excessive_cols);
994 nstat->rx_length_errors = (hwstat->rx_oversize_pkts +
995 hwstat->rx_jabbers +
996 hwstat->rx_undersize_pkts +
997 hwstat->rx_length_mismatch);
998 nstat->rx_over_errors = hwstat->rx_resource_errors;
999 nstat->rx_crc_errors = hwstat->rx_fcs_errors;
1000 nstat->rx_frame_errors = hwstat->rx_align_errors;
1001 nstat->rx_fifo_errors = hwstat->rx_overruns;
1002 /* XXX: What does "missed" mean? */
1003 nstat->tx_aborted_errors = hwstat->tx_excessive_cols;
1004 nstat->tx_carrier_errors = hwstat->tx_carrier_errors;
1005 nstat->tx_fifo_errors = hwstat->tx_underruns;
1006 /* Don't know about heartbeat or window errors... */
1007
1008 return nstat;
1009}
1010
1011static int macb_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1012{
1013 struct macb *bp = netdev_priv(dev);
frederic RODO6c36a702007-07-12 19:07:24 +02001014 struct phy_device *phydev = bp->phy_dev;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001015
frederic RODO6c36a702007-07-12 19:07:24 +02001016 if (!phydev)
1017 return -ENODEV;
1018
1019 return phy_ethtool_gset(phydev, cmd);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001020}
1021
1022static int macb_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1023{
1024 struct macb *bp = netdev_priv(dev);
frederic RODO6c36a702007-07-12 19:07:24 +02001025 struct phy_device *phydev = bp->phy_dev;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001026
frederic RODO6c36a702007-07-12 19:07:24 +02001027 if (!phydev)
1028 return -ENODEV;
1029
1030 return phy_ethtool_sset(phydev, cmd);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001031}
1032
frederic RODO6c36a702007-07-12 19:07:24 +02001033static void macb_get_drvinfo(struct net_device *dev,
1034 struct ethtool_drvinfo *info)
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001035{
1036 struct macb *bp = netdev_priv(dev);
1037
1038 strcpy(info->driver, bp->pdev->dev.driver->name);
1039 strcpy(info->version, "$Revision: 1.14 $");
1040 strcpy(info->bus_info, bp->pdev->dev.bus_id);
1041}
1042
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001043static struct ethtool_ops macb_ethtool_ops = {
1044 .get_settings = macb_get_settings,
1045 .set_settings = macb_set_settings,
1046 .get_drvinfo = macb_get_drvinfo,
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001047 .get_link = ethtool_op_get_link,
1048};
1049
1050static int macb_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1051{
1052 struct macb *bp = netdev_priv(dev);
frederic RODO6c36a702007-07-12 19:07:24 +02001053 struct phy_device *phydev = bp->phy_dev;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001054
1055 if (!netif_running(dev))
1056 return -EINVAL;
1057
frederic RODO6c36a702007-07-12 19:07:24 +02001058 if (!phydev)
1059 return -ENODEV;
1060
1061 return phy_mii_ioctl(phydev, if_mii(rq), cmd);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001062}
1063
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001064static int __devinit macb_probe(struct platform_device *pdev)
1065{
1066 struct eth_platform_data *pdata;
1067 struct resource *regs;
1068 struct net_device *dev;
1069 struct macb *bp;
frederic RODO6c36a702007-07-12 19:07:24 +02001070 struct phy_device *phydev;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001071 unsigned long pclk_hz;
1072 u32 config;
1073 int err = -ENXIO;
Joe Perches0795af52007-10-03 17:59:30 -07001074 DECLARE_MAC_BUF(mac);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001075
1076 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1077 if (!regs) {
1078 dev_err(&pdev->dev, "no mmio resource defined\n");
1079 goto err_out;
1080 }
1081
1082 err = -ENOMEM;
1083 dev = alloc_etherdev(sizeof(*bp));
1084 if (!dev) {
1085 dev_err(&pdev->dev, "etherdev alloc failed, aborting.\n");
1086 goto err_out;
1087 }
1088
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001089 SET_NETDEV_DEV(dev, &pdev->dev);
1090
1091 /* TODO: Actually, we have some interesting features... */
1092 dev->features |= 0;
1093
1094 bp = netdev_priv(dev);
1095 bp->pdev = pdev;
1096 bp->dev = dev;
1097
1098 spin_lock_init(&bp->lock);
1099
Andrew Victor0cc86742007-02-07 16:40:44 +01001100#if defined(CONFIG_ARCH_AT91)
1101 bp->pclk = clk_get(&pdev->dev, "macb_clk");
1102 if (IS_ERR(bp->pclk)) {
1103 dev_err(&pdev->dev, "failed to get macb_clk\n");
1104 goto err_out_free_dev;
1105 }
1106 clk_enable(bp->pclk);
1107#else
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001108 bp->pclk = clk_get(&pdev->dev, "pclk");
1109 if (IS_ERR(bp->pclk)) {
1110 dev_err(&pdev->dev, "failed to get pclk\n");
1111 goto err_out_free_dev;
1112 }
1113 bp->hclk = clk_get(&pdev->dev, "hclk");
1114 if (IS_ERR(bp->hclk)) {
1115 dev_err(&pdev->dev, "failed to get hclk\n");
1116 goto err_out_put_pclk;
1117 }
1118
1119 clk_enable(bp->pclk);
1120 clk_enable(bp->hclk);
Andrew Victor0cc86742007-02-07 16:40:44 +01001121#endif
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001122
1123 bp->regs = ioremap(regs->start, regs->end - regs->start + 1);
1124 if (!bp->regs) {
1125 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
1126 err = -ENOMEM;
1127 goto err_out_disable_clocks;
1128 }
1129
1130 dev->irq = platform_get_irq(pdev, 0);
Thomas Gleixner38515e92007-02-14 00:33:16 -08001131 err = request_irq(dev->irq, macb_interrupt, IRQF_SAMPLE_RANDOM,
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001132 dev->name, dev);
1133 if (err) {
1134 printk(KERN_ERR
1135 "%s: Unable to request IRQ %d (error %d)\n",
1136 dev->name, dev->irq, err);
1137 goto err_out_iounmap;
1138 }
1139
1140 dev->open = macb_open;
1141 dev->stop = macb_close;
1142 dev->hard_start_xmit = macb_start_xmit;
1143 dev->get_stats = macb_get_stats;
Patrice Vilchez446ebd02007-07-12 19:07:25 +02001144 dev->set_multicast_list = macb_set_rx_mode;
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001145 dev->do_ioctl = macb_ioctl;
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001146 netif_napi_add(dev, &bp->napi, macb_poll, 64);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001147 dev->ethtool_ops = &macb_ethtool_ops;
1148
1149 dev->base_addr = regs->start;
1150
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001151 /* Set MII management clock divider */
1152 pclk_hz = clk_get_rate(bp->pclk);
1153 if (pclk_hz <= 20000000)
1154 config = MACB_BF(CLK, MACB_CLK_DIV8);
1155 else if (pclk_hz <= 40000000)
1156 config = MACB_BF(CLK, MACB_CLK_DIV16);
1157 else if (pclk_hz <= 80000000)
1158 config = MACB_BF(CLK, MACB_CLK_DIV32);
1159 else
1160 config = MACB_BF(CLK, MACB_CLK_DIV64);
1161 macb_writel(bp, NCFGR, config);
1162
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001163 macb_get_hwaddr(bp);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001164 pdata = pdev->dev.platform_data;
frederic RODO6c36a702007-07-12 19:07:24 +02001165
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001166 if (pdata && pdata->is_rmii)
Andrew Victor0cc86742007-02-07 16:40:44 +01001167#if defined(CONFIG_ARCH_AT91)
1168 macb_writel(bp, USRIO, (MACB_BIT(RMII) | MACB_BIT(CLKEN)) );
1169#else
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001170 macb_writel(bp, USRIO, 0);
Andrew Victor0cc86742007-02-07 16:40:44 +01001171#endif
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001172 else
Andrew Victor0cc86742007-02-07 16:40:44 +01001173#if defined(CONFIG_ARCH_AT91)
1174 macb_writel(bp, USRIO, MACB_BIT(CLKEN));
1175#else
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001176 macb_writel(bp, USRIO, MACB_BIT(MII));
Andrew Victor0cc86742007-02-07 16:40:44 +01001177#endif
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001178
1179 bp->tx_pending = DEF_TX_RING_PENDING;
1180
1181 err = register_netdev(dev);
1182 if (err) {
1183 dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
1184 goto err_out_free_irq;
1185 }
1186
frederic RODO6c36a702007-07-12 19:07:24 +02001187 if (macb_mii_init(bp) != 0) {
1188 goto err_out_unregister_netdev;
1189 }
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001190
frederic RODO6c36a702007-07-12 19:07:24 +02001191 platform_set_drvdata(pdev, dev);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001192
1193 printk(KERN_INFO "%s: Atmel MACB at 0x%08lx irq %d "
Joe Perches0795af52007-10-03 17:59:30 -07001194 "(%s)\n",
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001195 dev->name, dev->base_addr, dev->irq,
Joe Perches0795af52007-10-03 17:59:30 -07001196 print_mac(mac, dev->dev_addr));
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001197
frederic RODO6c36a702007-07-12 19:07:24 +02001198 phydev = bp->phy_dev;
1199 printk(KERN_INFO "%s: attached PHY driver [%s] "
1200 "(mii_bus:phy_addr=%s, irq=%d)\n",
1201 dev->name, phydev->drv->name, phydev->dev.bus_id, phydev->irq);
1202
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001203 return 0;
1204
frederic RODO6c36a702007-07-12 19:07:24 +02001205err_out_unregister_netdev:
1206 unregister_netdev(dev);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001207err_out_free_irq:
1208 free_irq(dev->irq, dev);
1209err_out_iounmap:
1210 iounmap(bp->regs);
1211err_out_disable_clocks:
Andrew Victor0cc86742007-02-07 16:40:44 +01001212#ifndef CONFIG_ARCH_AT91
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001213 clk_disable(bp->hclk);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001214 clk_put(bp->hclk);
Andrew Victor0cc86742007-02-07 16:40:44 +01001215#endif
1216 clk_disable(bp->pclk);
frederic RODO6c36a702007-07-12 19:07:24 +02001217#ifndef CONFIG_ARCH_AT91
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001218err_out_put_pclk:
frederic RODO6c36a702007-07-12 19:07:24 +02001219#endif
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001220 clk_put(bp->pclk);
1221err_out_free_dev:
1222 free_netdev(dev);
1223err_out:
1224 platform_set_drvdata(pdev, NULL);
1225 return err;
1226}
1227
1228static int __devexit macb_remove(struct platform_device *pdev)
1229{
1230 struct net_device *dev;
1231 struct macb *bp;
1232
1233 dev = platform_get_drvdata(pdev);
1234
1235 if (dev) {
1236 bp = netdev_priv(dev);
frederic RODO6c36a702007-07-12 19:07:24 +02001237 mdiobus_unregister(&bp->mii_bus);
1238 kfree(bp->mii_bus.irq);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001239 unregister_netdev(dev);
1240 free_irq(dev->irq, dev);
1241 iounmap(bp->regs);
Andrew Victor0cc86742007-02-07 16:40:44 +01001242#ifndef CONFIG_ARCH_AT91
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001243 clk_disable(bp->hclk);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001244 clk_put(bp->hclk);
Andrew Victor0cc86742007-02-07 16:40:44 +01001245#endif
1246 clk_disable(bp->pclk);
Haavard Skinnemoen89e57852006-11-09 14:51:17 +01001247 clk_put(bp->pclk);
1248 free_netdev(dev);
1249 platform_set_drvdata(pdev, NULL);
1250 }
1251
1252 return 0;
1253}
1254
1255static struct platform_driver macb_driver = {
1256 .probe = macb_probe,
1257 .remove = __devexit_p(macb_remove),
1258 .driver = {
1259 .name = "macb",
1260 },
1261};
1262
1263static int __init macb_init(void)
1264{
1265 return platform_driver_register(&macb_driver);
1266}
1267
1268static void __exit macb_exit(void)
1269{
1270 platform_driver_unregister(&macb_driver);
1271}
1272
1273module_init(macb_init);
1274module_exit(macb_exit);
1275
1276MODULE_LICENSE("GPL");
1277MODULE_DESCRIPTION("Atmel MACB Ethernet driver");
1278MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>");