| Viresh Kumar | c5fa4fd | 2012-03-23 00:17:43 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * DTS file for SPEAr320 SoC |
| 3 | * |
| 4 | * Copyright 2012 Viresh Kumar <viresh.kumar@st.com> |
| 5 | * |
| 6 | * The code contained herein is licensed under the GNU General Public |
| 7 | * License. You may obtain a copy of the GNU General Public License |
| 8 | * Version 2 or later at the following locations: |
| 9 | * |
| 10 | * http://www.opensource.org/licenses/gpl-license.html |
| 11 | * http://www.gnu.org/copyleft/gpl.html |
| 12 | */ |
| 13 | |
| 14 | /include/ "spear3xx.dtsi" |
| 15 | |
| 16 | / { |
| 17 | ahb { |
| 18 | #address-cells = <1>; |
| 19 | #size-cells = <1>; |
| 20 | compatible = "simple-bus"; |
| 21 | ranges = <0x40000000 0x40000000 0x70000000 |
| 22 | 0xd0000000 0xd0000000 0x30000000>; |
| 23 | |
| 24 | clcd@90000000 { |
| 25 | compatible = "arm,clcd-pl110", "arm,primecell"; |
| 26 | reg = <0x90000000 0x1000>; |
| 27 | interrupts = <33>; |
| 28 | status = "disabled"; |
| 29 | }; |
| 30 | |
| 31 | fsmc: flash@4c000000 { |
| 32 | compatible = "st,spear600-fsmc-nand"; |
| 33 | #address-cells = <1>; |
| 34 | #size-cells = <1>; |
| 35 | reg = <0x4c000000 0x1000 /* FSMC Register */ |
| 36 | 0x50000000 0x0010>; /* NAND Base */ |
| 37 | reg-names = "fsmc_regs", "nand_data"; |
| 38 | st,ale-off = <0x20000>; |
| 39 | st,cle-off = <0x10000>; |
| 40 | status = "disabled"; |
| 41 | }; |
| 42 | |
| 43 | sdhci@70000000 { |
| 44 | compatible = "st,sdhci-spear"; |
| 45 | reg = <0x70000000 0x100>; |
| 46 | interrupts = <29>; |
| 47 | status = "disabled"; |
| 48 | }; |
| 49 | |
| 50 | spi1: spi@a5000000 { |
| 51 | compatible = "arm,pl022", "arm,primecell"; |
| 52 | reg = <0xa5000000 0x1000>; |
| 53 | status = "disabled"; |
| 54 | }; |
| 55 | |
| 56 | spi2: spi@a6000000 { |
| 57 | compatible = "arm,pl022", "arm,primecell"; |
| 58 | reg = <0xa6000000 0x1000>; |
| 59 | status = "disabled"; |
| 60 | }; |
| 61 | |
| 62 | apb { |
| 63 | #address-cells = <1>; |
| 64 | #size-cells = <1>; |
| 65 | compatible = "simple-bus"; |
| 66 | ranges = <0xa0000000 0xa0000000 0x10000000 |
| 67 | 0xd0000000 0xd0000000 0x30000000>; |
| 68 | |
| 69 | i2c1: i2c@a7000000 { |
| 70 | #address-cells = <1>; |
| 71 | #size-cells = <0>; |
| 72 | compatible = "snps,designware-i2c"; |
| 73 | reg = <0xa7000000 0x1000>; |
| 74 | status = "disabled"; |
| 75 | }; |
| 76 | |
| 77 | serial@a3000000 { |
| 78 | compatible = "arm,pl011", "arm,primecell"; |
| 79 | reg = <0xa3000000 0x1000>; |
| 80 | status = "disabled"; |
| 81 | }; |
| 82 | |
| 83 | serial@a4000000 { |
| 84 | compatible = "arm,pl011", "arm,primecell"; |
| 85 | reg = <0xa4000000 0x1000>; |
| 86 | status = "disabled"; |
| 87 | }; |
| 88 | }; |
| 89 | }; |
| 90 | }; |