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Benjamin Herrenschmidtc6057822009-03-10 17:53:29 +00001#ifndef _ASM_POWERPC_PTE_HASH64_H
2#define _ASM_POWERPC_PTE_HASH64_H
3#ifdef __KERNEL__
4
5/*
6 * Common bits between 4K and 64K pages in a linux-style PTE.
7 * These match the bits in the (hardware-defined) PowerPC PTE as closely
8 * as possible. Additional bits may be defined in pgtable-hash64-*.h
9 */
10#define _PAGE_PRESENT 0x0001 /* software: pte contains a translation */
11#define _PAGE_USER 0x0002 /* matches one of the PP bits */
12#define _PAGE_FILE 0x0002 /* (!present only) software: pte holds file offset */
13#define _PAGE_EXEC 0x0004 /* No execute on POWER4 and newer (we invert) */
14#define _PAGE_GUARDED 0x0008
15#define _PAGE_COHERENT 0x0010 /* M: enforce memory coherence (SMP systems) */
16#define _PAGE_NO_CACHE 0x0020 /* I: cache inhibit */
17#define _PAGE_WRITETHRU 0x0040 /* W: cache write-through */
18#define _PAGE_DIRTY 0x0080 /* C: page changed */
19#define _PAGE_ACCESSED 0x0100 /* R: page referenced */
20#define _PAGE_RW 0x0200 /* software: user write access allowed */
21#define _PAGE_BUSY 0x0800 /* software: PTE & hash are busy */
22
23/* Strong Access Ordering */
24#define _PAGE_SAO (_PAGE_WRITETHRU | _PAGE_NO_CACHE | _PAGE_COHERENT)
25
26#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_COHERENT)
27
28#define _PAGE_WRENABLE (_PAGE_RW | _PAGE_DIRTY)
29
30/* PTEIDX nibble */
31#define _PTEIDX_SECONDARY 0x8
32#define _PTEIDX_GROUP_IX 0x7
33
34#define PAGE_PROT_BITS (_PAGE_GUARDED | _PAGE_COHERENT | \
35 _PAGE_NO_CACHE | _PAGE_WRITETHRU | \
36 _PAGE_4K_PFN | _PAGE_RW | _PAGE_USER | \
37 _PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_EXEC)
38
39
40#ifdef CONFIG_PPC_64K_PAGES
41#include <asm/pte-hash64-64k.h>
42#else
43#include <asm/pte-hash64-4k.h>
44#endif
45
46#endif /* __KERNEL__ */
47#endif /* _ASM_POWERPC_PTE_HASH64_H */