Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1 | /* |
| 2 | * MUSB OTG driver core code |
| 3 | * |
| 4 | * Copyright 2005 Mentor Graphics Corporation |
| 5 | * Copyright (C) 2005-2006 by Texas Instruments |
| 6 | * Copyright (C) 2006-2007 Nokia Corporation |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License |
| 10 | * version 2 as published by the Free Software Foundation. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, but |
| 13 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 15 | * General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA |
| 20 | * 02110-1301 USA |
| 21 | * |
| 22 | * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED |
| 23 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 24 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 25 | * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 26 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 27 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 28 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 29 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 30 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 31 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 32 | * |
| 33 | */ |
| 34 | |
| 35 | /* |
| 36 | * Inventra (Multipoint) Dual-Role Controller Driver for Linux. |
| 37 | * |
| 38 | * This consists of a Host Controller Driver (HCD) and a peripheral |
| 39 | * controller driver implementing the "Gadget" API; OTG support is |
| 40 | * in the works. These are normal Linux-USB controller drivers which |
| 41 | * use IRQs and have no dedicated thread. |
| 42 | * |
| 43 | * This version of the driver has only been used with products from |
| 44 | * Texas Instruments. Those products integrate the Inventra logic |
| 45 | * with other DMA, IRQ, and bus modules, as well as other logic that |
| 46 | * needs to be reflected in this driver. |
| 47 | * |
| 48 | * |
| 49 | * NOTE: the original Mentor code here was pretty much a collection |
| 50 | * of mechanisms that don't seem to have been fully integrated/working |
| 51 | * for *any* Linux kernel version. This version aims at Linux 2.6.now, |
| 52 | * Key open issues include: |
| 53 | * |
| 54 | * - Lack of host-side transaction scheduling, for all transfer types. |
| 55 | * The hardware doesn't do it; instead, software must. |
| 56 | * |
| 57 | * This is not an issue for OTG devices that don't support external |
| 58 | * hubs, but for more "normal" USB hosts it's a user issue that the |
| 59 | * "multipoint" support doesn't scale in the expected ways. That |
| 60 | * includes DaVinci EVM in a common non-OTG mode. |
| 61 | * |
| 62 | * * Control and bulk use dedicated endpoints, and there's as |
| 63 | * yet no mechanism to either (a) reclaim the hardware when |
| 64 | * peripherals are NAKing, which gets complicated with bulk |
| 65 | * endpoints, or (b) use more than a single bulk endpoint in |
| 66 | * each direction. |
| 67 | * |
| 68 | * RESULT: one device may be perceived as blocking another one. |
| 69 | * |
| 70 | * * Interrupt and isochronous will dynamically allocate endpoint |
| 71 | * hardware, but (a) there's no record keeping for bandwidth; |
| 72 | * (b) in the common case that few endpoints are available, there |
| 73 | * is no mechanism to reuse endpoints to talk to multiple devices. |
| 74 | * |
| 75 | * RESULT: At one extreme, bandwidth can be overcommitted in |
| 76 | * some hardware configurations, no faults will be reported. |
| 77 | * At the other extreme, the bandwidth capabilities which do |
| 78 | * exist tend to be severely undercommitted. You can't yet hook |
| 79 | * up both a keyboard and a mouse to an external USB hub. |
| 80 | */ |
| 81 | |
| 82 | /* |
| 83 | * This gets many kinds of configuration information: |
| 84 | * - Kconfig for everything user-configurable |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 85 | * - platform_device for addressing, irq, and platform_data |
Rahul Bedarkar | 5ae477b | 2014-01-02 19:27:47 +0530 | [diff] [blame] | 86 | * - platform_data is mostly for board-specific information |
David Brownell | c767c1c | 2008-09-11 11:53:23 +0300 | [diff] [blame] | 87 | * (plus recentrly, SOC or family details) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 88 | * |
| 89 | * Most of the conditional compilation will (someday) vanish. |
| 90 | */ |
| 91 | |
| 92 | #include <linux/module.h> |
| 93 | #include <linux/kernel.h> |
| 94 | #include <linux/sched.h> |
| 95 | #include <linux/slab.h> |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 96 | #include <linux/list.h> |
| 97 | #include <linux/kobject.h> |
Mike Frysinger | 9303961 | 2011-05-25 08:13:24 -0400 | [diff] [blame] | 98 | #include <linux/prefetch.h> |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 99 | #include <linux/platform_device.h> |
| 100 | #include <linux/io.h> |
Ajay Kumar Gupta | 8d2421e | 2012-08-31 11:09:50 +0000 | [diff] [blame] | 101 | #include <linux/dma-mapping.h> |
Felipe Balbi | 309be23 | 2015-02-13 14:46:27 -0600 | [diff] [blame] | 102 | #include <linux/usb.h> |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 103 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 104 | #include "musb_core.h" |
| 105 | |
David Brownell | f7f9d63 | 2009-03-31 12:32:12 -0700 | [diff] [blame] | 106 | #define TA_WAIT_BCON(m) max_t(int, (m)->a_wait_bcon, OTG_TIME_A_WAIT_BCON) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 107 | |
| 108 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 109 | #define DRIVER_AUTHOR "Mentor Graphics, Texas Instruments, Nokia" |
| 110 | #define DRIVER_DESC "Inventra Dual-Role USB Controller Driver" |
| 111 | |
Felipe Balbi | e8164f6 | 2008-08-10 21:22:35 +0300 | [diff] [blame] | 112 | #define MUSB_VERSION "6.0" |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 113 | |
| 114 | #define DRIVER_INFO DRIVER_DESC ", v" MUSB_VERSION |
| 115 | |
Felipe Balbi | 05ac10d | 2010-12-02 08:49:26 +0200 | [diff] [blame] | 116 | #define MUSB_DRIVER_NAME "musb-hdrc" |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 117 | const char musb_driver_name[] = MUSB_DRIVER_NAME; |
| 118 | |
| 119 | MODULE_DESCRIPTION(DRIVER_INFO); |
| 120 | MODULE_AUTHOR(DRIVER_AUTHOR); |
| 121 | MODULE_LICENSE("GPL"); |
| 122 | MODULE_ALIAS("platform:" MUSB_DRIVER_NAME); |
| 123 | |
| 124 | |
| 125 | /*-------------------------------------------------------------------------*/ |
| 126 | |
| 127 | static inline struct musb *dev_to_musb(struct device *dev) |
| 128 | { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 129 | return dev_get_drvdata(dev); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 130 | } |
| 131 | |
| 132 | /*-------------------------------------------------------------------------*/ |
| 133 | |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 134 | #ifndef CONFIG_BLACKFIN |
Heikki Krogerus | b96d3b0 | 2012-02-13 13:24:18 +0200 | [diff] [blame] | 135 | static int musb_ulpi_read(struct usb_phy *phy, u32 offset) |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 136 | { |
Heikki Krogerus | b96d3b0 | 2012-02-13 13:24:18 +0200 | [diff] [blame] | 137 | void __iomem *addr = phy->io_priv; |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 138 | int i = 0; |
| 139 | u8 r; |
| 140 | u8 power; |
Grazvydas Ignotas | bf070bc | 2012-03-21 16:35:52 +0200 | [diff] [blame] | 141 | int ret; |
| 142 | |
| 143 | pm_runtime_get_sync(phy->io_dev); |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 144 | |
| 145 | /* Make sure the transceiver is not in low power mode */ |
| 146 | power = musb_readb(addr, MUSB_POWER); |
| 147 | power &= ~MUSB_POWER_SUSPENDM; |
| 148 | musb_writeb(addr, MUSB_POWER, power); |
| 149 | |
| 150 | /* REVISIT: musbhdrc_ulpi_an.pdf recommends setting the |
| 151 | * ULPICarKitControlDisableUTMI after clearing POWER_SUSPENDM. |
| 152 | */ |
| 153 | |
| 154 | musb_writeb(addr, MUSB_ULPI_REG_ADDR, (u8)offset); |
| 155 | musb_writeb(addr, MUSB_ULPI_REG_CONTROL, |
| 156 | MUSB_ULPI_REG_REQ | MUSB_ULPI_RDN_WR); |
| 157 | |
| 158 | while (!(musb_readb(addr, MUSB_ULPI_REG_CONTROL) |
| 159 | & MUSB_ULPI_REG_CMPLT)) { |
| 160 | i++; |
Grazvydas Ignotas | bf070bc | 2012-03-21 16:35:52 +0200 | [diff] [blame] | 161 | if (i == 10000) { |
| 162 | ret = -ETIMEDOUT; |
| 163 | goto out; |
| 164 | } |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 165 | |
| 166 | } |
| 167 | r = musb_readb(addr, MUSB_ULPI_REG_CONTROL); |
| 168 | r &= ~MUSB_ULPI_REG_CMPLT; |
| 169 | musb_writeb(addr, MUSB_ULPI_REG_CONTROL, r); |
| 170 | |
Grazvydas Ignotas | bf070bc | 2012-03-21 16:35:52 +0200 | [diff] [blame] | 171 | ret = musb_readb(addr, MUSB_ULPI_REG_DATA); |
| 172 | |
| 173 | out: |
| 174 | pm_runtime_put(phy->io_dev); |
| 175 | |
| 176 | return ret; |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 177 | } |
| 178 | |
Heikki Krogerus | b96d3b0 | 2012-02-13 13:24:18 +0200 | [diff] [blame] | 179 | static int musb_ulpi_write(struct usb_phy *phy, u32 offset, u32 data) |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 180 | { |
Heikki Krogerus | b96d3b0 | 2012-02-13 13:24:18 +0200 | [diff] [blame] | 181 | void __iomem *addr = phy->io_priv; |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 182 | int i = 0; |
| 183 | u8 r = 0; |
| 184 | u8 power; |
Grazvydas Ignotas | bf070bc | 2012-03-21 16:35:52 +0200 | [diff] [blame] | 185 | int ret = 0; |
| 186 | |
| 187 | pm_runtime_get_sync(phy->io_dev); |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 188 | |
| 189 | /* Make sure the transceiver is not in low power mode */ |
| 190 | power = musb_readb(addr, MUSB_POWER); |
| 191 | power &= ~MUSB_POWER_SUSPENDM; |
| 192 | musb_writeb(addr, MUSB_POWER, power); |
| 193 | |
| 194 | musb_writeb(addr, MUSB_ULPI_REG_ADDR, (u8)offset); |
| 195 | musb_writeb(addr, MUSB_ULPI_REG_DATA, (u8)data); |
| 196 | musb_writeb(addr, MUSB_ULPI_REG_CONTROL, MUSB_ULPI_REG_REQ); |
| 197 | |
| 198 | while (!(musb_readb(addr, MUSB_ULPI_REG_CONTROL) |
| 199 | & MUSB_ULPI_REG_CMPLT)) { |
| 200 | i++; |
Grazvydas Ignotas | bf070bc | 2012-03-21 16:35:52 +0200 | [diff] [blame] | 201 | if (i == 10000) { |
| 202 | ret = -ETIMEDOUT; |
| 203 | goto out; |
| 204 | } |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 205 | } |
| 206 | |
| 207 | r = musb_readb(addr, MUSB_ULPI_REG_CONTROL); |
| 208 | r &= ~MUSB_ULPI_REG_CMPLT; |
| 209 | musb_writeb(addr, MUSB_ULPI_REG_CONTROL, r); |
| 210 | |
Grazvydas Ignotas | bf070bc | 2012-03-21 16:35:52 +0200 | [diff] [blame] | 211 | out: |
| 212 | pm_runtime_put(phy->io_dev); |
| 213 | |
| 214 | return ret; |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 215 | } |
| 216 | #else |
Mike Frysinger | f2263db | 2010-06-24 23:07:08 +0530 | [diff] [blame] | 217 | #define musb_ulpi_read NULL |
| 218 | #define musb_ulpi_write NULL |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 219 | #endif |
| 220 | |
Heikki Krogerus | b96d3b0 | 2012-02-13 13:24:18 +0200 | [diff] [blame] | 221 | static struct usb_phy_io_ops musb_ulpi_access = { |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 222 | .read = musb_ulpi_read, |
| 223 | .write = musb_ulpi_write, |
| 224 | }; |
| 225 | |
| 226 | /*-------------------------------------------------------------------------*/ |
| 227 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 228 | static u32 musb_default_fifo_offset(u8 epnum) |
| 229 | { |
| 230 | return 0x20 + (epnum * 4); |
| 231 | } |
| 232 | |
Tony Lindgren | d026e9c | 2014-11-24 11:05:03 -0800 | [diff] [blame] | 233 | /* "flat" mapping: each endpoint has its own i/o address */ |
| 234 | static void musb_flat_ep_select(void __iomem *mbase, u8 epnum) |
| 235 | { |
| 236 | } |
| 237 | |
| 238 | static u32 musb_flat_ep_offset(u8 epnum, u16 offset) |
| 239 | { |
| 240 | return 0x100 + (0x10 * epnum) + offset; |
| 241 | } |
| 242 | |
| 243 | /* "indexed" mapping: INDEX register controls register bank select */ |
| 244 | static void musb_indexed_ep_select(void __iomem *mbase, u8 epnum) |
| 245 | { |
| 246 | musb_writeb(mbase, MUSB_INDEX, epnum); |
| 247 | } |
| 248 | |
| 249 | static u32 musb_indexed_ep_offset(u8 epnum, u16 offset) |
| 250 | { |
| 251 | return 0x10 + offset; |
| 252 | } |
| 253 | |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 254 | static u32 musb_default_busctl_offset(u8 epnum, u16 offset) |
| 255 | { |
| 256 | return 0x80 + (0x08 * epnum) + offset; |
| 257 | } |
| 258 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 259 | static u8 musb_default_readb(const void __iomem *addr, unsigned offset) |
| 260 | { |
| 261 | return __raw_readb(addr + offset); |
| 262 | } |
| 263 | |
| 264 | static void musb_default_writeb(void __iomem *addr, unsigned offset, u8 data) |
| 265 | { |
| 266 | __raw_writeb(data, addr + offset); |
| 267 | } |
| 268 | |
| 269 | static u16 musb_default_readw(const void __iomem *addr, unsigned offset) |
| 270 | { |
| 271 | return __raw_readw(addr + offset); |
| 272 | } |
| 273 | |
| 274 | static void musb_default_writew(void __iomem *addr, unsigned offset, u16 data) |
| 275 | { |
| 276 | __raw_writew(data, addr + offset); |
| 277 | } |
| 278 | |
| 279 | static u32 musb_default_readl(const void __iomem *addr, unsigned offset) |
| 280 | { |
| 281 | return __raw_readl(addr + offset); |
| 282 | } |
| 283 | |
| 284 | static void musb_default_writel(void __iomem *addr, unsigned offset, u32 data) |
| 285 | { |
| 286 | __raw_writel(data, addr + offset); |
| 287 | } |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 288 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 289 | /* |
| 290 | * Load an endpoint's FIFO |
| 291 | */ |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 292 | static void musb_default_write_fifo(struct musb_hw_ep *hw_ep, u16 len, |
| 293 | const u8 *src) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 294 | { |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 295 | struct musb *musb = hw_ep->musb; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 296 | void __iomem *fifo = hw_ep->fifo; |
| 297 | |
Ajay Kumar Gupta | 603fe2b | 2012-07-20 11:07:24 +0530 | [diff] [blame] | 298 | if (unlikely(len == 0)) |
| 299 | return; |
| 300 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 301 | prefetch((u8 *)src); |
| 302 | |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 303 | dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 304 | 'T', hw_ep->epnum, fifo, len, src); |
| 305 | |
| 306 | /* we can't assume unaligned reads work */ |
| 307 | if (likely((0x01 & (unsigned long) src) == 0)) { |
| 308 | u16 index = 0; |
| 309 | |
| 310 | /* best case is 32bit-aligned source address */ |
| 311 | if ((0x02 & (unsigned long) src) == 0) { |
| 312 | if (len >= 4) { |
Matthew Leach | 2bf0a8f | 2012-12-17 15:59:48 -0800 | [diff] [blame] | 313 | iowrite32_rep(fifo, src + index, len >> 2); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 314 | index += len & ~0x03; |
| 315 | } |
| 316 | if (len & 0x02) { |
Hans de Goede | be78038 | 2015-03-20 20:11:13 +0100 | [diff] [blame] | 317 | __raw_writew(*(u16 *)&src[index], fifo); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 318 | index += 2; |
| 319 | } |
| 320 | } else { |
| 321 | if (len >= 2) { |
Matthew Leach | 2bf0a8f | 2012-12-17 15:59:48 -0800 | [diff] [blame] | 322 | iowrite16_rep(fifo, src + index, len >> 1); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 323 | index += len & ~0x01; |
| 324 | } |
| 325 | } |
| 326 | if (len & 0x01) |
Hans de Goede | be78038 | 2015-03-20 20:11:13 +0100 | [diff] [blame] | 327 | __raw_writeb(src[index], fifo); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 328 | } else { |
| 329 | /* byte aligned */ |
Matthew Leach | 2bf0a8f | 2012-12-17 15:59:48 -0800 | [diff] [blame] | 330 | iowrite8_rep(fifo, src, len); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 331 | } |
| 332 | } |
| 333 | |
| 334 | /* |
| 335 | * Unload an endpoint's FIFO |
| 336 | */ |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 337 | static void musb_default_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 338 | { |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 339 | struct musb *musb = hw_ep->musb; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 340 | void __iomem *fifo = hw_ep->fifo; |
| 341 | |
Ajay Kumar Gupta | 603fe2b | 2012-07-20 11:07:24 +0530 | [diff] [blame] | 342 | if (unlikely(len == 0)) |
| 343 | return; |
| 344 | |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 345 | dev_dbg(musb->controller, "%cX ep%d fifo %p count %d buf %p\n", |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 346 | 'R', hw_ep->epnum, fifo, len, dst); |
| 347 | |
| 348 | /* we can't assume unaligned writes work */ |
| 349 | if (likely((0x01 & (unsigned long) dst) == 0)) { |
| 350 | u16 index = 0; |
| 351 | |
| 352 | /* best case is 32bit-aligned destination address */ |
| 353 | if ((0x02 & (unsigned long) dst) == 0) { |
| 354 | if (len >= 4) { |
Matthew Leach | 2bf0a8f | 2012-12-17 15:59:48 -0800 | [diff] [blame] | 355 | ioread32_rep(fifo, dst, len >> 2); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 356 | index = len & ~0x03; |
| 357 | } |
| 358 | if (len & 0x02) { |
Hans de Goede | be78038 | 2015-03-20 20:11:13 +0100 | [diff] [blame] | 359 | *(u16 *)&dst[index] = __raw_readw(fifo); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 360 | index += 2; |
| 361 | } |
| 362 | } else { |
| 363 | if (len >= 2) { |
Matthew Leach | 2bf0a8f | 2012-12-17 15:59:48 -0800 | [diff] [blame] | 364 | ioread16_rep(fifo, dst, len >> 1); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 365 | index = len & ~0x01; |
| 366 | } |
| 367 | } |
| 368 | if (len & 0x01) |
Hans de Goede | be78038 | 2015-03-20 20:11:13 +0100 | [diff] [blame] | 369 | dst[index] = __raw_readb(fifo); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 370 | } else { |
| 371 | /* byte aligned */ |
Matthew Leach | 2bf0a8f | 2012-12-17 15:59:48 -0800 | [diff] [blame] | 372 | ioread8_rep(fifo, dst, len); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 373 | } |
| 374 | } |
| 375 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 376 | /* |
| 377 | * Old style IO functions |
| 378 | */ |
| 379 | u8 (*musb_readb)(const void __iomem *addr, unsigned offset); |
| 380 | EXPORT_SYMBOL_GPL(musb_readb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 381 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 382 | void (*musb_writeb)(void __iomem *addr, unsigned offset, u8 data); |
| 383 | EXPORT_SYMBOL_GPL(musb_writeb); |
| 384 | |
| 385 | u16 (*musb_readw)(const void __iomem *addr, unsigned offset); |
| 386 | EXPORT_SYMBOL_GPL(musb_readw); |
| 387 | |
| 388 | void (*musb_writew)(void __iomem *addr, unsigned offset, u16 data); |
| 389 | EXPORT_SYMBOL_GPL(musb_writew); |
| 390 | |
| 391 | u32 (*musb_readl)(const void __iomem *addr, unsigned offset); |
| 392 | EXPORT_SYMBOL_GPL(musb_readl); |
| 393 | |
| 394 | void (*musb_writel)(void __iomem *addr, unsigned offset, u32 data); |
| 395 | EXPORT_SYMBOL_GPL(musb_writel); |
| 396 | |
Tony Lindgren | 7f6283e | 2015-05-01 12:29:28 -0700 | [diff] [blame] | 397 | #ifndef CONFIG_MUSB_PIO_ONLY |
| 398 | struct dma_controller * |
| 399 | (*musb_dma_controller_create)(struct musb *musb, void __iomem *base); |
| 400 | EXPORT_SYMBOL(musb_dma_controller_create); |
| 401 | |
| 402 | void (*musb_dma_controller_destroy)(struct dma_controller *c); |
| 403 | EXPORT_SYMBOL(musb_dma_controller_destroy); |
| 404 | #endif |
| 405 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 406 | /* |
| 407 | * New style IO functions |
| 408 | */ |
| 409 | void musb_read_fifo(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) |
| 410 | { |
| 411 | return hw_ep->musb->io.read_fifo(hw_ep, len, dst); |
| 412 | } |
| 413 | |
| 414 | void musb_write_fifo(struct musb_hw_ep *hw_ep, u16 len, const u8 *src) |
| 415 | { |
| 416 | return hw_ep->musb->io.write_fifo(hw_ep, len, src); |
| 417 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 418 | |
| 419 | /*-------------------------------------------------------------------------*/ |
| 420 | |
| 421 | /* for high speed test mode; see USB 2.0 spec 7.1.20 */ |
| 422 | static const u8 musb_test_packet[53] = { |
| 423 | /* implicit SYNC then DATA0 to start */ |
| 424 | |
| 425 | /* JKJKJKJK x9 */ |
| 426 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, |
| 427 | /* JJKKJJKK x8 */ |
| 428 | 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, |
| 429 | /* JJJJKKKK x8 */ |
| 430 | 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, 0xee, |
| 431 | /* JJJJJJJKKKKKKK x8 */ |
| 432 | 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, |
| 433 | /* JJJJJJJK x8 */ |
| 434 | 0x7f, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, |
| 435 | /* JKKKKKKK x10, JK */ |
| 436 | 0xfc, 0x7e, 0xbf, 0xdf, 0xef, 0xf7, 0xfb, 0xfd, 0x7e |
| 437 | |
| 438 | /* implicit CRC16 then EOP to end */ |
| 439 | }; |
| 440 | |
| 441 | void musb_load_testpacket(struct musb *musb) |
| 442 | { |
| 443 | void __iomem *regs = musb->endpoints[0].regs; |
| 444 | |
| 445 | musb_ep_select(musb->mregs, 0); |
| 446 | musb_write_fifo(musb->control_ep, |
| 447 | sizeof(musb_test_packet), musb_test_packet); |
| 448 | musb_writew(regs, MUSB_CSR0, MUSB_CSR0_TXPKTRDY); |
| 449 | } |
| 450 | |
| 451 | /*-------------------------------------------------------------------------*/ |
| 452 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 453 | /* |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 454 | * Handles OTG hnp timeouts, such as b_ase0_brst |
| 455 | */ |
Felipe Balbi | a156544 | 2012-08-07 14:00:50 +0300 | [diff] [blame] | 456 | static void musb_otg_timer_func(unsigned long data) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 457 | { |
| 458 | struct musb *musb = (struct musb *)data; |
| 459 | unsigned long flags; |
| 460 | |
| 461 | spin_lock_irqsave(&musb->lock, flags); |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 462 | switch (musb->xceiv->otg->state) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 463 | case OTG_STATE_B_WAIT_ACON: |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 464 | dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 465 | musb_g_disconnect(musb); |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 466 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 467 | musb->is_active = 0; |
| 468 | break; |
David Brownell | ab983f2a | 2009-03-31 12:35:09 -0700 | [diff] [blame] | 469 | case OTG_STATE_A_SUSPEND: |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 470 | case OTG_STATE_A_WAIT_BCON: |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 471 | dev_dbg(musb->controller, "HNP: %s timeout\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 472 | usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 743411b | 2010-12-01 13:22:05 +0200 | [diff] [blame] | 473 | musb_platform_set_vbus(musb, 0); |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 474 | musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 475 | break; |
| 476 | default: |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 477 | dev_dbg(musb->controller, "HNP: Unhandled mode %s\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 478 | usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 479 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 480 | spin_unlock_irqrestore(&musb->lock, flags); |
| 481 | } |
| 482 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 483 | /* |
David Brownell | f7f9d63 | 2009-03-31 12:32:12 -0700 | [diff] [blame] | 484 | * Stops the HNP transition. Caller must take care of locking. |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 485 | */ |
| 486 | void musb_hnp_stop(struct musb *musb) |
| 487 | { |
Daniel Mack | 8b125df | 2013-04-10 21:55:50 +0200 | [diff] [blame] | 488 | struct usb_hcd *hcd = musb->hcd; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 489 | void __iomem *mbase = musb->mregs; |
| 490 | u8 reg; |
| 491 | |
Felipe Balbi | 42c0bf1 | 2013-03-07 10:39:57 +0200 | [diff] [blame] | 492 | dev_dbg(musb->controller, "HNP: stop from %s\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 493 | usb_otg_state_string(musb->xceiv->otg->state)); |
David Brownell | ab983f2a | 2009-03-31 12:35:09 -0700 | [diff] [blame] | 494 | |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 495 | switch (musb->xceiv->otg->state) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 496 | case OTG_STATE_A_PERIPHERAL: |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 497 | musb_g_disconnect(musb); |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 498 | dev_dbg(musb->controller, "HNP: back to %s\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 499 | usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 500 | break; |
| 501 | case OTG_STATE_B_HOST: |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 502 | dev_dbg(musb->controller, "HNP: Disabling HR\n"); |
Daniel Mack | 74c2e93 | 2013-04-10 21:55:45 +0200 | [diff] [blame] | 503 | if (hcd) |
| 504 | hcd->self.is_b_host = 0; |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 505 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 506 | MUSB_DEV_MODE(musb); |
| 507 | reg = musb_readb(mbase, MUSB_POWER); |
| 508 | reg |= MUSB_POWER_SUSPENDM; |
| 509 | musb_writeb(mbase, MUSB_POWER, reg); |
| 510 | /* REVISIT: Start SESSION_REQUEST here? */ |
| 511 | break; |
| 512 | default: |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 513 | dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 514 | usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 515 | } |
| 516 | |
| 517 | /* |
| 518 | * When returning to A state after HNP, avoid hub_port_rebounce(), |
| 519 | * which cause occasional OPT A "Did not receive reset after connect" |
| 520 | * errors. |
| 521 | */ |
Alan Stern | 749da5f | 2010-03-04 17:05:08 -0500 | [diff] [blame] | 522 | musb->port1_status &= ~(USB_PORT_STAT_C_CONNECTION << 16); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 523 | } |
| 524 | |
Felipe Balbi | 83b8f5b | 2015-02-26 14:27:12 -0600 | [diff] [blame] | 525 | static void musb_recover_from_babble(struct musb *musb); |
Felipe Balbi | e1eb3eb | 2015-02-26 11:26:09 -0600 | [diff] [blame] | 526 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 527 | /* |
| 528 | * Interrupt Service Routine to record USB "global" interrupts. |
| 529 | * Since these do not happen often and signify things of |
| 530 | * paramount importance, it seems OK to check them individually; |
| 531 | * the order of the tests is specified in the manual |
| 532 | * |
| 533 | * @param musb instance pointer |
| 534 | * @param int_usb register contents |
| 535 | * @param devctl |
| 536 | * @param power |
| 537 | */ |
| 538 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 539 | static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb, |
Sebastian Andrzej Siewior | b11e94d | 2012-10-30 19:52:23 +0100 | [diff] [blame] | 540 | u8 devctl) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 541 | { |
| 542 | irqreturn_t handled = IRQ_NONE; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 543 | |
Sebastian Andrzej Siewior | b11e94d | 2012-10-30 19:52:23 +0100 | [diff] [blame] | 544 | dev_dbg(musb->controller, "<== DevCtl=%02x, int_usb=0x%x\n", devctl, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 545 | int_usb); |
| 546 | |
| 547 | /* in host mode, the peripheral may issue remote wakeup. |
| 548 | * in peripheral mode, the host may resume the link. |
| 549 | * spurious RESUME irqs happen too, paired with SUSPEND. |
| 550 | */ |
| 551 | if (int_usb & MUSB_INTR_RESUME) { |
| 552 | handled = IRQ_HANDLED; |
Felipe Balbi | 0acff6b | 2015-02-25 14:14:15 -0600 | [diff] [blame] | 553 | dev_dbg(musb->controller, "RESUME (%s)\n", |
| 554 | usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 555 | |
| 556 | if (devctl & MUSB_DEVCTL_HM) { |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 557 | switch (musb->xceiv->otg->state) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 558 | case OTG_STATE_A_SUSPEND: |
| 559 | /* remote wakeup? later, GetPortStatus |
| 560 | * will stop RESUME signaling |
| 561 | */ |
| 562 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 563 | musb->port1_status |= |
| 564 | (USB_PORT_STAT_C_SUSPEND << 16) |
| 565 | | MUSB_PORT_STAT_RESUME; |
Daniel Mack | 30d361b | 2014-01-15 14:09:49 +0100 | [diff] [blame] | 566 | musb->rh_timer = jiffies |
Felipe Balbi | 309be23 | 2015-02-13 14:46:27 -0600 | [diff] [blame] | 567 | + msecs_to_jiffies(USB_RESUME_TIMEOUT); |
Sebastian Andrzej Siewior | baadd52 | 2014-10-27 19:06:19 +0100 | [diff] [blame] | 568 | musb->need_finish_resume = 1; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 569 | |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 570 | musb->xceiv->otg->state = OTG_STATE_A_HOST; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 571 | musb->is_active = 1; |
Bin Liu | 9298b4a | 2015-02-03 11:02:10 -0600 | [diff] [blame] | 572 | musb_host_resume_root_hub(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 573 | break; |
| 574 | case OTG_STATE_B_WAIT_ACON: |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 575 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 576 | musb->is_active = 1; |
| 577 | MUSB_DEV_MODE(musb); |
| 578 | break; |
| 579 | default: |
| 580 | WARNING("bogus %s RESUME (%s)\n", |
| 581 | "host", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 582 | usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 583 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 584 | } else { |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 585 | switch (musb->xceiv->otg->state) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 586 | case OTG_STATE_A_SUSPEND: |
| 587 | /* possibly DISCONNECT is upcoming */ |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 588 | musb->xceiv->otg->state = OTG_STATE_A_HOST; |
Daniel Mack | 0b3eba4 | 2013-04-10 21:55:42 +0200 | [diff] [blame] | 589 | musb_host_resume_root_hub(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 590 | break; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 591 | case OTG_STATE_B_WAIT_ACON: |
| 592 | case OTG_STATE_B_PERIPHERAL: |
| 593 | /* disconnect while suspended? we may |
| 594 | * not get a disconnect irq... |
| 595 | */ |
| 596 | if ((devctl & MUSB_DEVCTL_VBUS) |
| 597 | != (3 << MUSB_DEVCTL_VBUS_SHIFT) |
| 598 | ) { |
| 599 | musb->int_usb |= MUSB_INTR_DISCONNECT; |
| 600 | musb->int_usb &= ~MUSB_INTR_SUSPEND; |
| 601 | break; |
| 602 | } |
| 603 | musb_g_resume(musb); |
| 604 | break; |
| 605 | case OTG_STATE_B_IDLE: |
| 606 | musb->int_usb &= ~MUSB_INTR_SUSPEND; |
| 607 | break; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 608 | default: |
| 609 | WARNING("bogus %s RESUME (%s)\n", |
| 610 | "peripheral", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 611 | usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 612 | } |
| 613 | } |
| 614 | } |
| 615 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 616 | /* see manual for the order of the tests */ |
| 617 | if (int_usb & MUSB_INTR_SESSREQ) { |
Felipe Balbi | aa47145 | 2010-03-12 10:27:24 +0200 | [diff] [blame] | 618 | void __iomem *mbase = musb->mregs; |
| 619 | |
Heikki Krogerus | 19aab56 | 2010-10-29 04:23:27 -0500 | [diff] [blame] | 620 | if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS |
| 621 | && (devctl & MUSB_DEVCTL_BDEVICE)) { |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 622 | dev_dbg(musb->controller, "SessReq while on B state\n"); |
Heikki Krogerus | a6038ee | 2010-09-24 13:44:13 +0300 | [diff] [blame] | 623 | return IRQ_HANDLED; |
| 624 | } |
| 625 | |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 626 | dev_dbg(musb->controller, "SESSION_REQUEST (%s)\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 627 | usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 628 | |
| 629 | /* IRQ arrives from ID pin sense or (later, if VBUS power |
| 630 | * is removed) SRP. responses are time critical: |
| 631 | * - turn on VBUS (with silicon-specific mechanism) |
| 632 | * - go through A_WAIT_VRISE |
| 633 | * - ... to A_WAIT_BCON. |
| 634 | * a_wait_vrise_tmout triggers VBUS_ERROR transitions |
| 635 | */ |
| 636 | musb_writeb(mbase, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); |
| 637 | musb->ep0_stage = MUSB_EP0_START; |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 638 | musb->xceiv->otg->state = OTG_STATE_A_IDLE; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 639 | MUSB_HST_MODE(musb); |
Felipe Balbi | 743411b | 2010-12-01 13:22:05 +0200 | [diff] [blame] | 640 | musb_platform_set_vbus(musb, 1); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 641 | |
| 642 | handled = IRQ_HANDLED; |
| 643 | } |
| 644 | |
| 645 | if (int_usb & MUSB_INTR_VBUSERROR) { |
| 646 | int ignore = 0; |
| 647 | |
| 648 | /* During connection as an A-Device, we may see a short |
| 649 | * current spikes causing voltage drop, because of cable |
| 650 | * and peripheral capacitance combined with vbus draw. |
| 651 | * (So: less common with truly self-powered devices, where |
| 652 | * vbus doesn't act like a power supply.) |
| 653 | * |
| 654 | * Such spikes are short; usually less than ~500 usec, max |
| 655 | * of ~2 msec. That is, they're not sustained overcurrent |
| 656 | * errors, though they're reported using VBUSERROR irqs. |
| 657 | * |
| 658 | * Workarounds: (a) hardware: use self powered devices. |
| 659 | * (b) software: ignore non-repeated VBUS errors. |
| 660 | * |
| 661 | * REVISIT: do delays from lots of DEBUG_KERNEL checks |
| 662 | * make trouble here, keeping VBUS < 4.4V ? |
| 663 | */ |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 664 | switch (musb->xceiv->otg->state) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 665 | case OTG_STATE_A_HOST: |
| 666 | /* recovery is dicey once we've gotten past the |
| 667 | * initial stages of enumeration, but if VBUS |
| 668 | * stayed ok at the other end of the link, and |
| 669 | * another reset is due (at least for high speed, |
| 670 | * to redo the chirp etc), it might work OK... |
| 671 | */ |
| 672 | case OTG_STATE_A_WAIT_BCON: |
| 673 | case OTG_STATE_A_WAIT_VRISE: |
| 674 | if (musb->vbuserr_retry) { |
Felipe Balbi | aa47145 | 2010-03-12 10:27:24 +0200 | [diff] [blame] | 675 | void __iomem *mbase = musb->mregs; |
| 676 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 677 | musb->vbuserr_retry--; |
| 678 | ignore = 1; |
| 679 | devctl |= MUSB_DEVCTL_SESSION; |
| 680 | musb_writeb(mbase, MUSB_DEVCTL, devctl); |
| 681 | } else { |
| 682 | musb->port1_status |= |
Alan Stern | 749da5f | 2010-03-04 17:05:08 -0500 | [diff] [blame] | 683 | USB_PORT_STAT_OVERCURRENT |
| 684 | | (USB_PORT_STAT_C_OVERCURRENT << 16); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 685 | } |
| 686 | break; |
| 687 | default: |
| 688 | break; |
| 689 | } |
| 690 | |
Grazvydas Ignotas | 5448511 | 2013-03-10 02:49:28 +0200 | [diff] [blame] | 691 | dev_printk(ignore ? KERN_DEBUG : KERN_ERR, musb->controller, |
| 692 | "VBUS_ERROR in %s (%02x, %s), retry #%d, port1 %08x\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 693 | usb_otg_state_string(musb->xceiv->otg->state), |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 694 | devctl, |
| 695 | ({ char *s; |
| 696 | switch (devctl & MUSB_DEVCTL_VBUS) { |
| 697 | case 0 << MUSB_DEVCTL_VBUS_SHIFT: |
| 698 | s = "<SessEnd"; break; |
| 699 | case 1 << MUSB_DEVCTL_VBUS_SHIFT: |
| 700 | s = "<AValid"; break; |
| 701 | case 2 << MUSB_DEVCTL_VBUS_SHIFT: |
| 702 | s = "<VBusValid"; break; |
| 703 | /* case 3 << MUSB_DEVCTL_VBUS_SHIFT: */ |
| 704 | default: |
| 705 | s = "VALID"; break; |
Joe Perches | 2b84f92 | 2013-10-08 16:01:37 -0700 | [diff] [blame] | 706 | } s; }), |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 707 | VBUSERR_RETRY_COUNT - musb->vbuserr_retry, |
| 708 | musb->port1_status); |
| 709 | |
| 710 | /* go through A_WAIT_VFALL then start a new session */ |
| 711 | if (!ignore) |
Felipe Balbi | 743411b | 2010-12-01 13:22:05 +0200 | [diff] [blame] | 712 | musb_platform_set_vbus(musb, 0); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 713 | handled = IRQ_HANDLED; |
| 714 | } |
| 715 | |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 716 | if (int_usb & MUSB_INTR_SUSPEND) { |
Sebastian Andrzej Siewior | b11e94d | 2012-10-30 19:52:23 +0100 | [diff] [blame] | 717 | dev_dbg(musb->controller, "SUSPEND (%s) devctl %02x\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 718 | usb_otg_state_string(musb->xceiv->otg->state), devctl); |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 719 | handled = IRQ_HANDLED; |
| 720 | |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 721 | switch (musb->xceiv->otg->state) { |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 722 | case OTG_STATE_A_PERIPHERAL: |
| 723 | /* We also come here if the cable is removed, since |
| 724 | * this silicon doesn't report ID-no-longer-grounded. |
| 725 | * |
| 726 | * We depend on T(a_wait_bcon) to shut us down, and |
| 727 | * hope users don't do anything dicey during this |
| 728 | * undesired detour through A_WAIT_BCON. |
| 729 | */ |
| 730 | musb_hnp_stop(musb); |
Daniel Mack | 0b3eba4 | 2013-04-10 21:55:42 +0200 | [diff] [blame] | 731 | musb_host_resume_root_hub(musb); |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 732 | musb_root_disconnect(musb); |
| 733 | musb_platform_try_idle(musb, jiffies |
| 734 | + msecs_to_jiffies(musb->a_wait_bcon |
| 735 | ? : OTG_TIME_A_WAIT_BCON)); |
| 736 | |
| 737 | break; |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 738 | case OTG_STATE_B_IDLE: |
| 739 | if (!musb->is_active) |
| 740 | break; |
| 741 | case OTG_STATE_B_PERIPHERAL: |
| 742 | musb_g_suspend(musb); |
Felipe Balbi | eee3f15 | 2014-02-25 10:58:43 -0600 | [diff] [blame] | 743 | musb->is_active = musb->g.b_hnp_enable; |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 744 | if (musb->is_active) { |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 745 | musb->xceiv->otg->state = OTG_STATE_B_WAIT_ACON; |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 746 | dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n"); |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 747 | mod_timer(&musb->otg_timer, jiffies |
| 748 | + msecs_to_jiffies( |
| 749 | OTG_TIME_B_ASE0_BRST)); |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 750 | } |
| 751 | break; |
| 752 | case OTG_STATE_A_WAIT_BCON: |
| 753 | if (musb->a_wait_bcon != 0) |
| 754 | musb_platform_try_idle(musb, jiffies |
| 755 | + msecs_to_jiffies(musb->a_wait_bcon)); |
| 756 | break; |
| 757 | case OTG_STATE_A_HOST: |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 758 | musb->xceiv->otg->state = OTG_STATE_A_SUSPEND; |
Felipe Balbi | eee3f15 | 2014-02-25 10:58:43 -0600 | [diff] [blame] | 759 | musb->is_active = musb->hcd->self.b_hnp_enable; |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 760 | break; |
| 761 | case OTG_STATE_B_HOST: |
| 762 | /* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */ |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 763 | dev_dbg(musb->controller, "REVISIT: SUSPEND as B_HOST\n"); |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 764 | break; |
| 765 | default: |
| 766 | /* "should not happen" */ |
| 767 | musb->is_active = 0; |
| 768 | break; |
| 769 | } |
| 770 | } |
| 771 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 772 | if (int_usb & MUSB_INTR_CONNECT) { |
Daniel Mack | 8b125df | 2013-04-10 21:55:50 +0200 | [diff] [blame] | 773 | struct usb_hcd *hcd = musb->hcd; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 774 | |
| 775 | handled = IRQ_HANDLED; |
| 776 | musb->is_active = 1; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 777 | |
| 778 | musb->ep0_stage = MUSB_EP0_START; |
| 779 | |
Sebastian Andrzej Siewior | b18d26f | 2012-10-30 19:52:26 +0100 | [diff] [blame] | 780 | musb->intrtxe = musb->epmask; |
| 781 | musb_writew(musb->mregs, MUSB_INTRTXE, musb->intrtxe); |
Sebastian Andrzej Siewior | af5ec14 | 2012-10-30 19:52:25 +0100 | [diff] [blame] | 782 | musb->intrrxe = musb->epmask & 0xfffe; |
| 783 | musb_writew(musb->mregs, MUSB_INTRRXE, musb->intrrxe); |
Ajay Kumar Gupta | d709d22 | 2010-07-08 14:03:00 +0530 | [diff] [blame] | 784 | musb_writeb(musb->mregs, MUSB_INTRUSBE, 0xf7); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 785 | musb->port1_status &= ~(USB_PORT_STAT_LOW_SPEED |
| 786 | |USB_PORT_STAT_HIGH_SPEED |
| 787 | |USB_PORT_STAT_ENABLE |
| 788 | ); |
| 789 | musb->port1_status |= USB_PORT_STAT_CONNECTION |
| 790 | |(USB_PORT_STAT_C_CONNECTION << 16); |
| 791 | |
| 792 | /* high vs full speed is just a guess until after reset */ |
| 793 | if (devctl & MUSB_DEVCTL_LSDEV) |
| 794 | musb->port1_status |= USB_PORT_STAT_LOW_SPEED; |
| 795 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 796 | /* indicate new connection to OTG machine */ |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 797 | switch (musb->xceiv->otg->state) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 798 | case OTG_STATE_B_PERIPHERAL: |
| 799 | if (int_usb & MUSB_INTR_SUSPEND) { |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 800 | dev_dbg(musb->controller, "HNP: SUSPEND+CONNECT, now b_host\n"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 801 | int_usb &= ~MUSB_INTR_SUSPEND; |
David Brownell | 1de00da | 2009-04-02 10:16:11 -0700 | [diff] [blame] | 802 | goto b_host; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 803 | } else |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 804 | dev_dbg(musb->controller, "CONNECT as b_peripheral???\n"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 805 | break; |
| 806 | case OTG_STATE_B_WAIT_ACON: |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 807 | dev_dbg(musb->controller, "HNP: CONNECT, now b_host\n"); |
David Brownell | 1de00da | 2009-04-02 10:16:11 -0700 | [diff] [blame] | 808 | b_host: |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 809 | musb->xceiv->otg->state = OTG_STATE_B_HOST; |
Daniel Mack | 74c2e93 | 2013-04-10 21:55:45 +0200 | [diff] [blame] | 810 | if (musb->hcd) |
| 811 | musb->hcd->self.is_b_host = 1; |
David Brownell | 1de00da | 2009-04-02 10:16:11 -0700 | [diff] [blame] | 812 | del_timer(&musb->otg_timer); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 813 | break; |
| 814 | default: |
| 815 | if ((devctl & MUSB_DEVCTL_VBUS) |
| 816 | == (3 << MUSB_DEVCTL_VBUS_SHIFT)) { |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 817 | musb->xceiv->otg->state = OTG_STATE_A_HOST; |
Daniel Mack | 0b3eba4 | 2013-04-10 21:55:42 +0200 | [diff] [blame] | 818 | if (hcd) |
| 819 | hcd->self.is_b_host = 0; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 820 | } |
| 821 | break; |
| 822 | } |
David Brownell | 1de00da | 2009-04-02 10:16:11 -0700 | [diff] [blame] | 823 | |
Daniel Mack | 0b3eba4 | 2013-04-10 21:55:42 +0200 | [diff] [blame] | 824 | musb_host_poke_root_hub(musb); |
David Brownell | 1de00da | 2009-04-02 10:16:11 -0700 | [diff] [blame] | 825 | |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 826 | dev_dbg(musb->controller, "CONNECT (%s) devctl %02x\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 827 | usb_otg_state_string(musb->xceiv->otg->state), devctl); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 828 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 829 | |
Felipe Balbi | 6d34967 | 2013-04-29 12:02:24 +0300 | [diff] [blame] | 830 | if (int_usb & MUSB_INTR_DISCONNECT) { |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 831 | dev_dbg(musb->controller, "DISCONNECT (%s) as %s, devctl %02x\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 832 | usb_otg_state_string(musb->xceiv->otg->state), |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 833 | MUSB_MODE(musb), devctl); |
| 834 | handled = IRQ_HANDLED; |
| 835 | |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 836 | switch (musb->xceiv->otg->state) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 837 | case OTG_STATE_A_HOST: |
| 838 | case OTG_STATE_A_SUSPEND: |
Daniel Mack | 0b3eba4 | 2013-04-10 21:55:42 +0200 | [diff] [blame] | 839 | musb_host_resume_root_hub(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 840 | musb_root_disconnect(musb); |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 841 | if (musb->a_wait_bcon != 0) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 842 | musb_platform_try_idle(musb, jiffies |
| 843 | + msecs_to_jiffies(musb->a_wait_bcon)); |
| 844 | break; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 845 | case OTG_STATE_B_HOST: |
David Brownell | ab983f2a | 2009-03-31 12:35:09 -0700 | [diff] [blame] | 846 | /* REVISIT this behaves for "real disconnect" |
| 847 | * cases; make sure the other transitions from |
| 848 | * from B_HOST act right too. The B_HOST code |
| 849 | * in hnp_stop() is currently not used... |
| 850 | */ |
| 851 | musb_root_disconnect(musb); |
Daniel Mack | 74c2e93 | 2013-04-10 21:55:45 +0200 | [diff] [blame] | 852 | if (musb->hcd) |
| 853 | musb->hcd->self.is_b_host = 0; |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 854 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
David Brownell | ab983f2a | 2009-03-31 12:35:09 -0700 | [diff] [blame] | 855 | MUSB_DEV_MODE(musb); |
| 856 | musb_g_disconnect(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 857 | break; |
| 858 | case OTG_STATE_A_PERIPHERAL: |
| 859 | musb_hnp_stop(musb); |
| 860 | musb_root_disconnect(musb); |
| 861 | /* FALLTHROUGH */ |
| 862 | case OTG_STATE_B_WAIT_ACON: |
| 863 | /* FALLTHROUGH */ |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 864 | case OTG_STATE_B_PERIPHERAL: |
| 865 | case OTG_STATE_B_IDLE: |
| 866 | musb_g_disconnect(musb); |
| 867 | break; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 868 | default: |
| 869 | WARNING("unhandled DISCONNECT transition (%s)\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 870 | usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 871 | break; |
| 872 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 873 | } |
| 874 | |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 875 | /* mentor saves a bit: bus reset and babble share the same irq. |
| 876 | * only host sees babble; only peripheral sees bus reset. |
| 877 | */ |
| 878 | if (int_usb & MUSB_INTR_RESET) { |
| 879 | handled = IRQ_HANDLED; |
Felipe Balbi | 896f7ea | 2015-02-25 14:03:23 -0600 | [diff] [blame] | 880 | if (devctl & MUSB_DEVCTL_HM) { |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 881 | /* |
Felipe Balbi | 34754de | 2015-02-26 14:43:57 -0600 | [diff] [blame] | 882 | * When BABBLE happens what we can depends on which |
Felipe Balbi | 28378d5 | 2015-02-26 10:54:27 -0600 | [diff] [blame] | 883 | * platform MUSB is running, because some platforms |
| 884 | * implemented proprietary means for 'recovering' from |
| 885 | * Babble conditions. One such platform is AM335x. In |
Felipe Balbi | 34754de | 2015-02-26 14:43:57 -0600 | [diff] [blame] | 886 | * most cases, however, the only thing we can do is |
| 887 | * drop the session. |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 888 | */ |
Felipe Balbi | 34754de | 2015-02-26 14:43:57 -0600 | [diff] [blame] | 889 | dev_err(musb->controller, "Babble\n"); |
Felipe Balbi | d0fc0a2 | 2015-02-25 14:07:52 -0600 | [diff] [blame] | 890 | |
Felipe Balbi | 34754de | 2015-02-26 14:43:57 -0600 | [diff] [blame] | 891 | if (is_host_active(musb)) |
| 892 | musb_recover_from_babble(musb); |
Felipe Balbi | a04d46d | 2011-11-24 15:46:27 +0200 | [diff] [blame] | 893 | } else { |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 894 | dev_dbg(musb->controller, "BUS RESET as %s\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 895 | usb_otg_state_string(musb->xceiv->otg->state)); |
| 896 | switch (musb->xceiv->otg->state) { |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 897 | case OTG_STATE_A_SUSPEND: |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 898 | musb_g_reset(musb); |
| 899 | /* FALLTHROUGH */ |
| 900 | case OTG_STATE_A_WAIT_BCON: /* OPT TD.4.7-900ms */ |
| 901 | /* never use invalid T(a_wait_bcon) */ |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 902 | dev_dbg(musb->controller, "HNP: in %s, %d msec timeout\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 903 | usb_otg_state_string(musb->xceiv->otg->state), |
Anatolij Gustschin | 3df0045 | 2011-05-05 12:11:21 +0200 | [diff] [blame] | 904 | TA_WAIT_BCON(musb)); |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 905 | mod_timer(&musb->otg_timer, jiffies |
| 906 | + msecs_to_jiffies(TA_WAIT_BCON(musb))); |
| 907 | break; |
| 908 | case OTG_STATE_A_PERIPHERAL: |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 909 | del_timer(&musb->otg_timer); |
| 910 | musb_g_reset(musb); |
| 911 | break; |
| 912 | case OTG_STATE_B_WAIT_ACON: |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 913 | dev_dbg(musb->controller, "HNP: RESET (%s), to b_peripheral\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 914 | usb_otg_state_string(musb->xceiv->otg->state)); |
| 915 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 916 | musb_g_reset(musb); |
| 917 | break; |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 918 | case OTG_STATE_B_IDLE: |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 919 | musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL; |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 920 | /* FALLTHROUGH */ |
| 921 | case OTG_STATE_B_PERIPHERAL: |
| 922 | musb_g_reset(musb); |
| 923 | break; |
| 924 | default: |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 925 | dev_dbg(musb->controller, "Unhandled BUS RESET as %s\n", |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 926 | usb_otg_state_string(musb->xceiv->otg->state)); |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 927 | } |
| 928 | } |
| 929 | } |
| 930 | |
| 931 | #if 0 |
| 932 | /* REVISIT ... this would be for multiplexing periodic endpoints, or |
| 933 | * supporting transfer phasing to prevent exceeding ISO bandwidth |
| 934 | * limits of a given frame or microframe. |
| 935 | * |
| 936 | * It's not needed for peripheral side, which dedicates endpoints; |
| 937 | * though it _might_ use SOF irqs for other purposes. |
| 938 | * |
| 939 | * And it's not currently needed for host side, which also dedicates |
| 940 | * endpoints, relies on TX/RX interval registers, and isn't claimed |
| 941 | * to support ISO transfers yet. |
| 942 | */ |
| 943 | if (int_usb & MUSB_INTR_SOF) { |
| 944 | void __iomem *mbase = musb->mregs; |
| 945 | struct musb_hw_ep *ep; |
| 946 | u8 epnum; |
| 947 | u16 frame; |
| 948 | |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 949 | dev_dbg(musb->controller, "START_OF_FRAME\n"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 950 | handled = IRQ_HANDLED; |
| 951 | |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 952 | /* start any periodic Tx transfers waiting for current frame */ |
| 953 | frame = musb_readw(mbase, MUSB_FRAME); |
| 954 | ep = musb->endpoints; |
| 955 | for (epnum = 1; (epnum < musb->nr_endpoints) |
| 956 | && (musb->epmask >= (1 << epnum)); |
| 957 | epnum++, ep++) { |
| 958 | /* |
| 959 | * FIXME handle framecounter wraps (12 bits) |
| 960 | * eliminate duplicated StartUrb logic |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 961 | */ |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 962 | if (ep->dwWaitFrame >= frame) { |
| 963 | ep->dwWaitFrame = 0; |
| 964 | pr_debug("SOF --> periodic TX%s on %d\n", |
| 965 | ep->tx_channel ? " DMA" : "", |
| 966 | epnum); |
| 967 | if (!ep->tx_channel) |
| 968 | musb_h_tx_start(musb, epnum); |
| 969 | else |
| 970 | cppi_hostdma_start(musb, epnum); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 971 | } |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 972 | } /* end of for loop */ |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 973 | } |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 974 | #endif |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 975 | |
Arnaud Mandy | 1c25fda | 2009-12-28 13:40:40 +0200 | [diff] [blame] | 976 | schedule_work(&musb->irq_work); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 977 | |
| 978 | return handled; |
| 979 | } |
| 980 | |
| 981 | /*-------------------------------------------------------------------------*/ |
| 982 | |
Felipe Balbi | e1eb3eb | 2015-02-26 11:26:09 -0600 | [diff] [blame] | 983 | static void musb_disable_interrupts(struct musb *musb) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 984 | { |
| 985 | void __iomem *mbase = musb->mregs; |
| 986 | u16 temp; |
| 987 | |
| 988 | /* disable interrupts */ |
| 989 | musb_writeb(mbase, MUSB_INTRUSBE, 0); |
Sebastian Andrzej Siewior | b18d26f | 2012-10-30 19:52:26 +0100 | [diff] [blame] | 990 | musb->intrtxe = 0; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 991 | musb_writew(mbase, MUSB_INTRTXE, 0); |
Sebastian Andrzej Siewior | af5ec14 | 2012-10-30 19:52:25 +0100 | [diff] [blame] | 992 | musb->intrrxe = 0; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 993 | musb_writew(mbase, MUSB_INTRRXE, 0); |
| 994 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 995 | /* flush pending interrupts */ |
| 996 | temp = musb_readb(mbase, MUSB_INTRUSB); |
| 997 | temp = musb_readw(mbase, MUSB_INTRTX); |
| 998 | temp = musb_readw(mbase, MUSB_INTRRX); |
Felipe Balbi | e1eb3eb | 2015-02-26 11:26:09 -0600 | [diff] [blame] | 999 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1000 | |
Felipe Balbi | e1eb3eb | 2015-02-26 11:26:09 -0600 | [diff] [blame] | 1001 | static void musb_enable_interrupts(struct musb *musb) |
| 1002 | { |
| 1003 | void __iomem *regs = musb->mregs; |
| 1004 | |
| 1005 | /* Set INT enable registers, enable interrupts */ |
| 1006 | musb->intrtxe = musb->epmask; |
| 1007 | musb_writew(regs, MUSB_INTRTXE, musb->intrtxe); |
| 1008 | musb->intrrxe = musb->epmask & 0xfffe; |
| 1009 | musb_writew(regs, MUSB_INTRRXE, musb->intrrxe); |
| 1010 | musb_writeb(regs, MUSB_INTRUSBE, 0xf7); |
| 1011 | |
| 1012 | } |
| 1013 | |
| 1014 | static void musb_generic_disable(struct musb *musb) |
| 1015 | { |
| 1016 | void __iomem *mbase = musb->mregs; |
| 1017 | |
| 1018 | musb_disable_interrupts(musb); |
| 1019 | |
| 1020 | /* off */ |
| 1021 | musb_writeb(mbase, MUSB_DEVCTL, 0); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1022 | } |
| 1023 | |
| 1024 | /* |
Sebastian Andrzej Siewior | 001dd84 | 2013-10-11 10:38:13 +0200 | [diff] [blame] | 1025 | * Program the HDRC to start (enable interrupts, dma, etc.). |
| 1026 | */ |
| 1027 | void musb_start(struct musb *musb) |
| 1028 | { |
| 1029 | void __iomem *regs = musb->mregs; |
| 1030 | u8 devctl = musb_readb(regs, MUSB_DEVCTL); |
| 1031 | |
| 1032 | dev_dbg(musb->controller, "<== devctl %02x\n", devctl); |
| 1033 | |
Felipe Balbi | e1eb3eb | 2015-02-26 11:26:09 -0600 | [diff] [blame] | 1034 | musb_enable_interrupts(musb); |
Sebastian Andrzej Siewior | 001dd84 | 2013-10-11 10:38:13 +0200 | [diff] [blame] | 1035 | musb_writeb(regs, MUSB_TESTMODE, 0); |
| 1036 | |
| 1037 | /* put into basic highspeed mode and start session */ |
| 1038 | musb_writeb(regs, MUSB_POWER, MUSB_POWER_ISOUPDATE |
| 1039 | | MUSB_POWER_HSENAB |
| 1040 | /* ENSUSPEND wedges tusb */ |
| 1041 | /* | MUSB_POWER_ENSUSPEND */ |
| 1042 | ); |
| 1043 | |
| 1044 | musb->is_active = 0; |
| 1045 | devctl = musb_readb(regs, MUSB_DEVCTL); |
| 1046 | devctl &= ~MUSB_DEVCTL_SESSION; |
| 1047 | |
| 1048 | /* session started after: |
| 1049 | * (a) ID-grounded irq, host mode; |
| 1050 | * (b) vbus present/connect IRQ, peripheral mode; |
| 1051 | * (c) peripheral initiates, using SRP |
| 1052 | */ |
| 1053 | if (musb->port_mode != MUSB_PORT_MODE_HOST && |
| 1054 | (devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) { |
| 1055 | musb->is_active = 1; |
| 1056 | } else { |
| 1057 | devctl |= MUSB_DEVCTL_SESSION; |
| 1058 | } |
| 1059 | |
| 1060 | musb_platform_enable(musb); |
| 1061 | musb_writeb(regs, MUSB_DEVCTL, devctl); |
| 1062 | } |
| 1063 | |
| 1064 | /* |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1065 | * Make the HDRC stop (disable interrupts, etc.); |
| 1066 | * reversible by musb_start |
| 1067 | * called on gadget driver unregister |
| 1068 | * with controller locked, irqs blocked |
| 1069 | * acts as a NOP unless some role activated the hardware |
| 1070 | */ |
| 1071 | void musb_stop(struct musb *musb) |
| 1072 | { |
| 1073 | /* stop IRQs, timers, ... */ |
| 1074 | musb_platform_disable(musb); |
| 1075 | musb_generic_disable(musb); |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 1076 | dev_dbg(musb->controller, "HDRC disabled\n"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1077 | |
| 1078 | /* FIXME |
| 1079 | * - mark host and/or peripheral drivers unusable/inactive |
| 1080 | * - disable DMA (and enable it in HdrcStart) |
| 1081 | * - make sure we can musb_start() after musb_stop(); with |
| 1082 | * OTG mode, gadget driver module rmmod/modprobe cycles that |
| 1083 | * - ... |
| 1084 | */ |
| 1085 | musb_platform_try_idle(musb, 0); |
| 1086 | } |
| 1087 | |
| 1088 | static void musb_shutdown(struct platform_device *pdev) |
| 1089 | { |
| 1090 | struct musb *musb = dev_to_musb(&pdev->dev); |
| 1091 | unsigned long flags; |
| 1092 | |
Hema HK | 4f9edd2 | 2011-03-22 16:02:12 +0530 | [diff] [blame] | 1093 | pm_runtime_get_sync(musb->controller); |
Grazvydas Ignotas | 24307ca | 2012-01-12 15:22:45 +0200 | [diff] [blame] | 1094 | |
Daniel Mack | 2cc65fe | 2013-04-10 21:55:47 +0200 | [diff] [blame] | 1095 | musb_host_cleanup(musb); |
Grazvydas Ignotas | 24307ca | 2012-01-12 15:22:45 +0200 | [diff] [blame] | 1096 | musb_gadget_cleanup(musb); |
| 1097 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1098 | spin_lock_irqsave(&musb->lock, flags); |
| 1099 | musb_platform_disable(musb); |
| 1100 | musb_generic_disable(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1101 | spin_unlock_irqrestore(&musb->lock, flags); |
| 1102 | |
Grazvydas Ignotas | 120d074 | 2010-10-10 13:52:22 -0500 | [diff] [blame] | 1103 | musb_writeb(musb->mregs, MUSB_DEVCTL, 0); |
| 1104 | musb_platform_exit(musb); |
Grazvydas Ignotas | 120d074 | 2010-10-10 13:52:22 -0500 | [diff] [blame] | 1105 | |
Hema HK | 4f9edd2 | 2011-03-22 16:02:12 +0530 | [diff] [blame] | 1106 | pm_runtime_put(musb->controller); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1107 | /* FIXME power down */ |
| 1108 | } |
| 1109 | |
| 1110 | |
| 1111 | /*-------------------------------------------------------------------------*/ |
| 1112 | |
| 1113 | /* |
| 1114 | * The silicon either has hard-wired endpoint configurations, or else |
| 1115 | * "dynamic fifo" sizing. The driver has support for both, though at this |
David Brownell | c767c1c | 2008-09-11 11:53:23 +0300 | [diff] [blame] | 1116 | * writing only the dynamic sizing is very well tested. Since we switched |
| 1117 | * away from compile-time hardware parameters, we can no longer rely on |
| 1118 | * dead code elimination to leave only the relevant one in the object file. |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1119 | * |
| 1120 | * We don't currently use dynamic fifo setup capability to do anything |
| 1121 | * more than selecting one of a bunch of predefined configurations. |
| 1122 | */ |
Tony Lindgren | 8a77f05 | 2014-11-24 11:05:04 -0800 | [diff] [blame] | 1123 | static ushort fifo_mode; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1124 | |
| 1125 | /* "modprobe ... fifo_mode=1" etc */ |
| 1126 | module_param(fifo_mode, ushort, 0); |
| 1127 | MODULE_PARM_DESC(fifo_mode, "initial endpoint configuration"); |
| 1128 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1129 | /* |
| 1130 | * tables defining fifo_mode values. define more if you like. |
| 1131 | * for host side, make sure both halves of ep1 are set up. |
| 1132 | */ |
| 1133 | |
| 1134 | /* mode 0 - fits in 2KB */ |
Bill Pemberton | d3608b6 | 2012-11-19 13:24:34 -0500 | [diff] [blame] | 1135 | static struct musb_fifo_cfg mode_0_cfg[] = { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1136 | { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, |
| 1137 | { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, |
| 1138 | { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, }, |
| 1139 | { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, }, |
| 1140 | { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, }, |
| 1141 | }; |
| 1142 | |
| 1143 | /* mode 1 - fits in 4KB */ |
Bill Pemberton | d3608b6 | 2012-11-19 13:24:34 -0500 | [diff] [blame] | 1144 | static struct musb_fifo_cfg mode_1_cfg[] = { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1145 | { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, }, |
| 1146 | { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, }, |
| 1147 | { .hw_ep_num = 2, .style = FIFO_RXTX, .maxpacket = 512, .mode = BUF_DOUBLE, }, |
| 1148 | { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, }, |
| 1149 | { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, }, |
| 1150 | }; |
| 1151 | |
| 1152 | /* mode 2 - fits in 4KB */ |
Bill Pemberton | d3608b6 | 2012-11-19 13:24:34 -0500 | [diff] [blame] | 1153 | static struct musb_fifo_cfg mode_2_cfg[] = { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1154 | { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, |
| 1155 | { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, |
| 1156 | { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, |
| 1157 | { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, |
| 1158 | { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, }, |
| 1159 | { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, }, |
| 1160 | }; |
| 1161 | |
| 1162 | /* mode 3 - fits in 4KB */ |
Bill Pemberton | d3608b6 | 2012-11-19 13:24:34 -0500 | [diff] [blame] | 1163 | static struct musb_fifo_cfg mode_3_cfg[] = { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1164 | { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, .mode = BUF_DOUBLE, }, |
| 1165 | { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, .mode = BUF_DOUBLE, }, |
| 1166 | { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, |
| 1167 | { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, |
| 1168 | { .hw_ep_num = 3, .style = FIFO_RXTX, .maxpacket = 256, }, |
| 1169 | { .hw_ep_num = 4, .style = FIFO_RXTX, .maxpacket = 256, }, |
| 1170 | }; |
| 1171 | |
| 1172 | /* mode 4 - fits in 16KB */ |
Bill Pemberton | d3608b6 | 2012-11-19 13:24:34 -0500 | [diff] [blame] | 1173 | static struct musb_fifo_cfg mode_4_cfg[] = { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1174 | { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, |
| 1175 | { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, |
| 1176 | { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, |
| 1177 | { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, |
| 1178 | { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, }, |
| 1179 | { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, }, |
| 1180 | { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, }, |
| 1181 | { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, }, |
| 1182 | { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, }, |
| 1183 | { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, }, |
| 1184 | { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 512, }, |
| 1185 | { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 512, }, |
| 1186 | { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 512, }, |
| 1187 | { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 512, }, |
| 1188 | { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 512, }, |
| 1189 | { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 512, }, |
| 1190 | { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 512, }, |
| 1191 | { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 512, }, |
Ajay Kumar Gupta | a483d70 | 2009-04-03 16:16:17 -0700 | [diff] [blame] | 1192 | { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 256, }, |
| 1193 | { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 64, }, |
| 1194 | { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 256, }, |
| 1195 | { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 64, }, |
| 1196 | { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 256, }, |
| 1197 | { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 64, }, |
| 1198 | { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 4096, }, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1199 | { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, }, |
| 1200 | { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, }, |
| 1201 | }; |
| 1202 | |
Ajay Kumar Gupta | 3b15152 | 2009-12-28 13:40:34 +0200 | [diff] [blame] | 1203 | /* mode 5 - fits in 8KB */ |
Bill Pemberton | d3608b6 | 2012-11-19 13:24:34 -0500 | [diff] [blame] | 1204 | static struct musb_fifo_cfg mode_5_cfg[] = { |
Ajay Kumar Gupta | 3b15152 | 2009-12-28 13:40:34 +0200 | [diff] [blame] | 1205 | { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, }, |
| 1206 | { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, }, |
| 1207 | { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 512, }, |
| 1208 | { .hw_ep_num = 2, .style = FIFO_RX, .maxpacket = 512, }, |
| 1209 | { .hw_ep_num = 3, .style = FIFO_TX, .maxpacket = 512, }, |
| 1210 | { .hw_ep_num = 3, .style = FIFO_RX, .maxpacket = 512, }, |
| 1211 | { .hw_ep_num = 4, .style = FIFO_TX, .maxpacket = 512, }, |
| 1212 | { .hw_ep_num = 4, .style = FIFO_RX, .maxpacket = 512, }, |
| 1213 | { .hw_ep_num = 5, .style = FIFO_TX, .maxpacket = 512, }, |
| 1214 | { .hw_ep_num = 5, .style = FIFO_RX, .maxpacket = 512, }, |
| 1215 | { .hw_ep_num = 6, .style = FIFO_TX, .maxpacket = 32, }, |
| 1216 | { .hw_ep_num = 6, .style = FIFO_RX, .maxpacket = 32, }, |
| 1217 | { .hw_ep_num = 7, .style = FIFO_TX, .maxpacket = 32, }, |
| 1218 | { .hw_ep_num = 7, .style = FIFO_RX, .maxpacket = 32, }, |
| 1219 | { .hw_ep_num = 8, .style = FIFO_TX, .maxpacket = 32, }, |
| 1220 | { .hw_ep_num = 8, .style = FIFO_RX, .maxpacket = 32, }, |
| 1221 | { .hw_ep_num = 9, .style = FIFO_TX, .maxpacket = 32, }, |
| 1222 | { .hw_ep_num = 9, .style = FIFO_RX, .maxpacket = 32, }, |
| 1223 | { .hw_ep_num = 10, .style = FIFO_TX, .maxpacket = 32, }, |
| 1224 | { .hw_ep_num = 10, .style = FIFO_RX, .maxpacket = 32, }, |
| 1225 | { .hw_ep_num = 11, .style = FIFO_TX, .maxpacket = 32, }, |
| 1226 | { .hw_ep_num = 11, .style = FIFO_RX, .maxpacket = 32, }, |
| 1227 | { .hw_ep_num = 12, .style = FIFO_TX, .maxpacket = 32, }, |
| 1228 | { .hw_ep_num = 12, .style = FIFO_RX, .maxpacket = 32, }, |
| 1229 | { .hw_ep_num = 13, .style = FIFO_RXTX, .maxpacket = 512, }, |
| 1230 | { .hw_ep_num = 14, .style = FIFO_RXTX, .maxpacket = 1024, }, |
| 1231 | { .hw_ep_num = 15, .style = FIFO_RXTX, .maxpacket = 1024, }, |
| 1232 | }; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1233 | |
| 1234 | /* |
| 1235 | * configure a fifo; for non-shared endpoints, this may be called |
| 1236 | * once for a tx fifo and once for an rx fifo. |
| 1237 | * |
| 1238 | * returns negative errno or offset for next fifo. |
| 1239 | */ |
Bill Pemberton | 41ac7b3 | 2012-11-19 13:21:48 -0500 | [diff] [blame] | 1240 | static int |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1241 | fifo_setup(struct musb *musb, struct musb_hw_ep *hw_ep, |
Felipe Balbi | e6c213b | 2010-03-12 10:29:06 +0200 | [diff] [blame] | 1242 | const struct musb_fifo_cfg *cfg, u16 offset) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1243 | { |
| 1244 | void __iomem *mbase = musb->mregs; |
| 1245 | int size = 0; |
| 1246 | u16 maxpacket = cfg->maxpacket; |
| 1247 | u16 c_off = offset >> 3; |
| 1248 | u8 c_size; |
| 1249 | |
| 1250 | /* expect hw_ep has already been zero-initialized */ |
| 1251 | |
| 1252 | size = ffs(max(maxpacket, (u16) 8)) - 1; |
| 1253 | maxpacket = 1 << size; |
| 1254 | |
| 1255 | c_size = size - 3; |
| 1256 | if (cfg->mode == BUF_DOUBLE) { |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1257 | if ((offset + (maxpacket << 1)) > |
| 1258 | (1 << (musb->config->ram_bits + 2))) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1259 | return -EMSGSIZE; |
| 1260 | c_size |= MUSB_FIFOSZ_DPB; |
| 1261 | } else { |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1262 | if ((offset + maxpacket) > (1 << (musb->config->ram_bits + 2))) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1263 | return -EMSGSIZE; |
| 1264 | } |
| 1265 | |
| 1266 | /* configure the FIFO */ |
| 1267 | musb_writeb(mbase, MUSB_INDEX, hw_ep->epnum); |
| 1268 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1269 | /* EP0 reserved endpoint for control, bidirectional; |
Rahul Bedarkar | 5ae477b | 2014-01-02 19:27:47 +0530 | [diff] [blame] | 1270 | * EP1 reserved for bulk, two unidirectional halves. |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1271 | */ |
| 1272 | if (hw_ep->epnum == 1) |
| 1273 | musb->bulk_ep = hw_ep; |
| 1274 | /* REVISIT error check: be sure ep0 can both rx and tx ... */ |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1275 | switch (cfg->style) { |
| 1276 | case FIFO_TX: |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 1277 | musb_write_txfifosz(mbase, c_size); |
| 1278 | musb_write_txfifoadd(mbase, c_off); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1279 | hw_ep->tx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); |
| 1280 | hw_ep->max_packet_sz_tx = maxpacket; |
| 1281 | break; |
| 1282 | case FIFO_RX: |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 1283 | musb_write_rxfifosz(mbase, c_size); |
| 1284 | musb_write_rxfifoadd(mbase, c_off); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1285 | hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); |
| 1286 | hw_ep->max_packet_sz_rx = maxpacket; |
| 1287 | break; |
| 1288 | case FIFO_RXTX: |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 1289 | musb_write_txfifosz(mbase, c_size); |
| 1290 | musb_write_txfifoadd(mbase, c_off); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1291 | hw_ep->rx_double_buffered = !!(c_size & MUSB_FIFOSZ_DPB); |
| 1292 | hw_ep->max_packet_sz_rx = maxpacket; |
| 1293 | |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 1294 | musb_write_rxfifosz(mbase, c_size); |
| 1295 | musb_write_rxfifoadd(mbase, c_off); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1296 | hw_ep->tx_double_buffered = hw_ep->rx_double_buffered; |
| 1297 | hw_ep->max_packet_sz_tx = maxpacket; |
| 1298 | |
| 1299 | hw_ep->is_shared_fifo = true; |
| 1300 | break; |
| 1301 | } |
| 1302 | |
| 1303 | /* NOTE rx and tx endpoint irqs aren't managed separately, |
| 1304 | * which happens to be ok |
| 1305 | */ |
| 1306 | musb->epmask |= (1 << hw_ep->epnum); |
| 1307 | |
| 1308 | return offset + (maxpacket << ((c_size & MUSB_FIFOSZ_DPB) ? 1 : 0)); |
| 1309 | } |
| 1310 | |
Bill Pemberton | d3608b6 | 2012-11-19 13:24:34 -0500 | [diff] [blame] | 1311 | static struct musb_fifo_cfg ep0_cfg = { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1312 | .style = FIFO_RXTX, .maxpacket = 64, |
| 1313 | }; |
| 1314 | |
Bill Pemberton | 41ac7b3 | 2012-11-19 13:21:48 -0500 | [diff] [blame] | 1315 | static int ep_config_from_table(struct musb *musb) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1316 | { |
Felipe Balbi | e6c213b | 2010-03-12 10:29:06 +0200 | [diff] [blame] | 1317 | const struct musb_fifo_cfg *cfg; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1318 | unsigned i, n; |
| 1319 | int offset; |
| 1320 | struct musb_hw_ep *hw_ep = musb->endpoints; |
| 1321 | |
Felipe Balbi | e6c213b | 2010-03-12 10:29:06 +0200 | [diff] [blame] | 1322 | if (musb->config->fifo_cfg) { |
| 1323 | cfg = musb->config->fifo_cfg; |
| 1324 | n = musb->config->fifo_cfg_size; |
| 1325 | goto done; |
| 1326 | } |
| 1327 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1328 | switch (fifo_mode) { |
| 1329 | default: |
| 1330 | fifo_mode = 0; |
| 1331 | /* FALLTHROUGH */ |
| 1332 | case 0: |
| 1333 | cfg = mode_0_cfg; |
| 1334 | n = ARRAY_SIZE(mode_0_cfg); |
| 1335 | break; |
| 1336 | case 1: |
| 1337 | cfg = mode_1_cfg; |
| 1338 | n = ARRAY_SIZE(mode_1_cfg); |
| 1339 | break; |
| 1340 | case 2: |
| 1341 | cfg = mode_2_cfg; |
| 1342 | n = ARRAY_SIZE(mode_2_cfg); |
| 1343 | break; |
| 1344 | case 3: |
| 1345 | cfg = mode_3_cfg; |
| 1346 | n = ARRAY_SIZE(mode_3_cfg); |
| 1347 | break; |
| 1348 | case 4: |
| 1349 | cfg = mode_4_cfg; |
| 1350 | n = ARRAY_SIZE(mode_4_cfg); |
| 1351 | break; |
Ajay Kumar Gupta | 3b15152 | 2009-12-28 13:40:34 +0200 | [diff] [blame] | 1352 | case 5: |
| 1353 | cfg = mode_5_cfg; |
| 1354 | n = ARRAY_SIZE(mode_5_cfg); |
| 1355 | break; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1356 | } |
| 1357 | |
| 1358 | printk(KERN_DEBUG "%s: setup fifo_mode %d\n", |
| 1359 | musb_driver_name, fifo_mode); |
| 1360 | |
| 1361 | |
Felipe Balbi | e6c213b | 2010-03-12 10:29:06 +0200 | [diff] [blame] | 1362 | done: |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1363 | offset = fifo_setup(musb, hw_ep, &ep0_cfg, 0); |
| 1364 | /* assert(offset > 0) */ |
| 1365 | |
| 1366 | /* NOTE: for RTL versions >= 1.400 EPINFO and RAMINFO would |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1367 | * be better than static musb->config->num_eps and DYN_FIFO_SIZE... |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1368 | */ |
| 1369 | |
| 1370 | for (i = 0; i < n; i++) { |
| 1371 | u8 epn = cfg->hw_ep_num; |
| 1372 | |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1373 | if (epn >= musb->config->num_eps) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1374 | pr_debug("%s: invalid ep %d\n", |
| 1375 | musb_driver_name, epn); |
David Brownell | bb1c9ef | 2008-11-24 13:06:50 +0200 | [diff] [blame] | 1376 | return -EINVAL; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1377 | } |
| 1378 | offset = fifo_setup(musb, hw_ep + epn, cfg++, offset); |
| 1379 | if (offset < 0) { |
| 1380 | pr_debug("%s: mem overrun, ep %d\n", |
| 1381 | musb_driver_name, epn); |
Shubhrajyoti D | f69dfa1 | 2012-08-07 19:56:31 +0530 | [diff] [blame] | 1382 | return offset; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1383 | } |
| 1384 | epn++; |
| 1385 | musb->nr_endpoints = max(epn, musb->nr_endpoints); |
| 1386 | } |
| 1387 | |
| 1388 | printk(KERN_DEBUG "%s: %d/%d max ep, %d/%d memory\n", |
| 1389 | musb_driver_name, |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1390 | n + 1, musb->config->num_eps * 2 - 1, |
| 1391 | offset, (1 << (musb->config->ram_bits + 2))); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1392 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1393 | if (!musb->bulk_ep) { |
| 1394 | pr_debug("%s: missing bulk\n", musb_driver_name); |
| 1395 | return -EINVAL; |
| 1396 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1397 | |
| 1398 | return 0; |
| 1399 | } |
| 1400 | |
| 1401 | |
| 1402 | /* |
| 1403 | * ep_config_from_hw - when MUSB_C_DYNFIFO_DEF is false |
| 1404 | * @param musb the controller |
| 1405 | */ |
Bill Pemberton | 41ac7b3 | 2012-11-19 13:21:48 -0500 | [diff] [blame] | 1406 | static int ep_config_from_hw(struct musb *musb) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1407 | { |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 1408 | u8 epnum = 0; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1409 | struct musb_hw_ep *hw_ep; |
Felipe Balbi | a156544 | 2012-08-07 14:00:50 +0300 | [diff] [blame] | 1410 | void __iomem *mbase = musb->mregs; |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 1411 | int ret = 0; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1412 | |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 1413 | dev_dbg(musb->controller, "<== static silicon ep config\n"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1414 | |
| 1415 | /* FIXME pick up ep0 maxpacket size */ |
| 1416 | |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1417 | for (epnum = 1; epnum < musb->config->num_eps; epnum++) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1418 | musb_ep_select(mbase, epnum); |
| 1419 | hw_ep = musb->endpoints + epnum; |
| 1420 | |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 1421 | ret = musb_read_fifosize(musb, hw_ep, epnum); |
| 1422 | if (ret < 0) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1423 | break; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1424 | |
| 1425 | /* FIXME set up hw_ep->{rx,tx}_double_buffered */ |
| 1426 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1427 | /* pick an RX/TX endpoint for bulk */ |
| 1428 | if (hw_ep->max_packet_sz_tx < 512 |
| 1429 | || hw_ep->max_packet_sz_rx < 512) |
| 1430 | continue; |
| 1431 | |
| 1432 | /* REVISIT: this algorithm is lazy, we should at least |
| 1433 | * try to pick a double buffered endpoint. |
| 1434 | */ |
| 1435 | if (musb->bulk_ep) |
| 1436 | continue; |
| 1437 | musb->bulk_ep = hw_ep; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1438 | } |
| 1439 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1440 | if (!musb->bulk_ep) { |
| 1441 | pr_debug("%s: missing bulk\n", musb_driver_name); |
| 1442 | return -EINVAL; |
| 1443 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1444 | |
| 1445 | return 0; |
| 1446 | } |
| 1447 | |
| 1448 | enum { MUSB_CONTROLLER_MHDRC, MUSB_CONTROLLER_HDRC, }; |
| 1449 | |
| 1450 | /* Initialize MUSB (M)HDRC part of the USB hardware subsystem; |
| 1451 | * configure endpoints, or take their config from silicon |
| 1452 | */ |
Bill Pemberton | 41ac7b3 | 2012-11-19 13:21:48 -0500 | [diff] [blame] | 1453 | static int musb_core_init(u16 musb_type, struct musb *musb) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1454 | { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1455 | u8 reg; |
| 1456 | char *type; |
Maulik Mankad | 0ea52ff | 2009-12-22 16:19:53 +0530 | [diff] [blame] | 1457 | char aInfo[90], aRevision[32], aDate[12]; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1458 | void __iomem *mbase = musb->mregs; |
| 1459 | int status = 0; |
| 1460 | int i; |
| 1461 | |
| 1462 | /* log core options (read using indexed model) */ |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 1463 | reg = musb_read_configdata(mbase); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1464 | |
| 1465 | strcpy(aInfo, (reg & MUSB_CONFIGDATA_UTMIDW) ? "UTMI-16" : "UTMI-8"); |
Ajay Kumar Gupta | 51bf0d0 | 2009-12-28 13:40:41 +0200 | [diff] [blame] | 1466 | if (reg & MUSB_CONFIGDATA_DYNFIFO) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1467 | strcat(aInfo, ", dyn FIFOs"); |
Ajay Kumar Gupta | 51bf0d0 | 2009-12-28 13:40:41 +0200 | [diff] [blame] | 1468 | musb->dyn_fifo = true; |
| 1469 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1470 | if (reg & MUSB_CONFIGDATA_MPRXE) { |
| 1471 | strcat(aInfo, ", bulk combine"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1472 | musb->bulk_combine = true; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1473 | } |
| 1474 | if (reg & MUSB_CONFIGDATA_MPTXE) { |
| 1475 | strcat(aInfo, ", bulk split"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1476 | musb->bulk_split = true; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1477 | } |
| 1478 | if (reg & MUSB_CONFIGDATA_HBRXE) { |
| 1479 | strcat(aInfo, ", HB-ISO Rx"); |
Ajay Kumar Gupta | a483d70 | 2009-04-03 16:16:17 -0700 | [diff] [blame] | 1480 | musb->hb_iso_rx = true; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1481 | } |
| 1482 | if (reg & MUSB_CONFIGDATA_HBTXE) { |
| 1483 | strcat(aInfo, ", HB-ISO Tx"); |
Ajay Kumar Gupta | a483d70 | 2009-04-03 16:16:17 -0700 | [diff] [blame] | 1484 | musb->hb_iso_tx = true; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1485 | } |
| 1486 | if (reg & MUSB_CONFIGDATA_SOFTCONE) |
| 1487 | strcat(aInfo, ", SoftConn"); |
| 1488 | |
| 1489 | printk(KERN_DEBUG "%s: ConfigData=0x%02x (%s)\n", |
| 1490 | musb_driver_name, reg, aInfo); |
| 1491 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1492 | aDate[0] = 0; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1493 | if (MUSB_CONTROLLER_MHDRC == musb_type) { |
| 1494 | musb->is_multipoint = 1; |
| 1495 | type = "M"; |
| 1496 | } else { |
| 1497 | musb->is_multipoint = 0; |
| 1498 | type = ""; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1499 | #ifndef CONFIG_USB_OTG_BLACKLIST_HUB |
| 1500 | printk(KERN_ERR |
| 1501 | "%s: kernel must blacklist external hubs\n", |
| 1502 | musb_driver_name); |
| 1503 | #endif |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1504 | } |
| 1505 | |
| 1506 | /* log release info */ |
Anand Gadiyar | 32c3b94 | 2009-11-16 21:09:21 +0530 | [diff] [blame] | 1507 | musb->hwvers = musb_read_hwvers(mbase); |
| 1508 | snprintf(aRevision, 32, "%d.%d%s", MUSB_HWVERS_MAJOR(musb->hwvers), |
| 1509 | MUSB_HWVERS_MINOR(musb->hwvers), |
| 1510 | (musb->hwvers & MUSB_HWVERS_RC) ? "RC" : ""); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1511 | printk(KERN_DEBUG "%s: %sHDRC RTL version %s %s\n", |
| 1512 | musb_driver_name, type, aRevision, aDate); |
| 1513 | |
| 1514 | /* configure ep0 */ |
Bryan Wu | c6cf8b0 | 2008-12-02 21:33:48 +0200 | [diff] [blame] | 1515 | musb_configure_ep0(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1516 | |
| 1517 | /* discover endpoint configuration */ |
| 1518 | musb->nr_endpoints = 1; |
| 1519 | musb->epmask = 1; |
| 1520 | |
Felipe Balbi | ad517e9e | 2010-01-21 15:33:54 +0200 | [diff] [blame] | 1521 | if (musb->dyn_fifo) |
| 1522 | status = ep_config_from_table(musb); |
| 1523 | else |
| 1524 | status = ep_config_from_hw(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1525 | |
| 1526 | if (status < 0) |
| 1527 | return status; |
| 1528 | |
| 1529 | /* finish init, and print endpoint config */ |
| 1530 | for (i = 0; i < musb->nr_endpoints; i++) { |
| 1531 | struct musb_hw_ep *hw_ep = musb->endpoints + i; |
| 1532 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 1533 | hw_ep->fifo = musb->io.fifo_offset(i) + mbase; |
Tony Lindgren | ebf3992 | 2014-11-24 11:05:06 -0800 | [diff] [blame] | 1534 | #if IS_ENABLED(CONFIG_USB_MUSB_TUSB6010) |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 1535 | if (musb->io.quirks & MUSB_IN_TUSB) { |
| 1536 | hw_ep->fifo_async = musb->async + 0x400 + |
| 1537 | musb->io.fifo_offset(i); |
| 1538 | hw_ep->fifo_sync = musb->sync + 0x400 + |
| 1539 | musb->io.fifo_offset(i); |
| 1540 | hw_ep->fifo_sync_va = |
| 1541 | musb->sync_va + 0x400 + musb->io.fifo_offset(i); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1542 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 1543 | if (i == 0) |
| 1544 | hw_ep->conf = mbase - 0x400 + TUSB_EP0_CONF; |
| 1545 | else |
| 1546 | hw_ep->conf = mbase + 0x400 + |
| 1547 | (((i - 1) & 0xf) << 2); |
| 1548 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1549 | #endif |
| 1550 | |
Tony Lindgren | d026e9c | 2014-11-24 11:05:03 -0800 | [diff] [blame] | 1551 | hw_ep->regs = musb->io.ep_offset(i, 0) + mbase; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1552 | hw_ep->rx_reinit = 1; |
| 1553 | hw_ep->tx_reinit = 1; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1554 | |
| 1555 | if (hw_ep->max_packet_sz_tx) { |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 1556 | dev_dbg(musb->controller, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1557 | "%s: hw_ep %d%s, %smax %d\n", |
| 1558 | musb_driver_name, i, |
| 1559 | hw_ep->is_shared_fifo ? "shared" : "tx", |
| 1560 | hw_ep->tx_double_buffered |
| 1561 | ? "doublebuffer, " : "", |
| 1562 | hw_ep->max_packet_sz_tx); |
| 1563 | } |
| 1564 | if (hw_ep->max_packet_sz_rx && !hw_ep->is_shared_fifo) { |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 1565 | dev_dbg(musb->controller, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1566 | "%s: hw_ep %d%s, %smax %d\n", |
| 1567 | musb_driver_name, i, |
| 1568 | "rx", |
| 1569 | hw_ep->rx_double_buffered |
| 1570 | ? "doublebuffer, " : "", |
| 1571 | hw_ep->max_packet_sz_rx); |
| 1572 | } |
| 1573 | if (!(hw_ep->max_packet_sz_tx || hw_ep->max_packet_sz_rx)) |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 1574 | dev_dbg(musb->controller, "hw_ep %d not configured\n", i); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1575 | } |
| 1576 | |
| 1577 | return 0; |
| 1578 | } |
| 1579 | |
| 1580 | /*-------------------------------------------------------------------------*/ |
| 1581 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1582 | /* |
| 1583 | * handle all the irqs defined by the HDRC core. for now we expect: other |
| 1584 | * irq sources (phy, dma, etc) will be handled first, musb->int_* values |
| 1585 | * will be assigned, and the irq will already have been acked. |
| 1586 | * |
| 1587 | * called in irq context with spinlock held, irqs blocked |
| 1588 | */ |
| 1589 | irqreturn_t musb_interrupt(struct musb *musb) |
| 1590 | { |
| 1591 | irqreturn_t retval = IRQ_NONE; |
Felipe Balbi | 31a0ede | 2013-12-30 12:42:38 -0600 | [diff] [blame] | 1592 | unsigned long status; |
| 1593 | unsigned long epnum; |
Sebastian Andrzej Siewior | b11e94d | 2012-10-30 19:52:23 +0100 | [diff] [blame] | 1594 | u8 devctl; |
Felipe Balbi | 31a0ede | 2013-12-30 12:42:38 -0600 | [diff] [blame] | 1595 | |
| 1596 | if (!musb->int_usb && !musb->int_tx && !musb->int_rx) |
| 1597 | return IRQ_NONE; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1598 | |
| 1599 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1600 | |
Felipe Balbi | 5c8a86e | 2011-05-11 12:44:08 +0300 | [diff] [blame] | 1601 | dev_dbg(musb->controller, "** IRQ %s usb%04x tx%04x rx%04x\n", |
Daniel Mack | c03da38 | 2014-05-26 14:52:36 +0200 | [diff] [blame] | 1602 | is_host_active(musb) ? "host" : "peripheral", |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1603 | musb->int_usb, musb->int_tx, musb->int_rx); |
| 1604 | |
Felipe Balbi | e3c93e1 | 2013-12-30 12:33:53 -0600 | [diff] [blame] | 1605 | /** |
| 1606 | * According to Mentor Graphics' documentation, flowchart on page 98, |
| 1607 | * IRQ should be handled as follows: |
| 1608 | * |
| 1609 | * . Resume IRQ |
| 1610 | * . Session Request IRQ |
| 1611 | * . VBUS Error IRQ |
| 1612 | * . Suspend IRQ |
| 1613 | * . Connect IRQ |
| 1614 | * . Disconnect IRQ |
| 1615 | * . Reset/Babble IRQ |
| 1616 | * . SOF IRQ (we're not using this one) |
| 1617 | * . Endpoint 0 IRQ |
| 1618 | * . TX Endpoints |
| 1619 | * . RX Endpoints |
| 1620 | * |
| 1621 | * We will be following that flowchart in order to avoid any problems |
| 1622 | * that might arise with internal Finite State Machine. |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1623 | */ |
Felipe Balbi | e3c93e1 | 2013-12-30 12:33:53 -0600 | [diff] [blame] | 1624 | |
Sergei Shtylyov | 7d9645f | 2010-06-24 23:07:06 +0530 | [diff] [blame] | 1625 | if (musb->int_usb) |
Felipe Balbi | 31a0ede | 2013-12-30 12:42:38 -0600 | [diff] [blame] | 1626 | retval |= musb_stage0_irq(musb, musb->int_usb, devctl); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1627 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1628 | if (musb->int_tx & 1) { |
Daniel Mack | c03da38 | 2014-05-26 14:52:36 +0200 | [diff] [blame] | 1629 | if (is_host_active(musb)) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1630 | retval |= musb_h_ep0_irq(musb); |
| 1631 | else |
| 1632 | retval |= musb_g_ep0_irq(musb); |
Felipe Balbi | 31a0ede | 2013-12-30 12:42:38 -0600 | [diff] [blame] | 1633 | |
| 1634 | /* we have just handled endpoint 0 IRQ, clear it */ |
| 1635 | musb->int_tx &= ~BIT(0); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1636 | } |
| 1637 | |
Felipe Balbi | 31a0ede | 2013-12-30 12:42:38 -0600 | [diff] [blame] | 1638 | status = musb->int_tx; |
| 1639 | |
| 1640 | for_each_set_bit(epnum, &status, 16) { |
| 1641 | retval = IRQ_HANDLED; |
| 1642 | if (is_host_active(musb)) |
| 1643 | musb_host_tx(musb, epnum); |
| 1644 | else |
| 1645 | musb_g_tx(musb, epnum); |
Felipe Balbi | e3c93e1 | 2013-12-30 12:33:53 -0600 | [diff] [blame] | 1646 | } |
| 1647 | |
Felipe Balbi | 31a0ede | 2013-12-30 12:42:38 -0600 | [diff] [blame] | 1648 | status = musb->int_rx; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1649 | |
Felipe Balbi | 31a0ede | 2013-12-30 12:42:38 -0600 | [diff] [blame] | 1650 | for_each_set_bit(epnum, &status, 16) { |
| 1651 | retval = IRQ_HANDLED; |
| 1652 | if (is_host_active(musb)) |
| 1653 | musb_host_rx(musb, epnum); |
| 1654 | else |
| 1655 | musb_g_rx(musb, epnum); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1656 | } |
| 1657 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1658 | return retval; |
| 1659 | } |
Felipe Balbi | 981430a | 2011-05-11 13:02:23 +0300 | [diff] [blame] | 1660 | EXPORT_SYMBOL_GPL(musb_interrupt); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1661 | |
| 1662 | #ifndef CONFIG_MUSB_PIO_ONLY |
Bill Pemberton | d3608b6 | 2012-11-19 13:24:34 -0500 | [diff] [blame] | 1663 | static bool use_dma = 1; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1664 | |
| 1665 | /* "modprobe ... use_dma=0" etc */ |
| 1666 | module_param(use_dma, bool, 0); |
| 1667 | MODULE_PARM_DESC(use_dma, "enable/disable use of DMA"); |
| 1668 | |
| 1669 | void musb_dma_completion(struct musb *musb, u8 epnum, u8 transmit) |
| 1670 | { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1671 | /* called with controller lock already held */ |
| 1672 | |
| 1673 | if (!epnum) { |
Tony Lindgren | f8e9f34f | 2015-05-01 12:29:27 -0700 | [diff] [blame] | 1674 | if (!is_cppi_enabled(musb)) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1675 | /* endpoint 0 */ |
Daniel Mack | c03da38 | 2014-05-26 14:52:36 +0200 | [diff] [blame] | 1676 | if (is_host_active(musb)) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1677 | musb_h_ep0_irq(musb); |
| 1678 | else |
| 1679 | musb_g_ep0_irq(musb); |
| 1680 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1681 | } else { |
| 1682 | /* endpoints 1..15 */ |
| 1683 | if (transmit) { |
Daniel Mack | c03da38 | 2014-05-26 14:52:36 +0200 | [diff] [blame] | 1684 | if (is_host_active(musb)) |
Felipe Balbi | a04d46d | 2011-11-24 15:46:27 +0200 | [diff] [blame] | 1685 | musb_host_tx(musb, epnum); |
| 1686 | else |
| 1687 | musb_g_tx(musb, epnum); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1688 | } else { |
| 1689 | /* receive */ |
Daniel Mack | c03da38 | 2014-05-26 14:52:36 +0200 | [diff] [blame] | 1690 | if (is_host_active(musb)) |
Felipe Balbi | a04d46d | 2011-11-24 15:46:27 +0200 | [diff] [blame] | 1691 | musb_host_rx(musb, epnum); |
| 1692 | else |
| 1693 | musb_g_rx(musb, epnum); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1694 | } |
| 1695 | } |
| 1696 | } |
Arnd Bergmann | 9a35f87 | 2011-10-02 16:45:47 +0200 | [diff] [blame] | 1697 | EXPORT_SYMBOL_GPL(musb_dma_completion); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1698 | |
| 1699 | #else |
| 1700 | #define use_dma 0 |
| 1701 | #endif |
| 1702 | |
| 1703 | /*-------------------------------------------------------------------------*/ |
| 1704 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1705 | static ssize_t |
| 1706 | musb_mode_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 1707 | { |
| 1708 | struct musb *musb = dev_to_musb(dev); |
| 1709 | unsigned long flags; |
| 1710 | int ret = -EINVAL; |
| 1711 | |
| 1712 | spin_lock_irqsave(&musb->lock, flags); |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 1713 | ret = sprintf(buf, "%s\n", usb_otg_state_string(musb->xceiv->otg->state)); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1714 | spin_unlock_irqrestore(&musb->lock, flags); |
| 1715 | |
| 1716 | return ret; |
| 1717 | } |
| 1718 | |
| 1719 | static ssize_t |
| 1720 | musb_mode_store(struct device *dev, struct device_attribute *attr, |
| 1721 | const char *buf, size_t n) |
| 1722 | { |
| 1723 | struct musb *musb = dev_to_musb(dev); |
| 1724 | unsigned long flags; |
David Brownell | 96a274d | 2008-11-24 13:06:47 +0200 | [diff] [blame] | 1725 | int status; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1726 | |
| 1727 | spin_lock_irqsave(&musb->lock, flags); |
David Brownell | 96a274d | 2008-11-24 13:06:47 +0200 | [diff] [blame] | 1728 | if (sysfs_streq(buf, "host")) |
| 1729 | status = musb_platform_set_mode(musb, MUSB_HOST); |
| 1730 | else if (sysfs_streq(buf, "peripheral")) |
| 1731 | status = musb_platform_set_mode(musb, MUSB_PERIPHERAL); |
| 1732 | else if (sysfs_streq(buf, "otg")) |
| 1733 | status = musb_platform_set_mode(musb, MUSB_OTG); |
| 1734 | else |
| 1735 | status = -EINVAL; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1736 | spin_unlock_irqrestore(&musb->lock, flags); |
| 1737 | |
David Brownell | 96a274d | 2008-11-24 13:06:47 +0200 | [diff] [blame] | 1738 | return (status == 0) ? n : status; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1739 | } |
| 1740 | static DEVICE_ATTR(mode, 0644, musb_mode_show, musb_mode_store); |
| 1741 | |
| 1742 | static ssize_t |
| 1743 | musb_vbus_store(struct device *dev, struct device_attribute *attr, |
| 1744 | const char *buf, size_t n) |
| 1745 | { |
| 1746 | struct musb *musb = dev_to_musb(dev); |
| 1747 | unsigned long flags; |
| 1748 | unsigned long val; |
| 1749 | |
| 1750 | if (sscanf(buf, "%lu", &val) < 1) { |
Felipe Balbi | b3b1cc3 | 2009-12-15 11:08:43 +0200 | [diff] [blame] | 1751 | dev_err(dev, "Invalid VBUS timeout ms value\n"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1752 | return -EINVAL; |
| 1753 | } |
| 1754 | |
| 1755 | spin_lock_irqsave(&musb->lock, flags); |
David Brownell | f7f9d63 | 2009-03-31 12:32:12 -0700 | [diff] [blame] | 1756 | /* force T(a_wait_bcon) to be zero/unlimited *OR* valid */ |
| 1757 | musb->a_wait_bcon = val ? max_t(int, val, OTG_TIME_A_WAIT_BCON) : 0 ; |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 1758 | if (musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1759 | musb->is_active = 0; |
| 1760 | musb_platform_try_idle(musb, jiffies + msecs_to_jiffies(val)); |
| 1761 | spin_unlock_irqrestore(&musb->lock, flags); |
| 1762 | |
| 1763 | return n; |
| 1764 | } |
| 1765 | |
| 1766 | static ssize_t |
| 1767 | musb_vbus_show(struct device *dev, struct device_attribute *attr, char *buf) |
| 1768 | { |
| 1769 | struct musb *musb = dev_to_musb(dev); |
| 1770 | unsigned long flags; |
| 1771 | unsigned long val; |
| 1772 | int vbus; |
| 1773 | |
| 1774 | spin_lock_irqsave(&musb->lock, flags); |
| 1775 | val = musb->a_wait_bcon; |
David Brownell | f7f9d63 | 2009-03-31 12:32:12 -0700 | [diff] [blame] | 1776 | /* FIXME get_vbus_status() is normally #defined as false... |
| 1777 | * and is effectively TUSB-specific. |
| 1778 | */ |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1779 | vbus = musb_platform_get_vbus_status(musb); |
| 1780 | spin_unlock_irqrestore(&musb->lock, flags); |
| 1781 | |
David Brownell | f7f9d63 | 2009-03-31 12:32:12 -0700 | [diff] [blame] | 1782 | return sprintf(buf, "Vbus %s, timeout %lu msec\n", |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1783 | vbus ? "on" : "off", val); |
| 1784 | } |
| 1785 | static DEVICE_ATTR(vbus, 0644, musb_vbus_show, musb_vbus_store); |
| 1786 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1787 | /* Gadget drivers can't know that a host is connected so they might want |
| 1788 | * to start SRP, but users can. This allows userspace to trigger SRP. |
| 1789 | */ |
| 1790 | static ssize_t |
| 1791 | musb_srp_store(struct device *dev, struct device_attribute *attr, |
| 1792 | const char *buf, size_t n) |
| 1793 | { |
| 1794 | struct musb *musb = dev_to_musb(dev); |
| 1795 | unsigned short srp; |
| 1796 | |
| 1797 | if (sscanf(buf, "%hu", &srp) != 1 |
| 1798 | || (srp != 1)) { |
Felipe Balbi | b3b1cc3 | 2009-12-15 11:08:43 +0200 | [diff] [blame] | 1799 | dev_err(dev, "SRP: Value must be 1\n"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1800 | return -EINVAL; |
| 1801 | } |
| 1802 | |
| 1803 | if (srp == 1) |
| 1804 | musb_g_wakeup(musb); |
| 1805 | |
| 1806 | return n; |
| 1807 | } |
| 1808 | static DEVICE_ATTR(srp, 0644, NULL, musb_srp_store); |
| 1809 | |
Felipe Balbi | 9437575 | 2009-12-15 11:08:38 +0200 | [diff] [blame] | 1810 | static struct attribute *musb_attributes[] = { |
| 1811 | &dev_attr_mode.attr, |
| 1812 | &dev_attr_vbus.attr, |
Felipe Balbi | 9437575 | 2009-12-15 11:08:38 +0200 | [diff] [blame] | 1813 | &dev_attr_srp.attr, |
Felipe Balbi | 9437575 | 2009-12-15 11:08:38 +0200 | [diff] [blame] | 1814 | NULL |
| 1815 | }; |
| 1816 | |
| 1817 | static const struct attribute_group musb_attr_group = { |
| 1818 | .attrs = musb_attributes, |
| 1819 | }; |
| 1820 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1821 | /* Only used to provide driver mode change events */ |
| 1822 | static void musb_irq_work(struct work_struct *data) |
| 1823 | { |
| 1824 | struct musb *musb = container_of(data, struct musb, irq_work); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1825 | |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 1826 | if (musb->xceiv->otg->state != musb->xceiv_old_state) { |
| 1827 | musb->xceiv_old_state = musb->xceiv->otg->state; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1828 | sysfs_notify(&musb->controller->kobj, NULL, "mode"); |
| 1829 | } |
| 1830 | } |
| 1831 | |
Felipe Balbi | 83b8f5b | 2015-02-26 14:27:12 -0600 | [diff] [blame] | 1832 | static void musb_recover_from_babble(struct musb *musb) |
Daniel Mack | ca88fc2 | 2014-04-02 13:58:28 +0200 | [diff] [blame] | 1833 | { |
Felipe Balbi | b4dc38f | 2015-02-26 14:02:35 -0600 | [diff] [blame] | 1834 | int ret; |
| 1835 | u8 devctl; |
Daniel Mack | ca88fc2 | 2014-04-02 13:58:28 +0200 | [diff] [blame] | 1836 | |
Felipe Balbi | 0244336 | 2015-02-26 14:42:19 -0600 | [diff] [blame] | 1837 | musb_disable_interrupts(musb); |
| 1838 | |
Felipe Balbi | 83b8f5b | 2015-02-26 14:27:12 -0600 | [diff] [blame] | 1839 | /* |
| 1840 | * wait at least 320 cycles of 60MHz clock. That's 5.3us, we will give |
| 1841 | * it some slack and wait for 10us. |
| 1842 | */ |
| 1843 | udelay(10); |
| 1844 | |
Felipe Balbi | b28a643 | 2015-02-26 14:20:58 -0600 | [diff] [blame] | 1845 | ret = musb_platform_recover(musb); |
Felipe Balbi | ba7ee8b | 2015-02-26 11:31:49 -0600 | [diff] [blame] | 1846 | if (ret) { |
| 1847 | musb_enable_interrupts(musb); |
George Cherian | d871c62 | 2014-07-16 18:22:11 +0530 | [diff] [blame] | 1848 | return; |
Felipe Balbi | ba7ee8b | 2015-02-26 11:31:49 -0600 | [diff] [blame] | 1849 | } |
Daniel Mack | ca88fc2 | 2014-04-02 13:58:28 +0200 | [diff] [blame] | 1850 | |
Felipe Balbi | b4dc38f | 2015-02-26 14:02:35 -0600 | [diff] [blame] | 1851 | /* drop session bit */ |
| 1852 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); |
| 1853 | devctl &= ~MUSB_DEVCTL_SESSION; |
| 1854 | musb_writeb(musb->mregs, MUSB_DEVCTL, devctl); |
Daniel Mack | ca88fc2 | 2014-04-02 13:58:28 +0200 | [diff] [blame] | 1855 | |
Felipe Balbi | b4dc38f | 2015-02-26 14:02:35 -0600 | [diff] [blame] | 1856 | /* tell usbcore about it */ |
| 1857 | musb_root_disconnect(musb); |
Daniel Mack | ca88fc2 | 2014-04-02 13:58:28 +0200 | [diff] [blame] | 1858 | |
| 1859 | /* |
George Cherian | d871c62 | 2014-07-16 18:22:11 +0530 | [diff] [blame] | 1860 | * When a babble condition occurs, the musb controller |
| 1861 | * removes the session bit and the endpoint config is lost. |
Daniel Mack | ca88fc2 | 2014-04-02 13:58:28 +0200 | [diff] [blame] | 1862 | */ |
| 1863 | if (musb->dyn_fifo) |
Felipe Balbi | b4dc38f | 2015-02-26 14:02:35 -0600 | [diff] [blame] | 1864 | ret = ep_config_from_table(musb); |
Daniel Mack | ca88fc2 | 2014-04-02 13:58:28 +0200 | [diff] [blame] | 1865 | else |
Felipe Balbi | b4dc38f | 2015-02-26 14:02:35 -0600 | [diff] [blame] | 1866 | ret = ep_config_from_hw(musb); |
Daniel Mack | ca88fc2 | 2014-04-02 13:58:28 +0200 | [diff] [blame] | 1867 | |
Felipe Balbi | b4dc38f | 2015-02-26 14:02:35 -0600 | [diff] [blame] | 1868 | /* restart session */ |
| 1869 | if (ret == 0) |
Daniel Mack | ca88fc2 | 2014-04-02 13:58:28 +0200 | [diff] [blame] | 1870 | musb_start(musb); |
| 1871 | } |
| 1872 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1873 | /* -------------------------------------------------------------------------- |
| 1874 | * Init support |
| 1875 | */ |
| 1876 | |
Bill Pemberton | 41ac7b3 | 2012-11-19 13:21:48 -0500 | [diff] [blame] | 1877 | static struct musb *allocate_instance(struct device *dev, |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1878 | struct musb_hdrc_config *config, void __iomem *mbase) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1879 | { |
| 1880 | struct musb *musb; |
| 1881 | struct musb_hw_ep *ep; |
| 1882 | int epnum; |
Daniel Mack | 74c2e93 | 2013-04-10 21:55:45 +0200 | [diff] [blame] | 1883 | int ret; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1884 | |
Daniel Mack | 74c2e93 | 2013-04-10 21:55:45 +0200 | [diff] [blame] | 1885 | musb = devm_kzalloc(dev, sizeof(*musb), GFP_KERNEL); |
| 1886 | if (!musb) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1887 | return NULL; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1888 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1889 | INIT_LIST_HEAD(&musb->control); |
| 1890 | INIT_LIST_HEAD(&musb->in_bulk); |
| 1891 | INIT_LIST_HEAD(&musb->out_bulk); |
| 1892 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1893 | musb->vbuserr_retry = VBUSERR_RETRY_COUNT; |
David Brownell | f7f9d63 | 2009-03-31 12:32:12 -0700 | [diff] [blame] | 1894 | musb->a_wait_bcon = OTG_TIME_A_WAIT_BCON; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1895 | musb->mregs = mbase; |
| 1896 | musb->ctrl_base = mbase; |
| 1897 | musb->nIrq = -ENODEV; |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1898 | musb->config = config; |
Kevin Hilman | 02582b9 | 2008-09-15 12:09:31 +0200 | [diff] [blame] | 1899 | BUG_ON(musb->config->num_eps > MUSB_C_NUM_EPS); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1900 | for (epnum = 0, ep = musb->endpoints; |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1901 | epnum < musb->config->num_eps; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1902 | epnum++, ep++) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1903 | ep->musb = musb; |
| 1904 | ep->epnum = epnum; |
| 1905 | } |
| 1906 | |
| 1907 | musb->controller = dev; |
Felipe Balbi | 743411b | 2010-12-01 13:22:05 +0200 | [diff] [blame] | 1908 | |
Daniel Mack | 74c2e93 | 2013-04-10 21:55:45 +0200 | [diff] [blame] | 1909 | ret = musb_host_alloc(musb); |
| 1910 | if (ret < 0) |
| 1911 | goto err_free; |
| 1912 | |
| 1913 | dev_set_drvdata(dev, musb); |
| 1914 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1915 | return musb; |
Daniel Mack | 74c2e93 | 2013-04-10 21:55:45 +0200 | [diff] [blame] | 1916 | |
| 1917 | err_free: |
| 1918 | return NULL; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1919 | } |
| 1920 | |
| 1921 | static void musb_free(struct musb *musb) |
| 1922 | { |
| 1923 | /* this has multiple entry modes. it handles fault cleanup after |
| 1924 | * probe(), where things may be partially set up, as well as rmmod |
| 1925 | * cleanup after everything's been de-activated. |
| 1926 | */ |
| 1927 | |
| 1928 | #ifdef CONFIG_SYSFS |
Felipe Balbi | 9437575 | 2009-12-15 11:08:38 +0200 | [diff] [blame] | 1929 | sysfs_remove_group(&musb->controller->kobj, &musb_attr_group); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1930 | #endif |
| 1931 | |
Ajay Kumar Gupta | 97a3989 | 2009-01-24 17:56:39 -0800 | [diff] [blame] | 1932 | if (musb->nIrq >= 0) { |
| 1933 | if (musb->irq_wake) |
| 1934 | disable_irq_wake(musb->nIrq); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1935 | free_irq(musb->nIrq, musb); |
| 1936 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1937 | |
Daniel Mack | 74c2e93 | 2013-04-10 21:55:45 +0200 | [diff] [blame] | 1938 | musb_host_free(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1939 | } |
| 1940 | |
Daniel Mack | 8ed1fb7 | 2013-12-18 20:23:46 +0100 | [diff] [blame] | 1941 | static void musb_deassert_reset(struct work_struct *work) |
| 1942 | { |
| 1943 | struct musb *musb; |
| 1944 | unsigned long flags; |
| 1945 | |
| 1946 | musb = container_of(work, struct musb, deassert_reset_work.work); |
| 1947 | |
| 1948 | spin_lock_irqsave(&musb->lock, flags); |
| 1949 | |
| 1950 | if (musb->port1_status & USB_PORT_STAT_RESET) |
| 1951 | musb_port_reset(musb, false); |
| 1952 | |
| 1953 | spin_unlock_irqrestore(&musb->lock, flags); |
| 1954 | } |
| 1955 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1956 | /* |
| 1957 | * Perform generic per-controller initialization. |
| 1958 | * |
Sergei Shtylyov | 28dd924 | 2012-08-21 21:22:45 +0400 | [diff] [blame] | 1959 | * @dev: the controller (already clocked, etc) |
| 1960 | * @nIrq: IRQ number |
| 1961 | * @ctrl: virtual address of controller registers, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1962 | * not yet corrected for platform-specific offsets |
| 1963 | */ |
Bill Pemberton | 41ac7b3 | 2012-11-19 13:21:48 -0500 | [diff] [blame] | 1964 | static int |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1965 | musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl) |
| 1966 | { |
| 1967 | int status; |
| 1968 | struct musb *musb; |
Jingoo Han | c1a7d67 | 2013-07-30 17:03:12 +0900 | [diff] [blame] | 1969 | struct musb_hdrc_platform_data *plat = dev_get_platdata(dev); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1970 | |
| 1971 | /* The driver might handle more features than the board; OK. |
| 1972 | * Fail when the board needs a feature that's not enabled. |
| 1973 | */ |
| 1974 | if (!plat) { |
| 1975 | dev_dbg(dev, "no platform_data?\n"); |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 1976 | status = -ENODEV; |
| 1977 | goto fail0; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1978 | } |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 1979 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1980 | /* allocate */ |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 1981 | musb = allocate_instance(dev, plat->config, ctrl); |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 1982 | if (!musb) { |
| 1983 | status = -ENOMEM; |
| 1984 | goto fail0; |
| 1985 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1986 | |
| 1987 | spin_lock_init(&musb->lock); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1988 | musb->board_set_power = plat->set_power; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1989 | musb->min_power = plat->min_power; |
Felipe Balbi | f7ec943 | 2010-12-02 09:48:58 +0200 | [diff] [blame] | 1990 | musb->ops = plat->platform_ops; |
Daniel Mack | 9ad96e6 | 2013-04-10 21:55:48 +0200 | [diff] [blame] | 1991 | musb->port_mode = plat->mode; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1992 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 1993 | /* |
| 1994 | * Initialize the default IO functions. At least omap2430 needs |
| 1995 | * these early. We initialize the platform specific IO functions |
| 1996 | * later on. |
| 1997 | */ |
| 1998 | musb_readb = musb_default_readb; |
| 1999 | musb_writeb = musb_default_writeb; |
| 2000 | musb_readw = musb_default_readw; |
| 2001 | musb_writew = musb_default_writew; |
| 2002 | musb_readl = musb_default_readl; |
| 2003 | musb_writel = musb_default_writel; |
| 2004 | |
Felipe Balbi | 3e43a07 | 2015-02-02 17:12:00 -0600 | [diff] [blame] | 2005 | /* We need musb_read/write functions initialized for PM */ |
| 2006 | pm_runtime_use_autosuspend(musb->controller); |
| 2007 | pm_runtime_set_autosuspend_delay(musb->controller, 200); |
| 2008 | pm_runtime_irq_safe(musb->controller); |
| 2009 | pm_runtime_enable(musb->controller); |
| 2010 | |
David Brownell | 84e250f | 2009-03-31 12:30:04 -0700 | [diff] [blame] | 2011 | /* The musb_platform_init() call: |
Philippe De Swert | baef653 | 2012-11-06 15:32:13 +0200 | [diff] [blame] | 2012 | * - adjusts musb->mregs |
| 2013 | * - sets the musb->isr |
Rahul Bedarkar | 5ae477b | 2014-01-02 19:27:47 +0530 | [diff] [blame] | 2014 | * - may initialize an integrated transceiver |
Kishon Vijay Abraham I | 721002e | 2012-06-22 17:02:45 +0530 | [diff] [blame] | 2015 | * - initializes musb->xceiv, usually by otg_get_phy() |
David Brownell | 84e250f | 2009-03-31 12:30:04 -0700 | [diff] [blame] | 2016 | * - stops powering VBUS |
David Brownell | 84e250f | 2009-03-31 12:30:04 -0700 | [diff] [blame] | 2017 | * |
Joe Perches | 7c9d440 | 2011-06-23 11:39:20 -0700 | [diff] [blame] | 2018 | * There are various transceiver configurations. Blackfin, |
David Brownell | 84e250f | 2009-03-31 12:30:04 -0700 | [diff] [blame] | 2019 | * DaVinci, TUSB60x0, and others integrate them. OMAP3 uses |
| 2020 | * external/discrete ones in various flavors (twl4030 family, |
| 2021 | * isp1504, non-OTG, etc) mostly hooking up through ULPI. |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2022 | */ |
Hema Kalliguddi | ea65df5 | 2010-09-22 19:27:40 -0500 | [diff] [blame] | 2023 | status = musb_platform_init(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2024 | if (status < 0) |
Felipe Balbi | 0349176 | 2010-12-02 09:57:08 +0200 | [diff] [blame] | 2025 | goto fail1; |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2026 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2027 | if (!musb->isr) { |
| 2028 | status = -ENODEV; |
Grazvydas Ignotas | c04352a | 2012-02-04 19:43:51 +0200 | [diff] [blame] | 2029 | goto fail2; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2030 | } |
| 2031 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 2032 | if (musb->ops->quirks) |
| 2033 | musb->io.quirks = musb->ops->quirks; |
| 2034 | |
Ben Hutchings | da96cfc | 2015-05-24 04:27:32 +0100 | [diff] [blame] | 2035 | /* Most devices use indexed offset or flat offset */ |
Tony Lindgren | d026e9c | 2014-11-24 11:05:03 -0800 | [diff] [blame] | 2036 | if (musb->io.quirks & MUSB_INDEXED_EP) { |
| 2037 | musb->io.ep_offset = musb_indexed_ep_offset; |
| 2038 | musb->io.ep_select = musb_indexed_ep_select; |
| 2039 | } else { |
| 2040 | musb->io.ep_offset = musb_flat_ep_offset; |
| 2041 | musb->io.ep_select = musb_flat_ep_select; |
| 2042 | } |
Hans de Goede | 47a8273 | 2015-03-20 20:11:14 +0100 | [diff] [blame] | 2043 | /* And override them with platform specific ops if specified. */ |
| 2044 | if (musb->ops->ep_offset) |
| 2045 | musb->io.ep_offset = musb->ops->ep_offset; |
| 2046 | if (musb->ops->ep_select) |
| 2047 | musb->io.ep_select = musb->ops->ep_select; |
Tony Lindgren | d026e9c | 2014-11-24 11:05:03 -0800 | [diff] [blame] | 2048 | |
Ben Hutchings | da96cfc | 2015-05-24 04:27:32 +0100 | [diff] [blame] | 2049 | /* At least tusb6010 has its own offsets */ |
| 2050 | if (musb->ops->ep_offset) |
| 2051 | musb->io.ep_offset = musb->ops->ep_offset; |
| 2052 | if (musb->ops->ep_select) |
| 2053 | musb->io.ep_select = musb->ops->ep_select; |
| 2054 | |
Tony Lindgren | 8a77f05 | 2014-11-24 11:05:04 -0800 | [diff] [blame] | 2055 | if (musb->ops->fifo_mode) |
| 2056 | fifo_mode = musb->ops->fifo_mode; |
| 2057 | else |
| 2058 | fifo_mode = 4; |
| 2059 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 2060 | if (musb->ops->fifo_offset) |
| 2061 | musb->io.fifo_offset = musb->ops->fifo_offset; |
| 2062 | else |
| 2063 | musb->io.fifo_offset = musb_default_fifo_offset; |
| 2064 | |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2065 | if (musb->ops->busctl_offset) |
| 2066 | musb->io.busctl_offset = musb->ops->busctl_offset; |
| 2067 | else |
| 2068 | musb->io.busctl_offset = musb_default_busctl_offset; |
| 2069 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 2070 | if (musb->ops->readb) |
| 2071 | musb_readb = musb->ops->readb; |
| 2072 | if (musb->ops->writeb) |
| 2073 | musb_writeb = musb->ops->writeb; |
| 2074 | if (musb->ops->readw) |
| 2075 | musb_readw = musb->ops->readw; |
| 2076 | if (musb->ops->writew) |
| 2077 | musb_writew = musb->ops->writew; |
| 2078 | if (musb->ops->readl) |
| 2079 | musb_readl = musb->ops->readl; |
| 2080 | if (musb->ops->writel) |
| 2081 | musb_writel = musb->ops->writel; |
| 2082 | |
Tony Lindgren | 7f6283e | 2015-05-01 12:29:28 -0700 | [diff] [blame] | 2083 | #ifndef CONFIG_MUSB_PIO_ONLY |
| 2084 | if (!musb->ops->dma_init || !musb->ops->dma_exit) { |
| 2085 | dev_err(dev, "DMA controller not set\n"); |
| 2086 | goto fail2; |
| 2087 | } |
| 2088 | musb_dma_controller_create = musb->ops->dma_init; |
| 2089 | musb_dma_controller_destroy = musb->ops->dma_exit; |
| 2090 | #endif |
| 2091 | |
Tony Lindgren | 1b40fc5 | 2014-11-24 11:05:02 -0800 | [diff] [blame] | 2092 | if (musb->ops->read_fifo) |
| 2093 | musb->io.read_fifo = musb->ops->read_fifo; |
| 2094 | else |
| 2095 | musb->io.read_fifo = musb_default_read_fifo; |
| 2096 | |
| 2097 | if (musb->ops->write_fifo) |
| 2098 | musb->io.write_fifo = musb->ops->write_fifo; |
| 2099 | else |
| 2100 | musb->io.write_fifo = musb_default_write_fifo; |
| 2101 | |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 2102 | if (!musb->xceiv->io_ops) { |
Grazvydas Ignotas | bf070bc | 2012-03-21 16:35:52 +0200 | [diff] [blame] | 2103 | musb->xceiv->io_dev = musb->controller; |
Heikki Krogerus | ffb865b | 2010-03-25 13:25:28 +0200 | [diff] [blame] | 2104 | musb->xceiv->io_priv = musb->mregs; |
| 2105 | musb->xceiv->io_ops = &musb_ulpi_access; |
| 2106 | } |
| 2107 | |
Grazvydas Ignotas | c04352a | 2012-02-04 19:43:51 +0200 | [diff] [blame] | 2108 | pm_runtime_get_sync(musb->controller); |
| 2109 | |
Sebastian Andrzej Siewior | 4805414 | 2013-10-16 12:50:08 +0200 | [diff] [blame] | 2110 | if (use_dma && dev->dma_mask) { |
Tony Lindgren | 7f6283e | 2015-05-01 12:29:28 -0700 | [diff] [blame] | 2111 | musb->dma_controller = |
| 2112 | musb_dma_controller_create(musb, musb->mregs); |
Sebastian Andrzej Siewior | 4805414 | 2013-10-16 12:50:08 +0200 | [diff] [blame] | 2113 | if (IS_ERR(musb->dma_controller)) { |
| 2114 | status = PTR_ERR(musb->dma_controller); |
| 2115 | goto fail2_5; |
| 2116 | } |
| 2117 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2118 | |
| 2119 | /* be sure interrupts are disabled before connecting ISR */ |
| 2120 | musb_platform_disable(musb); |
| 2121 | musb_generic_disable(musb); |
| 2122 | |
Sebastian Andrzej Siewior | 66fadea | 2013-11-06 09:25:27 +0100 | [diff] [blame] | 2123 | /* Init IRQ workqueue before request_irq */ |
| 2124 | INIT_WORK(&musb->irq_work, musb_irq_work); |
Daniel Mack | 8ed1fb7 | 2013-12-18 20:23:46 +0100 | [diff] [blame] | 2125 | INIT_DELAYED_WORK(&musb->deassert_reset_work, musb_deassert_reset); |
| 2126 | INIT_DELAYED_WORK(&musb->finish_resume_work, musb_host_finish_resume); |
Sebastian Andrzej Siewior | 66fadea | 2013-11-06 09:25:27 +0100 | [diff] [blame] | 2127 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2128 | /* setup musb parts of the core (especially endpoints) */ |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 2129 | status = musb_core_init(plat->config->multipoint |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2130 | ? MUSB_CONTROLLER_MHDRC |
| 2131 | : MUSB_CONTROLLER_HDRC, musb); |
| 2132 | if (status < 0) |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2133 | goto fail3; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2134 | |
David Brownell | f7f9d63 | 2009-03-31 12:32:12 -0700 | [diff] [blame] | 2135 | setup_timer(&musb->otg_timer, musb_otg_timer_func, (unsigned long) musb); |
David Brownell | f7f9d63 | 2009-03-31 12:32:12 -0700 | [diff] [blame] | 2136 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2137 | /* attach to the IRQ */ |
Kay Sievers | 427c4f3 | 2008-11-07 01:52:53 +0100 | [diff] [blame] | 2138 | if (request_irq(nIrq, musb->isr, 0, dev_name(dev), musb)) { |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2139 | dev_err(dev, "request_irq %d failed!\n", nIrq); |
| 2140 | status = -ENODEV; |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2141 | goto fail3; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2142 | } |
| 2143 | musb->nIrq = nIrq; |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2144 | /* FIXME this handles wakeup irqs wrong */ |
Felipe Balbi | c48a515 | 2008-11-24 13:06:53 +0200 | [diff] [blame] | 2145 | if (enable_irq_wake(nIrq) == 0) { |
| 2146 | musb->irq_wake = 1; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2147 | device_init_wakeup(dev, 1); |
Felipe Balbi | c48a515 | 2008-11-24 13:06:53 +0200 | [diff] [blame] | 2148 | } else { |
| 2149 | musb->irq_wake = 0; |
| 2150 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2151 | |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2152 | /* program PHY to use external vBus if required */ |
| 2153 | if (plat->extvbus) { |
| 2154 | u8 busctl = musb_read_ulpi_buscontrol(musb->mregs); |
| 2155 | busctl |= MUSB_ULPI_USE_EXTVBUS; |
| 2156 | musb_write_ulpi_buscontrol(musb->mregs, busctl); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2157 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2158 | |
Grazvydas Ignotas | e561511 | 2013-03-10 02:48:55 +0200 | [diff] [blame] | 2159 | if (musb->xceiv->otg->default_a) { |
| 2160 | MUSB_HST_MODE(musb); |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 2161 | musb->xceiv->otg->state = OTG_STATE_A_IDLE; |
Grazvydas Ignotas | e561511 | 2013-03-10 02:48:55 +0200 | [diff] [blame] | 2162 | } else { |
| 2163 | MUSB_DEV_MODE(musb); |
Antoine Tenart | e47d925 | 2014-10-30 18:41:13 +0100 | [diff] [blame] | 2164 | musb->xceiv->otg->state = OTG_STATE_B_IDLE; |
Grazvydas Ignotas | e561511 | 2013-03-10 02:48:55 +0200 | [diff] [blame] | 2165 | } |
Anand Gadiyar | 07a8cdd | 2010-11-18 18:54:17 +0530 | [diff] [blame] | 2166 | |
Daniel Mack | 6c5f6a6 | 2013-04-10 21:55:49 +0200 | [diff] [blame] | 2167 | switch (musb->port_mode) { |
| 2168 | case MUSB_PORT_MODE_HOST: |
| 2169 | status = musb_host_setup(musb, plat->power); |
Felipe Balbi | 2df6761 | 2013-10-29 12:17:17 -0500 | [diff] [blame] | 2170 | if (status < 0) |
| 2171 | goto fail3; |
| 2172 | status = musb_platform_set_mode(musb, MUSB_HOST); |
Daniel Mack | 6c5f6a6 | 2013-04-10 21:55:49 +0200 | [diff] [blame] | 2173 | break; |
| 2174 | case MUSB_PORT_MODE_GADGET: |
| 2175 | status = musb_gadget_setup(musb); |
Felipe Balbi | 2df6761 | 2013-10-29 12:17:17 -0500 | [diff] [blame] | 2176 | if (status < 0) |
| 2177 | goto fail3; |
| 2178 | status = musb_platform_set_mode(musb, MUSB_PERIPHERAL); |
Daniel Mack | 6c5f6a6 | 2013-04-10 21:55:49 +0200 | [diff] [blame] | 2179 | break; |
| 2180 | case MUSB_PORT_MODE_DUAL_ROLE: |
| 2181 | status = musb_host_setup(musb, plat->power); |
| 2182 | if (status < 0) |
| 2183 | goto fail3; |
| 2184 | status = musb_gadget_setup(musb); |
Felipe Balbi | 2df6761 | 2013-10-29 12:17:17 -0500 | [diff] [blame] | 2185 | if (status) { |
Sebastian Andrzej Siewior | 0d2dd7e | 2013-10-16 12:50:06 +0200 | [diff] [blame] | 2186 | musb_host_cleanup(musb); |
Felipe Balbi | 2df6761 | 2013-10-29 12:17:17 -0500 | [diff] [blame] | 2187 | goto fail3; |
| 2188 | } |
| 2189 | status = musb_platform_set_mode(musb, MUSB_OTG); |
Daniel Mack | 6c5f6a6 | 2013-04-10 21:55:49 +0200 | [diff] [blame] | 2190 | break; |
| 2191 | default: |
| 2192 | dev_err(dev, "unsupported port mode %d\n", musb->port_mode); |
| 2193 | break; |
| 2194 | } |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2195 | |
Sergei Shtylyov | 461972d | 2010-03-25 13:14:32 +0200 | [diff] [blame] | 2196 | if (status < 0) |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2197 | goto fail3; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2198 | |
Felipe Balbi | 7f7f9e2 | 2010-03-12 10:29:11 +0200 | [diff] [blame] | 2199 | status = musb_init_debugfs(musb); |
| 2200 | if (status < 0) |
Felipe Balbi | b0f9da7 | 2010-03-25 13:25:18 +0200 | [diff] [blame] | 2201 | goto fail4; |
Felipe Balbi | 7f7f9e2 | 2010-03-12 10:29:11 +0200 | [diff] [blame] | 2202 | |
Felipe Balbi | 9437575 | 2009-12-15 11:08:38 +0200 | [diff] [blame] | 2203 | status = sysfs_create_group(&musb->controller->kobj, &musb_attr_group); |
Felipe Balbi | 28c2c51 | 2008-09-11 11:53:25 +0300 | [diff] [blame] | 2204 | if (status) |
Felipe Balbi | b0f9da7 | 2010-03-25 13:25:18 +0200 | [diff] [blame] | 2205 | goto fail5; |
Felipe Balbi | 28c2c51 | 2008-09-11 11:53:25 +0300 | [diff] [blame] | 2206 | |
Grazvydas Ignotas | c04352a | 2012-02-04 19:43:51 +0200 | [diff] [blame] | 2207 | pm_runtime_put(musb->controller); |
| 2208 | |
Felipe Balbi | 28c2c51 | 2008-09-11 11:53:25 +0300 | [diff] [blame] | 2209 | return 0; |
| 2210 | |
Felipe Balbi | b0f9da7 | 2010-03-25 13:25:18 +0200 | [diff] [blame] | 2211 | fail5: |
| 2212 | musb_exit_debugfs(musb); |
| 2213 | |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2214 | fail4: |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2215 | musb_gadget_cleanup(musb); |
Sebastian Andrzej Siewior | 0d2dd7e | 2013-10-16 12:50:06 +0200 | [diff] [blame] | 2216 | musb_host_cleanup(musb); |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2217 | |
| 2218 | fail3: |
Sebastian Andrzej Siewior | 66fadea | 2013-11-06 09:25:27 +0100 | [diff] [blame] | 2219 | cancel_work_sync(&musb->irq_work); |
Daniel Mack | 8ed1fb7 | 2013-12-18 20:23:46 +0100 | [diff] [blame] | 2220 | cancel_delayed_work_sync(&musb->finish_resume_work); |
| 2221 | cancel_delayed_work_sync(&musb->deassert_reset_work); |
Sebastian Andrzej Siewior | f3ce4d5 | 2013-06-19 17:38:14 +0200 | [diff] [blame] | 2222 | if (musb->dma_controller) |
Tony Lindgren | 7f6283e | 2015-05-01 12:29:28 -0700 | [diff] [blame] | 2223 | musb_dma_controller_destroy(musb->dma_controller); |
Sebastian Andrzej Siewior | 4805414 | 2013-10-16 12:50:08 +0200 | [diff] [blame] | 2224 | fail2_5: |
Grazvydas Ignotas | c04352a | 2012-02-04 19:43:51 +0200 | [diff] [blame] | 2225 | pm_runtime_put_sync(musb->controller); |
| 2226 | |
| 2227 | fail2: |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2228 | if (musb->irq_wake) |
| 2229 | device_init_wakeup(dev, 0); |
Felipe Balbi | 28c2c51 | 2008-09-11 11:53:25 +0300 | [diff] [blame] | 2230 | musb_platform_exit(musb); |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2231 | |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2232 | fail1: |
Ming Lei | 681d1e8 | 2013-01-04 23:13:06 +0800 | [diff] [blame] | 2233 | pm_runtime_disable(musb->controller); |
Felipe Balbi | 28c2c51 | 2008-09-11 11:53:25 +0300 | [diff] [blame] | 2234 | dev_err(musb->controller, |
| 2235 | "musb_init_controller failed with status %d\n", status); |
| 2236 | |
Felipe Balbi | 28c2c51 | 2008-09-11 11:53:25 +0300 | [diff] [blame] | 2237 | musb_free(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2238 | |
Sergei Shtylyov | 34e2beb | 2010-03-25 13:14:33 +0200 | [diff] [blame] | 2239 | fail0: |
| 2240 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2241 | return status; |
| 2242 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2243 | } |
| 2244 | |
| 2245 | /*-------------------------------------------------------------------------*/ |
| 2246 | |
| 2247 | /* all implementations (PCI bridge to FPGA, VLYNQ, etc) should just |
| 2248 | * bridge to a platform device; this driver then suffices. |
| 2249 | */ |
Bill Pemberton | 41ac7b3 | 2012-11-19 13:21:48 -0500 | [diff] [blame] | 2250 | static int musb_probe(struct platform_device *pdev) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2251 | { |
| 2252 | struct device *dev = &pdev->dev; |
Hema Kalliguddi | fcf173e | 2010-09-29 11:26:39 -0500 | [diff] [blame] | 2253 | int irq = platform_get_irq_byname(pdev, "mc"); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2254 | struct resource *iomem; |
| 2255 | void __iomem *base; |
| 2256 | |
Varka Bhadram | 1f79b26 | 2014-10-29 21:30:19 +0530 | [diff] [blame] | 2257 | if (irq <= 0) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2258 | return -ENODEV; |
| 2259 | |
Varka Bhadram | 1f79b26 | 2014-10-29 21:30:19 +0530 | [diff] [blame] | 2260 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
Felipe Balbi | b42f7f3 | 2013-02-04 19:04:45 +0200 | [diff] [blame] | 2261 | base = devm_ioremap_resource(dev, iomem); |
| 2262 | if (IS_ERR(base)) |
| 2263 | return PTR_ERR(base); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2264 | |
Felipe Balbi | b42f7f3 | 2013-02-04 19:04:45 +0200 | [diff] [blame] | 2265 | return musb_init_controller(dev, irq, base); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2266 | } |
| 2267 | |
Bill Pemberton | fb4e98a | 2012-11-19 13:26:20 -0500 | [diff] [blame] | 2268 | static int musb_remove(struct platform_device *pdev) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2269 | { |
Ajay Kumar Gupta | 8d2421e | 2012-08-31 11:09:50 +0000 | [diff] [blame] | 2270 | struct device *dev = &pdev->dev; |
| 2271 | struct musb *musb = dev_to_musb(dev); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2272 | |
| 2273 | /* this gets called on rmmod. |
| 2274 | * - Host mode: host may still be active |
| 2275 | * - Peripheral mode: peripheral is deactivated (or never-activated) |
| 2276 | * - OTG mode: both roles are deactivated (or never-activated) |
| 2277 | */ |
Felipe Balbi | 7f7f9e2 | 2010-03-12 10:29:11 +0200 | [diff] [blame] | 2278 | musb_exit_debugfs(musb); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2279 | musb_shutdown(pdev); |
Sergei Shtylyov | 461972d | 2010-03-25 13:14:32 +0200 | [diff] [blame] | 2280 | |
Sebastian Andrzej Siewior | 8d1aad7 | 2013-10-16 12:50:07 +0200 | [diff] [blame] | 2281 | if (musb->dma_controller) |
Tony Lindgren | 7f6283e | 2015-05-01 12:29:28 -0700 | [diff] [blame] | 2282 | musb_dma_controller_destroy(musb->dma_controller); |
Sebastian Andrzej Siewior | 8d1aad7 | 2013-10-16 12:50:07 +0200 | [diff] [blame] | 2283 | |
Sebastian Andrzej Siewior | 66fadea | 2013-11-06 09:25:27 +0100 | [diff] [blame] | 2284 | cancel_work_sync(&musb->irq_work); |
Daniel Mack | 8ed1fb7 | 2013-12-18 20:23:46 +0100 | [diff] [blame] | 2285 | cancel_delayed_work_sync(&musb->finish_resume_work); |
| 2286 | cancel_delayed_work_sync(&musb->deassert_reset_work); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2287 | musb_free(musb); |
Ajay Kumar Gupta | 8d2421e | 2012-08-31 11:09:50 +0000 | [diff] [blame] | 2288 | device_init_wakeup(dev, 0); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2289 | return 0; |
| 2290 | } |
| 2291 | |
| 2292 | #ifdef CONFIG_PM |
| 2293 | |
Felipe Balbi | 3c8a5fc | 2010-12-02 12:28:39 +0200 | [diff] [blame] | 2294 | static void musb_save_context(struct musb *musb) |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2295 | { |
| 2296 | int i; |
| 2297 | void __iomem *musb_base = musb->mregs; |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2298 | void __iomem *epio; |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2299 | |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2300 | musb->context.frame = musb_readw(musb_base, MUSB_FRAME); |
| 2301 | musb->context.testmode = musb_readb(musb_base, MUSB_TESTMODE); |
| 2302 | musb->context.busctl = musb_read_ulpi_buscontrol(musb->mregs); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2303 | musb->context.power = musb_readb(musb_base, MUSB_POWER); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2304 | musb->context.intrusbe = musb_readb(musb_base, MUSB_INTRUSBE); |
| 2305 | musb->context.index = musb_readb(musb_base, MUSB_INDEX); |
| 2306 | musb->context.devctl = musb_readb(musb_base, MUSB_DEVCTL); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2307 | |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2308 | for (i = 0; i < musb->config->num_eps; ++i) { |
Felipe Balbi | e4e5b136 | 2011-06-27 15:57:46 +0300 | [diff] [blame] | 2309 | struct musb_hw_ep *hw_ep; |
| 2310 | |
| 2311 | hw_ep = &musb->endpoints[i]; |
| 2312 | if (!hw_ep) |
| 2313 | continue; |
| 2314 | |
| 2315 | epio = hw_ep->regs; |
| 2316 | if (!epio) |
| 2317 | continue; |
| 2318 | |
Vikram Pandita | ea73755 | 2011-09-07 09:19:23 -0700 | [diff] [blame] | 2319 | musb_writeb(musb_base, MUSB_INDEX, i); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2320 | musb->context.index_regs[i].txmaxp = |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2321 | musb_readw(epio, MUSB_TXMAXP); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2322 | musb->context.index_regs[i].txcsr = |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2323 | musb_readw(epio, MUSB_TXCSR); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2324 | musb->context.index_regs[i].rxmaxp = |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2325 | musb_readw(epio, MUSB_RXMAXP); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2326 | musb->context.index_regs[i].rxcsr = |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2327 | musb_readw(epio, MUSB_RXCSR); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2328 | |
| 2329 | if (musb->dyn_fifo) { |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2330 | musb->context.index_regs[i].txfifoadd = |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2331 | musb_read_txfifoadd(musb_base); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2332 | musb->context.index_regs[i].rxfifoadd = |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2333 | musb_read_rxfifoadd(musb_base); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2334 | musb->context.index_regs[i].txfifosz = |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2335 | musb_read_txfifosz(musb_base); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2336 | musb->context.index_regs[i].rxfifosz = |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2337 | musb_read_rxfifosz(musb_base); |
| 2338 | } |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2339 | |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2340 | musb->context.index_regs[i].txtype = |
| 2341 | musb_readb(epio, MUSB_TXTYPE); |
| 2342 | musb->context.index_regs[i].txinterval = |
| 2343 | musb_readb(epio, MUSB_TXINTERVAL); |
| 2344 | musb->context.index_regs[i].rxtype = |
| 2345 | musb_readb(epio, MUSB_RXTYPE); |
| 2346 | musb->context.index_regs[i].rxinterval = |
| 2347 | musb_readb(epio, MUSB_RXINTERVAL); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2348 | |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2349 | musb->context.index_regs[i].txfunaddr = |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2350 | musb_read_txfunaddr(musb, i); |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2351 | musb->context.index_regs[i].txhubaddr = |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2352 | musb_read_txhubaddr(musb, i); |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2353 | musb->context.index_regs[i].txhubport = |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2354 | musb_read_txhubport(musb, i); |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2355 | |
| 2356 | musb->context.index_regs[i].rxfunaddr = |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2357 | musb_read_rxfunaddr(musb, i); |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2358 | musb->context.index_regs[i].rxhubaddr = |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2359 | musb_read_rxhubaddr(musb, i); |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2360 | musb->context.index_regs[i].rxhubport = |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2361 | musb_read_rxhubport(musb, i); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2362 | } |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2363 | } |
| 2364 | |
Felipe Balbi | 3c8a5fc | 2010-12-02 12:28:39 +0200 | [diff] [blame] | 2365 | static void musb_restore_context(struct musb *musb) |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2366 | { |
| 2367 | int i; |
| 2368 | void __iomem *musb_base = musb->mregs; |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2369 | void __iomem *epio; |
Roger Quadros | 33f8d75 | 2014-02-04 15:29:33 +0200 | [diff] [blame] | 2370 | u8 power; |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2371 | |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2372 | musb_writew(musb_base, MUSB_FRAME, musb->context.frame); |
| 2373 | musb_writeb(musb_base, MUSB_TESTMODE, musb->context.testmode); |
| 2374 | musb_write_ulpi_buscontrol(musb->mregs, musb->context.busctl); |
Roger Quadros | 33f8d75 | 2014-02-04 15:29:33 +0200 | [diff] [blame] | 2375 | |
| 2376 | /* Don't affect SUSPENDM/RESUME bits in POWER reg */ |
| 2377 | power = musb_readb(musb_base, MUSB_POWER); |
| 2378 | power &= MUSB_POWER_SUSPENDM | MUSB_POWER_RESUME; |
| 2379 | musb->context.power &= ~(MUSB_POWER_SUSPENDM | MUSB_POWER_RESUME); |
| 2380 | power |= musb->context.power; |
| 2381 | musb_writeb(musb_base, MUSB_POWER, power); |
| 2382 | |
Sebastian Andrzej Siewior | b18d26f | 2012-10-30 19:52:26 +0100 | [diff] [blame] | 2383 | musb_writew(musb_base, MUSB_INTRTXE, musb->intrtxe); |
Sebastian Andrzej Siewior | af5ec14 | 2012-10-30 19:52:25 +0100 | [diff] [blame] | 2384 | musb_writew(musb_base, MUSB_INTRRXE, musb->intrrxe); |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2385 | musb_writeb(musb_base, MUSB_INTRUSBE, musb->context.intrusbe); |
| 2386 | musb_writeb(musb_base, MUSB_DEVCTL, musb->context.devctl); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2387 | |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2388 | for (i = 0; i < musb->config->num_eps; ++i) { |
Felipe Balbi | e4e5b136 | 2011-06-27 15:57:46 +0300 | [diff] [blame] | 2389 | struct musb_hw_ep *hw_ep; |
| 2390 | |
| 2391 | hw_ep = &musb->endpoints[i]; |
| 2392 | if (!hw_ep) |
| 2393 | continue; |
| 2394 | |
| 2395 | epio = hw_ep->regs; |
| 2396 | if (!epio) |
| 2397 | continue; |
| 2398 | |
Vikram Pandita | ea73755 | 2011-09-07 09:19:23 -0700 | [diff] [blame] | 2399 | musb_writeb(musb_base, MUSB_INDEX, i); |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2400 | musb_writew(epio, MUSB_TXMAXP, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2401 | musb->context.index_regs[i].txmaxp); |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2402 | musb_writew(epio, MUSB_TXCSR, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2403 | musb->context.index_regs[i].txcsr); |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2404 | musb_writew(epio, MUSB_RXMAXP, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2405 | musb->context.index_regs[i].rxmaxp); |
Bob Liu | ae9b2ad | 2010-09-24 13:44:07 +0300 | [diff] [blame] | 2406 | musb_writew(epio, MUSB_RXCSR, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2407 | musb->context.index_regs[i].rxcsr); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2408 | |
| 2409 | if (musb->dyn_fifo) { |
| 2410 | musb_write_txfifosz(musb_base, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2411 | musb->context.index_regs[i].txfifosz); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2412 | musb_write_rxfifosz(musb_base, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2413 | musb->context.index_regs[i].rxfifosz); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2414 | musb_write_txfifoadd(musb_base, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2415 | musb->context.index_regs[i].txfifoadd); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2416 | musb_write_rxfifoadd(musb_base, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2417 | musb->context.index_regs[i].rxfifoadd); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2418 | } |
| 2419 | |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2420 | musb_writeb(epio, MUSB_TXTYPE, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2421 | musb->context.index_regs[i].txtype); |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2422 | musb_writeb(epio, MUSB_TXINTERVAL, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2423 | musb->context.index_regs[i].txinterval); |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2424 | musb_writeb(epio, MUSB_RXTYPE, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2425 | musb->context.index_regs[i].rxtype); |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2426 | musb_writeb(epio, MUSB_RXINTERVAL, |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2427 | |
Felipe Balbi | 032ec49 | 2011-11-24 15:46:26 +0200 | [diff] [blame] | 2428 | musb->context.index_regs[i].rxinterval); |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2429 | musb_write_txfunaddr(musb, i, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2430 | musb->context.index_regs[i].txfunaddr); |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2431 | musb_write_txhubaddr(musb, i, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2432 | musb->context.index_regs[i].txhubaddr); |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2433 | musb_write_txhubport(musb, i, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2434 | musb->context.index_regs[i].txhubport); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2435 | |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2436 | musb_write_rxfunaddr(musb, i, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2437 | musb->context.index_regs[i].rxfunaddr); |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2438 | musb_write_rxhubaddr(musb, i, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2439 | musb->context.index_regs[i].rxhubaddr); |
Hans de Goede | 6cc2af6 | 2015-03-20 20:11:12 +0100 | [diff] [blame] | 2440 | musb_write_rxhubport(musb, i, |
Felipe Balbi | 7421107 | 2010-12-01 13:53:27 +0200 | [diff] [blame] | 2441 | musb->context.index_regs[i].rxhubport); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2442 | } |
Ajay Kumar Gupta | 3c5fec7 | 2011-07-08 15:06:13 +0530 | [diff] [blame] | 2443 | musb_writeb(musb_base, MUSB_INDEX, musb->context.index); |
Ajay Kumar Gupta | 4f712e0 | 2010-01-21 15:33:52 +0200 | [diff] [blame] | 2444 | } |
| 2445 | |
Magnus Damm | 48fea96 | 2009-07-08 13:22:56 +0200 | [diff] [blame] | 2446 | static int musb_suspend(struct device *dev) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2447 | { |
Felipe Balbi | 8220796 | 2011-06-27 15:57:12 +0300 | [diff] [blame] | 2448 | struct musb *musb = dev_to_musb(dev); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2449 | unsigned long flags; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2450 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2451 | spin_lock_irqsave(&musb->lock, flags); |
| 2452 | |
| 2453 | if (is_peripheral_active(musb)) { |
| 2454 | /* FIXME force disconnect unless we know USB will wake |
| 2455 | * the system up quickly enough to respond ... |
| 2456 | */ |
| 2457 | } else if (is_host_active(musb)) { |
| 2458 | /* we know all the children are suspended; sometimes |
| 2459 | * they will even be wakeup-enabled. |
| 2460 | */ |
| 2461 | } |
| 2462 | |
Daniel Mack | c338412 | 2013-11-25 22:26:40 +0100 | [diff] [blame] | 2463 | musb_save_context(musb); |
| 2464 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2465 | spin_unlock_irqrestore(&musb->lock, flags); |
| 2466 | return 0; |
| 2467 | } |
| 2468 | |
Sebastian Andrzej Siewior | 3e87d9a | 2014-10-27 10:49:42 +0100 | [diff] [blame] | 2469 | static int musb_resume(struct device *dev) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2470 | { |
Daniel Mack | c338412 | 2013-11-25 22:26:40 +0100 | [diff] [blame] | 2471 | struct musb *musb = dev_to_musb(dev); |
Sebastian Andrzej Siewior | b87fd2f | 2014-10-27 19:06:18 +0100 | [diff] [blame] | 2472 | u8 devctl; |
| 2473 | u8 mask; |
Daniel Mack | c338412 | 2013-11-25 22:26:40 +0100 | [diff] [blame] | 2474 | |
| 2475 | /* |
| 2476 | * For static cmos like DaVinci, register values were preserved |
Kim Kyuwon | 0ec8fd7 | 2009-03-26 18:56:51 -0700 | [diff] [blame] | 2477 | * unless for some reason the whole soc powered down or the USB |
| 2478 | * module got reset through the PSC (vs just being disabled). |
Daniel Mack | c338412 | 2013-11-25 22:26:40 +0100 | [diff] [blame] | 2479 | * |
| 2480 | * For the DSPS glue layer though, a full register restore has to |
| 2481 | * be done. As it shouldn't harm other platforms, we do it |
| 2482 | * unconditionally. |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2483 | */ |
Daniel Mack | c338412 | 2013-11-25 22:26:40 +0100 | [diff] [blame] | 2484 | |
| 2485 | musb_restore_context(musb); |
| 2486 | |
Sebastian Andrzej Siewior | b87fd2f | 2014-10-27 19:06:18 +0100 | [diff] [blame] | 2487 | devctl = musb_readb(musb->mregs, MUSB_DEVCTL); |
| 2488 | mask = MUSB_DEVCTL_BDEVICE | MUSB_DEVCTL_FSDEV | MUSB_DEVCTL_LSDEV; |
| 2489 | if ((devctl & mask) != (musb->context.devctl & mask)) |
| 2490 | musb->port1_status = 0; |
Sebastian Andrzej Siewior | baadd52 | 2014-10-27 19:06:19 +0100 | [diff] [blame] | 2491 | if (musb->need_finish_resume) { |
| 2492 | musb->need_finish_resume = 0; |
| 2493 | schedule_delayed_work(&musb->finish_resume_work, |
Felipe Balbi | 309be23 | 2015-02-13 14:46:27 -0600 | [diff] [blame] | 2494 | msecs_to_jiffies(USB_RESUME_TIMEOUT)); |
Sebastian Andrzej Siewior | baadd52 | 2014-10-27 19:06:19 +0100 | [diff] [blame] | 2495 | } |
Sebastian Andrzej Siewior | a1fc192 | 2014-11-13 18:33:08 +0100 | [diff] [blame] | 2496 | |
| 2497 | /* |
| 2498 | * The USB HUB code expects the device to be in RPM_ACTIVE once it came |
| 2499 | * out of suspend |
| 2500 | */ |
| 2501 | pm_runtime_disable(dev); |
| 2502 | pm_runtime_set_active(dev); |
| 2503 | pm_runtime_enable(dev); |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2504 | return 0; |
| 2505 | } |
| 2506 | |
Hema HK | 7acc619 | 2011-02-28 14:19:34 +0530 | [diff] [blame] | 2507 | static int musb_runtime_suspend(struct device *dev) |
| 2508 | { |
| 2509 | struct musb *musb = dev_to_musb(dev); |
| 2510 | |
| 2511 | musb_save_context(musb); |
| 2512 | |
| 2513 | return 0; |
| 2514 | } |
| 2515 | |
| 2516 | static int musb_runtime_resume(struct device *dev) |
| 2517 | { |
| 2518 | struct musb *musb = dev_to_musb(dev); |
| 2519 | static int first = 1; |
| 2520 | |
| 2521 | /* |
| 2522 | * When pm_runtime_get_sync called for the first time in driver |
| 2523 | * init, some of the structure is still not initialized which is |
| 2524 | * used in restore function. But clock needs to be |
| 2525 | * enabled before any register access, so |
| 2526 | * pm_runtime_get_sync has to be called. |
| 2527 | * Also context restore without save does not make |
| 2528 | * any sense |
| 2529 | */ |
| 2530 | if (!first) |
| 2531 | musb_restore_context(musb); |
| 2532 | first = 0; |
| 2533 | |
Bin Liu | 9298b4a | 2015-02-03 11:02:10 -0600 | [diff] [blame] | 2534 | if (musb->need_finish_resume) { |
| 2535 | musb->need_finish_resume = 0; |
| 2536 | schedule_delayed_work(&musb->finish_resume_work, |
Felipe Balbi | 309be23 | 2015-02-13 14:46:27 -0600 | [diff] [blame] | 2537 | msecs_to_jiffies(USB_RESUME_TIMEOUT)); |
Bin Liu | 9298b4a | 2015-02-03 11:02:10 -0600 | [diff] [blame] | 2538 | } |
| 2539 | |
Hema HK | 7acc619 | 2011-02-28 14:19:34 +0530 | [diff] [blame] | 2540 | return 0; |
| 2541 | } |
| 2542 | |
Alexey Dobriyan | 4714521 | 2009-12-14 18:00:08 -0800 | [diff] [blame] | 2543 | static const struct dev_pm_ops musb_dev_pm_ops = { |
Magnus Damm | 48fea96 | 2009-07-08 13:22:56 +0200 | [diff] [blame] | 2544 | .suspend = musb_suspend, |
Sebastian Andrzej Siewior | 3e87d9a | 2014-10-27 10:49:42 +0100 | [diff] [blame] | 2545 | .resume = musb_resume, |
Hema HK | 7acc619 | 2011-02-28 14:19:34 +0530 | [diff] [blame] | 2546 | .runtime_suspend = musb_runtime_suspend, |
| 2547 | .runtime_resume = musb_runtime_resume, |
Magnus Damm | 48fea96 | 2009-07-08 13:22:56 +0200 | [diff] [blame] | 2548 | }; |
| 2549 | |
| 2550 | #define MUSB_DEV_PM_OPS (&musb_dev_pm_ops) |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2551 | #else |
Magnus Damm | 48fea96 | 2009-07-08 13:22:56 +0200 | [diff] [blame] | 2552 | #define MUSB_DEV_PM_OPS NULL |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2553 | #endif |
| 2554 | |
| 2555 | static struct platform_driver musb_driver = { |
| 2556 | .driver = { |
| 2557 | .name = (char *)musb_driver_name, |
| 2558 | .bus = &platform_bus_type, |
Magnus Damm | 48fea96 | 2009-07-08 13:22:56 +0200 | [diff] [blame] | 2559 | .pm = MUSB_DEV_PM_OPS, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2560 | }, |
Felipe Balbi | e9e8c85 | 2012-01-26 12:40:23 +0200 | [diff] [blame] | 2561 | .probe = musb_probe, |
Bill Pemberton | 7690417 | 2012-11-19 13:21:08 -0500 | [diff] [blame] | 2562 | .remove = musb_remove, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2563 | .shutdown = musb_shutdown, |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 2564 | }; |
| 2565 | |
Ezequiel Garcia | 89f836a | 2013-12-26 09:24:52 -0300 | [diff] [blame] | 2566 | module_platform_driver(musb_driver); |