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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * Copyright (C) 2000 Andre Hedrick <andre@linux-ide.org>
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * Copyright (C) 2000 Mark Lord <mlord@pobox.com>
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +02004 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
5 *
Linus Torvalds1da177e2005-04-16 15:20:36 -07006 * May be copied or modified under the terms of the GNU General Public License
7 *
8 * Development of this chipset driver was funded
9 * by the nice folks at National Semiconductor.
10 *
11 * Documentation:
12 * CS5530 documentation available from National Semiconductor.
13 */
14
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/module.h>
16#include <linux/types.h>
17#include <linux/kernel.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070018#include <linux/hdreg.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/pci.h>
20#include <linux/init.h>
21#include <linux/ide.h>
Bartlomiej Zolnierkiewicz78829dd2008-02-02 19:56:33 +010022
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <asm/io.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070024
Linus Torvalds1da177e2005-04-16 15:20:36 -070025/*
26 * Here are the standard PIO mode 0-4 timings for each "format".
27 * Format-0 uses fast data reg timings, with slower command reg timings.
28 * Format-1 uses fast timings for all registers, but won't work with all drives.
29 */
30static unsigned int cs5530_pio_timings[2][5] = {
31 {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
32 {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
33};
34
35/*
36 * After chip reset, the PIO timings are set to 0x0000e132, which is not valid.
37 */
38#define CS5530_BAD_PIO(timings) (((timings)&~0x80000000)==0x0000e132)
39#define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20))
40
41/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020042 * cs5530_set_pio_mode - set host controller for PIO mode
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +020043 * @drive: drive
44 * @pio: PIO mode number
Linus Torvalds1da177e2005-04-16 15:20:36 -070045 *
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020046 * Handles setting of PIO mode for the chipset.
Linus Torvalds1da177e2005-04-16 15:20:36 -070047 *
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +020048 * The init_hwif_cs5530() routine guarantees that all drives
Linus Torvalds1da177e2005-04-16 15:20:36 -070049 * will have valid default PIO timings set up before we get here.
50 */
51
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +020052static void cs5530_set_pio_mode(ide_drive_t *drive, const u8 pio)
Linus Torvalds1da177e2005-04-16 15:20:36 -070053{
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020054 unsigned long basereg = CS5530_BASEREG(drive->hwif);
55 unsigned int format = (inl(basereg + 4) >> 31) & 1;
56
57 outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3));
Linus Torvalds1da177e2005-04-16 15:20:36 -070058}
59
60/**
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +020061 * cs5530_udma_filter - UDMA filter
62 * @drive: drive
63 *
64 * cs5530_udma_filter() does UDMA mask filtering for the given drive
65 * taking into the consideration capabilities of the mate device.
66 *
67 * The CS5530 specifies that two drives sharing a cable cannot mix
68 * UDMA/MDMA. It has to be one or the other, for the pair, though
69 * different timings can still be chosen for each drive. We could
70 * set the appropriate timing bits on the fly, but that might be
71 * a bit confusing. So, for now we statically handle this requirement
72 * by looking at our mate drive to see what it is capable of, before
73 * choosing a mode for our own drive.
74 *
75 * Note: This relies on the fact we never fail from UDMA to MWDMA2
76 * but instead drop to PIO.
77 */
78
79static u8 cs5530_udma_filter(ide_drive_t *drive)
80{
81 ide_hwif_t *hwif = drive->hwif;
82 ide_drive_t *mate = &hwif->drives[(drive->dn & 1) ^ 1];
83 struct hd_driveid *mateid = mate->id;
84 u8 mask = hwif->ultra_mask;
85
86 if (mate->present == 0)
87 goto out;
88
89 if ((mateid->capability & 1) && __ide_dma_bad_drive(mate) == 0) {
90 if ((mateid->field_valid & 4) && (mateid->dma_ultra & 7))
91 goto out;
92 if ((mateid->field_valid & 2) && (mateid->dma_mword & 7))
93 mask = 0;
94 }
95out:
96 return mask;
97}
98
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +020099static void cs5530_set_dma_mode(ide_drive_t *drive, const u8 mode)
Bartlomiej Zolnierkiewicz3c3f5d22007-05-16 00:51:44 +0200100{
101 unsigned long basereg;
102 unsigned int reg, timings = 0;
103
Linus Torvalds1da177e2005-04-16 15:20:36 -0700104 switch (mode) {
105 case XFER_UDMA_0: timings = 0x00921250; break;
106 case XFER_UDMA_1: timings = 0x00911140; break;
107 case XFER_UDMA_2: timings = 0x00911030; break;
108 case XFER_MW_DMA_0: timings = 0x00077771; break;
109 case XFER_MW_DMA_1: timings = 0x00012121; break;
110 case XFER_MW_DMA_2: timings = 0x00002020; break;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 }
Bartlomiej Zolnierkiewicz3c3f5d22007-05-16 00:51:44 +0200112 basereg = CS5530_BASEREG(drive->hwif);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100113 reg = inl(basereg + 4); /* get drive0 config register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700114 timings |= reg & 0x80000000; /* preserve PIO format bit */
Bartlomiej Zolnierkiewicz3c3f5d22007-05-16 00:51:44 +0200115 if ((drive-> dn & 1) == 0) { /* are we configuring drive0? */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100116 outl(timings, basereg + 4); /* write drive0 config register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117 } else {
118 if (timings & 0x00100000)
119 reg |= 0x00100000; /* enable UDMA timings for both drives */
120 else
121 reg &= ~0x00100000; /* disable UDMA timings for both drives */
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100122 outl(reg, basereg + 4); /* write drive0 config register */
123 outl(timings, basereg + 12); /* write drive1 config register */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700124 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125}
126
127/**
128 * init_chipset_5530 - set up 5530 bridge
129 * @dev: PCI device
130 * @name: device name
131 *
132 * Initialize the cs5530 bridge for reliable IDE DMA operation.
133 */
134
Herbert Xu88de8e92005-07-03 16:23:08 +0200135static unsigned int __devinit init_chipset_cs5530 (struct pci_dev *dev, const char *name)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700136{
137 struct pci_dev *master_0 = NULL, *cs5530_0 = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700138
Bartlomiej Zolnierkiewiczf7b0d2d2007-08-20 22:42:56 +0200139 if (pci_resource_start(dev, 4) == 0)
140 return -EFAULT;
141
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142 dev = NULL;
Alan Cox652aa162006-10-03 01:14:35 -0700143 while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144 switch (dev->device) {
145 case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
Alan Cox652aa162006-10-03 01:14:35 -0700146 master_0 = pci_dev_get(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700147 break;
148 case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
Alan Cox652aa162006-10-03 01:14:35 -0700149 cs5530_0 = pci_dev_get(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150 break;
151 }
152 }
153 if (!master_0) {
154 printk(KERN_ERR "%s: unable to locate PCI MASTER function\n", name);
Alan Cox652aa162006-10-03 01:14:35 -0700155 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156 }
157 if (!cs5530_0) {
158 printk(KERN_ERR "%s: unable to locate CS5530 LEGACY function\n", name);
Alan Cox652aa162006-10-03 01:14:35 -0700159 goto out;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700160 }
161
Linus Torvalds1da177e2005-04-16 15:20:36 -0700162 /*
163 * Enable BusMaster and MemoryWriteAndInvalidate for the cs5530:
164 * --> OR 0x14 into 16-bit PCI COMMAND reg of function 0 of the cs5530
165 */
166
167 pci_set_master(cs5530_0);
Randy Dunlap694625c2007-07-09 11:55:54 -0700168 pci_try_set_mwi(cs5530_0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169
170 /*
171 * Set PCI CacheLineSize to 16-bytes:
172 * --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0 of the cs5530
173 */
174
175 pci_write_config_byte(cs5530_0, PCI_CACHE_LINE_SIZE, 0x04);
176
177 /*
178 * Disable trapping of UDMA register accesses (Win98 hack):
179 * --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0 of the cs5530
180 */
181
182 pci_write_config_word(cs5530_0, 0xd0, 0x5006);
183
184 /*
185 * Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus:
186 * The other settings are what is necessary to get the register
187 * into a sane state for IDE DMA operation.
188 */
189
190 pci_write_config_byte(master_0, 0x40, 0x1e);
191
192 /*
193 * Set max PCI burst size (16-bytes seems to work best):
194 * 16bytes: set bit-1 at 0x41 (reg value of 0x16)
195 * all others: clear bit-1 at 0x41, and do:
196 * 128bytes: OR 0x00 at 0x41
197 * 256bytes: OR 0x04 at 0x41
198 * 512bytes: OR 0x08 at 0x41
199 * 1024bytes: OR 0x0c at 0x41
200 */
201
202 pci_write_config_byte(master_0, 0x41, 0x14);
203
204 /*
205 * These settings are necessary to get the chip
206 * into a sane state for IDE DMA operation.
207 */
208
209 pci_write_config_byte(master_0, 0x42, 0x00);
210 pci_write_config_byte(master_0, 0x43, 0xc1);
211
Alan Cox652aa162006-10-03 01:14:35 -0700212out:
213 pci_dev_put(master_0);
214 pci_dev_put(cs5530_0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700215 return 0;
216}
217
218/**
219 * init_hwif_cs5530 - initialise an IDE channel
220 * @hwif: IDE to initialize
221 *
222 * This gets invoked by the IDE driver once for each channel. It
223 * performs channel-specific pre-initialization before drive probing.
224 */
225
Herbert Xu88de8e92005-07-03 16:23:08 +0200226static void __devinit init_hwif_cs5530 (ide_hwif_t *hwif)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700227{
228 unsigned long basereg;
229 u32 d0_timings;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230
Bartlomiej Zolnierkiewicz26bcb872007-10-11 23:54:00 +0200231 hwif->set_pio_mode = &cs5530_set_pio_mode;
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200232 hwif->set_dma_mode = &cs5530_set_dma_mode;
Bartlomiej Zolnierkiewicz3c3f5d22007-05-16 00:51:44 +0200233
Linus Torvalds1da177e2005-04-16 15:20:36 -0700234 basereg = CS5530_BASEREG(hwif);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100235 d0_timings = inl(basereg + 0);
Bartlomiej Zolnierkiewicz93104652007-10-16 22:29:53 +0200236 if (CS5530_BAD_PIO(d0_timings))
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100237 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 0);
Bartlomiej Zolnierkiewicz93104652007-10-16 22:29:53 +0200238 if (CS5530_BAD_PIO(inl(basereg + 8)))
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100239 outl(cs5530_pio_timings[(d0_timings >> 31) & 1][0], basereg + 8);
Bartlomiej Zolnierkiewicz93104652007-10-16 22:29:53 +0200240
Bartlomiej Zolnierkiewiczf7b0d2d2007-08-20 22:42:56 +0200241 if (hwif->dma_base == 0)
242 return;
243
Bartlomiej Zolnierkiewicz5fd216b2007-05-16 00:51:43 +0200244 hwif->udma_filter = cs5530_udma_filter;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245}
246
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200247static const struct ide_port_info cs5530_chipset __devinitdata = {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700248 .name = "CS5530",
249 .init_chipset = init_chipset_cs5530,
250 .init_hwif = init_hwif_cs5530,
Bartlomiej Zolnierkiewicz1c513612007-10-19 00:30:10 +0200251 .host_flags = IDE_HFLAG_SERIALIZE |
252 IDE_HFLAG_POST_SET_MODE |
253 IDE_HFLAG_BOOTABLE,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200254 .pio_mask = ATA_PIO4,
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200255 .mwdma_mask = ATA_MWDMA2,
256 .udma_mask = ATA_UDMA2,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700257};
258
259static int __devinit cs5530_init_one(struct pci_dev *dev, const struct pci_device_id *id)
260{
261 return ide_setup_pci_device(dev, &cs5530_chipset);
262}
263
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200264static const struct pci_device_id cs5530_pci_tbl[] = {
265 { PCI_VDEVICE(CYRIX, PCI_DEVICE_ID_CYRIX_5530_IDE), 0 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700266 { 0, },
267};
268MODULE_DEVICE_TABLE(pci, cs5530_pci_tbl);
269
270static struct pci_driver driver = {
271 .name = "CS5530 IDE",
272 .id_table = cs5530_pci_tbl,
273 .probe = cs5530_init_one,
274};
275
Bartlomiej Zolnierkiewicz82ab1ee2007-01-27 13:46:56 +0100276static int __init cs5530_ide_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700277{
278 return ide_pci_register_driver(&driver);
279}
280
281module_init(cs5530_ide_init);
282
283MODULE_AUTHOR("Mark Lord");
284MODULE_DESCRIPTION("PCI driver module for Cyrix/NS 5530 IDE");
285MODULE_LICENSE("GPL");