Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * sata_promise.c - Promise SATA |
| 3 | * |
| 4 | * Maintained by: Jeff Garzik <jgarzik@pobox.com> |
Mikael Pettersson | 5595ddf | 2007-10-30 14:21:55 +0100 | [diff] [blame] | 5 | * Mikael Pettersson <mikpe@it.uu.se> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | * Please ALWAYS copy linux-ide@vger.kernel.org |
| 7 | * on emails. |
| 8 | * |
| 9 | * Copyright 2003-2004 Red Hat, Inc. |
| 10 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | * |
Jeff Garzik | af36d7f | 2005-08-28 20:18:39 -0400 | [diff] [blame] | 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License as published by |
| 14 | * the Free Software Foundation; either version 2, or (at your option) |
| 15 | * any later version. |
| 16 | * |
| 17 | * This program is distributed in the hope that it will be useful, |
| 18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 20 | * GNU General Public License for more details. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License |
| 23 | * along with this program; see the file COPYING. If not, write to |
| 24 | * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. |
| 25 | * |
| 26 | * |
| 27 | * libata documentation is available via 'make {ps|pdf}docs', |
| 28 | * as Documentation/DocBook/libata.* |
| 29 | * |
| 30 | * Hardware information only available under NDA. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 31 | * |
| 32 | */ |
| 33 | |
| 34 | #include <linux/kernel.h> |
| 35 | #include <linux/module.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 36 | #include <linux/gfp.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | #include <linux/pci.h> |
| 38 | #include <linux/init.h> |
| 39 | #include <linux/blkdev.h> |
| 40 | #include <linux/delay.h> |
| 41 | #include <linux/interrupt.h> |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 42 | #include <linux/device.h> |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 43 | #include <scsi/scsi.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | #include <scsi/scsi_host.h> |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 45 | #include <scsi/scsi_cmnd.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 46 | #include <linux/libata.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | #include "sata_promise.h" |
| 48 | |
| 49 | #define DRV_NAME "sata_promise" |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 50 | #define DRV_VERSION "2.12" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | |
| 52 | enum { |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 53 | PDC_MAX_PORTS = 4, |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 54 | PDC_MMIO_BAR = 3, |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 55 | PDC_MAX_PRD = LIBATA_MAX_PRD - 1, /* -1 for ASIC PRD bug workaround */ |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 56 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 57 | /* host register offsets (from host->iomap[PDC_MMIO_BAR]) */ |
| 58 | PDC_INT_SEQMASK = 0x40, /* Mask of asserted SEQ INTs */ |
| 59 | PDC_FLASH_CTL = 0x44, /* Flash control register */ |
Mikael Pettersson | ff7cddf | 2009-09-15 15:08:47 +0200 | [diff] [blame] | 60 | PDC_PCI_CTL = 0x48, /* PCI control/status reg */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 61 | PDC_SATA_PLUG_CSR = 0x6C, /* SATA Plug control/status reg */ |
| 62 | PDC2_SATA_PLUG_CSR = 0x60, /* SATAII Plug control/status reg */ |
| 63 | PDC_TBG_MODE = 0x41C, /* TBG mode (not SATAII) */ |
| 64 | PDC_SLEW_CTL = 0x470, /* slew rate control reg (not SATAII) */ |
| 65 | |
| 66 | /* per-port ATA register offsets (from ap->ioaddr.cmd_addr) */ |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 67 | PDC_FEATURE = 0x04, /* Feature/Error reg (per port) */ |
| 68 | PDC_SECTOR_COUNT = 0x08, /* Sector count reg (per port) */ |
| 69 | PDC_SECTOR_NUMBER = 0x0C, /* Sector number reg (per port) */ |
| 70 | PDC_CYLINDER_LOW = 0x10, /* Cylinder low reg (per port) */ |
| 71 | PDC_CYLINDER_HIGH = 0x14, /* Cylinder high reg (per port) */ |
| 72 | PDC_DEVICE = 0x18, /* Device/Head reg (per port) */ |
| 73 | PDC_COMMAND = 0x1C, /* Command/status reg (per port) */ |
Mikael Pettersson | 73fd456 | 2007-01-10 09:32:34 +0100 | [diff] [blame] | 74 | PDC_ALTSTATUS = 0x38, /* Alternate-status/device-control reg (per port) */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | PDC_PKT_SUBMIT = 0x40, /* Command packet pointer addr */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 76 | PDC_GLOBAL_CTL = 0x48, /* Global control/status (per port) */ |
| 77 | PDC_CTLSTAT = 0x60, /* IDE control and status (per port) */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 78 | |
| 79 | /* per-port SATA register offsets (from ap->ioaddr.scr_addr) */ |
Mikael Pettersson | ff7cddf | 2009-09-15 15:08:47 +0200 | [diff] [blame] | 80 | PDC_SATA_ERROR = 0x04, |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 81 | PDC_PHYMODE4 = 0x14, |
Mikael Pettersson | ff7cddf | 2009-09-15 15:08:47 +0200 | [diff] [blame] | 82 | PDC_LINK_LAYER_ERRORS = 0x6C, |
| 83 | PDC_FPDMA_CTLSTAT = 0xD8, |
| 84 | PDC_INTERNAL_DEBUG_1 = 0xF8, /* also used for PATA */ |
| 85 | PDC_INTERNAL_DEBUG_2 = 0xFC, /* also used for PATA */ |
| 86 | |
| 87 | /* PDC_FPDMA_CTLSTAT bit definitions */ |
| 88 | PDC_FPDMA_CTLSTAT_RESET = 1 << 3, |
| 89 | PDC_FPDMA_CTLSTAT_DMASETUP_INT_FLAG = 1 << 10, |
| 90 | PDC_FPDMA_CTLSTAT_SETDB_INT_FLAG = 1 << 11, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 92 | /* PDC_GLOBAL_CTL bit definitions */ |
| 93 | PDC_PH_ERR = (1 << 8), /* PCI error while loading packet */ |
| 94 | PDC_SH_ERR = (1 << 9), /* PCI error while loading S/G table */ |
| 95 | PDC_DH_ERR = (1 << 10), /* PCI error while loading data */ |
| 96 | PDC2_HTO_ERR = (1 << 12), /* host bus timeout */ |
| 97 | PDC2_ATA_HBA_ERR = (1 << 13), /* error during SATA DATA FIS transmission */ |
| 98 | PDC2_ATA_DMA_CNT_ERR = (1 << 14), /* DMA DATA FIS size differs from S/G count */ |
| 99 | PDC_OVERRUN_ERR = (1 << 19), /* S/G byte count larger than HD requires */ |
| 100 | PDC_UNDERRUN_ERR = (1 << 20), /* S/G byte count less than HD requires */ |
| 101 | PDC_DRIVE_ERR = (1 << 21), /* drive error */ |
| 102 | PDC_PCI_SYS_ERR = (1 << 22), /* PCI system error */ |
| 103 | PDC1_PCI_PARITY_ERR = (1 << 23), /* PCI parity error (from SATA150 driver) */ |
| 104 | PDC1_ERR_MASK = PDC1_PCI_PARITY_ERR, |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 105 | PDC2_ERR_MASK = PDC2_HTO_ERR | PDC2_ATA_HBA_ERR | |
| 106 | PDC2_ATA_DMA_CNT_ERR, |
| 107 | PDC_ERR_MASK = PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | |
| 108 | PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR | |
| 109 | PDC_DRIVE_ERR | PDC_PCI_SYS_ERR | |
| 110 | PDC1_ERR_MASK | PDC2_ERR_MASK, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 111 | |
| 112 | board_2037x = 0, /* FastTrak S150 TX2plus */ |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 113 | board_2037x_pata = 1, /* FastTrak S150 TX2plus PATA port */ |
| 114 | board_20319 = 2, /* FastTrak S150 TX4 */ |
| 115 | board_20619 = 3, /* FastTrak TX4000 */ |
| 116 | board_2057x = 4, /* SATAII150 Tx2plus */ |
Mikael Pettersson | d0e5803 | 2007-06-19 21:53:30 +0200 | [diff] [blame] | 117 | board_2057x_pata = 5, /* SATAII150 Tx2plus PATA port */ |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 118 | board_40518 = 6, /* SATAII150 Tx4 */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 119 | |
Luke Kosewski | 6340f01 | 2006-01-28 12:39:29 -0500 | [diff] [blame] | 120 | PDC_HAS_PATA = (1 << 1), /* PDC20375/20575 has PATA */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 121 | |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 122 | /* Sequence counter control registers bit definitions */ |
| 123 | PDC_SEQCNTRL_INT_MASK = (1 << 5), /* Sequence Interrupt Mask */ |
| 124 | |
| 125 | /* Feature register values */ |
| 126 | PDC_FEATURE_ATAPI_PIO = 0x00, /* ATAPI data xfer by PIO */ |
| 127 | PDC_FEATURE_ATAPI_DMA = 0x01, /* ATAPI data xfer by DMA */ |
| 128 | |
| 129 | /* Device/Head register values */ |
| 130 | PDC_DEVICE_SATA = 0xE0, /* Device/Head value for SATA devices */ |
| 131 | |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 132 | /* PDC_CTLSTAT bit definitions */ |
| 133 | PDC_DMA_ENABLE = (1 << 7), |
| 134 | PDC_IRQ_DISABLE = (1 << 10), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 135 | PDC_RESET = (1 << 11), /* HDMA reset */ |
Jeff Garzik | 5063019 | 2005-12-13 02:29:45 -0500 | [diff] [blame] | 136 | |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 137 | PDC_COMMON_FLAGS = ATA_FLAG_NO_LEGACY | |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 138 | ATA_FLAG_MMIO | |
Jeff Garzik | 3d0a59c | 2005-12-13 22:28:19 -0500 | [diff] [blame] | 139 | ATA_FLAG_PIO_POLLING, |
Mikael Pettersson | b2d1eee | 2006-11-22 22:00:15 +0100 | [diff] [blame] | 140 | |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 141 | /* ap->flags bits */ |
| 142 | PDC_FLAG_GEN_II = (1 << 24), |
| 143 | PDC_FLAG_SATA_PATA = (1 << 25), /* supports SATA + PATA */ |
| 144 | PDC_FLAG_4_PORTS = (1 << 26), /* 4 ports */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 145 | }; |
| 146 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 147 | struct pdc_port_priv { |
| 148 | u8 *pkt; |
| 149 | dma_addr_t pkt_dma; |
| 150 | }; |
| 151 | |
Tejun Heo | 82ef04f | 2008-07-31 17:02:40 +0900 | [diff] [blame] | 152 | static int pdc_sata_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val); |
| 153 | static int pdc_sata_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val); |
Mikael Pettersson | 7715a6f | 2008-05-17 18:49:09 +0200 | [diff] [blame] | 154 | static int pdc_ata_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 155 | static int pdc_common_port_start(struct ata_port *ap); |
| 156 | static int pdc_sata_port_start(struct ata_port *ap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 157 | static void pdc_qc_prep(struct ata_queued_cmd *qc); |
Jeff Garzik | 057ace5 | 2005-10-22 14:27:05 -0400 | [diff] [blame] | 158 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf); |
| 159 | static void pdc_exec_command_mmio(struct ata_port *ap, const struct ata_taskfile *tf); |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 160 | static int pdc_check_atapi_dma(struct ata_queued_cmd *qc); |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 161 | static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 162 | static void pdc_irq_clear(struct ata_port *ap); |
Tejun Heo | 9363c38 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 163 | static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc); |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 164 | static void pdc_freeze(struct ata_port *ap); |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 165 | static void pdc_sata_freeze(struct ata_port *ap); |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 166 | static void pdc_thaw(struct ata_port *ap); |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 167 | static void pdc_sata_thaw(struct ata_port *ap); |
Mikael Pettersson | cadef67 | 2008-10-31 08:03:55 +0100 | [diff] [blame] | 168 | static int pdc_pata_softreset(struct ata_link *link, unsigned int *class, |
| 169 | unsigned long deadline); |
| 170 | static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class, |
| 171 | unsigned long deadline); |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 172 | static void pdc_error_handler(struct ata_port *ap); |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 173 | static void pdc_post_internal_cmd(struct ata_queued_cmd *qc); |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 174 | static int pdc_pata_cable_detect(struct ata_port *ap); |
| 175 | static int pdc_sata_cable_detect(struct ata_port *ap); |
Jeff Garzik | 374b187 | 2005-08-30 05:42:52 -0400 | [diff] [blame] | 176 | |
Jeff Garzik | 193515d | 2005-11-07 00:59:37 -0500 | [diff] [blame] | 177 | static struct scsi_host_template pdc_ata_sht = { |
Tejun Heo | 68d1d07 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 178 | ATA_BASE_SHT(DRV_NAME), |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 179 | .sg_tablesize = PDC_MAX_PRD, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 | .dma_boundary = ATA_DMA_BOUNDARY, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 181 | }; |
| 182 | |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 183 | static const struct ata_port_operations pdc_common_ops = { |
| 184 | .inherits = &ata_sff_port_ops, |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 185 | |
Tejun Heo | 5682ed3 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 186 | .sff_tf_load = pdc_tf_load_mmio, |
| 187 | .sff_exec_command = pdc_exec_command_mmio, |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 188 | .check_atapi_dma = pdc_check_atapi_dma, |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 189 | .qc_prep = pdc_qc_prep, |
Tejun Heo | 9363c38 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 190 | .qc_issue = pdc_qc_issue, |
Alan Cox | c96f173 | 2009-03-24 10:23:46 +0000 | [diff] [blame] | 191 | |
Tejun Heo | 5682ed3 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 192 | .sff_irq_clear = pdc_irq_clear, |
Alan Cox | c96f173 | 2009-03-24 10:23:46 +0000 | [diff] [blame] | 193 | .lost_interrupt = ATA_OP_NULL, |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 194 | |
| 195 | .post_internal_cmd = pdc_post_internal_cmd, |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 196 | .error_handler = pdc_error_handler, |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 197 | }; |
| 198 | |
| 199 | static struct ata_port_operations pdc_sata_ops = { |
| 200 | .inherits = &pdc_common_ops, |
| 201 | .cable_detect = pdc_sata_cable_detect, |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 202 | .freeze = pdc_sata_freeze, |
| 203 | .thaw = pdc_sata_thaw, |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 204 | .scr_read = pdc_sata_scr_read, |
| 205 | .scr_write = pdc_sata_scr_write, |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 206 | .port_start = pdc_sata_port_start, |
Mikael Pettersson | cadef67 | 2008-10-31 08:03:55 +0100 | [diff] [blame] | 207 | .hardreset = pdc_sata_hardreset, |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 208 | }; |
| 209 | |
Mikael Pettersson | 0ae6654 | 2009-09-15 15:07:32 +0200 | [diff] [blame] | 210 | /* First-generation chips need a more restrictive ->check_atapi_dma op, |
| 211 | and ->freeze/thaw that ignore the hotplug controls. */ |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 212 | static struct ata_port_operations pdc_old_sata_ops = { |
| 213 | .inherits = &pdc_sata_ops, |
Mikael Pettersson | 0ae6654 | 2009-09-15 15:07:32 +0200 | [diff] [blame] | 214 | .freeze = pdc_freeze, |
| 215 | .thaw = pdc_thaw, |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 216 | .check_atapi_dma = pdc_old_sata_check_atapi_dma, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | }; |
| 218 | |
Tejun Heo | 029cfd6 | 2008-03-25 12:22:49 +0900 | [diff] [blame] | 219 | static struct ata_port_operations pdc_pata_ops = { |
| 220 | .inherits = &pdc_common_ops, |
| 221 | .cable_detect = pdc_pata_cable_detect, |
Mikael Pettersson | 5387373 | 2007-02-11 23:19:53 +0100 | [diff] [blame] | 222 | .freeze = pdc_freeze, |
| 223 | .thaw = pdc_thaw, |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 224 | .port_start = pdc_common_port_start, |
Mikael Pettersson | cadef67 | 2008-10-31 08:03:55 +0100 | [diff] [blame] | 225 | .softreset = pdc_pata_softreset, |
Jeff Garzik | 2cba582 | 2005-08-29 05:12:30 -0400 | [diff] [blame] | 226 | }; |
| 227 | |
Arjan van de Ven | 98ac62d | 2005-11-28 10:06:23 +0100 | [diff] [blame] | 228 | static const struct ata_port_info pdc_port_info[] = { |
Mikael Pettersson | 5595ddf | 2007-10-30 14:21:55 +0100 | [diff] [blame] | 229 | [board_2037x] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | { |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 231 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | |
| 232 | PDC_FLAG_SATA_PATA, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 233 | .pio_mask = ATA_PIO4, |
| 234 | .mwdma_mask = ATA_MWDMA2, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 235 | .udma_mask = ATA_UDMA6, |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 236 | .port_ops = &pdc_old_sata_ops, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 237 | }, |
| 238 | |
Mikael Pettersson | 5595ddf | 2007-10-30 14:21:55 +0100 | [diff] [blame] | 239 | [board_2037x_pata] = |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 240 | { |
| 241 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 242 | .pio_mask = ATA_PIO4, |
| 243 | .mwdma_mask = ATA_MWDMA2, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 244 | .udma_mask = ATA_UDMA6, |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 245 | .port_ops = &pdc_pata_ops, |
| 246 | }, |
| 247 | |
Mikael Pettersson | 5595ddf | 2007-10-30 14:21:55 +0100 | [diff] [blame] | 248 | [board_20319] = |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 249 | { |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 250 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | |
| 251 | PDC_FLAG_4_PORTS, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 252 | .pio_mask = ATA_PIO4, |
| 253 | .mwdma_mask = ATA_MWDMA2, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 254 | .udma_mask = ATA_UDMA6, |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 255 | .port_ops = &pdc_old_sata_ops, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 256 | }, |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 257 | |
Mikael Pettersson | 5595ddf | 2007-10-30 14:21:55 +0100 | [diff] [blame] | 258 | [board_20619] = |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 259 | { |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 260 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS | |
| 261 | PDC_FLAG_4_PORTS, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 262 | .pio_mask = ATA_PIO4, |
| 263 | .mwdma_mask = ATA_MWDMA2, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 264 | .udma_mask = ATA_UDMA6, |
Jeff Garzik | 2cba582 | 2005-08-29 05:12:30 -0400 | [diff] [blame] | 265 | .port_ops = &pdc_pata_ops, |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 266 | }, |
Yusuf Iskenderoglu | 5a46fe8 | 2006-01-17 08:06:21 -0500 | [diff] [blame] | 267 | |
Mikael Pettersson | 5595ddf | 2007-10-30 14:21:55 +0100 | [diff] [blame] | 268 | [board_2057x] = |
Luke Kosewski | 6340f01 | 2006-01-28 12:39:29 -0500 | [diff] [blame] | 269 | { |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 270 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | |
| 271 | PDC_FLAG_GEN_II | PDC_FLAG_SATA_PATA, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 272 | .pio_mask = ATA_PIO4, |
| 273 | .mwdma_mask = ATA_MWDMA2, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 274 | .udma_mask = ATA_UDMA6, |
Luke Kosewski | 6340f01 | 2006-01-28 12:39:29 -0500 | [diff] [blame] | 275 | .port_ops = &pdc_sata_ops, |
| 276 | }, |
| 277 | |
Mikael Pettersson | 5595ddf | 2007-10-30 14:21:55 +0100 | [diff] [blame] | 278 | [board_2057x_pata] = |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 279 | { |
Jeff Garzik | bb31223 | 2007-05-24 23:35:59 -0400 | [diff] [blame] | 280 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SLAVE_POSS | |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 281 | PDC_FLAG_GEN_II, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 282 | .pio_mask = ATA_PIO4, |
| 283 | .mwdma_mask = ATA_MWDMA2, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 284 | .udma_mask = ATA_UDMA6, |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 285 | .port_ops = &pdc_pata_ops, |
| 286 | }, |
| 287 | |
Mikael Pettersson | 5595ddf | 2007-10-30 14:21:55 +0100 | [diff] [blame] | 288 | [board_40518] = |
Luke Kosewski | 6340f01 | 2006-01-28 12:39:29 -0500 | [diff] [blame] | 289 | { |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 290 | .flags = PDC_COMMON_FLAGS | ATA_FLAG_SATA | |
| 291 | PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS, |
Erik Inge Bolsø | 14bdef9 | 2009-03-14 21:38:24 +0100 | [diff] [blame] | 292 | .pio_mask = ATA_PIO4, |
| 293 | .mwdma_mask = ATA_MWDMA2, |
Jeff Garzik | 469248a | 2007-07-08 01:13:16 -0400 | [diff] [blame] | 294 | .udma_mask = ATA_UDMA6, |
Luke Kosewski | 6340f01 | 2006-01-28 12:39:29 -0500 | [diff] [blame] | 295 | .port_ops = &pdc_sata_ops, |
| 296 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | }; |
| 298 | |
Jeff Garzik | 3b7d697 | 2005-11-10 11:04:11 -0500 | [diff] [blame] | 299 | static const struct pci_device_id pdc_ata_pci_tbl[] = { |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 300 | { PCI_VDEVICE(PROMISE, 0x3371), board_2037x }, |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 301 | { PCI_VDEVICE(PROMISE, 0x3373), board_2037x }, |
| 302 | { PCI_VDEVICE(PROMISE, 0x3375), board_2037x }, |
| 303 | { PCI_VDEVICE(PROMISE, 0x3376), board_2037x }, |
Mikael Pettersson | b2d1eee | 2006-11-22 22:00:15 +0100 | [diff] [blame] | 304 | { PCI_VDEVICE(PROMISE, 0x3570), board_2057x }, |
| 305 | { PCI_VDEVICE(PROMISE, 0x3571), board_2057x }, |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 306 | { PCI_VDEVICE(PROMISE, 0x3574), board_2057x }, |
Mikael Pettersson | d324d462 | 2006-12-06 09:55:43 +0100 | [diff] [blame] | 307 | { PCI_VDEVICE(PROMISE, 0x3577), board_2057x }, |
Mikael Pettersson | b2d1eee | 2006-11-22 22:00:15 +0100 | [diff] [blame] | 308 | { PCI_VDEVICE(PROMISE, 0x3d73), board_2057x }, |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 309 | { PCI_VDEVICE(PROMISE, 0x3d75), board_2057x }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 311 | { PCI_VDEVICE(PROMISE, 0x3318), board_20319 }, |
| 312 | { PCI_VDEVICE(PROMISE, 0x3319), board_20319 }, |
Mikael Pettersson | 7f9992a | 2007-08-29 10:25:37 +0200 | [diff] [blame] | 313 | { PCI_VDEVICE(PROMISE, 0x3515), board_40518 }, |
| 314 | { PCI_VDEVICE(PROMISE, 0x3519), board_40518 }, |
Mikael Pettersson | b2d1eee | 2006-11-22 22:00:15 +0100 | [diff] [blame] | 315 | { PCI_VDEVICE(PROMISE, 0x3d17), board_40518 }, |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 316 | { PCI_VDEVICE(PROMISE, 0x3d18), board_40518 }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 317 | |
Jeff Garzik | 54bb3a94 | 2006-09-27 22:20:11 -0400 | [diff] [blame] | 318 | { PCI_VDEVICE(PROMISE, 0x6629), board_20619 }, |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 319 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 320 | { } /* terminate list */ |
| 321 | }; |
| 322 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 323 | static struct pci_driver pdc_ata_pci_driver = { |
| 324 | .name = DRV_NAME, |
| 325 | .id_table = pdc_ata_pci_tbl, |
| 326 | .probe = pdc_ata_init_one, |
| 327 | .remove = ata_pci_remove_one, |
| 328 | }; |
| 329 | |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 330 | static int pdc_common_port_start(struct ata_port *ap) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 331 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 332 | struct device *dev = ap->host->dev; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 333 | struct pdc_port_priv *pp; |
| 334 | int rc; |
| 335 | |
| 336 | rc = ata_port_start(ap); |
| 337 | if (rc) |
| 338 | return rc; |
| 339 | |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 340 | pp = devm_kzalloc(dev, sizeof(*pp), GFP_KERNEL); |
| 341 | if (!pp) |
| 342 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 344 | pp->pkt = dmam_alloc_coherent(dev, 128, &pp->pkt_dma, GFP_KERNEL); |
| 345 | if (!pp->pkt) |
| 346 | return -ENOMEM; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | |
| 348 | ap->private_data = pp; |
| 349 | |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 350 | return 0; |
| 351 | } |
| 352 | |
| 353 | static int pdc_sata_port_start(struct ata_port *ap) |
| 354 | { |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 355 | int rc; |
| 356 | |
| 357 | rc = pdc_common_port_start(ap); |
| 358 | if (rc) |
| 359 | return rc; |
| 360 | |
Mikael Pettersson | 599b720 | 2006-12-01 10:55:58 +0100 | [diff] [blame] | 361 | /* fix up PHYMODE4 align timing */ |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 362 | if (ap->flags & PDC_FLAG_GEN_II) { |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 363 | void __iomem *sata_mmio = ap->ioaddr.scr_addr; |
Mikael Pettersson | 599b720 | 2006-12-01 10:55:58 +0100 | [diff] [blame] | 364 | unsigned int tmp; |
| 365 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 366 | tmp = readl(sata_mmio + PDC_PHYMODE4); |
Mikael Pettersson | 599b720 | 2006-12-01 10:55:58 +0100 | [diff] [blame] | 367 | tmp = (tmp & ~3) | 1; /* set bits 1:0 = 0:1 */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 368 | writel(tmp, sata_mmio + PDC_PHYMODE4); |
Mikael Pettersson | 599b720 | 2006-12-01 10:55:58 +0100 | [diff] [blame] | 369 | } |
| 370 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 371 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 372 | } |
| 373 | |
Mikael Pettersson | ff7cddf | 2009-09-15 15:08:47 +0200 | [diff] [blame] | 374 | static void pdc_fpdma_clear_interrupt_flag(struct ata_port *ap) |
| 375 | { |
| 376 | void __iomem *sata_mmio = ap->ioaddr.scr_addr; |
| 377 | u32 tmp; |
| 378 | |
| 379 | tmp = readl(sata_mmio + PDC_FPDMA_CTLSTAT); |
| 380 | tmp |= PDC_FPDMA_CTLSTAT_DMASETUP_INT_FLAG; |
| 381 | tmp |= PDC_FPDMA_CTLSTAT_SETDB_INT_FLAG; |
| 382 | |
| 383 | /* It's not allowed to write to the entire FPDMA_CTLSTAT register |
| 384 | when NCQ is running. So do a byte-sized write to bits 10 and 11. */ |
| 385 | writeb(tmp >> 8, sata_mmio + PDC_FPDMA_CTLSTAT + 1); |
| 386 | readb(sata_mmio + PDC_FPDMA_CTLSTAT + 1); /* flush */ |
| 387 | } |
| 388 | |
| 389 | static void pdc_fpdma_reset(struct ata_port *ap) |
| 390 | { |
| 391 | void __iomem *sata_mmio = ap->ioaddr.scr_addr; |
| 392 | u8 tmp; |
| 393 | |
| 394 | tmp = (u8)readl(sata_mmio + PDC_FPDMA_CTLSTAT); |
| 395 | tmp &= 0x7F; |
| 396 | tmp |= PDC_FPDMA_CTLSTAT_RESET; |
| 397 | writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT); |
| 398 | readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */ |
| 399 | udelay(100); |
| 400 | tmp &= ~PDC_FPDMA_CTLSTAT_RESET; |
| 401 | writeb(tmp, sata_mmio + PDC_FPDMA_CTLSTAT); |
| 402 | readl(sata_mmio + PDC_FPDMA_CTLSTAT); /* flush */ |
| 403 | |
| 404 | pdc_fpdma_clear_interrupt_flag(ap); |
| 405 | } |
| 406 | |
| 407 | static void pdc_not_at_command_packet_phase(struct ata_port *ap) |
| 408 | { |
| 409 | void __iomem *sata_mmio = ap->ioaddr.scr_addr; |
| 410 | unsigned int i; |
| 411 | u32 tmp; |
| 412 | |
| 413 | /* check not at ASIC packet command phase */ |
| 414 | for (i = 0; i < 100; ++i) { |
| 415 | writel(0, sata_mmio + PDC_INTERNAL_DEBUG_1); |
| 416 | tmp = readl(sata_mmio + PDC_INTERNAL_DEBUG_2); |
| 417 | if ((tmp & 0xF) != 1) |
| 418 | break; |
| 419 | udelay(100); |
| 420 | } |
| 421 | } |
| 422 | |
| 423 | static void pdc_clear_internal_debug_record_error_register(struct ata_port *ap) |
| 424 | { |
| 425 | void __iomem *sata_mmio = ap->ioaddr.scr_addr; |
| 426 | |
| 427 | writel(0xffffffff, sata_mmio + PDC_SATA_ERROR); |
| 428 | writel(0xffff0000, sata_mmio + PDC_LINK_LAYER_ERRORS); |
| 429 | } |
| 430 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 431 | static void pdc_reset_port(struct ata_port *ap) |
| 432 | { |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 433 | void __iomem *ata_ctlstat_mmio = ap->ioaddr.cmd_addr + PDC_CTLSTAT; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 434 | unsigned int i; |
| 435 | u32 tmp; |
| 436 | |
Mikael Pettersson | ff7cddf | 2009-09-15 15:08:47 +0200 | [diff] [blame] | 437 | if (ap->flags & PDC_FLAG_GEN_II) |
| 438 | pdc_not_at_command_packet_phase(ap); |
| 439 | |
| 440 | tmp = readl(ata_ctlstat_mmio); |
| 441 | tmp |= PDC_RESET; |
| 442 | writel(tmp, ata_ctlstat_mmio); |
| 443 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 444 | for (i = 11; i > 0; i--) { |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 445 | tmp = readl(ata_ctlstat_mmio); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 446 | if (tmp & PDC_RESET) |
| 447 | break; |
| 448 | |
| 449 | udelay(100); |
| 450 | |
| 451 | tmp |= PDC_RESET; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 452 | writel(tmp, ata_ctlstat_mmio); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 453 | } |
| 454 | |
| 455 | tmp &= ~PDC_RESET; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 456 | writel(tmp, ata_ctlstat_mmio); |
| 457 | readl(ata_ctlstat_mmio); /* flush */ |
Mikael Pettersson | ff7cddf | 2009-09-15 15:08:47 +0200 | [diff] [blame] | 458 | |
| 459 | if (sata_scr_valid(&ap->link) && (ap->flags & PDC_FLAG_GEN_II)) { |
| 460 | pdc_fpdma_reset(ap); |
| 461 | pdc_clear_internal_debug_record_error_register(ap); |
| 462 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 463 | } |
| 464 | |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 465 | static int pdc_pata_cable_detect(struct ata_port *ap) |
Jeff Garzik | d3fb4e8 | 2006-05-24 01:43:25 -0400 | [diff] [blame] | 466 | { |
| 467 | u8 tmp; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 468 | void __iomem *ata_mmio = ap->ioaddr.cmd_addr; |
Jeff Garzik | d3fb4e8 | 2006-05-24 01:43:25 -0400 | [diff] [blame] | 469 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 470 | tmp = readb(ata_mmio + PDC_CTLSTAT + 3); |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 471 | if (tmp & 0x01) |
| 472 | return ATA_CBL_PATA40; |
| 473 | return ATA_CBL_PATA80; |
| 474 | } |
| 475 | |
| 476 | static int pdc_sata_cable_detect(struct ata_port *ap) |
| 477 | { |
Alan Cox | e2a9752 | 2007-03-08 23:06:47 +0000 | [diff] [blame] | 478 | return ATA_CBL_SATA; |
Jeff Garzik | d3fb4e8 | 2006-05-24 01:43:25 -0400 | [diff] [blame] | 479 | } |
| 480 | |
Tejun Heo | 82ef04f | 2008-07-31 17:02:40 +0900 | [diff] [blame] | 481 | static int pdc_sata_scr_read(struct ata_link *link, |
| 482 | unsigned int sc_reg, u32 *val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 483 | { |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 484 | if (sc_reg > SCR_CONTROL) |
Tejun Heo | da3dbb1 | 2007-07-16 14:29:40 +0900 | [diff] [blame] | 485 | return -EINVAL; |
Tejun Heo | 82ef04f | 2008-07-31 17:02:40 +0900 | [diff] [blame] | 486 | *val = readl(link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
Tejun Heo | da3dbb1 | 2007-07-16 14:29:40 +0900 | [diff] [blame] | 487 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | } |
| 489 | |
Tejun Heo | 82ef04f | 2008-07-31 17:02:40 +0900 | [diff] [blame] | 490 | static int pdc_sata_scr_write(struct ata_link *link, |
| 491 | unsigned int sc_reg, u32 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 492 | { |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 493 | if (sc_reg > SCR_CONTROL) |
Tejun Heo | da3dbb1 | 2007-07-16 14:29:40 +0900 | [diff] [blame] | 494 | return -EINVAL; |
Tejun Heo | 82ef04f | 2008-07-31 17:02:40 +0900 | [diff] [blame] | 495 | writel(val, link->ap->ioaddr.scr_addr + (sc_reg * 4)); |
Tejun Heo | da3dbb1 | 2007-07-16 14:29:40 +0900 | [diff] [blame] | 496 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 497 | } |
| 498 | |
Mikael Pettersson | fba6edb | 2007-01-13 21:32:30 +0100 | [diff] [blame] | 499 | static void pdc_atapi_pkt(struct ata_queued_cmd *qc) |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 500 | { |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 501 | struct ata_port *ap = qc->ap; |
| 502 | dma_addr_t sg_table = ap->prd_dma; |
| 503 | unsigned int cdb_len = qc->dev->cdb_len; |
| 504 | u8 *cdb = qc->cdb; |
| 505 | struct pdc_port_priv *pp = ap->private_data; |
| 506 | u8 *buf = pp->pkt; |
Al Viro | 826cd15 | 2008-03-25 05:18:11 +0000 | [diff] [blame] | 507 | __le32 *buf32 = (__le32 *) buf; |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 508 | unsigned int dev_sel, feature; |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 509 | |
| 510 | /* set control bits (byte 0), zero delay seq id (byte 3), |
| 511 | * and seq id (byte 2) |
| 512 | */ |
Mikael Pettersson | fba6edb | 2007-01-13 21:32:30 +0100 | [diff] [blame] | 513 | switch (qc->tf.protocol) { |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 514 | case ATAPI_PROT_DMA: |
Mikael Pettersson | fba6edb | 2007-01-13 21:32:30 +0100 | [diff] [blame] | 515 | if (!(qc->tf.flags & ATA_TFLAG_WRITE)) |
| 516 | buf32[0] = cpu_to_le32(PDC_PKT_READ); |
| 517 | else |
| 518 | buf32[0] = 0; |
| 519 | break; |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 520 | case ATAPI_PROT_NODATA: |
Mikael Pettersson | fba6edb | 2007-01-13 21:32:30 +0100 | [diff] [blame] | 521 | buf32[0] = cpu_to_le32(PDC_PKT_NODATA); |
| 522 | break; |
| 523 | default: |
| 524 | BUG(); |
| 525 | break; |
| 526 | } |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 527 | buf32[1] = cpu_to_le32(sg_table); /* S/G table addr */ |
| 528 | buf32[2] = 0; /* no next-packet */ |
| 529 | |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 530 | /* select drive */ |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 531 | if (sata_scr_valid(&ap->link)) |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 532 | dev_sel = PDC_DEVICE_SATA; |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 533 | else |
| 534 | dev_sel = qc->tf.device; |
| 535 | |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 536 | buf[12] = (1 << 5) | ATA_REG_DEVICE; |
| 537 | buf[13] = dev_sel; |
| 538 | buf[14] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_CLEAR_BSY; |
| 539 | buf[15] = dev_sel; /* once more, waiting for BSY to clear */ |
| 540 | |
| 541 | buf[16] = (1 << 5) | ATA_REG_NSECT; |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 542 | buf[17] = qc->tf.nsect; |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 543 | buf[18] = (1 << 5) | ATA_REG_LBAL; |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 544 | buf[19] = qc->tf.lbal; |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 545 | |
| 546 | /* set feature and byte counter registers */ |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 547 | if (qc->tf.protocol != ATAPI_PROT_DMA) |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 548 | feature = PDC_FEATURE_ATAPI_PIO; |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 549 | else |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 550 | feature = PDC_FEATURE_ATAPI_DMA; |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 551 | |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 552 | buf[20] = (1 << 5) | ATA_REG_FEATURE; |
| 553 | buf[21] = feature; |
| 554 | buf[22] = (1 << 5) | ATA_REG_BYTEL; |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 555 | buf[23] = qc->tf.lbam; |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 556 | buf[24] = (1 << 5) | ATA_REG_BYTEH; |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 557 | buf[25] = qc->tf.lbah; |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 558 | |
| 559 | /* send ATAPI packet command 0xA0 */ |
| 560 | buf[26] = (1 << 5) | ATA_REG_CMD; |
Tejun Heo | 46a6714 | 2007-12-04 13:33:30 +0900 | [diff] [blame] | 561 | buf[27] = qc->tf.command; |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 562 | |
| 563 | /* select drive and check DRQ */ |
| 564 | buf[28] = (1 << 5) | ATA_REG_DEVICE | PDC_PKT_WAIT_DRDY; |
| 565 | buf[29] = dev_sel; |
| 566 | |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 567 | /* we can represent cdb lengths 2/4/6/8/10/12/14/16 */ |
| 568 | BUG_ON(cdb_len & ~0x1E); |
| 569 | |
Mikael Pettersson | 4113bb6 | 2007-01-13 21:31:05 +0100 | [diff] [blame] | 570 | /* append the CDB as the final part */ |
| 571 | buf[30] = (((cdb_len >> 1) & 7) << 5) | ATA_REG_DATA | PDC_LAST_REG; |
| 572 | memcpy(buf+31, cdb, cdb_len); |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 573 | } |
| 574 | |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 575 | /** |
| 576 | * pdc_fill_sg - Fill PCI IDE PRD table |
| 577 | * @qc: Metadata associated with taskfile to be transferred |
| 578 | * |
| 579 | * Fill PCI IDE PRD (scatter-gather) table with segments |
| 580 | * associated with the current disk command. |
| 581 | * Make sure hardware does not choke on it. |
| 582 | * |
| 583 | * LOCKING: |
| 584 | * spin_lock_irqsave(host lock) |
| 585 | * |
| 586 | */ |
| 587 | static void pdc_fill_sg(struct ata_queued_cmd *qc) |
| 588 | { |
| 589 | struct ata_port *ap = qc->ap; |
| 590 | struct scatterlist *sg; |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 591 | const u32 SG_COUNT_ASIC_BUG = 41*4; |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 592 | unsigned int si, idx; |
| 593 | u32 len; |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 594 | |
| 595 | if (!(qc->flags & ATA_QCFLAG_DMAMAP)) |
| 596 | return; |
| 597 | |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 598 | idx = 0; |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 599 | for_each_sg(qc->sg, sg, qc->n_elem, si) { |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 600 | u32 addr, offset; |
Harvey Harrison | 6903c0f | 2008-02-13 21:14:08 -0800 | [diff] [blame] | 601 | u32 sg_len; |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 602 | |
| 603 | /* determine if physical DMA addr spans 64K boundary. |
| 604 | * Note h/w doesn't support 64-bit, so we unconditionally |
| 605 | * truncate dma_addr_t to u32. |
| 606 | */ |
| 607 | addr = (u32) sg_dma_address(sg); |
| 608 | sg_len = sg_dma_len(sg); |
| 609 | |
| 610 | while (sg_len) { |
| 611 | offset = addr & 0xffff; |
| 612 | len = sg_len; |
| 613 | if ((offset + sg_len) > 0x10000) |
| 614 | len = 0x10000 - offset; |
| 615 | |
| 616 | ap->prd[idx].addr = cpu_to_le32(addr); |
| 617 | ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff); |
| 618 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); |
| 619 | |
| 620 | idx++; |
| 621 | sg_len -= len; |
| 622 | addr += len; |
| 623 | } |
| 624 | } |
| 625 | |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 626 | len = le32_to_cpu(ap->prd[idx - 1].flags_len); |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 627 | |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 628 | if (len > SG_COUNT_ASIC_BUG) { |
| 629 | u32 addr; |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 630 | |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 631 | VPRINTK("Splitting last PRD.\n"); |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 632 | |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 633 | addr = le32_to_cpu(ap->prd[idx - 1].addr); |
| 634 | ap->prd[idx - 1].flags_len = cpu_to_le32(len - SG_COUNT_ASIC_BUG); |
| 635 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx - 1, addr, SG_COUNT_ASIC_BUG); |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 636 | |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 637 | addr = addr + len - SG_COUNT_ASIC_BUG; |
| 638 | len = SG_COUNT_ASIC_BUG; |
| 639 | ap->prd[idx].addr = cpu_to_le32(addr); |
| 640 | ap->prd[idx].flags_len = cpu_to_le32(len); |
| 641 | VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len); |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 642 | |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 643 | idx++; |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 644 | } |
Tejun Heo | ff2aeb1 | 2007-12-05 16:43:11 +0900 | [diff] [blame] | 645 | |
| 646 | ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT); |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 647 | } |
| 648 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | static void pdc_qc_prep(struct ata_queued_cmd *qc) |
| 650 | { |
| 651 | struct pdc_port_priv *pp = qc->ap->private_data; |
| 652 | unsigned int i; |
| 653 | |
| 654 | VPRINTK("ENTER\n"); |
| 655 | |
| 656 | switch (qc->tf.protocol) { |
| 657 | case ATA_PROT_DMA: |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 658 | pdc_fill_sg(qc); |
Mikael Pettersson | 7715a6f | 2008-05-17 18:49:09 +0200 | [diff] [blame] | 659 | /*FALLTHROUGH*/ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 660 | case ATA_PROT_NODATA: |
| 661 | i = pdc_pkt_header(&qc->tf, qc->ap->prd_dma, |
| 662 | qc->dev->devno, pp->pkt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 663 | if (qc->tf.flags & ATA_TFLAG_LBA48) |
| 664 | i = pdc_prep_lba48(&qc->tf, pp->pkt, i); |
| 665 | else |
| 666 | i = pdc_prep_lba28(&qc->tf, pp->pkt, i); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 667 | pdc_pkt_footer(&qc->tf, pp->pkt, i); |
| 668 | break; |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 669 | case ATAPI_PROT_PIO: |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 670 | pdc_fill_sg(qc); |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 671 | break; |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 672 | case ATAPI_PROT_DMA: |
Mikael Pettersson | b9ccd4a | 2007-10-30 14:20:49 +0100 | [diff] [blame] | 673 | pdc_fill_sg(qc); |
Mikael Pettersson | fba6edb | 2007-01-13 21:32:30 +0100 | [diff] [blame] | 674 | /*FALLTHROUGH*/ |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 675 | case ATAPI_PROT_NODATA: |
Mikael Pettersson | fba6edb | 2007-01-13 21:32:30 +0100 | [diff] [blame] | 676 | pdc_atapi_pkt(qc); |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 677 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 678 | default: |
| 679 | break; |
| 680 | } |
| 681 | } |
| 682 | |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 683 | static int pdc_is_sataii_tx4(unsigned long flags) |
| 684 | { |
| 685 | const unsigned long mask = PDC_FLAG_GEN_II | PDC_FLAG_4_PORTS; |
| 686 | return (flags & mask) == mask; |
| 687 | } |
| 688 | |
| 689 | static unsigned int pdc_port_no_to_ata_no(unsigned int port_no, |
| 690 | int is_sataii_tx4) |
| 691 | { |
| 692 | static const unsigned char sataii_tx4_port_remap[4] = { 3, 1, 0, 2}; |
| 693 | return is_sataii_tx4 ? sataii_tx4_port_remap[port_no] : port_no; |
| 694 | } |
| 695 | |
| 696 | static unsigned int pdc_sata_nr_ports(const struct ata_port *ap) |
| 697 | { |
| 698 | return (ap->flags & PDC_FLAG_4_PORTS) ? 4 : 2; |
| 699 | } |
| 700 | |
| 701 | static unsigned int pdc_sata_ata_port_to_ata_no(const struct ata_port *ap) |
| 702 | { |
| 703 | const struct ata_host *host = ap->host; |
| 704 | unsigned int nr_ports = pdc_sata_nr_ports(ap); |
| 705 | unsigned int i; |
| 706 | |
Mikael Pettersson | 7715a6f | 2008-05-17 18:49:09 +0200 | [diff] [blame] | 707 | for (i = 0; i < nr_ports && host->ports[i] != ap; ++i) |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 708 | ; |
| 709 | BUG_ON(i >= nr_ports); |
| 710 | return pdc_port_no_to_ata_no(i, pdc_is_sataii_tx4(ap->flags)); |
| 711 | } |
| 712 | |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 713 | static void pdc_freeze(struct ata_port *ap) |
| 714 | { |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 715 | void __iomem *ata_mmio = ap->ioaddr.cmd_addr; |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 716 | u32 tmp; |
| 717 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 718 | tmp = readl(ata_mmio + PDC_CTLSTAT); |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 719 | tmp |= PDC_IRQ_DISABLE; |
| 720 | tmp &= ~PDC_DMA_ENABLE; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 721 | writel(tmp, ata_mmio + PDC_CTLSTAT); |
| 722 | readl(ata_mmio + PDC_CTLSTAT); /* flush */ |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 723 | } |
| 724 | |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 725 | static void pdc_sata_freeze(struct ata_port *ap) |
| 726 | { |
| 727 | struct ata_host *host = ap->host; |
| 728 | void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR]; |
Mikael Pettersson | 0ae6654 | 2009-09-15 15:07:32 +0200 | [diff] [blame] | 729 | unsigned int hotplug_offset = PDC2_SATA_PLUG_CSR; |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 730 | unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap); |
| 731 | u32 hotplug_status; |
| 732 | |
| 733 | /* Disable hotplug events on this port. |
| 734 | * |
| 735 | * Locking: |
| 736 | * 1) hotplug register accesses must be serialised via host->lock |
| 737 | * 2) ap->lock == &ap->host->lock |
| 738 | * 3) ->freeze() and ->thaw() are called with ap->lock held |
| 739 | */ |
| 740 | hotplug_status = readl(host_mmio + hotplug_offset); |
| 741 | hotplug_status |= 0x11 << (ata_no + 16); |
| 742 | writel(hotplug_status, host_mmio + hotplug_offset); |
| 743 | readl(host_mmio + hotplug_offset); /* flush */ |
| 744 | |
| 745 | pdc_freeze(ap); |
| 746 | } |
| 747 | |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 748 | static void pdc_thaw(struct ata_port *ap) |
| 749 | { |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 750 | void __iomem *ata_mmio = ap->ioaddr.cmd_addr; |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 751 | u32 tmp; |
| 752 | |
| 753 | /* clear IRQ */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 754 | readl(ata_mmio + PDC_COMMAND); |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 755 | |
| 756 | /* turn IRQ back on */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 757 | tmp = readl(ata_mmio + PDC_CTLSTAT); |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 758 | tmp &= ~PDC_IRQ_DISABLE; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 759 | writel(tmp, ata_mmio + PDC_CTLSTAT); |
| 760 | readl(ata_mmio + PDC_CTLSTAT); /* flush */ |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 761 | } |
| 762 | |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 763 | static void pdc_sata_thaw(struct ata_port *ap) |
| 764 | { |
| 765 | struct ata_host *host = ap->host; |
| 766 | void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR]; |
Mikael Pettersson | 0ae6654 | 2009-09-15 15:07:32 +0200 | [diff] [blame] | 767 | unsigned int hotplug_offset = PDC2_SATA_PLUG_CSR; |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 768 | unsigned int ata_no = pdc_sata_ata_port_to_ata_no(ap); |
| 769 | u32 hotplug_status; |
| 770 | |
| 771 | pdc_thaw(ap); |
| 772 | |
| 773 | /* Enable hotplug events on this port. |
| 774 | * Locking: see pdc_sata_freeze(). |
| 775 | */ |
| 776 | hotplug_status = readl(host_mmio + hotplug_offset); |
| 777 | hotplug_status |= 0x11 << ata_no; |
| 778 | hotplug_status &= ~(0x11 << (ata_no + 16)); |
| 779 | writel(hotplug_status, host_mmio + hotplug_offset); |
| 780 | readl(host_mmio + hotplug_offset); /* flush */ |
| 781 | } |
| 782 | |
Mikael Pettersson | cadef67 | 2008-10-31 08:03:55 +0100 | [diff] [blame] | 783 | static int pdc_pata_softreset(struct ata_link *link, unsigned int *class, |
| 784 | unsigned long deadline) |
| 785 | { |
| 786 | pdc_reset_port(link->ap); |
| 787 | return ata_sff_softreset(link, class, deadline); |
| 788 | } |
| 789 | |
Mikael Pettersson | ff7cddf | 2009-09-15 15:08:47 +0200 | [diff] [blame] | 790 | static unsigned int pdc_ata_port_to_ata_no(const struct ata_port *ap) |
| 791 | { |
| 792 | void __iomem *ata_mmio = ap->ioaddr.cmd_addr; |
| 793 | void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR]; |
| 794 | |
| 795 | /* ata_mmio == host_mmio + 0x200 + ata_no * 0x80 */ |
| 796 | return (ata_mmio - host_mmio - 0x200) / 0x80; |
| 797 | } |
| 798 | |
| 799 | static void pdc_hard_reset_port(struct ata_port *ap) |
| 800 | { |
| 801 | void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR]; |
| 802 | void __iomem *pcictl_b1_mmio = host_mmio + PDC_PCI_CTL + 1; |
| 803 | unsigned int ata_no = pdc_ata_port_to_ata_no(ap); |
| 804 | u8 tmp; |
| 805 | |
| 806 | spin_lock(&ap->host->lock); |
| 807 | |
| 808 | tmp = readb(pcictl_b1_mmio); |
| 809 | tmp &= ~(0x10 << ata_no); |
| 810 | writeb(tmp, pcictl_b1_mmio); |
| 811 | readb(pcictl_b1_mmio); /* flush */ |
| 812 | udelay(100); |
| 813 | tmp |= (0x10 << ata_no); |
| 814 | writeb(tmp, pcictl_b1_mmio); |
| 815 | readb(pcictl_b1_mmio); /* flush */ |
| 816 | |
| 817 | spin_unlock(&ap->host->lock); |
| 818 | } |
| 819 | |
Mikael Pettersson | cadef67 | 2008-10-31 08:03:55 +0100 | [diff] [blame] | 820 | static int pdc_sata_hardreset(struct ata_link *link, unsigned int *class, |
| 821 | unsigned long deadline) |
| 822 | { |
Mikael Pettersson | ff7cddf | 2009-09-15 15:08:47 +0200 | [diff] [blame] | 823 | if (link->ap->flags & PDC_FLAG_GEN_II) |
| 824 | pdc_not_at_command_packet_phase(link->ap); |
| 825 | /* hotplug IRQs should have been masked by pdc_sata_freeze() */ |
| 826 | pdc_hard_reset_port(link->ap); |
Mikael Pettersson | cadef67 | 2008-10-31 08:03:55 +0100 | [diff] [blame] | 827 | pdc_reset_port(link->ap); |
Mikael Pettersson | ff7cddf | 2009-09-15 15:08:47 +0200 | [diff] [blame] | 828 | |
| 829 | /* sata_promise can't reliably acquire the first D2H Reg FIS |
| 830 | * after hardreset. Do non-waiting hardreset and request |
| 831 | * follow-up SRST. |
| 832 | */ |
| 833 | return sata_std_hardreset(link, class, deadline); |
Mikael Pettersson | cadef67 | 2008-10-31 08:03:55 +0100 | [diff] [blame] | 834 | } |
| 835 | |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 836 | static void pdc_error_handler(struct ata_port *ap) |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 837 | { |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 838 | if (!(ap->pflags & ATA_PFLAG_FROZEN)) |
| 839 | pdc_reset_port(ap); |
| 840 | |
Tejun Heo | a1efdab | 2008-03-25 12:22:50 +0900 | [diff] [blame] | 841 | ata_std_error_handler(ap); |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 842 | } |
| 843 | |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 844 | static void pdc_post_internal_cmd(struct ata_queued_cmd *qc) |
| 845 | { |
| 846 | struct ata_port *ap = qc->ap; |
| 847 | |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 848 | /* make DMA engine forget about the failed command */ |
Tejun Heo | a51d644 | 2007-03-20 15:24:11 +0900 | [diff] [blame] | 849 | if (qc->flags & ATA_QCFLAG_FAILED) |
Mikael Pettersson | 25b93d8 | 2006-12-07 00:06:51 +0100 | [diff] [blame] | 850 | pdc_reset_port(ap); |
| 851 | } |
| 852 | |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 853 | static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc, |
| 854 | u32 port_status, u32 err_mask) |
| 855 | { |
Tejun Heo | 9af5c9c | 2007-08-06 18:36:22 +0900 | [diff] [blame] | 856 | struct ata_eh_info *ehi = &ap->link.eh_info; |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 857 | unsigned int ac_err_mask = 0; |
| 858 | |
| 859 | ata_ehi_clear_desc(ehi); |
| 860 | ata_ehi_push_desc(ehi, "port_status 0x%08x", port_status); |
| 861 | port_status &= err_mask; |
| 862 | |
| 863 | if (port_status & PDC_DRIVE_ERR) |
| 864 | ac_err_mask |= AC_ERR_DEV; |
| 865 | if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR)) |
Mikael Pettersson | a2342f4 | 2010-01-09 23:32:06 +0100 | [diff] [blame] | 866 | ac_err_mask |= AC_ERR_OTHER; |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 867 | if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR)) |
| 868 | ac_err_mask |= AC_ERR_ATA_BUS; |
| 869 | if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR |
| 870 | | PDC_PCI_SYS_ERR | PDC1_PCI_PARITY_ERR)) |
| 871 | ac_err_mask |= AC_ERR_HOST_BUS; |
| 872 | |
Tejun Heo | 936fd73 | 2007-08-06 18:36:23 +0900 | [diff] [blame] | 873 | if (sata_scr_valid(&ap->link)) { |
Tejun Heo | da3dbb1 | 2007-07-16 14:29:40 +0900 | [diff] [blame] | 874 | u32 serror; |
| 875 | |
Tejun Heo | 82ef04f | 2008-07-31 17:02:40 +0900 | [diff] [blame] | 876 | pdc_sata_scr_read(&ap->link, SCR_ERROR, &serror); |
Tejun Heo | da3dbb1 | 2007-07-16 14:29:40 +0900 | [diff] [blame] | 877 | ehi->serror |= serror; |
| 878 | } |
Mikael Pettersson | ce2d3ab | 2007-04-07 14:29:51 +0200 | [diff] [blame] | 879 | |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 880 | qc->err_mask |= ac_err_mask; |
Mikael Pettersson | ce2d3ab | 2007-04-07 14:29:51 +0200 | [diff] [blame] | 881 | |
| 882 | pdc_reset_port(ap); |
Mikael Pettersson | 8ffcfd9 | 2007-05-06 22:12:31 +0200 | [diff] [blame] | 883 | |
| 884 | ata_port_abort(ap); |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 885 | } |
| 886 | |
Mikael Pettersson | 7715a6f | 2008-05-17 18:49:09 +0200 | [diff] [blame] | 887 | static unsigned int pdc_host_intr(struct ata_port *ap, |
| 888 | struct ata_queued_cmd *qc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | { |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 890 | unsigned int handled = 0; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 891 | void __iomem *ata_mmio = ap->ioaddr.cmd_addr; |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 892 | u32 port_status, err_mask; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 893 | |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 894 | err_mask = PDC_ERR_MASK; |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 895 | if (ap->flags & PDC_FLAG_GEN_II) |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 896 | err_mask &= ~PDC1_ERR_MASK; |
| 897 | else |
| 898 | err_mask &= ~PDC2_ERR_MASK; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 899 | port_status = readl(ata_mmio + PDC_GLOBAL_CTL); |
Mikael Pettersson | 176efb0 | 2007-03-14 09:51:35 +0100 | [diff] [blame] | 900 | if (unlikely(port_status & err_mask)) { |
| 901 | pdc_error_intr(ap, qc, port_status, err_mask); |
| 902 | return 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 903 | } |
| 904 | |
| 905 | switch (qc->tf.protocol) { |
| 906 | case ATA_PROT_DMA: |
| 907 | case ATA_PROT_NODATA: |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 908 | case ATAPI_PROT_DMA: |
| 909 | case ATAPI_PROT_NODATA: |
Albert Lee | a22e2eb | 2005-12-05 15:38:02 +0800 | [diff] [blame] | 910 | qc->err_mask |= ac_err_mask(ata_wait_idle(ap)); |
| 911 | ata_qc_complete(qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 912 | handled = 1; |
| 913 | break; |
Mikael Pettersson | d0e5803 | 2007-06-19 21:53:30 +0200 | [diff] [blame] | 914 | default: |
Albert Lee | ee500aa | 2005-09-27 17:34:38 +0800 | [diff] [blame] | 915 | ap->stats.idle_irq++; |
| 916 | break; |
Mikael Pettersson | d0e5803 | 2007-06-19 21:53:30 +0200 | [diff] [blame] | 917 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 918 | |
Albert Lee | ee500aa | 2005-09-27 17:34:38 +0800 | [diff] [blame] | 919 | return handled; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 920 | } |
| 921 | |
| 922 | static void pdc_irq_clear(struct ata_port *ap) |
| 923 | { |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 924 | void __iomem *ata_mmio = ap->ioaddr.cmd_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 925 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 926 | readl(ata_mmio + PDC_COMMAND); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 927 | } |
| 928 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 929 | static irqreturn_t pdc_interrupt(int irq, void *dev_instance) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 930 | { |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 931 | struct ata_host *host = dev_instance; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 932 | struct ata_port *ap; |
| 933 | u32 mask = 0; |
| 934 | unsigned int i, tmp; |
| 935 | unsigned int handled = 0; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 936 | void __iomem *host_mmio; |
Mikael Pettersson | a77720a | 2007-07-03 01:09:05 +0200 | [diff] [blame] | 937 | unsigned int hotplug_offset, ata_no; |
| 938 | u32 hotplug_status; |
| 939 | int is_sataii_tx4; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 940 | |
| 941 | VPRINTK("ENTER\n"); |
| 942 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 943 | if (!host || !host->iomap[PDC_MMIO_BAR]) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 944 | VPRINTK("QUICK EXIT\n"); |
| 945 | return IRQ_NONE; |
| 946 | } |
| 947 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 948 | host_mmio = host->iomap[PDC_MMIO_BAR]; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 949 | |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 950 | spin_lock(&host->lock); |
| 951 | |
Mikael Pettersson | a77720a | 2007-07-03 01:09:05 +0200 | [diff] [blame] | 952 | /* read and clear hotplug flags for all ports */ |
Mikael Pettersson | 0ae6654 | 2009-09-15 15:07:32 +0200 | [diff] [blame] | 953 | if (host->ports[0]->flags & PDC_FLAG_GEN_II) { |
Mikael Pettersson | a77720a | 2007-07-03 01:09:05 +0200 | [diff] [blame] | 954 | hotplug_offset = PDC2_SATA_PLUG_CSR; |
Mikael Pettersson | 0ae6654 | 2009-09-15 15:07:32 +0200 | [diff] [blame] | 955 | hotplug_status = readl(host_mmio + hotplug_offset); |
| 956 | if (hotplug_status & 0xff) |
| 957 | writel(hotplug_status | 0xff, host_mmio + hotplug_offset); |
| 958 | hotplug_status &= 0xff; /* clear uninteresting bits */ |
| 959 | } else |
| 960 | hotplug_status = 0; |
Mikael Pettersson | a77720a | 2007-07-03 01:09:05 +0200 | [diff] [blame] | 961 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 962 | /* reading should also clear interrupts */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 963 | mask = readl(host_mmio + PDC_INT_SEQMASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 964 | |
Mikael Pettersson | a77720a | 2007-07-03 01:09:05 +0200 | [diff] [blame] | 965 | if (mask == 0xffffffff && hotplug_status == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 966 | VPRINTK("QUICK EXIT 2\n"); |
Mikael Pettersson | c07a9c4 | 2008-03-23 18:41:01 +0100 | [diff] [blame] | 967 | goto done_irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 968 | } |
Luke Kosewski | 6340f01 | 2006-01-28 12:39:29 -0500 | [diff] [blame] | 969 | |
Mikael Pettersson | 7715a6f | 2008-05-17 18:49:09 +0200 | [diff] [blame] | 970 | mask &= 0xffff; /* only 16 SEQIDs possible */ |
Mikael Pettersson | a77720a | 2007-07-03 01:09:05 +0200 | [diff] [blame] | 971 | if (mask == 0 && hotplug_status == 0) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 972 | VPRINTK("QUICK EXIT 3\n"); |
Luke Kosewski | 6340f01 | 2006-01-28 12:39:29 -0500 | [diff] [blame] | 973 | goto done_irq; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 974 | } |
| 975 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 976 | writel(mask, host_mmio + PDC_INT_SEQMASK); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 977 | |
Mikael Pettersson | a77720a | 2007-07-03 01:09:05 +0200 | [diff] [blame] | 978 | is_sataii_tx4 = pdc_is_sataii_tx4(host->ports[0]->flags); |
| 979 | |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 980 | for (i = 0; i < host->n_ports; i++) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 981 | VPRINTK("port %u\n", i); |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 982 | ap = host->ports[i]; |
Mikael Pettersson | a77720a | 2007-07-03 01:09:05 +0200 | [diff] [blame] | 983 | |
| 984 | /* check for a plug or unplug event */ |
| 985 | ata_no = pdc_port_no_to_ata_no(i, is_sataii_tx4); |
| 986 | tmp = hotplug_status & (0x11 << ata_no); |
Tejun Heo | 3e4ec34 | 2010-05-10 21:41:30 +0200 | [diff] [blame] | 987 | if (tmp) { |
Tejun Heo | 9af5c9c | 2007-08-06 18:36:22 +0900 | [diff] [blame] | 988 | struct ata_eh_info *ehi = &ap->link.eh_info; |
Mikael Pettersson | a77720a | 2007-07-03 01:09:05 +0200 | [diff] [blame] | 989 | ata_ehi_clear_desc(ehi); |
| 990 | ata_ehi_hotplugged(ehi); |
| 991 | ata_ehi_push_desc(ehi, "hotplug_status %#x", tmp); |
| 992 | ata_port_freeze(ap); |
| 993 | ++handled; |
| 994 | continue; |
| 995 | } |
| 996 | |
| 997 | /* check for a packet interrupt */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 998 | tmp = mask & (1 << (i + 1)); |
Tejun Heo | 3e4ec34 | 2010-05-10 21:41:30 +0200 | [diff] [blame] | 999 | if (tmp) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1000 | struct ata_queued_cmd *qc; |
| 1001 | |
Tejun Heo | 9af5c9c | 2007-08-06 18:36:22 +0900 | [diff] [blame] | 1002 | qc = ata_qc_from_tag(ap, ap->link.active_tag); |
Albert Lee | e50362e | 2005-09-27 17:39:50 +0800 | [diff] [blame] | 1003 | if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING))) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1004 | handled += pdc_host_intr(ap, qc); |
| 1005 | } |
| 1006 | } |
| 1007 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1008 | VPRINTK("EXIT\n"); |
| 1009 | |
Luke Kosewski | 6340f01 | 2006-01-28 12:39:29 -0500 | [diff] [blame] | 1010 | done_irq: |
Jeff Garzik | cca3974 | 2006-08-24 03:19:22 -0400 | [diff] [blame] | 1011 | spin_unlock(&host->lock); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1012 | return IRQ_RETVAL(handled); |
| 1013 | } |
| 1014 | |
Mikael Pettersson | 7715a6f | 2008-05-17 18:49:09 +0200 | [diff] [blame] | 1015 | static void pdc_packet_start(struct ata_queued_cmd *qc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1016 | { |
| 1017 | struct ata_port *ap = qc->ap; |
| 1018 | struct pdc_port_priv *pp = ap->private_data; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1019 | void __iomem *host_mmio = ap->host->iomap[PDC_MMIO_BAR]; |
| 1020 | void __iomem *ata_mmio = ap->ioaddr.cmd_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1021 | unsigned int port_no = ap->port_no; |
| 1022 | u8 seq = (u8) (port_no + 1); |
| 1023 | |
| 1024 | VPRINTK("ENTER, ap %p\n", ap); |
| 1025 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1026 | writel(0x00000001, host_mmio + (seq * 4)); |
| 1027 | readl(host_mmio + (seq * 4)); /* flush */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1028 | |
| 1029 | pp->pkt[2] = seq; |
| 1030 | wmb(); /* flush PRD, pkt writes */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1031 | writel(pp->pkt_dma, ata_mmio + PDC_PKT_SUBMIT); |
| 1032 | readl(ata_mmio + PDC_PKT_SUBMIT); /* flush */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1033 | } |
| 1034 | |
Tejun Heo | 9363c38 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 1035 | static unsigned int pdc_qc_issue(struct ata_queued_cmd *qc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1036 | { |
| 1037 | switch (qc->tf.protocol) { |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 1038 | case ATAPI_PROT_NODATA: |
Mikael Pettersson | fba6edb | 2007-01-13 21:32:30 +0100 | [diff] [blame] | 1039 | if (qc->dev->flags & ATA_DFLAG_CDB_INTR) |
| 1040 | break; |
| 1041 | /*FALLTHROUGH*/ |
Tejun Heo | 51b94d2 | 2007-06-08 13:46:55 -0700 | [diff] [blame] | 1042 | case ATA_PROT_NODATA: |
| 1043 | if (qc->tf.flags & ATA_TFLAG_POLLING) |
| 1044 | break; |
| 1045 | /*FALLTHROUGH*/ |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 1046 | case ATAPI_PROT_DMA: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1047 | case ATA_PROT_DMA: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1048 | pdc_packet_start(qc); |
| 1049 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1050 | default: |
| 1051 | break; |
| 1052 | } |
Tejun Heo | 9363c38 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 1053 | return ata_sff_qc_issue(qc); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1054 | } |
| 1055 | |
Jeff Garzik | 057ace5 | 2005-10-22 14:27:05 -0400 | [diff] [blame] | 1056 | static void pdc_tf_load_mmio(struct ata_port *ap, const struct ata_taskfile *tf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1057 | { |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 1058 | WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA); |
Tejun Heo | 9363c38 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 1059 | ata_sff_tf_load(ap, tf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1060 | } |
| 1061 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1062 | static void pdc_exec_command_mmio(struct ata_port *ap, |
| 1063 | const struct ata_taskfile *tf) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1064 | { |
Tejun Heo | 0dc3688 | 2007-12-18 16:34:43 -0500 | [diff] [blame] | 1065 | WARN_ON(tf->protocol == ATA_PROT_DMA || tf->protocol == ATAPI_PROT_DMA); |
Tejun Heo | 9363c38 | 2008-04-07 22:47:16 +0900 | [diff] [blame] | 1066 | ata_sff_exec_command(ap, tf); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1067 | } |
| 1068 | |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 1069 | static int pdc_check_atapi_dma(struct ata_queued_cmd *qc) |
| 1070 | { |
| 1071 | u8 *scsicmd = qc->scsicmd->cmnd; |
| 1072 | int pio = 1; /* atapi dma off by default */ |
| 1073 | |
| 1074 | /* Whitelist commands that may use DMA. */ |
| 1075 | switch (scsicmd[0]) { |
| 1076 | case WRITE_12: |
| 1077 | case WRITE_10: |
| 1078 | case WRITE_6: |
| 1079 | case READ_12: |
| 1080 | case READ_10: |
| 1081 | case READ_6: |
| 1082 | case 0xad: /* READ_DVD_STRUCTURE */ |
| 1083 | case 0xbe: /* READ_CD */ |
| 1084 | pio = 0; |
| 1085 | } |
| 1086 | /* -45150 (FFFF4FA2) to -1 (FFFFFFFF) shall use PIO mode */ |
| 1087 | if (scsicmd[0] == WRITE_10) { |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1088 | unsigned int lba = |
| 1089 | (scsicmd[2] << 24) | |
| 1090 | (scsicmd[3] << 16) | |
| 1091 | (scsicmd[4] << 8) | |
| 1092 | scsicmd[5]; |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 1093 | if (lba >= 0xFFFF4FA2) |
| 1094 | pio = 1; |
| 1095 | } |
| 1096 | return pio; |
| 1097 | } |
| 1098 | |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 1099 | static int pdc_old_sata_check_atapi_dma(struct ata_queued_cmd *qc) |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 1100 | { |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 1101 | /* First generation chips cannot use ATAPI DMA on SATA ports */ |
Mikael Pettersson | 724114a | 2007-03-11 21:20:43 +0100 | [diff] [blame] | 1102 | return 1; |
Mikael Pettersson | 9500618 | 2007-01-09 10:51:46 +0100 | [diff] [blame] | 1103 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1104 | |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1105 | static void pdc_ata_setup_port(struct ata_port *ap, |
| 1106 | void __iomem *base, void __iomem *scr_addr) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1107 | { |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1108 | ap->ioaddr.cmd_addr = base; |
| 1109 | ap->ioaddr.data_addr = base; |
| 1110 | ap->ioaddr.feature_addr = |
| 1111 | ap->ioaddr.error_addr = base + 0x4; |
| 1112 | ap->ioaddr.nsect_addr = base + 0x8; |
| 1113 | ap->ioaddr.lbal_addr = base + 0xc; |
| 1114 | ap->ioaddr.lbam_addr = base + 0x10; |
| 1115 | ap->ioaddr.lbah_addr = base + 0x14; |
| 1116 | ap->ioaddr.device_addr = base + 0x18; |
| 1117 | ap->ioaddr.command_addr = |
| 1118 | ap->ioaddr.status_addr = base + 0x1c; |
| 1119 | ap->ioaddr.altstatus_addr = |
| 1120 | ap->ioaddr.ctl_addr = base + 0x38; |
| 1121 | ap->ioaddr.scr_addr = scr_addr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1122 | } |
| 1123 | |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1124 | static void pdc_host_init(struct ata_host *host) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1125 | { |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1126 | void __iomem *host_mmio = host->iomap[PDC_MMIO_BAR]; |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1127 | int is_gen2 = host->ports[0]->flags & PDC_FLAG_GEN_II; |
Mikael Pettersson | d324d462 | 2006-12-06 09:55:43 +0100 | [diff] [blame] | 1128 | int hotplug_offset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1129 | u32 tmp; |
| 1130 | |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1131 | if (is_gen2) |
Mikael Pettersson | d324d462 | 2006-12-06 09:55:43 +0100 | [diff] [blame] | 1132 | hotplug_offset = PDC2_SATA_PLUG_CSR; |
| 1133 | else |
| 1134 | hotplug_offset = PDC_SATA_PLUG_CSR; |
| 1135 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1136 | /* |
| 1137 | * Except for the hotplug stuff, this is voodoo from the |
| 1138 | * Promise driver. Label this entire section |
| 1139 | * "TODO: figure out why we do this" |
| 1140 | */ |
| 1141 | |
Mikael Pettersson | b2d1eee | 2006-11-22 22:00:15 +0100 | [diff] [blame] | 1142 | /* enable BMR_BURST, maybe change FIFO_SHD to 8 dwords */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1143 | tmp = readl(host_mmio + PDC_FLASH_CTL); |
Mikael Pettersson | b2d1eee | 2006-11-22 22:00:15 +0100 | [diff] [blame] | 1144 | tmp |= 0x02000; /* bit 13 (enable bmr burst) */ |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1145 | if (!is_gen2) |
Mikael Pettersson | b2d1eee | 2006-11-22 22:00:15 +0100 | [diff] [blame] | 1146 | tmp |= 0x10000; /* bit 16 (fifo threshold at 8 dw) */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1147 | writel(tmp, host_mmio + PDC_FLASH_CTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1148 | |
| 1149 | /* clear plug/unplug flags for all ports */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1150 | tmp = readl(host_mmio + hotplug_offset); |
| 1151 | writel(tmp | 0xff, host_mmio + hotplug_offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1152 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1153 | tmp = readl(host_mmio + hotplug_offset); |
Mikael Pettersson | 0ae6654 | 2009-09-15 15:07:32 +0200 | [diff] [blame] | 1154 | if (is_gen2) /* unmask plug/unplug ints */ |
| 1155 | writel(tmp & ~0xff0000, host_mmio + hotplug_offset); |
| 1156 | else /* mask plug/unplug ints */ |
| 1157 | writel(tmp | 0xff0000, host_mmio + hotplug_offset); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1158 | |
Mikael Pettersson | b2d1eee | 2006-11-22 22:00:15 +0100 | [diff] [blame] | 1159 | /* don't initialise TBG or SLEW on 2nd generation chips */ |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1160 | if (is_gen2) |
Mikael Pettersson | b2d1eee | 2006-11-22 22:00:15 +0100 | [diff] [blame] | 1161 | return; |
| 1162 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1163 | /* reduce TBG clock to 133 Mhz. */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1164 | tmp = readl(host_mmio + PDC_TBG_MODE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1165 | tmp &= ~0x30000; /* clear bit 17, 16*/ |
| 1166 | tmp |= 0x10000; /* set bit 17:16 = 0:1 */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1167 | writel(tmp, host_mmio + PDC_TBG_MODE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1168 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1169 | readl(host_mmio + PDC_TBG_MODE); /* flush */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1170 | msleep(10); |
| 1171 | |
| 1172 | /* adjust slew rate control register. */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1173 | tmp = readl(host_mmio + PDC_SLEW_CTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1174 | tmp &= 0xFFFFF03F; /* clear bit 11 ~ 6 */ |
| 1175 | tmp |= 0x00000900; /* set bit 11-9 = 100b , bit 8-6 = 100 */ |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1176 | writel(tmp, host_mmio + PDC_SLEW_CTL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1177 | } |
| 1178 | |
Jeff Garzik | 5796d1c | 2007-10-26 00:03:37 -0400 | [diff] [blame] | 1179 | static int pdc_ata_init_one(struct pci_dev *pdev, |
| 1180 | const struct pci_device_id *ent) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1181 | { |
| 1182 | static int printed_version; |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1183 | const struct ata_port_info *pi = &pdc_port_info[ent->driver_data]; |
| 1184 | const struct ata_port_info *ppi[PDC_MAX_PORTS]; |
| 1185 | struct ata_host *host; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1186 | void __iomem *host_mmio; |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1187 | int n_ports, i, rc; |
Mikael Pettersson | 5ac2fe5 | 2007-05-06 22:14:01 +0200 | [diff] [blame] | 1188 | int is_sataii_tx4; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1189 | |
| 1190 | if (!printed_version++) |
Jeff Garzik | a9524a7 | 2005-10-30 14:39:11 -0500 | [diff] [blame] | 1191 | dev_printk(KERN_DEBUG, &pdev->dev, "version " DRV_VERSION "\n"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1192 | |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1193 | /* enable and acquire resources */ |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1194 | rc = pcim_enable_device(pdev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1195 | if (rc) |
| 1196 | return rc; |
| 1197 | |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 1198 | rc = pcim_iomap_regions(pdev, 1 << PDC_MMIO_BAR, DRV_NAME); |
| 1199 | if (rc == -EBUSY) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1200 | pcim_pin_device(pdev); |
Tejun Heo | 0d5ff56 | 2007-02-01 15:06:36 +0900 | [diff] [blame] | 1201 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1202 | return rc; |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1203 | host_mmio = pcim_iomap_table(pdev)[PDC_MMIO_BAR]; |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1204 | |
| 1205 | /* determine port configuration and setup host */ |
| 1206 | n_ports = 2; |
| 1207 | if (pi->flags & PDC_FLAG_4_PORTS) |
| 1208 | n_ports = 4; |
| 1209 | for (i = 0; i < n_ports; i++) |
| 1210 | ppi[i] = pi; |
| 1211 | |
| 1212 | if (pi->flags & PDC_FLAG_SATA_PATA) { |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1213 | u8 tmp = readb(host_mmio + PDC_FLASH_CTL + 1); |
Mikael Pettersson | d0e5803 | 2007-06-19 21:53:30 +0200 | [diff] [blame] | 1214 | if (!(tmp & 0x80)) |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1215 | ppi[n_ports++] = pi + 1; |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1216 | } |
| 1217 | |
| 1218 | host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); |
| 1219 | if (!host) { |
| 1220 | dev_printk(KERN_ERR, &pdev->dev, "failed to allocate host\n"); |
| 1221 | return -ENOMEM; |
| 1222 | } |
| 1223 | host->iomap = pcim_iomap_table(pdev); |
| 1224 | |
Mikael Pettersson | d0e5803 | 2007-06-19 21:53:30 +0200 | [diff] [blame] | 1225 | is_sataii_tx4 = pdc_is_sataii_tx4(pi->flags); |
Mikael Pettersson | 5ac2fe5 | 2007-05-06 22:14:01 +0200 | [diff] [blame] | 1226 | for (i = 0; i < host->n_ports; i++) { |
Tejun Heo | cbcdd87 | 2007-08-18 13:14:55 +0900 | [diff] [blame] | 1227 | struct ata_port *ap = host->ports[i]; |
Mikael Pettersson | d0e5803 | 2007-06-19 21:53:30 +0200 | [diff] [blame] | 1228 | unsigned int ata_no = pdc_port_no_to_ata_no(i, is_sataii_tx4); |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1229 | unsigned int ata_offset = 0x200 + ata_no * 0x80; |
Tejun Heo | cbcdd87 | 2007-08-18 13:14:55 +0900 | [diff] [blame] | 1230 | unsigned int scr_offset = 0x400 + ata_no * 0x100; |
| 1231 | |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1232 | pdc_ata_setup_port(ap, host_mmio + ata_offset, host_mmio + scr_offset); |
Tejun Heo | cbcdd87 | 2007-08-18 13:14:55 +0900 | [diff] [blame] | 1233 | |
| 1234 | ata_port_pbar_desc(ap, PDC_MMIO_BAR, -1, "mmio"); |
Mikael Pettersson | 821d22c | 2008-05-17 18:48:15 +0200 | [diff] [blame] | 1235 | ata_port_pbar_desc(ap, PDC_MMIO_BAR, ata_offset, "ata"); |
Mikael Pettersson | 5ac2fe5 | 2007-05-06 22:14:01 +0200 | [diff] [blame] | 1236 | } |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1237 | |
| 1238 | /* initialize adapter */ |
| 1239 | pdc_host_init(host); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1240 | |
| 1241 | rc = pci_set_dma_mask(pdev, ATA_DMA_MASK); |
| 1242 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1243 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1244 | rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK); |
| 1245 | if (rc) |
Tejun Heo | 24dc5f3 | 2007-01-20 16:00:28 +0900 | [diff] [blame] | 1246 | return rc; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1247 | |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1248 | /* start host, request IRQ and attach */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1249 | pci_set_master(pdev); |
Tejun Heo | eca25dc | 2007-04-17 23:44:07 +0900 | [diff] [blame] | 1250 | return ata_host_activate(host, pdev->irq, pdc_interrupt, IRQF_SHARED, |
| 1251 | &pdc_ata_sht); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1252 | } |
| 1253 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1254 | static int __init pdc_ata_init(void) |
| 1255 | { |
Pavel Roskin | b788719 | 2006-08-10 18:13:18 +0900 | [diff] [blame] | 1256 | return pci_register_driver(&pdc_ata_pci_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1257 | } |
| 1258 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1259 | static void __exit pdc_ata_exit(void) |
| 1260 | { |
| 1261 | pci_unregister_driver(&pdc_ata_pci_driver); |
| 1262 | } |
| 1263 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1264 | MODULE_AUTHOR("Jeff Garzik"); |
Tobias Lorenz | f497ba7 | 2005-05-12 15:51:01 -0400 | [diff] [blame] | 1265 | MODULE_DESCRIPTION("Promise ATA TX2/TX4/TX4000 low-level driver"); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1266 | MODULE_LICENSE("GPL"); |
| 1267 | MODULE_DEVICE_TABLE(pci, pdc_ata_pci_tbl); |
| 1268 | MODULE_VERSION(DRV_VERSION); |
| 1269 | |
| 1270 | module_init(pdc_ata_init); |
| 1271 | module_exit(pdc_ata_exit); |