Luis R. Rodriguez | d15dd3e | 2009-08-12 09:56:59 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2008-2009 Atheros Communications Inc. |
| 3 | * |
| 4 | * Permission to use, copy, modify, and/or distribute this software for any |
| 5 | * purpose with or without fee is hereby granted, provided that the above |
| 6 | * copyright notice and this permission notice appear in all copies. |
| 7 | * |
| 8 | * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES |
| 9 | * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF |
| 10 | * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR |
| 11 | * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES |
| 12 | * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN |
| 13 | * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF |
| 14 | * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. |
| 15 | */ |
| 16 | |
| 17 | #ifndef ATH_H |
| 18 | #define ATH_H |
| 19 | |
Oleksij Rempel | f1d267c | 2014-01-15 17:37:42 +0100 | [diff] [blame] | 20 | #include <linux/etherdevice.h> |
Luis R. Rodriguez | d15dd3e | 2009-08-12 09:56:59 -0700 | [diff] [blame] | 21 | #include <linux/skbuff.h> |
Luis R. Rodriguez | bcd8f54 | 2009-09-09 22:43:17 -0700 | [diff] [blame] | 22 | #include <linux/if_ether.h> |
Felix Fietkau | b5bfc56 | 2010-10-08 22:13:53 +0200 | [diff] [blame] | 23 | #include <linux/spinlock.h> |
Luis R. Rodriguez | b002a4a | 2009-09-13 00:03:27 -0700 | [diff] [blame] | 24 | #include <net/mac80211.h> |
Luis R. Rodriguez | d15dd3e | 2009-08-12 09:56:59 -0700 | [diff] [blame] | 25 | |
Luis R. Rodriguez | 7e86c10 | 2009-11-04 17:21:01 -0800 | [diff] [blame] | 26 | /* |
| 27 | * The key cache is used for h/w cipher state and also for |
| 28 | * tracking station state such as the current tx antenna. |
| 29 | * We also setup a mapping table between key cache slot indices |
| 30 | * and station state to short-circuit node lookups on rx. |
| 31 | * Different parts have different size key caches. We handle |
| 32 | * up to ATH_KEYMAX entries (could dynamically allocate state). |
| 33 | */ |
| 34 | #define ATH_KEYMAX 128 /* max key cache size we handle */ |
| 35 | |
Luis R. Rodriguez | 1775374 | 2009-09-09 22:19:26 -0700 | [diff] [blame] | 36 | static const u8 ath_bcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; |
| 37 | |
Luis R. Rodriguez | 3d536ac | 2009-11-03 17:07:04 -0800 | [diff] [blame] | 38 | struct ath_ani { |
| 39 | bool caldone; |
Luis R. Rodriguez | 3d536ac | 2009-11-03 17:07:04 -0800 | [diff] [blame] | 40 | unsigned int longcal_timer; |
| 41 | unsigned int shortcal_timer; |
| 42 | unsigned int resetcal_timer; |
| 43 | unsigned int checkani_timer; |
| 44 | struct timer_list timer; |
| 45 | }; |
| 46 | |
Felix Fietkau | b5bfc56 | 2010-10-08 22:13:53 +0200 | [diff] [blame] | 47 | struct ath_cycle_counters { |
| 48 | u32 cycles; |
| 49 | u32 rx_busy; |
| 50 | u32 rx_frame; |
| 51 | u32 tx_frame; |
| 52 | }; |
| 53 | |
Luis R. Rodriguez | 211f585 | 2009-10-06 21:19:07 -0400 | [diff] [blame] | 54 | enum ath_device_state { |
| 55 | ATH_HW_UNAVAILABLE, |
| 56 | ATH_HW_INITIALIZED, |
| 57 | }; |
| 58 | |
Oleksij Rempel | eefa01d | 2014-02-27 11:40:46 +0100 | [diff] [blame] | 59 | enum ath_op_flags { |
| 60 | ATH_OP_INVALID, |
| 61 | ATH_OP_BEACONS, |
| 62 | ATH_OP_ANI_RUN, |
| 63 | ATH_OP_PRIM_STA_VIF, |
| 64 | ATH_OP_HW_RESET, |
| 65 | ATH_OP_SCANNING, |
Felix Fietkau | 26f16c2 | 2014-06-11 16:18:00 +0530 | [diff] [blame] | 66 | ATH_OP_MULTI_CHANNEL, |
Oleksij Rempel | eefa01d | 2014-02-27 11:40:46 +0100 | [diff] [blame] | 67 | }; |
| 68 | |
Sujith | 497ad9a | 2010-04-01 10:28:20 +0530 | [diff] [blame] | 69 | enum ath_bus_type { |
| 70 | ATH_PCI, |
| 71 | ATH_AHB, |
| 72 | ATH_USB, |
| 73 | }; |
| 74 | |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 75 | struct reg_dmn_pair_mapping { |
Kalle Valo | ef8c001 | 2014-02-13 18:13:12 +0200 | [diff] [blame] | 76 | u16 reg_domain; |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 77 | u16 reg_5ghz_ctl; |
| 78 | u16 reg_2ghz_ctl; |
| 79 | }; |
| 80 | |
| 81 | struct ath_regulatory { |
| 82 | char alpha2[2]; |
| 83 | u16 country_code; |
| 84 | u16 max_power_level; |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 85 | u16 current_rd; |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 86 | int16_t power_limit; |
| 87 | struct reg_dmn_pair_mapping *regpair; |
| 88 | }; |
| 89 | |
Bruno Randolf | 34a1305 | 2010-09-08 16:04:33 +0900 | [diff] [blame] | 90 | enum ath_crypt_caps { |
Bruno Randolf | ce2220d | 2010-09-17 11:36:25 +0900 | [diff] [blame] | 91 | ATH_CRYPT_CAP_CIPHER_AESCCM = BIT(0), |
| 92 | ATH_CRYPT_CAP_MIC_COMBINED = BIT(1), |
Bruno Randolf | 34a1305 | 2010-09-08 16:04:33 +0900 | [diff] [blame] | 93 | }; |
| 94 | |
Bruno Randolf | 1bba5b7 | 2010-09-08 16:04:38 +0900 | [diff] [blame] | 95 | struct ath_keyval { |
| 96 | u8 kv_type; |
| 97 | u8 kv_pad; |
| 98 | u16 kv_len; |
| 99 | u8 kv_val[16]; /* TK */ |
| 100 | u8 kv_mic[8]; /* Michael MIC key */ |
| 101 | u8 kv_txmic[8]; /* Michael MIC TX key (used only if the hardware |
| 102 | * supports both MIC keys in the same key cache entry; |
| 103 | * in that case, kv_mic is the RX key) */ |
| 104 | }; |
| 105 | |
| 106 | enum ath_cipher { |
| 107 | ATH_CIPHER_WEP = 0, |
| 108 | ATH_CIPHER_AES_OCB = 1, |
| 109 | ATH_CIPHER_AES_CCM = 2, |
| 110 | ATH_CIPHER_CKIP = 3, |
| 111 | ATH_CIPHER_TKIP = 4, |
| 112 | ATH_CIPHER_CLR = 5, |
| 113 | ATH_CIPHER_MIC = 127 |
| 114 | }; |
| 115 | |
Sujith | 50f5631 | 2010-04-16 11:53:50 +0530 | [diff] [blame] | 116 | /** |
| 117 | * struct ath_ops - Register read/write operations |
| 118 | * |
| 119 | * @read: Register read |
Sujith Manoharan | 09a525d | 2011-01-04 13:17:18 +0530 | [diff] [blame] | 120 | * @multi_read: Multiple register read |
Sujith | 50f5631 | 2010-04-16 11:53:50 +0530 | [diff] [blame] | 121 | * @write: Register write |
| 122 | * @enable_write_buffer: Enable multiple register writes |
Felix Fietkau | 435c161 | 2010-10-05 12:03:42 +0200 | [diff] [blame] | 123 | * @write_flush: flush buffered register writes and disable buffering |
Sujith | 50f5631 | 2010-04-16 11:53:50 +0530 | [diff] [blame] | 124 | */ |
Luis R. Rodriguez | 9e4bffd | 2009-09-10 16:11:21 -0700 | [diff] [blame] | 125 | struct ath_ops { |
| 126 | unsigned int (*read)(void *, u32 reg_offset); |
Sujith Manoharan | 09a525d | 2011-01-04 13:17:18 +0530 | [diff] [blame] | 127 | void (*multi_read)(void *, u32 *addr, u32 *val, u16 count); |
Sujith | 50f5631 | 2010-04-16 11:53:50 +0530 | [diff] [blame] | 128 | void (*write)(void *, u32 val, u32 reg_offset); |
| 129 | void (*enable_write_buffer)(void *); |
Sujith | 50f5631 | 2010-04-16 11:53:50 +0530 | [diff] [blame] | 130 | void (*write_flush) (void *); |
Felix Fietkau | 845e03c | 2011-03-23 20:57:25 +0100 | [diff] [blame] | 131 | u32 (*rmw)(void *, u32 reg_offset, u32 set, u32 clr); |
Luis R. Rodriguez | 9e4bffd | 2009-09-10 16:11:21 -0700 | [diff] [blame] | 132 | }; |
| 133 | |
Luis R. Rodriguez | 5bb1279 | 2009-09-14 00:55:09 -0700 | [diff] [blame] | 134 | struct ath_common; |
Felix Fietkau | 0cb9e06 | 2011-04-13 21:56:43 +0200 | [diff] [blame] | 135 | struct ath_bus_ops; |
Luis R. Rodriguez | 5bb1279 | 2009-09-14 00:55:09 -0700 | [diff] [blame] | 136 | |
Luis R. Rodriguez | d15dd3e | 2009-08-12 09:56:59 -0700 | [diff] [blame] | 137 | struct ath_common { |
Luis R. Rodriguez | 13b8155 | 2009-09-10 17:52:45 -0700 | [diff] [blame] | 138 | void *ah; |
Luis R. Rodriguez | bc974f4 | 2009-09-28 02:54:40 -0400 | [diff] [blame] | 139 | void *priv; |
Luis R. Rodriguez | b002a4a | 2009-09-13 00:03:27 -0700 | [diff] [blame] | 140 | struct ieee80211_hw *hw; |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 141 | int debug_mask; |
Luis R. Rodriguez | 211f585 | 2009-10-06 21:19:07 -0400 | [diff] [blame] | 142 | enum ath_device_state state; |
Oleksij Rempel | eefa01d | 2014-02-27 11:40:46 +0100 | [diff] [blame] | 143 | unsigned long op_flags; |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 144 | |
Luis R. Rodriguez | 3d536ac | 2009-11-03 17:07:04 -0800 | [diff] [blame] | 145 | struct ath_ani ani; |
| 146 | |
Luis R. Rodriguez | d15dd3e | 2009-08-12 09:56:59 -0700 | [diff] [blame] | 147 | u16 cachelsz; |
Luis R. Rodriguez | 1510718 | 2009-09-10 09:22:37 -0700 | [diff] [blame] | 148 | u16 curaid; |
| 149 | u8 macaddr[ETH_ALEN]; |
| 150 | u8 curbssid[ETH_ALEN]; |
| 151 | u8 bssidmask[ETH_ALEN]; |
Luis R. Rodriguez | c46917b | 2009-09-13 02:42:02 -0700 | [diff] [blame] | 152 | |
Luis R. Rodriguez | cc861f7 | 2009-11-04 09:11:34 -0800 | [diff] [blame] | 153 | u32 rx_bufsize; |
| 154 | |
Luis R. Rodriguez | 7e86c10 | 2009-11-04 17:21:01 -0800 | [diff] [blame] | 155 | u32 keymax; |
| 156 | DECLARE_BITMAP(keymap, ATH_KEYMAX); |
Felix Fietkau | 56363dd | 2010-08-28 18:21:21 +0200 | [diff] [blame] | 157 | DECLARE_BITMAP(tkip_keymap, ATH_KEYMAX); |
Felix Fietkau | bed3d9c | 2012-06-23 19:23:31 +0200 | [diff] [blame] | 158 | DECLARE_BITMAP(ccmp_keymap, ATH_KEYMAX); |
Bruno Randolf | 34a1305 | 2010-09-08 16:04:33 +0900 | [diff] [blame] | 159 | enum ath_crypt_caps crypt_caps; |
Luis R. Rodriguez | 7e86c10 | 2009-11-04 17:21:01 -0800 | [diff] [blame] | 160 | |
Felix Fietkau | dfdac8a | 2010-10-08 22:13:51 +0200 | [diff] [blame] | 161 | unsigned int clockrate; |
| 162 | |
Felix Fietkau | b5bfc56 | 2010-10-08 22:13:53 +0200 | [diff] [blame] | 163 | spinlock_t cc_lock; |
| 164 | struct ath_cycle_counters cc_ani; |
| 165 | struct ath_cycle_counters cc_survey; |
| 166 | |
Luis R. Rodriguez | 608b88c | 2009-08-17 18:07:23 -0700 | [diff] [blame] | 167 | struct ath_regulatory regulatory; |
Luis R. Rodriguez | de1c732 | 2011-12-08 23:59:24 +0530 | [diff] [blame] | 168 | struct ath_regulatory reg_world_copy; |
Luis R. Rodriguez | 9adca12 | 2009-09-10 18:04:47 -0700 | [diff] [blame] | 169 | const struct ath_ops *ops; |
Luis R. Rodriguez | 5bb1279 | 2009-09-14 00:55:09 -0700 | [diff] [blame] | 170 | const struct ath_bus_ops *bus_ops; |
Vasanthakumar Thiagarajan | 8f5dcb1 | 2010-11-26 06:10:06 -0800 | [diff] [blame] | 171 | |
| 172 | bool btcoex_enabled; |
Mohammed Shafi Shajakhan | 05c0be2 | 2011-05-26 10:56:15 +0530 | [diff] [blame] | 173 | bool disable_ani; |
Sujith Manoharan | 6308130 | 2013-08-04 14:21:55 +0530 | [diff] [blame] | 174 | bool bt_ant_diversity; |
Oleksij Rempel | 2f2cb32 | 2014-02-04 10:27:38 +0100 | [diff] [blame] | 175 | |
| 176 | int last_rssi; |
Oleksij Rempel | 13f7105 | 2014-02-25 14:48:50 +0100 | [diff] [blame] | 177 | struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; |
Luis R. Rodriguez | d15dd3e | 2009-08-12 09:56:59 -0700 | [diff] [blame] | 178 | }; |
| 179 | |
| 180 | struct sk_buff *ath_rxbuf_alloc(struct ath_common *common, |
| 181 | u32 len, |
| 182 | gfp_t gfp_mask); |
Oleksij Rempel | f1d267c | 2014-01-15 17:37:42 +0100 | [diff] [blame] | 183 | bool ath_is_mybeacon(struct ath_common *common, struct ieee80211_hdr *hdr); |
Luis R. Rodriguez | d15dd3e | 2009-08-12 09:56:59 -0700 | [diff] [blame] | 184 | |
Luis R. Rodriguez | 13b8155 | 2009-09-10 17:52:45 -0700 | [diff] [blame] | 185 | void ath_hw_setbssidmask(struct ath_common *common); |
Bruno Randolf | 1bba5b7 | 2010-09-08 16:04:38 +0900 | [diff] [blame] | 186 | void ath_key_delete(struct ath_common *common, struct ieee80211_key_conf *key); |
| 187 | int ath_key_config(struct ath_common *common, |
| 188 | struct ieee80211_vif *vif, |
| 189 | struct ieee80211_sta *sta, |
| 190 | struct ieee80211_key_conf *key); |
| 191 | bool ath_hw_keyreset(struct ath_common *common, u16 entry); |
Felix Fietkau | b5bfc56 | 2010-10-08 22:13:53 +0200 | [diff] [blame] | 192 | void ath_hw_cycle_counters_update(struct ath_common *common); |
| 193 | int32_t ath_hw_get_listen_time(struct ath_common *common); |
Luis R. Rodriguez | 13b8155 | 2009-09-10 17:52:45 -0700 | [diff] [blame] | 194 | |
Ben Greear | 98b36a0 | 2012-03-08 10:20:55 -0800 | [diff] [blame] | 195 | __printf(3, 4) |
| 196 | void ath_printk(const char *level, const struct ath_common *common, |
| 197 | const char *fmt, ...); |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 198 | |
| 199 | #define ath_emerg(common, fmt, ...) \ |
Ben Greear | 98b36a0 | 2012-03-08 10:20:55 -0800 | [diff] [blame] | 200 | ath_printk(KERN_EMERG, common, fmt, ##__VA_ARGS__) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 201 | #define ath_alert(common, fmt, ...) \ |
Ben Greear | 98b36a0 | 2012-03-08 10:20:55 -0800 | [diff] [blame] | 202 | ath_printk(KERN_ALERT, common, fmt, ##__VA_ARGS__) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 203 | #define ath_crit(common, fmt, ...) \ |
Ben Greear | 98b36a0 | 2012-03-08 10:20:55 -0800 | [diff] [blame] | 204 | ath_printk(KERN_CRIT, common, fmt, ##__VA_ARGS__) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 205 | #define ath_err(common, fmt, ...) \ |
Ben Greear | 98b36a0 | 2012-03-08 10:20:55 -0800 | [diff] [blame] | 206 | ath_printk(KERN_ERR, common, fmt, ##__VA_ARGS__) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 207 | #define ath_warn(common, fmt, ...) \ |
Ben Greear | 98b36a0 | 2012-03-08 10:20:55 -0800 | [diff] [blame] | 208 | ath_printk(KERN_WARNING, common, fmt, ##__VA_ARGS__) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 209 | #define ath_notice(common, fmt, ...) \ |
Ben Greear | 98b36a0 | 2012-03-08 10:20:55 -0800 | [diff] [blame] | 210 | ath_printk(KERN_NOTICE, common, fmt, ##__VA_ARGS__) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 211 | #define ath_info(common, fmt, ...) \ |
Ben Greear | 98b36a0 | 2012-03-08 10:20:55 -0800 | [diff] [blame] | 212 | ath_printk(KERN_INFO, common, fmt, ##__VA_ARGS__) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 213 | |
| 214 | /** |
| 215 | * enum ath_debug_level - atheros wireless debug level |
| 216 | * |
| 217 | * @ATH_DBG_RESET: reset processing |
| 218 | * @ATH_DBG_QUEUE: hardware queue management |
| 219 | * @ATH_DBG_EEPROM: eeprom processing |
| 220 | * @ATH_DBG_CALIBRATE: periodic calibration |
| 221 | * @ATH_DBG_INTERRUPT: interrupt processing |
| 222 | * @ATH_DBG_REGULATORY: regulatory processing |
| 223 | * @ATH_DBG_ANI: adaptive noise immunitive processing |
| 224 | * @ATH_DBG_XMIT: basic xmit operation |
| 225 | * @ATH_DBG_BEACON: beacon handling |
| 226 | * @ATH_DBG_CONFIG: configuration of the hardware |
| 227 | * @ATH_DBG_FATAL: fatal errors, this is the default, DBG_DEFAULT |
| 228 | * @ATH_DBG_PS: power save processing |
| 229 | * @ATH_DBG_HWTIMER: hardware timer handling |
| 230 | * @ATH_DBG_BTCOEX: bluetooth coexistance |
| 231 | * @ATH_DBG_BSTUCK: stuck beacons |
Luis R. Rodriguez | 55e435d | 2011-12-14 13:56:36 -0800 | [diff] [blame] | 232 | * @ATH_DBG_MCI: Message Coexistence Interface, a private protocol |
| 233 | * used exclusively for WLAN-BT coexistence starting from |
| 234 | * AR9462. |
Zefir Kurtisi | 9b203c8 | 2011-12-14 20:16:32 -0800 | [diff] [blame] | 235 | * @ATH_DBG_DFS: radar datection |
Mohammed Shafi Shajakhan | b3ba6c5 | 2012-07-10 14:56:34 +0530 | [diff] [blame] | 236 | * @ATH_DBG_WOW: Wake on Wireless |
Lorenzo Bianconi | c774d57 | 2014-09-16 02:13:09 +0200 | [diff] [blame^] | 237 | * @ATH_DBG_DYNACK: dynack handling |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 238 | * @ATH_DBG_ANY: enable all debugging |
| 239 | * |
| 240 | * The debug level is used to control the amount and type of debugging output |
| 241 | * we want to see. Each driver has its own method for enabling debugging and |
| 242 | * modifying debug level states -- but this is typically done through a |
| 243 | * module parameter 'debug' along with a respective 'debug' debugfs file |
| 244 | * entry. |
| 245 | */ |
| 246 | enum ATH_DEBUG { |
| 247 | ATH_DBG_RESET = 0x00000001, |
| 248 | ATH_DBG_QUEUE = 0x00000002, |
| 249 | ATH_DBG_EEPROM = 0x00000004, |
| 250 | ATH_DBG_CALIBRATE = 0x00000008, |
| 251 | ATH_DBG_INTERRUPT = 0x00000010, |
| 252 | ATH_DBG_REGULATORY = 0x00000020, |
| 253 | ATH_DBG_ANI = 0x00000040, |
| 254 | ATH_DBG_XMIT = 0x00000080, |
| 255 | ATH_DBG_BEACON = 0x00000100, |
| 256 | ATH_DBG_CONFIG = 0x00000200, |
| 257 | ATH_DBG_FATAL = 0x00000400, |
| 258 | ATH_DBG_PS = 0x00000800, |
Sujith Manoharan | 1433531 | 2013-06-18 10:13:39 +0530 | [diff] [blame] | 259 | ATH_DBG_BTCOEX = 0x00001000, |
| 260 | ATH_DBG_WMI = 0x00002000, |
| 261 | ATH_DBG_BSTUCK = 0x00004000, |
| 262 | ATH_DBG_MCI = 0x00008000, |
| 263 | ATH_DBG_DFS = 0x00010000, |
| 264 | ATH_DBG_WOW = 0x00020000, |
Sujith Manoharan | 27328a7 | 2014-08-22 20:39:24 +0530 | [diff] [blame] | 265 | ATH_DBG_CHAN_CTX = 0x00040000, |
Lorenzo Bianconi | c774d57 | 2014-09-16 02:13:09 +0200 | [diff] [blame^] | 266 | ATH_DBG_DYNACK = 0x00080000, |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 267 | ATH_DBG_ANY = 0xffffffff |
| 268 | }; |
| 269 | |
| 270 | #define ATH_DBG_DEFAULT (ATH_DBG_FATAL) |
| 271 | |
| 272 | #ifdef CONFIG_ATH_DEBUG |
| 273 | |
Joe Perches | 7b8112d | 2011-08-26 01:56:38 -0700 | [diff] [blame] | 274 | #define ath_dbg(common, dbg_mask, fmt, ...) \ |
| 275 | do { \ |
Joe Perches | d2182b6 | 2011-12-15 14:55:53 -0800 | [diff] [blame] | 276 | if ((common)->debug_mask & ATH_DBG_##dbg_mask) \ |
Ben Greear | 98b36a0 | 2012-03-08 10:20:55 -0800 | [diff] [blame] | 277 | ath_printk(KERN_DEBUG, common, fmt, ##__VA_ARGS__); \ |
Joe Perches | 7b8112d | 2011-08-26 01:56:38 -0700 | [diff] [blame] | 278 | } while (0) |
| 279 | |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 280 | #define ATH_DBG_WARN(foo, arg...) WARN(foo, arg) |
Ben Greear | d7fd1b50 | 2010-12-06 13:13:07 -0800 | [diff] [blame] | 281 | #define ATH_DBG_WARN_ON_ONCE(foo) WARN_ON_ONCE(foo) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 282 | |
| 283 | #else |
| 284 | |
Joe Perches | b9075fa | 2011-10-31 17:11:33 -0700 | [diff] [blame] | 285 | static inline __attribute__ ((format (printf, 3, 4))) |
Joe Perches | d2182b6 | 2011-12-15 14:55:53 -0800 | [diff] [blame] | 286 | void _ath_dbg(struct ath_common *common, enum ATH_DEBUG dbg_mask, |
Joe Perches | 7b8112d | 2011-08-26 01:56:38 -0700 | [diff] [blame] | 287 | const char *fmt, ...) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 288 | { |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 289 | } |
Joe Perches | d2182b6 | 2011-12-15 14:55:53 -0800 | [diff] [blame] | 290 | #define ath_dbg(common, dbg_mask, fmt, ...) \ |
| 291 | _ath_dbg(common, ATH_DBG_##dbg_mask, fmt, ##__VA_ARGS__) |
| 292 | |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 293 | #define ATH_DBG_WARN(foo, arg...) do {} while (0) |
John W. Linville | b761337 | 2010-12-09 09:08:47 -0500 | [diff] [blame] | 294 | #define ATH_DBG_WARN_ON_ONCE(foo) ({ \ |
| 295 | int __ret_warn_once = !!(foo); \ |
| 296 | unlikely(__ret_warn_once); \ |
| 297 | }) |
Joe Perches | 21a99f9 | 2010-12-02 19:12:35 -0800 | [diff] [blame] | 298 | |
| 299 | #endif /* CONFIG_ATH_DEBUG */ |
| 300 | |
| 301 | /** Returns string describing opmode, or NULL if unknown mode. */ |
| 302 | #ifdef CONFIG_ATH_DEBUG |
| 303 | const char *ath_opmode_to_string(enum nl80211_iftype opmode); |
| 304 | #else |
| 305 | static inline const char *ath_opmode_to_string(enum nl80211_iftype opmode) |
| 306 | { |
| 307 | return "UNKNOWN"; |
| 308 | } |
| 309 | #endif |
| 310 | |
Luis R. Rodriguez | d15dd3e | 2009-08-12 09:56:59 -0700 | [diff] [blame] | 311 | #endif /* ATH_H */ |