blob: c49522efa7b3bce4aa71d4c006acc1ee86a95be2 [file] [log] [blame]
Magnus Damm119f5e42013-03-13 20:32:13 +09001/*
2 * Renesas R-Car GPIO Support
3 *
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +09004 * Copyright (C) 2014 Renesas Electronics Corporation
Magnus Damm119f5e42013-03-13 20:32:13 +09005 * Copyright (C) 2013 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/err.h>
18#include <linux/gpio.h>
19#include <linux/init.h>
20#include <linux/interrupt.h>
21#include <linux/io.h>
22#include <linux/ioport.h>
23#include <linux/irq.h>
Magnus Damm119f5e42013-03-13 20:32:13 +090024#include <linux/module.h>
Sachin Kamatbd0bf462013-10-16 15:35:02 +053025#include <linux/of.h>
Laurent Pinchartdc3465a2013-03-10 03:27:00 +010026#include <linux/pinctrl/consumer.h>
Magnus Damm119f5e42013-03-13 20:32:13 +090027#include <linux/platform_data/gpio-rcar.h>
28#include <linux/platform_device.h>
Geert Uytterhoevendf0c6c82014-04-14 20:33:13 +020029#include <linux/pm_runtime.h>
Magnus Damm119f5e42013-03-13 20:32:13 +090030#include <linux/spinlock.h>
31#include <linux/slab.h>
32
33struct gpio_rcar_priv {
34 void __iomem *base;
35 spinlock_t lock;
36 struct gpio_rcar_config config;
37 struct platform_device *pdev;
38 struct gpio_chip gpio_chip;
39 struct irq_chip irq_chip;
Magnus Damm119f5e42013-03-13 20:32:13 +090040};
41
42#define IOINTSEL 0x00
43#define INOUTSEL 0x04
44#define OUTDT 0x08
45#define INDT 0x0c
46#define INTDT 0x10
47#define INTCLR 0x14
48#define INTMSK 0x18
49#define MSKCLR 0x1c
50#define POSNEG 0x20
51#define EDGLEVEL 0x24
52#define FILONOFF 0x28
Simon Horman7e1092b2013-05-24 18:47:24 +090053#define BOTHEDGE 0x4c
Magnus Damm119f5e42013-03-13 20:32:13 +090054
Laurent Pinchart159f8a02013-05-21 13:40:06 +020055#define RCAR_MAX_GPIO_PER_BANK 32
56
Magnus Damm119f5e42013-03-13 20:32:13 +090057static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)
58{
59 return ioread32(p->base + offs);
60}
61
62static inline void gpio_rcar_write(struct gpio_rcar_priv *p, int offs,
63 u32 value)
64{
65 iowrite32(value, p->base + offs);
66}
67
68static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs,
69 int bit, bool value)
70{
71 u32 tmp = gpio_rcar_read(p, offs);
72
73 if (value)
74 tmp |= BIT(bit);
75 else
76 tmp &= ~BIT(bit);
77
78 gpio_rcar_write(p, offs, tmp);
79}
80
81static void gpio_rcar_irq_disable(struct irq_data *d)
82{
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +010083 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
84 struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
85 gpio_chip);
Magnus Damm119f5e42013-03-13 20:32:13 +090086
87 gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d)));
88}
89
90static void gpio_rcar_irq_enable(struct irq_data *d)
91{
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +010092 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
93 struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
94 gpio_chip);
Magnus Damm119f5e42013-03-13 20:32:13 +090095
96 gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d)));
97}
98
99static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,
100 unsigned int hwirq,
101 bool active_high_rising_edge,
Simon Horman7e1092b2013-05-24 18:47:24 +0900102 bool level_trigger,
103 bool both)
Magnus Damm119f5e42013-03-13 20:32:13 +0900104{
105 unsigned long flags;
106
107 /* follow steps in the GPIO documentation for
108 * "Setting Edge-Sensitive Interrupt Input Mode" and
109 * "Setting Level-Sensitive Interrupt Input Mode"
110 */
111
112 spin_lock_irqsave(&p->lock, flags);
113
114 /* Configure postive or negative logic in POSNEG */
115 gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge);
116
117 /* Configure edge or level trigger in EDGLEVEL */
118 gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger);
119
Simon Horman7e1092b2013-05-24 18:47:24 +0900120 /* Select one edge or both edges in BOTHEDGE */
121 if (p->config.has_both_edge_trigger)
122 gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both);
123
Magnus Damm119f5e42013-03-13 20:32:13 +0900124 /* Select "Interrupt Input Mode" in IOINTSEL */
125 gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true);
126
127 /* Write INTCLR in case of edge trigger */
128 if (!level_trigger)
129 gpio_rcar_write(p, INTCLR, BIT(hwirq));
130
131 spin_unlock_irqrestore(&p->lock, flags);
132}
133
134static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)
135{
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100136 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
137 struct gpio_rcar_priv *p = container_of(gc, struct gpio_rcar_priv,
138 gpio_chip);
Magnus Damm119f5e42013-03-13 20:32:13 +0900139 unsigned int hwirq = irqd_to_hwirq(d);
140
141 dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type);
142
143 switch (type & IRQ_TYPE_SENSE_MASK) {
144 case IRQ_TYPE_LEVEL_HIGH:
Simon Horman7e1092b2013-05-24 18:47:24 +0900145 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true,
146 false);
Magnus Damm119f5e42013-03-13 20:32:13 +0900147 break;
148 case IRQ_TYPE_LEVEL_LOW:
Simon Horman7e1092b2013-05-24 18:47:24 +0900149 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true,
150 false);
Magnus Damm119f5e42013-03-13 20:32:13 +0900151 break;
152 case IRQ_TYPE_EDGE_RISING:
Simon Horman7e1092b2013-05-24 18:47:24 +0900153 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
154 false);
Magnus Damm119f5e42013-03-13 20:32:13 +0900155 break;
156 case IRQ_TYPE_EDGE_FALLING:
Simon Horman7e1092b2013-05-24 18:47:24 +0900157 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false,
158 false);
159 break;
160 case IRQ_TYPE_EDGE_BOTH:
161 if (!p->config.has_both_edge_trigger)
162 return -EINVAL;
163 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
164 true);
Magnus Damm119f5e42013-03-13 20:32:13 +0900165 break;
166 default:
167 return -EINVAL;
168 }
169 return 0;
170}
171
172static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
173{
174 struct gpio_rcar_priv *p = dev_id;
175 u32 pending;
176 unsigned int offset, irqs_handled = 0;
177
Valentine Barshak8808b642013-11-29 22:04:09 +0400178 while ((pending = gpio_rcar_read(p, INTDT) &
179 gpio_rcar_read(p, INTMSK))) {
Magnus Damm119f5e42013-03-13 20:32:13 +0900180 offset = __ffs(pending);
181 gpio_rcar_write(p, INTCLR, BIT(offset));
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100182 generic_handle_irq(irq_find_mapping(p->gpio_chip.irqdomain,
183 offset));
Magnus Damm119f5e42013-03-13 20:32:13 +0900184 irqs_handled++;
185 }
186
187 return irqs_handled ? IRQ_HANDLED : IRQ_NONE;
188}
189
190static inline struct gpio_rcar_priv *gpio_to_priv(struct gpio_chip *chip)
191{
192 return container_of(chip, struct gpio_rcar_priv, gpio_chip);
193}
194
195static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,
196 unsigned int gpio,
197 bool output)
198{
199 struct gpio_rcar_priv *p = gpio_to_priv(chip);
200 unsigned long flags;
201
202 /* follow steps in the GPIO documentation for
203 * "Setting General Output Mode" and
204 * "Setting General Input Mode"
205 */
206
207 spin_lock_irqsave(&p->lock, flags);
208
209 /* Configure postive logic in POSNEG */
210 gpio_rcar_modify_bit(p, POSNEG, gpio, false);
211
212 /* Select "General Input/Output Mode" in IOINTSEL */
213 gpio_rcar_modify_bit(p, IOINTSEL, gpio, false);
214
215 /* Select Input Mode or Output Mode in INOUTSEL */
216 gpio_rcar_modify_bit(p, INOUTSEL, gpio, output);
217
218 spin_unlock_irqrestore(&p->lock, flags);
219}
220
Laurent Pinchartdc3465a2013-03-10 03:27:00 +0100221static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
222{
223 return pinctrl_request_gpio(chip->base + offset);
224}
225
226static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
227{
228 pinctrl_free_gpio(chip->base + offset);
229
230 /* Set the GPIO as an input to ensure that the next GPIO request won't
231 * drive the GPIO pin as an output.
232 */
233 gpio_rcar_config_general_input_output_mode(chip, offset, false);
234}
235
Magnus Damm119f5e42013-03-13 20:32:13 +0900236static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
237{
238 gpio_rcar_config_general_input_output_mode(chip, offset, false);
239 return 0;
240}
241
242static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)
243{
Magnus Dammae9550f2013-06-17 08:41:52 +0900244 u32 bit = BIT(offset);
245
246 /* testing on r8a7790 shows that INDT does not show correct pin state
247 * when configured as output, so use OUTDT in case of output pins */
248 if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit)
Jürg Billeter7cb54092014-06-24 04:19:50 +0200249 return !!(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit);
Magnus Dammae9550f2013-06-17 08:41:52 +0900250 else
Jürg Billeter7cb54092014-06-24 04:19:50 +0200251 return !!(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit);
Magnus Damm119f5e42013-03-13 20:32:13 +0900252}
253
254static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
255{
256 struct gpio_rcar_priv *p = gpio_to_priv(chip);
257 unsigned long flags;
258
259 spin_lock_irqsave(&p->lock, flags);
260 gpio_rcar_modify_bit(p, OUTDT, offset, value);
261 spin_unlock_irqrestore(&p->lock, flags);
262}
263
264static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset,
265 int value)
266{
267 /* write GPIO value to output before selecting output mode of pin */
268 gpio_rcar_set(chip, offset, value);
269 gpio_rcar_config_general_input_output_mode(chip, offset, true);
270 return 0;
271}
272
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100273struct gpio_rcar_info {
274 bool has_both_edge_trigger;
275};
276
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900277static const struct gpio_rcar_info gpio_rcar_info_gen1 = {
278 .has_both_edge_trigger = false,
279};
280
281static const struct gpio_rcar_info gpio_rcar_info_gen2 = {
282 .has_both_edge_trigger = true,
283};
284
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100285static const struct of_device_id gpio_rcar_of_table[] = {
286 {
287 .compatible = "renesas,gpio-r8a7790",
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900288 .data = &gpio_rcar_info_gen2,
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100289 }, {
290 .compatible = "renesas,gpio-r8a7791",
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900291 .data = &gpio_rcar_info_gen2,
292 }, {
293 .compatible = "renesas,gpio-r8a7793",
294 .data = &gpio_rcar_info_gen2,
295 }, {
296 .compatible = "renesas,gpio-r8a7794",
297 .data = &gpio_rcar_info_gen2,
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100298 }, {
299 .compatible = "renesas,gpio-rcar",
Hisashi Nakamura1fd2b492014-11-07 20:54:08 +0900300 .data = &gpio_rcar_info_gen1,
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100301 }, {
302 /* Terminator */
303 },
304};
305
306MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
307
308static int gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200309{
Jingoo Hane56aee12013-07-30 17:08:05 +0900310 struct gpio_rcar_config *pdata = dev_get_platdata(&p->pdev->dev);
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200311 struct device_node *np = p->pdev->dev.of_node;
312 struct of_phandle_args args;
313 int ret;
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200314
Laurent Pincharte3050622013-06-18 12:29:49 +0200315 if (pdata) {
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200316 p->config = *pdata;
Laurent Pincharte3050622013-06-18 12:29:49 +0200317 } else if (IS_ENABLED(CONFIG_OF) && np) {
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100318 const struct of_device_id *match;
319 const struct gpio_rcar_info *info;
320
321 match = of_match_node(gpio_rcar_of_table, np);
322 if (!match)
323 return -EINVAL;
324
325 info = match->data;
326
Laurent Pinchart01eb2d12013-09-11 15:51:01 +0200327 ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0,
328 &args);
329 p->config.number_of_pins = ret == 0 ? args.args[2]
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200330 : RCAR_MAX_GPIO_PER_BANK;
331 p->config.gpio_base = -1;
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100332 p->config.has_both_edge_trigger = info->has_both_edge_trigger;
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200333 }
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200334
335 if (p->config.number_of_pins == 0 ||
336 p->config.number_of_pins > RCAR_MAX_GPIO_PER_BANK) {
337 dev_warn(&p->pdev->dev,
338 "Invalid number of gpio lines %u, using %u\n",
339 p->config.number_of_pins, RCAR_MAX_GPIO_PER_BANK);
340 p->config.number_of_pins = RCAR_MAX_GPIO_PER_BANK;
341 }
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100342
343 return 0;
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200344}
345
Magnus Damm119f5e42013-03-13 20:32:13 +0900346static int gpio_rcar_probe(struct platform_device *pdev)
347{
Magnus Damm119f5e42013-03-13 20:32:13 +0900348 struct gpio_rcar_priv *p;
349 struct resource *io, *irq;
350 struct gpio_chip *gpio_chip;
351 struct irq_chip *irq_chip;
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100352 struct device *dev = &pdev->dev;
353 const char *name = dev_name(dev);
Magnus Damm119f5e42013-03-13 20:32:13 +0900354 int ret;
355
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100356 p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL);
Geert Uytterhoeven7d82bf32015-01-12 11:07:58 +0100357 if (!p)
358 return -ENOMEM;
Magnus Damm119f5e42013-03-13 20:32:13 +0900359
Magnus Damm119f5e42013-03-13 20:32:13 +0900360 p->pdev = pdev;
Magnus Damm119f5e42013-03-13 20:32:13 +0900361 spin_lock_init(&p->lock);
362
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200363 /* Get device configuration from DT node or platform data. */
Laurent Pinchart850dfe12013-11-29 14:48:00 +0100364 ret = gpio_rcar_parse_pdata(p);
365 if (ret < 0)
366 return ret;
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200367
368 platform_set_drvdata(pdev, p);
369
Geert Uytterhoevendf0c6c82014-04-14 20:33:13 +0200370 pm_runtime_enable(dev);
371 pm_runtime_get_sync(dev);
372
Magnus Damm119f5e42013-03-13 20:32:13 +0900373 io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
374 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
375
376 if (!io || !irq) {
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100377 dev_err(dev, "missing IRQ or IOMEM\n");
Magnus Damm119f5e42013-03-13 20:32:13 +0900378 ret = -EINVAL;
379 goto err0;
380 }
381
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100382 p->base = devm_ioremap_nocache(dev, io->start, resource_size(io));
Magnus Damm119f5e42013-03-13 20:32:13 +0900383 if (!p->base) {
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100384 dev_err(dev, "failed to remap I/O memory\n");
Magnus Damm119f5e42013-03-13 20:32:13 +0900385 ret = -ENXIO;
386 goto err0;
387 }
388
389 gpio_chip = &p->gpio_chip;
Laurent Pinchartdc3465a2013-03-10 03:27:00 +0100390 gpio_chip->request = gpio_rcar_request;
391 gpio_chip->free = gpio_rcar_free;
Magnus Damm119f5e42013-03-13 20:32:13 +0900392 gpio_chip->direction_input = gpio_rcar_direction_input;
393 gpio_chip->get = gpio_rcar_get;
394 gpio_chip->direction_output = gpio_rcar_direction_output;
395 gpio_chip->set = gpio_rcar_set;
Magnus Damm119f5e42013-03-13 20:32:13 +0900396 gpio_chip->label = name;
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100397 gpio_chip->dev = dev;
Magnus Damm119f5e42013-03-13 20:32:13 +0900398 gpio_chip->owner = THIS_MODULE;
399 gpio_chip->base = p->config.gpio_base;
400 gpio_chip->ngpio = p->config.number_of_pins;
401
402 irq_chip = &p->irq_chip;
403 irq_chip->name = name;
404 irq_chip->irq_mask = gpio_rcar_irq_disable;
405 irq_chip->irq_unmask = gpio_rcar_irq_enable;
Magnus Damm119f5e42013-03-13 20:32:13 +0900406 irq_chip->irq_set_type = gpio_rcar_irq_set_type;
Magnus Damm40396112013-11-20 09:23:17 +0900407 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED
408 | IRQCHIP_MASK_ON_SUSPEND;
Magnus Damm119f5e42013-03-13 20:32:13 +0900409
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100410 ret = gpiochip_add(gpio_chip);
411 if (ret) {
412 dev_err(dev, "failed to add GPIO controller\n");
Dan Carpenter0c8aab82013-11-07 10:56:51 +0300413 goto err0;
Magnus Damm119f5e42013-03-13 20:32:13 +0900414 }
415
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100416 ret = gpiochip_irqchip_add(&p->gpio_chip, irq_chip, p->config.irq_base,
417 handle_level_irq, IRQ_TYPE_NONE);
418 if (ret) {
419 dev_err(dev, "cannot add irqchip\n");
420 goto err1;
421 }
422
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100423 if (devm_request_irq(dev, irq->start, gpio_rcar_irq_handler,
424 IRQF_SHARED, name, p)) {
425 dev_err(dev, "failed to request IRQ\n");
Magnus Damm119f5e42013-03-13 20:32:13 +0900426 ret = -ENOENT;
427 goto err1;
428 }
429
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100430 dev_info(dev, "driving %d GPIOs\n", p->config.number_of_pins);
Magnus Damm119f5e42013-03-13 20:32:13 +0900431
432 /* warn in case of mismatch if irq base is specified */
433 if (p->config.irq_base) {
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100434 ret = irq_find_mapping(p->gpio_chip.irqdomain, 0);
Magnus Damm119f5e42013-03-13 20:32:13 +0900435 if (p->config.irq_base != ret)
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100436 dev_warn(dev, "irq base mismatch (%u/%u)\n",
Magnus Damm119f5e42013-03-13 20:32:13 +0900437 p->config.irq_base, ret);
438 }
439
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200440 if (p->config.pctl_name) {
441 ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0,
442 gpio_chip->base, gpio_chip->ngpio);
443 if (ret < 0)
Geert Uytterhoevenb22978f2014-03-27 21:47:36 +0100444 dev_warn(dev, "failed to add pin range\n");
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200445 }
Laurent Pinchartdc3465a2013-03-10 03:27:00 +0100446
Magnus Damm119f5e42013-03-13 20:32:13 +0900447 return 0;
448
449err1:
Geert Uytterhoevenc7f3c5d2015-01-12 11:07:59 +0100450 gpiochip_remove(&p->gpio_chip);
Magnus Damm119f5e42013-03-13 20:32:13 +0900451err0:
Geert Uytterhoevendf0c6c82014-04-14 20:33:13 +0200452 pm_runtime_put(dev);
453 pm_runtime_disable(dev);
Magnus Damm119f5e42013-03-13 20:32:13 +0900454 return ret;
455}
456
457static int gpio_rcar_remove(struct platform_device *pdev)
458{
459 struct gpio_rcar_priv *p = platform_get_drvdata(pdev);
Magnus Damm119f5e42013-03-13 20:32:13 +0900460
abdoulaye berthe9f5132a2014-07-12 22:30:12 +0200461 gpiochip_remove(&p->gpio_chip);
Magnus Damm119f5e42013-03-13 20:32:13 +0900462
Geert Uytterhoevendf0c6c82014-04-14 20:33:13 +0200463 pm_runtime_put(&pdev->dev);
464 pm_runtime_disable(&pdev->dev);
Magnus Damm119f5e42013-03-13 20:32:13 +0900465 return 0;
466}
467
468static struct platform_driver gpio_rcar_device_driver = {
469 .probe = gpio_rcar_probe,
470 .remove = gpio_rcar_remove,
471 .driver = {
472 .name = "gpio_rcar",
Laurent Pinchart159f8a02013-05-21 13:40:06 +0200473 .of_match_table = of_match_ptr(gpio_rcar_of_table),
Magnus Damm119f5e42013-03-13 20:32:13 +0900474 }
475};
476
477module_platform_driver(gpio_rcar_device_driver);
478
479MODULE_AUTHOR("Magnus Damm");
480MODULE_DESCRIPTION("Renesas R-Car GPIO Driver");
481MODULE_LICENSE("GPL v2");